drivers: caam: dma: fix copy data size

After each crypto operation that involves a DMA output, the content of
the SGT buffer is copied to the actual output buffer. Fix the DMA copy
function where th

drivers: caam: dma: fix copy data size

After each crypto operation that involves a DMA output, the content of
the SGT buffer is copied to the actual output buffer. Fix the DMA copy
function where the size of the data to be copied is either the full size
of the data processed by the CAAM (obj->sgtbuf.length) or the size of
the output buffer.

In some cases, the output buffer is smaller than the CAAM output. The
size of data to be copied is the smallest size between the CAAM output
data size and the output buffer size.

Fixes: 38923d4 ("drivers: caam: implement CAAM DMA Object")
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: imx: crypto_conf: i.mx 7ulp does not support CAAM PKHA

There is no support for CAAM PKHA in i.MX 7ULP SOC.

Fixes: c3d61ba ("core: imx: Add imx7ulp evk board support")
Signed-off-by: Silvano d

core: imx: crypto_conf: i.mx 7ulp does not support CAAM PKHA

There is no support for CAAM PKHA in i.MX 7ULP SOC.

Fixes: c3d61ba ("core: imx: Add imx7ulp evk board support")
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: add RNG data check error code

Check if the CAAM RNG driver returns DATA_FAILURE error code.
If the data check returns DATA_FAILURE, the function returns
CAAM_FAILURE.

Fixes: 2d7a896

drivers: caam: add RNG data check error code

Check if the CAAM RNG driver returns DATA_FAILURE error code.
If the data check returns DATA_FAILURE, the function returns
CAAM_FAILURE.

Fixes: 2d7a896 ("driver: implement CAAM driver")
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: fix CAAM Job Ring halt/flush/cancel

Fix CAAM halt/flush jobs by calling dequeue operation to complete all jobs.
Add spinlock management in the cancel function because of the shared JR

drivers: caam: fix CAAM Job Ring halt/flush/cancel

Fix CAAM halt/flush jobs by calling dequeue operation to complete all jobs.
Add spinlock management in the cancel function because of the shared JR
structure.

Fixes: 2d7a896 ("driver: implement CAAM driver")
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: Fix hal clock registers read/write

Fix CAAM Clock registers access to use io_read/write() functions and
not io_caam_read/write().

Fixes: 2d7a896 ("driver: implement CAAM driver")
Sig

drivers: caam: Fix hal clock registers read/write

Fix CAAM Clock registers access to use io_read/write() functions and
not io_caam_read/write().

Fixes: 2d7a896 ("driver: implement CAAM driver")
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: fix hal control split key detection

Fix the CAAM Version ID MS register address (CAAM Control + JR Offset).
Change HAL caam_hal_ctrl_splitkey() to read the parameters register LS
bit

drivers: caam: fix hal control split key detection

Fix the CAAM Version ID MS register address (CAAM Control + JR Offset).
Change HAL caam_hal_ctrl_splitkey() to read the parameters register LS
bit 14 (SPLIT_KEY) that indicates the support for the split key.

Fixes: 81ab436 ("drivers: caam: implement NXP CAAM Driver - HMAC")
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: hwrng fix perf drop after suspend/resume

RNG performance drops after a suspend/resume cycle on parts where caam
loses power, since the initial U-boot settings are not restored by OP-T

drivers: caam: hwrng fix perf drop after suspend/resume

RNG performance drops after a suspend/resume cycle on parts where caam
loses power, since the initial U-boot settings are not restored by OP-TEE
when resuming.
Modifying the TRNG "sample size" (the total number of entropy samples that
will be taken during entropy generation) from it's default conservative
value of 2500 to be more in line with the "sample size" that the caam
driver in U-boot/Linux kernel select(512) will solve the performance hit.

Changed the default minimum entropy delay value for I.MX 6SX from 4800
to 3200 to be in line with U-boot and Kernel setting for this value.
The higher default entropy delay value for OP-TEE would have caused a
perceived performance hit after/suspend resume.

Fixes: 2d7a896 ("driver: implement CAAM driver")
Signed-off-by: Dragos Rosioru <dragos.rosioru@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: fix missing output additional length

CAAM HW Module requires additional bytes in output buffer
to perform the requested operation.
This is the case for ECDSA operation, signature must

drivers: caam: fix missing output additional length

CAAM HW Module requires additional bytes in output buffer
to perform the requested operation.
This is the case for ECDSA operation, signature must be 16 bytes
aligned.
The CAAM DMA object is adding the required bytes if the signature
output buffer is too short. The issue is that this additional
bytes were not added in the DMA buffer to be allocated.

Fixes: 38923d4 ("drivers: caam: implement CAAM DMA Object")
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: ack the interrupt when completing a job

The ITR will only be acked if the job finishes between the
do_jr_dequeue() and caam_hal_jr_check_ack_itr().
With this fix, we ensure the ITR is

drivers: caam: ack the interrupt when completing a job

The ITR will only be acked if the job finishes between the
do_jr_dequeue() and caam_hal_jr_check_ack_itr().
With this fix, we ensure the ITR is acked when leaving
caam_jr_dequeue() function.

Fixes: 2d7a896 ("driver: implement CAAM driver")
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: imx: rework digprog driver

Rework digprog read value for all i.MX platforms.
Add the distinction between i.MX8MQ B0 and B1 platforms.
Add soc_is_*() functions for all i.MX8mscale platforms.

F

core: imx: rework digprog driver

Rework digprog read value for all i.MX platforms.
Add the distinction between i.MX8MQ B0 and B1 platforms.
Add soc_is_*() functions for all i.MX8mscale platforms.

Fixes: 247f081a95 ("core: imx: re-work SoC version detection")
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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core: imx: introduce CFG_MX8M compilation flag

Introduce the CFG_MX8M compilation flag that designates the following
platforms:
* mx8mmevk
* mx8mnevk
* mx8mpevk
* mx8mqevk
It is used to define c

core: imx: introduce CFG_MX8M compilation flag

Introduce the CFG_MX8M compilation flag that designates the following
platforms:
* mx8mmevk
* mx8mnevk
* mx8mpevk
* mx8mqevk
It is used to define code and features common to i.MX8mscale
platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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core: dt: fix missing const attribute on fdt reference

The standard FDT reference in libfdt and friends is a const void *. Fix
few function prototypes that miss the const attribute.

Signed-off-by:

core: dt: fix missing const attribute on fdt reference

The standard FDT reference in libfdt and friends is a const void *. Fix
few function prototypes that miss the const attribute.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>

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plat-ls: conf.mk: correct Embedded DTB flag

Emebedded DTB flag is CFG_EMBED_DTB which was wrongly
set as CFG_EMBED_DT.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Etienne Carri

plat-ls: conf.mk: correct Embedded DTB flag

Emebedded DTB flag is CFG_EMBED_DTB which was wrongly
set as CFG_EMBED_DT.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-sam: remove useless function in sam_pl310.c

l2_sram_config() is currently only used to set L2 SRAM for L2 cache.
Remove it and use io_write32() directly.

Signed-off-by: Clément Léger <clement.

plat-sam: remove useless function in sam_pl310.c

l2_sram_config() is currently only used to set L2 SRAM for L2 cache.
Remove it and use io_write32() directly.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-sam: move pl310 related code to its own file

Cleanup main.c by moving pl310 code to sam_pl310.c file.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Jerome Forissier <jerom

plat-sam: move pl310 related code to its own file

Cleanup main.c by moving pl310 code to sam_pl310.c file.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-sam: move secure zone to 0x20000000

Since DRAM size can vary depending on the platforms, 0x30000000 won't
work for some of them (sama5d27_som1_ek for instance with only 128Mb of
DRAM).
Move OP-

plat-sam: move secure zone to 0x20000000

Since DRAM size can vary depending on the platforms, 0x30000000 won't
work for some of them (sama5d27_som1_ek for instance with only 128Mb of
DRAM).
Move OP-TEE secure zone to 0x20000000 which will work for all devices.
During these changes, remove the possibility to override TZDRAM address
and size because since matrix configuration can't be changed easily, it
makes no sense to allow modifying them.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-sam: switch to generic_ram_layout.h

Remove existing defines from platform_config.h to use generic ram layout
instead.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Jerome

plat-sam: switch to generic_ram_layout.h

Remove existing defines from platform_config.h to use generic ram layout
instead.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-sam: rename peripheral security function

Use more relevant names for peripheral security configuration function.
Indeed these functions set the peripherals as non-secure. Since
checkpatch warne

plat-sam: rename peripheral security function

Use more relevant names for peripheral security configuration function.
Indeed these functions set the peripherals as non-secure. Since
checkpatch warned that extern is unnecessary in header, remove it.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-sam: set correct name for ID 1 which is PMC

AT91_ID_1 is in fact referring to the power management controller (PMC).
Replace it with AT91_ID_PMC.

Signed-off-by: Clément Léger <clement.leger@bo

plat-sam: set correct name for ID 1 which is PMC

AT91_ID_1 is in fact referring to the power management controller (PMC).
Replace it with AT91_ID_PMC.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-sam: matrix: remove wrong quirk for matrix id

Previous comment stated that the ID breaks at id 73 which is not the
case according to the datasheet. Remove this quirk which allow the last
periph

plat-sam: matrix: remove wrong quirk for matrix id

Previous comment stated that the ID breaks at id 73 which is not the
case according to the datasheet. Remove this quirk which allow the last
peripherals to be configured correctly. CHIPID peripheral can now be
correctly accessed by normal world when delegated.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-stm32mp1: Don't call get_embedded_dt() without CFG_EMBED_DT

Several pieces of stm32mp1 code call get_embedded_dt(), then use the
resulting pointer without checks, or initiate a panic if it is N

plat-stm32mp1: Don't call get_embedded_dt() without CFG_EMBED_DT

Several pieces of stm32mp1 code call get_embedded_dt(), then use the
resulting pointer without checks, or initiate a panic if it is NULL.
Thus hitting this code results in a non-working binary. For example:

"PLATFORM=stm32mp1 CFG_DT=y"

The get_embedded_dt() uses were #ifdef'd out based on CFG_DT. However,
as shown, this is problematic, as the calls assumed a valid fdt must
be returned. A non-NULL fdt can be guaranteed with CFG_EMBED_DT, so
use this as the basis for the #ifdefs.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: register main heap first

Swap heap1 and heap2 malloc pools registration in init_runtime()
(case CFG_WITH_PAGER=y) since heap2 is the main heap part, heap1
being always < 4kB. This change ensur

core: register main heap first

Swap heap1 and heap2 malloc pools registration in init_runtime()
(case CFG_WITH_PAGER=y) since heap2 is the main heap part, heap1
being always < 4kB. This change ensures the first heap pool registered
into bget is large enough regarding bget initial pool constraint while
heap2 might to too small for that purpose.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: remove interrupt test PTA

The interrupt test PTA does not support CFG_TEE_CORE_NB_CORE > 7 and
there is a compilation warning when it is > 31:

$ make -s CFG_TEE_CORE_NB_CORE=32 CFG_TEE_CORE_

core: remove interrupt test PTA

The interrupt test PTA does not support CFG_TEE_CORE_NB_CORE > 7 and
there is a compilation warning when it is > 31:

$ make -s CFG_TEE_CORE_NB_CORE=32 CFG_TEE_CORE_EMBED_INTERNAL_TESTS=y \
CFG_WERROR=y
In file included from core/include/kernel/interrupt.h:10,
from core/pta/tests/interrupt.c:7:
core/pta/tests/interrupt.c: In function ‘test_sgi’:
lib/libutils/ext/include/util.h:117:44: error: left shift count >= width of type [-Werror=shift-count-overflow]
117 | #define SHIFT_U32(v, shift) ((uint32_t)(v) << (shift))
| ^~
core/pta/tests/interrupt.c:97:18: note: in expansion of macro ‘SHIFT_U32’
97 | (uint8_t)(SHIFT_U32(1, CFG_TEE_CORE_NB_CORE) - 1));
| ^~~~~~~~~
cc1: all warnings being treated as errors

Since this PTA is unused, remove it.

Signed-off-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: ltc: fix missing mutex unlock

Fixes a missing mutex unlock on an out of memory error
in ltc_ecc_fp_save_state().

Signed-off-by: Ryan Cai <ycaibb@gmail.com>
Reviewed-by: Jens Wiklander <jens.w

core: ltc: fix missing mutex unlock

Fixes a missing mutex unlock on an out of memory error
in ltc_ecc_fp_save_state().

Signed-off-by: Ryan Cai <ycaibb@gmail.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: dt: add option to generate DTB overlay at boot

When using a memory persistent across reboots for external dtb overlay
(DRAM for instance) OP-TEE will reuse the existing dtb overlay if
CFG_EXTE

core: dt: add option to generate DTB overlay at boot

When using a memory persistent across reboots for external dtb overlay
(DRAM for instance) OP-TEE will reuse the existing dtb overlay if
CFG_EXTERNAL_DTB_OVERLAY is used. This will result in a big overlay
with duplicated nodes. In order to allow having a fresh DTB overlay
at boot, add CFG_GENERATE_DTB_OVERLAY to generate the DTB overlay at
OP-TEE boot time.
Both CFG_GENERATE_DTB_OVERLAY and CFG_EXTERNAL_DTB_OVERLAY will now
consider using the dtb address provided in r2 as well as CFG_DT_ADDR
to create the overlay if not existing.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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