drivers: scmi-msg: fix protocol list querying

Corrects the function reporting the SCMI protocols supported by the
platform to not assume 8 protocol IDs at most can be returned. Indeed
the number of

drivers: scmi-msg: fix protocol list querying

Corrects the function reporting the SCMI protocols supported by the
platform to not assume 8 protocol IDs at most can be returned. Indeed
the number of protocol IDs returned depends on the SCMI output buffer
size.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: scmi-msg: fix protocol list response size

Corrects the size of the SCMI response payload when querying the list
of the supported protocol. This response payload size depends on the
number o

drivers: scmi-msg: fix protocol list response size

Corrects the size of the SCMI response payload when querying the list
of the supported protocol. This response payload size depends on the
number of protocols enumerated by the response.

Reported-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Link: https://lore.kernel.org/lkml/1698297.NAKyZzlH2u@archbook
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: scmi-msg: move entry functions to generic entry

Moves SCMI channel management entry helper functions from smt.c to
generic source file entry.c. This change will ease integration of
other SC

drivers: scmi-msg: move entry functions to generic entry

Moves SCMI channel management entry helper functions from smt.c to
generic source file entry.c. This change will ease integration of
other SCMI shared memory message passing protocol.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: scmi-msg: rename chan to channel

Renames local variables chan to channel in smt.c.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@li

drivers: scmi-msg: rename chan to channel

Renames local variables chan to channel in smt.c.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: scmi-msg: handle invalid channels

Changes implementation channel_to_smt_hdr() of SMT message management
in scmi-msg driver to support being called with invalid channel ID
to relax implement

drivers: scmi-msg: handle invalid channels

Changes implementation channel_to_smt_hdr() of SMT message management
in scmi-msg driver to support being called with invalid channel ID
to relax implementation. On contrary, scmi_smt_init_agent_channel()
is expected to be called only for valid SMT channels.

By the way, with this change, scmi_entry_smt() read SMT header status
from shared memory after channel in successfully claimed, not before.
The change does not affect the communication and makes the implementation
more consistent. For consistency, I also rename local variables chan to
channel to be more explicit.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: scmi-msg: correct inline description

Fixes inline description comment of plat_scmi_clock_rates_array()
and scmi_smt_init_agent_channel().

Acked-by: Jens Wiklander <jens.wiklander@linaro.or

drivers: scmi-msg: correct inline description

Fixes inline description comment of plat_scmi_clock_rates_array()
and scmi_smt_init_agent_channel().

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: scmi-msg: clock adapts to output buffer size

Changes SCMI clocks implementation to not assume the SCMI output
message buffer is of a given size. Implementation still expects the
output shar

drivers: scmi-msg: clock adapts to output buffer size

Changes SCMI clocks implementation to not assume the SCMI output
message buffer is of a given size. Implementation still expects the
output shared memory is at least large enough to hold the SCMI status
information that is 32bit wide.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: scmi-msg: voltage domain adapts to output buffer size

Changes SCMI voltage domain implementation to not assume the SCMI output
message buffer is of a given size. Implementation still expect

drivers: scmi-msg: voltage domain adapts to output buffer size

Changes SCMI voltage domain implementation to not assume the SCMI output
message buffer is of a given size. Implementation still expects the
output shared memory is at least large enough to hold the SCMI status
information that is 32bit wide.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: scmi-msg: relax constraint on output buffer size

Changes scmi_write_response() implementation to not assert the output
buffer size against target payload but return a protocol error instead

drivers: scmi-msg: relax constraint on output buffer size

Changes scmi_write_response() implementation to not assert the output
buffer size against target payload but return a protocol error instead
since we expect shared memory size where agreed on before communication.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: scmi-msg: remove unused macro LEVELS_ARRAY_SIZE_MAX_2

Removes macro LEVELS_ARRAY_SIZE_MAX_2 in scmi-msg voltage-domain.c
source file.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
S

drivers: scmi-msg: remove unused macro LEVELS_ARRAY_SIZE_MAX_2

Removes macro LEVELS_ARRAY_SIZE_MAX_2 in scmi-msg voltage-domain.c
source file.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: scmi-msg: rename secure buffer size macros

Renames macro SCMI_PLAYLOAD_MAX to SCMI_SEC_PAYLOAD_SIZE and
SCMI_PLAYLOAD_U32_MAX to SCMI_PAYLOAD_U32_SIZE to fix typo in macro name
(play to pay

drivers: scmi-msg: rename secure buffer size macros

Renames macro SCMI_PLAYLOAD_MAX to SCMI_SEC_PAYLOAD_SIZE and
SCMI_PLAYLOAD_U32_MAX to SCMI_PAYLOAD_U32_SIZE to fix typo in macro name
(play to pay) and make it clear that SCMI_SEC_PAYLOAD_SIZE is the size
of the secure buffer used to store a secure copy of the input SCMI
message payload, that is expected small.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: scmi-msg: rename channel entry lock functions

Renames scmi_channel_set_busy() and scmi_channel_release_busy()
to scmi_msg_claim_channel() and scmi_msg_release_channel(). This
change also mo

drivers: scmi-msg: rename channel entry lock functions

Renames scmi_channel_set_busy() and scmi_channel_release_busy()
to scmi_msg_claim_channel() and scmi_msg_release_channel(). This
change also moves the implementation from smt.c to entry.c in
the scmi-msg driver for alternate mailbox memory protocol support.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: decrease register size for gicv2

The mapped size for GIC distributor and cpu registers is currently
defined to the size used for GICv3. GICv2 doesn't need such large sizes,
in fact some platfo

core: decrease register size for gicv2

The mapped size for GIC distributor and cpu registers is currently
defined to the size used for GICv3. GICv2 doesn't need such large sizes,
in fact some platforms has the distributor and cpu registers next to
each other in the physical memory map. This causes an overlap that can
be confusing. Fix this by selecting a smaller size when a GICv2 is used
instead.

It should be noted GICC_DIR is at offset 0x1000 in the cpu interface so
this register will not be accessible, but this should not be a problem
since OP-TEE doesn't use that register.

Reviewed-by: Vishnu Banavath <vishnu.banavath@arm.com>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: imx: link: generate entry_point_address.txt for uTee image

For some platforms like mx7ulpevk, the `UL` attribute for CFG_DRAM_BASE
is necessary to avoid the following error:

$ PLATFORM=imx-mx

core: imx: link: generate entry_point_address.txt for uTee image

For some platforms like mx7ulpevk, the `UL` attribute for CFG_DRAM_BASE
is necessary to avoid the following error:

$ PLATFORM=imx-mx7ulpevk make uTee
core/mm/mobj.c: In function ‘mobj_init’:
./out/arm-plat-imx/include/generated/conf.h:222:64: warning: integer overflow in expression of type ‘int’ results in ‘-1644167168’ [-Woverflow]
222 | #define CFG_TZDRAM_START (0x60000000 - 0x01e00000 - 0x00200000 + 0x40000000)
| ^

However, this `UL` attribute prevents the shell from properly computing
the CFG_TZDRAM_START value :

$ PLATFORM=imx-mx7ulpevk make uTee
bash: (UL(0x60000000) - 0x01e00000 - 0x00200000 + 0x40000000): missing `)' (error token is "(0x60000000) - 0x01e00000 - 0x00200000 + 0x40000000)")

To address both issues, remove the `UL` attribute from CFG_TZDRAM_START
with Makefile string substitution.

Fixes: 0f8347dcafe ("core: imx: generate uImage for imx6 and imx7 platforms")
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: caam: fix cache operation on SGT table

The cache operation of the SGT table in caam_sgt_derive() was wrong and
it did not take into account the CAAM "burst" defined by the value
CFG_CAAM_SG

drivers: caam: fix cache operation on SGT table

The cache operation of the SGT table in caam_sgt_derive() was wrong and
it did not take into account the CAAM "burst" defined by the value
CFG_CAAM_SGT_ALIGN.
The cache operation of the SGT table in caam_sgt_cache_op() is done
correctly however.

This patch adds caam_sgt_entries_cache_clean() to do this operation and
avoid implementation errors.

Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: plat-ls: correct CAAM JR interrupt numbers

CAAM JR interrupt numbers for some of platforms were configured
wrong, corrected it.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by

core: plat-ls: correct CAAM JR interrupt numbers

CAAM JR interrupt numbers for some of platforms were configured
wrong, corrected it.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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tpm2: Add TPM2 as PCR provider to TCG eventlog parsing framework

TCG eventlog parsing framework parses the eventlog and extends the
PCR's. For this, it needs a provider for PCR's. Register TPM2 as
a

tpm2: Add TPM2 as PCR provider to TCG eventlog parsing framework

TCG eventlog parsing framework parses the eventlog and extends the
PCR's. For this, it needs a provider for PCR's. Register TPM2 as
a provider to this framework.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: Add support to parse TPM eventlog and extend PCRs

Support for OP-TEE to parse the TPM eventlog. The eventlog format
is based on TCG specification [1], so we call this TCG framework.

To parse

core: Add support to parse TPM eventlog and extend PCRs

Support for OP-TEE to parse the TPM eventlog. The eventlog format
is based on TCG specification [1], so we call this TCG framework.

To parse the eventlog and extend PCR's device is needed which
supports PCR's. This device can be TPM or any other HSM which
supports PCR like registers. Such a device can register itself
as a TCG provider for PCR information and ability to extend the
PCR's.

[1] TCG PC Client Platform Firmware Profile Specification
link: https://trustedcomputinggroup.org/resource/pc-client-specific-platform-firmware-profile-specification/

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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tpm2: Add commands to GetCapability, Read/Extend PCR

Add support for TPM2_PCR_{Read/Extend} and TPM2_GetCapability.
TPM uses PCR for integrity collections. Add support to
read and extend PCR's. For

tpm2: Add commands to GetCapability, Read/Extend PCR

Add support for TPM2_PCR_{Read/Extend} and TPM2_GetCapability.
TPM uses PCR for integrity collections. Add support to
read and extend PCR's. For PCR's some generic information like
number of banks, number of PCR's, supported and active algorithms etc.
is required which can be obtained from TPM using TPM2_GetCapability
command. This information is required at lot of places, so save the
basic capability information with tpm2_chip.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: libtomcrypt: Fix compilation issue with CFG_CRYPTO_ECC=n

Disabling ECC crypto does not disable the libtomcrypt ECC
related declarations, so CFG_CRYPTO_ECC=n gives a compilation error.

Signed-

core: libtomcrypt: Fix compilation issue with CFG_CRYPTO_ECC=n

Disabling ECC crypto does not disable the libtomcrypt ECC
related declarations, so CFG_CRYPTO_ECC=n gives a compilation error.

Signed-off-by: Sohaib ul Hassan <sohaib.ul.hassan@unikie.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-k3: Initialize Secure Storage with DKEK

K3 HS devices have a randomly generated 256 bit key written into the
efuses in TI Factory. This key is called a Key Encryption Key (KEK) and
is unique to

plat-k3: Initialize Secure Storage with DKEK

K3 HS devices have a randomly generated 256 bit key written into the
efuses in TI Factory. This key is called a Key Encryption Key (KEK) and
is unique to each device.

KEK is fed in hardware into the AES engine inside DMSC/SMS. The efuses
carrying the KEK are marked as read and write protected. As a result,
KEK is only accessible via the AES engine in DMSC/SMS.

System Firmware provides API to obtain a key derived from KEK(DKEK) for
encryption/decryption which is accessible through TI-SCI protocol.

The DKEK will be used in K3 SOCs to initialize HUK for Secure Storage.

Adds TI_SCI_MSG_SA2UL_GET_DKEK in TISCI protocol to extract the DKEK from
K3 SOCs and initialize HUK.

Further details can be found in the TISCI documentation:
https://software-dl.ti.com/tisci/esd/latest/index.html

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-k3: drivers: Add basic support for TI System Control Interface (TI-SCI) protocol

Texas Instruments System Control Interface (TI-SCI) Message Protocol
is used in Texas Instruments System on Chip

plat-k3: drivers: Add basic support for TI System Control Interface (TI-SCI) protocol

Texas Instruments System Control Interface (TI-SCI) Message Protocol
is used in Texas Instruments System on Chip (SoC) such as those
in keystone family K3 SoC to communicate between various compute
processors with a central system controller entity.

TISCI message protocol provides support for management of various
hardware entities within the SoC. Add support driver to allow
communication with system controller entity within the SoC using the
Secure Proxy.

Introduce the basic registration and query capability for the
driver protocol as part of this change. Subsequent patches add in
functionality specific to the TI-SCI features.

Further information can be found in TI-SCI documentation:
https://software-dl.ti.com/tisci/esd/latest/index.html

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-k3: drivers: Add secure proxy driver for communication with System Controller

Secure Proxy is a communication scheme in Texas Instrument's devices
intended to provide an unique communication pa

plat-k3: drivers: Add secure proxy driver for communication with System Controller

Secure Proxy is a communication scheme in Texas Instrument's devices
intended to provide an unique communication path from various processors
in the System on Chip(SoC) to a central System Controller.

Secure Proxy instance exposes "threads" or "proxies" which is
primary representation of "a" communication channel. Each thread is
preconfigured by System controller configuration based on SoC usage
requirements. Secure proxy by itself represents a single "queue" of
communication but allows the proxies to be independently operated.

For communication with TISCI, Secure Proxy driver is required in OP-TEE.

NOTE: Secure proxy configuration is only done by System Controller,
hence these are assumed to be pre-configured instances.

Provide the driver support for Secure Proxy and thread instances.

Tested on AM65x.

See AM65x Technical Reference Manual (SPRUID7E, April 2018)
for further details: https://www.ti.com/lit/ug/spruid7e/spruid7e.pdf

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: sp_mem: fix get_cattr() callback name

Commit 8afe7a7c5220 ("core: rename mobj_get_cattr() to
mobj_get_mem_type()") renames the get_cattr() callback in struct
mobj_ops(). However, sp_mem wasn't

core: sp_mem: fix get_cattr() callback name

Commit 8afe7a7c5220 ("core: rename mobj_get_cattr() to
mobj_get_mem_type()") renames the get_cattr() callback in struct
mobj_ops(). However, sp_mem wasn't updated as part of this change, so
currently it doesn't compile. Fix this and get aligned with the new
naming.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>

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core: syscalls: strip tags from user space pointers

Strips the tags from user space pointers before using them.
We're relying on TCR_EL1.TCMA0=1 to make the accesses unchecked.

Acked-by: Jerome For

core: syscalls: strip tags from user space pointers

Strips the tags from user space pointers before using them.
We're relying on TCR_EL1.TCMA0=1 to make the accesses unchecked.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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