| 447c5f6b | 28-Apr-2025 |
Jens Wiklander <jens.wiklander@linaro.org> |
plat-rockchip: rk3399: remove GIC configuration
From commit 773c05f417fa ("irqchip/gic-v3: Work around insecure GIC integrations") in the Linux kernel it appears that the hardware integration of the
plat-rockchip: rk3399: remove GIC configuration
From commit 773c05f417fa ("irqchip/gic-v3: Work around insecure GIC integrations") in the Linux kernel it appears that the hardware integration of the GIC500 isn't correct. For v6.13 kernels which includes that commit this has the effect of OP-TEE printing and endless stream of: D/TC:0 0 gic_native_itr_handler:971 Special interrupt 1023
Fix this by removing GIC configuration for RK3399 so the device can be used with v6.13 kernels and later.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| e6a8329a | 08-May-2025 |
Alvin Chang <alvinga@andestech.com> |
core: riscv: Call page_alloc_init()
Call page_alloc_init() from init_primary() after unused boot memory has been released.
This commit is to synchronize the boot stages with ARM architecture, intro
core: riscv: Call page_alloc_init()
Call page_alloc_init() from init_primary() after unused boot memory has been released.
This commit is to synchronize the boot stages with ARM architecture, introduced in commit 0e12fb0c2d75 ("core: arm: boot: call page_alloc_init()") and commit 3e7d042b5d1e ("core: arm: boot: fix calling page_alloc_init()").
Signed-off-by: Alvin Chang <alvinga@andestech.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Yu-Chien Peter Lin <peter.lin@sifive.com>
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| 86df92b3 | 08-May-2025 |
Alvin Chang <alvinga@andestech.com> |
core: kernel: Remove CFG_BOOT_INIT_CURRENT_THREAD_CORE_LOCAL
Now both ARM and RISC-V architectures support initialize thread_core_local[current_core_pos] before calling C code. Thus, we can deprecat
core: kernel: Remove CFG_BOOT_INIT_CURRENT_THREAD_CORE_LOCAL
Now both ARM and RISC-V architectures support initialize thread_core_local[current_core_pos] before calling C code. Thus, we can deprecate CFG_BOOT_INIT_CURRENT_THREAD_CORE_LOCAL and corresponding code.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Yu-Chien Peter Lin <peter.lin@sifive.com>
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| f4ea1751 | 08-May-2025 |
Alvin Chang <alvinga@andestech.com> |
core: riscv: Refactor boot
Move initialization of thread_core_local[] from very early to boot_init_primary_late() and introduce boot_init_primary_runtime().
This commit is to synchronize the boot s
core: riscv: Refactor boot
Move initialization of thread_core_local[] from very early to boot_init_primary_late() and introduce boot_init_primary_runtime().
This commit is to synchronize the boot stages with ARM architecture, introduced in commit b5ec8152f3e5 ("core: arm: refactor boot") and commit b0da0d592ac4 ("core: boot: add boot_init_primary_runtime()").
Signed-off-by: Alvin Chang <alvinga@andestech.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Yu-Chien Peter Lin <peter.lin@sifive.com>
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| 6bfaca07 | 20-Mar-2025 |
Alvin Chang <alvinga@andestech.com> |
core: riscv: Remove init_sec_mon()
In RISC-V architecture, the secure monitor is always initialized before jumping into OP-TEE. Thus, init_sec_mon() can be deprecated.
Signed-off-by: Alvin Chang <a
core: riscv: Remove init_sec_mon()
In RISC-V architecture, the secure monitor is always initialized before jumping into OP-TEE. Thus, init_sec_mon() can be deprecated.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Yu-Chien Peter Lin <peter.lin@sifive.com>
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| c999bfc6 | 15-Apr-2025 |
Joakim Bech <joakim.bech@linaro.org> |
shdr: add check for weak key sizes
Add a function is_weak_key_size(...), which checks whether a given key size (in bits) complies with current security standards. If the key size is lower than 2048,
shdr: add check for weak key sizes
Add a function is_weak_key_size(...), which checks whether a given key size (in bits) complies with current security standards. If the key size is lower than 2048, then it's considered deprecated and will make signature verification fail. Note that this only affects verifying TA and subkey signatures.
This change aligns with GlobalPlatform's decision, influenced by feedback from ANSSI, BSI, SOGIS, and NIST. For further details on the GlobalPlatform's cryptographic algorithm recommendations, see [1].
Link: https://globalplatform.org/specs-library/globalplatform-technology-cryptographic-algorithm-recommendations/ [1] Signed-off-by: Joakim Bech <joakim.bech@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| c5a0587f | 15-Apr-2025 |
Joakim Bech <joakim.bech@linaro.org> |
shdr: add SHA-224 to the deprecated algorithms
GlobalPlatform have based on feedback from different national body organizations, such as ANSSI, BSI, SOGIS and NIST deprecated SHA-224. Add TEE_ALG_SH
shdr: add SHA-224 to the deprecated algorithms
GlobalPlatform have based on feedback from different national body organizations, such as ANSSI, BSI, SOGIS and NIST deprecated SHA-224. Add TEE_ALG_SHA224 to the list of weak signature algorithms.
Signed-off-by: Joakim Bech <joakim.bech@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| aa0620cf | 20-Mar-2025 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: dynamic allocation of threads and their stacks
With CFG_DYN_CONFIG enabled, use dynamic allocation of threads and their stacks.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Revie
core: dynamic allocation of threads and their stacks
With CFG_DYN_CONFIG enabled, use dynamic allocation of threads and their stacks.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 91d4649d | 20-Mar-2025 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add thread_count to thread_init_threads()
Add a thread_count parameter to thread_init_threads(). This must currently always be equal to CFG_NUM_THREADS, but may become a dynamic configuration
core: add thread_count to thread_init_threads()
Add a thread_count parameter to thread_init_threads(). This must currently always be equal to CFG_NUM_THREADS, but may become a dynamic configuration parameter with CFG_DYN_CONFIG=y in later patches.
The array threads[] is changed into a pointer to allow dynamic allocation in later patches. The assembly code is updated accordingly to handle a pointer instead of an array.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Alvin Chang <alvinga@andestech.com> Tested-by: Alvin Chang <alvinga@andestech.com> Reviewed-by: Yu-Chien Peter Lin <peter.lin@sifive.com> Tested-by: Yu-Chien Peter Lin <peter.lin@sifive.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 6a2e17e9 | 20-Mar-2025 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: mm: shared xlat tables for NEX_DYN_VASPACE
Mappings in MEM_AREA_NEX_DYN_VASPACE belong to the nexus and are must to be the same for all partitions. Since these mappings must be updated in the
core: mm: shared xlat tables for NEX_DYN_VASPACE
Mappings in MEM_AREA_NEX_DYN_VASPACE belong to the nexus and are must to be the same for all partitions. Since these mappings must be updated in the partitions after the MMU has been enabled. Partitions share translation tables for this mappings, so we only need to update in one translation table when adding or removing mappings.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 59724f22 | 20-Mar-2025 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: dynamic allocation of thread_core_local and its stacks
With CFG_DYN_CONFIG enabled, use dynamic allocation of thread_core_local and the two stacks, tmp_stack and abt_stack, recorded in it.
Si
core: dynamic allocation of thread_core_local and its stacks
With CFG_DYN_CONFIG enabled, use dynamic allocation of thread_core_local and the two stacks, tmp_stack and abt_stack, recorded in it.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| a4c2e0cb | 20-Mar-2025 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add core_count to thread_init_thread_core_local()
Add a core_count parameter to thread_init_thread_core_local() to enable dynamic configuration of the number of supported cores when configured
core: add core_count to thread_init_thread_core_local()
Add a core_count parameter to thread_init_thread_core_local() to enable dynamic configuration of the number of supported cores when configured with CFG_DYN_STACK_CONFIG=y, or it must be equal to CFG_TEE_CORE_NB_CORE. This is needed in later patches where the number of cores is configured dynamically.
The array thread_core_local[] is changed into a pointer to allow dynamic allocation in later patches. The assembly code is updated accordingly to handle a pointer instead of an array.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Alvin Chang <alvinga@andestech.com> Tested-by: Alvin Chang <alvinga@andestech.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| a6d75fa2 | 20-Mar-2025 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: virt: share TA memory with core
With CFG_NS_VIRTUALIZATION=y it is assumed that all physical OP-TEE memory, core and TA, is equally secure. When a guest is created, register the allocated
core: arm: virt: share TA memory with core
With CFG_NS_VIRTUALIZATION=y it is assumed that all physical OP-TEE memory, core and TA, is equally secure. When a guest is created, register the allocated physical TA memory in the physical core memory pool instead of physical TA memory pool. This lets the partition to allocate from a single pool reserved for the partition instead of trying to guess how much core memory it might need.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 13b4cbd1 | 20-Mar-2025 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: mm: fix core_mmu_xlat_table_alloc() for nexus
core_mmu_xlat_table_alloc() allocates new translation tables from boot_mem until during early boot and after the MMU has been enabled with ne
core: arm: mm: fix core_mmu_xlat_table_alloc() for nexus
core_mmu_xlat_table_alloc() allocates new translation tables from boot_mem until during early boot and after the MMU has been enabled with nex_phys_mem_core_alloc() or phys_mem_core_alloc(). However, the logic selecting which function to call doesn't take the default partition into account. The default partition has only a nexus physical memory pool so nex_phys_mem_core_alloc() must be called if that partition is active. So fix the problem with an extra check for default_partition.
Fixes: a28e4a0fe48d ("core: arm: mm: dynamic allocation of LPAE translation tables") Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| e6c87b00 | 20-Mar-2025 |
Jens Wiklander <jens.wiklander@linaro.org> |
plat-ti: replace stack_tmp_stride usage
The function resume_springboard() needs to restore the tmp_stack before the rest of the resume process can be started. Since the commit 05994c760d5d ("core: t
plat-ti: replace stack_tmp_stride usage
The function resume_springboard() needs to restore the tmp_stack before the rest of the resume process can be started. Since the commit 05994c760d5d ("core: thread: get stacks from recorded end-va") we can now read the address of the tmp_stack from thread_core_local. So update resume_springboard() as needed.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 7332b18f | 20-Mar-2025 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: pta: update virt_to_phys() self tests
Update pointer in the virt_to_phys() test for a TEE_RAM to make sure it's pointer in the TEE_RAM area since stack pointers may be mapped differently with
core: pta: update virt_to_phys() self tests
Update pointer in the virt_to_phys() test for a TEE_RAM to make sure it's pointer in the TEE_RAM area since stack pointers may be mapped differently with CFG_DYN_CONFIG=y.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| a2b343ee | 20-Mar-2025 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm64: increase tmp stack size for debug
Increase STACK_TMP_SIZE when CFG_CORE_DEBUG_CHECK_STACKS=y.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jero
core: arm64: increase tmp stack size for debug
Increase STACK_TMP_SIZE when CFG_CORE_DEBUG_CHECK_STACKS=y.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 4592d1a4 | 22-Apr-2025 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: ffa: add test logical SP
Add a test LSP with UUID 54b5440e-a3d2-48d1-872a-7b6cbfc34855 to see that LSPs can be found and reached from the normal world.
Signed-off-by: Jens Wiklander <jen
core: arm: ffa: add test logical SP
Add a test LSP with UUID 54b5440e-a3d2-48d1-872a-7b6cbfc34855 to see that LSPs can be found and reached from the normal world.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Akshay Belsare <akshay.belsare@amd.com>
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| ecf08061 | 22-Apr-2025 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: arm: ffa: add framework for Logical SPs
Add a framework to register Logical Secure Partitions in parallel with OP-TEE at S-EL1. This is akin to Pseudo TAs, it provides an ABI but it's part of
core: arm: ffa: add framework for Logical SPs
Add a framework to register Logical Secure Partitions in parallel with OP-TEE at S-EL1. This is akin to Pseudo TAs, it provides an ABI but it's part of the OP-TEE binary. A critical difference is that it's only available for FF-A and can only use the non-threaded environment, that is, no mutexes or RPC.
The logical OP-TEE core partition is registered in the framework. The SPMC is also registered in the framework, but with a nil UUID so it's not returned by FFA_PARTITION_INFO_GET.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Akshay Belsare <akshay.belsare@amd.com>
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| 40f03182 | 22-Apr-2025 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ffa: only accept FFA_RUN for S-EL0 SPs
OP-TEE core is never preemted with FFA_INTERRUPT so it must never be resumed with FFA_RUN. However, S-EL0 SPs are preempted with FFA_INTERRUPT so those a
core: ffa: only accept FFA_RUN for S-EL0 SPs
OP-TEE core is never preemted with FFA_INTERRUPT so it must never be resumed with FFA_RUN. However, S-EL0 SPs are preempted with FFA_INTERRUPT so those are still resumed using FFA_RUN.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Akshay Belsare <akshay.belsare@amd.com>
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| 5c85c87e | 22-Apr-2025 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ffa: sp_partition_info_get() takes uuid_words[]
Replace the TEE_UUID *ffa_uuid parameter with uint32_t ffa_uuid_words[4] to simplify how sp_partition_info_get() is called.
Signed-off-by: Jens
core: ffa: sp_partition_info_get() takes uuid_words[]
Replace the TEE_UUID *ffa_uuid parameter with uint32_t ffa_uuid_words[4] to simplify how sp_partition_info_get() is called.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Akshay Belsare <akshay.belsare@amd.com>
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| fc6415c4 | 22-Apr-2025 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ffa: add spmc_is_reserved_id()
Add spmc_is_reserved_id() and replace direct checks against spmd_id and spmc_id. spmd_id and spmc_id are changed to static variables since they don't need to be
core: ffa: add spmc_is_reserved_id()
Add spmc_is_reserved_id() and replace direct checks against spmd_id and spmc_id. spmd_id and spmc_id are changed to static variables since they don't need to be exported any longer.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Akshay Belsare <akshay.belsare@amd.com>
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| 76d920d3 | 25-Mar-2025 |
Raymond Mao <raymond.mao@linaro.org> |
core: pta: add self tests for transfer list
Add self tests for transfer list. Adapt CFG_TRANSFER_LIST with its dependencies and add CFG_TRANSFER_LIST_TEST.
Signed-off-by: Raymond Mao <raymond.mao@l
core: pta: add self tests for transfer list
Add self tests for transfer list. Adapt CFG_TRANSFER_LIST with its dependencies and add CFG_TRANSFER_LIST_TEST.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 0cd8ec0f | 10-Apr-2025 |
Raymond Mao <raymond.mao@linaro.org> |
core: kernel: remove the last appended void transfer entry
transfer_list_set_data_size() appends a void entry for the following entries to meet the alignment requirement even when it is the last one
core: kernel: remove the last appended void transfer entry
transfer_list_set_data_size() appends a void entry for the following entries to meet the alignment requirement even when it is the last one, thus add a check before appending.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 95b0e915 | 25-Mar-2025 |
Raymond Mao <raymond.mao@linaro.org> |
core: kernel: fix bug in transfer_list_add()
Fix the missing cast on the target address when doing memmove. Get the address of entry data via transfer_list_entry_data() instead of adding offset.
Fi
core: kernel: fix bug in transfer_list_add()
Fix the missing cast on the target address when doing memmove. Get the address of entry data via transfer_list_entry_data() instead of adding offset.
Fixes: a12225022bd5 ("core: add transfer list API") Signed-off-by: Raymond Mao <raymond.mao@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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