core: remove TEE_RAM_VA_START and TEE_TEXT_VA_START

TEE_RAM_VA_START and TEE_TEXT_VA_START are defined to exactly the same
thing as TEE_RAM_START and TEE_LOAD_ADDR respectively. They don't deal
with

core: remove TEE_RAM_VA_START and TEE_TEXT_VA_START

TEE_RAM_VA_START and TEE_TEXT_VA_START are defined to exactly the same
thing as TEE_RAM_START and TEE_LOAD_ADDR respectively. They don't deal
with virtual addresses as the names suggests, they too represent
physical addresses. So remove TEE_RAM_VA_START and TEE_TEXT_VA_START to
get rid of some redundancy.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: rename load_offset in struct core_mmu_config

Renames the field load_offset in struct core_mmu_config to the more
accurate name map_offset.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro

core: rename load_offset in struct core_mmu_config

Renames the field load_offset in struct core_mmu_config to the more
accurate name map_offset.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: arm: core_mmu_arch.h: remove redundant defines

Removes the redundant defines TEE_RAM_VA_SIZE, TEE_LOAD_ADDR,
TEE_RAM_VA_START, TEE_TEXT_VA_START, and STACK_ALIGNMENT which are
already defined

core: arm: core_mmu_arch.h: remove redundant defines

Removes the redundant defines TEE_RAM_VA_SIZE, TEE_LOAD_ADDR,
TEE_RAM_VA_START, TEE_TEXT_VA_START, and STACK_ALIGNMENT which are
already defined in core_mmu.h.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: linker.h: remove *_SZ_UNSAFE defines

Removes the now unused *_SZ_UNSAFE defines.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.

core: linker.h: remove *_SZ_UNSAFE defines

Removes the now unused *_SZ_UNSAFE defines.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: core_mmu.c: replace register_phys_mem{_ul,}() usage

Replaces register_phys_mem_ul() and register_phys_mem() with direct
calls to ADD_PHYS_MEM() for core and TA memory. This makes the code
easi

core: core_mmu.c: replace register_phys_mem{_ul,}() usage

Replaces register_phys_mem_ul() and register_phys_mem() with direct
calls to ADD_PHYS_MEM() for core and TA memory. This makes the code
easier to read and also gives better control over supplied addresses
since static initialization can be avoided.

This patch has no functional change.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: improve register_phys_mem_pgdir() debug print

Improves the debug prints emitted by register_phys_mem_pgdir() to use
the define of the base address instead. For example:
ROUNDDOWN(0x09040000, C

core: improve register_phys_mem_pgdir() debug print

Improves the debug prints emitted by register_phys_mem_pgdir() to use
the define of the base address instead. For example:
ROUNDDOWN(0x09040000, CORE_MMU_PGDIR_SIZE) type IO_SEC 0x09000000 size 0x00200000
becomes:
CONSOLE_UART_BASE type IO_SEC 0x09000000 size 0x00200000

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: linker.h: fix ASAN_MAP_PA and ASAN_SHADOW_PA

Fixes ASAN_MAP_PA and ASAN_SHADOW_PA to cast via vaddr_t to paddr_t to
avoid compile errors when paddr_t is larger than a pointer, that is,
with CF

core: linker.h: fix ASAN_MAP_PA and ASAN_SHADOW_PA

Fixes ASAN_MAP_PA and ASAN_SHADOW_PA to cast via vaddr_t to paddr_t to
avoid compile errors when paddr_t is larger than a pointer, that is,
with CFG_CORE_LARGE_PHYS_ADDR on 32-bit platforms.

core/include/kernel/linker.h:113:26: error: cast from pointer to integer of diff
erent size [-Werror=pointer-to-int-cast]
113 | #define ASAN_MAP_PA ((paddr_t)__asan_map_start)
| ^

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: linker.h: fix VCORE_NEX_RW_SZ

Fixes the VCORE_NEX_RW_SZ define by adding a missing pair of ( ).

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.c

core: linker.h: fix VCORE_NEX_RW_SZ

Fixes the VCORE_NEX_RW_SZ define by adding a missing pair of ( ).

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: dt: fix return value in fdt_read_uint32_array()

If fdt_getprop() returns 0, the error code is contained in the fourth
parameter: len in this case.

Return len instead of -FDT_ERR_NOTFOUND.

Si

core: dt: fix return value in fdt_read_uint32_array()

If fdt_getprop() returns 0, the error code is contained in the fourth
parameter: len in this case.

Return len instead of -FDT_ERR_NOTFOUND.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: dt: remove fdt_check_node()

The function is never implemented, remove the ghost prototype.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etie

core: dt: remove fdt_check_node()

The function is never implemented, remove the ghost prototype.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: dt: add kernel DT API to retrieve regs by name

This patch adds _fdt_get_reg_props_by_index() and
_fdt_get_reg_props_by_name() APIs.

Signed-off-by: Christophe Kerello <christophe.kerello@foss.

core: dt: add kernel DT API to retrieve regs by name

This patch adds _fdt_get_reg_props_by_index() and
_fdt_get_reg_props_by_name() APIs.

Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: dt: add fdt_read_size() helper

This patch adds fdt_read_size() helper.

Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@f

core: dt: add fdt_read_size() helper

This patch adds fdt_read_size() helper.

Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: dt: add kernel DT API fdt_read_uint32_index()

This patch adds fdt_read_uint32_index() API. This API reads one cell
from a given multi-value property.

This patch updates fdt_read_uint32() and

core: dt: add kernel DT API fdt_read_uint32_index()

This patch adds fdt_read_uint32_index() API. This API reads one cell
from a given multi-value property.

This patch updates fdt_read_uint32() and fdt_read_uint32_default()
to use fdt_read_uint32_index() API

Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: replace _fdt_ prefix with fdt_ for device tree API

As per upstream discussion, there is no reason to keep _fdt_ prefix.
Replaces it with fdt_ for all occurrences.

Signed-off-by: Gatien Cheval

core: replace _fdt_ prefix with fdt_ for device tree API

As per upstream discussion, there is no reason to keep _fdt_ prefix.
Replaces it with fdt_ for all occurrences.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-sam: enable CFG_DRIVERS_I2C and CFG_ATMEL_I2C for wlsom1 board

Enable these options to embed the I2C driver when using the wlsom1
board.

Signed-off-by: Clément Léger <clement.leger@bootlin.com

plat-sam: enable CFG_DRIVERS_I2C and CFG_ATMEL_I2C for wlsom1 board

Enable these options to embed the I2C driver when using the wlsom1
board.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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dts: at91: wlsom1_ek1: set i2c0 bus as secure

This bus holds the PMIC which is going to be used by OP-TEE to handle
suspend.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Jerom

dts: at91: wlsom1_ek1: set i2c0 bus as secure

This bus holds the PMIC which is going to be used by OP-TEE to handle
suspend.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: atmel_i2c: add new driver

Add a driver for the atmel I2C controller that can be found on sama5d2
platforms. This driver allows to execute standard I2C requests as well
as SMBus protocol com

drivers: atmel_i2c: add new driver

Add a driver for the atmel I2C controller that can be found on sama5d2
platforms. This driver allows to execute standard I2C requests as well
as SMBus protocol commands.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: i2c: add a simple framework to handle i2c devices

Add simple i2c support which provides support for I2C controllers and
devices using the generic DT mechanisms that already exists. I2C
cont

drivers: i2c: add a simple framework to handle i2c devices

Add simple i2c support which provides support for I2C controllers and
devices using the generic DT mechanisms that already exists. I2C
controllers needs to implement i2c_ctrl_ops to provide i2c operations
such as read, write and smbus commands depending on their capabilities.
I2C devices driver can then be defined using DEFINE_I2C_DEV_DRIVER().
This macros will use a default i2c probe function (__i2c_probe()) which
will then call the I2C device probe function by passing a i2c_dev struct
that can be used to communicate with the I2C device defined in the
device-tree.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: dt_driver: add support for DT_DRIVER_I2C

Integrating I2C support within the dt_driver mechanism require to change
the way controller are retrieved. Indeed, when using i2c, the children are
loc

core: dt_driver: add support for DT_DRIVER_I2C

Integrating I2C support within the dt_driver mechanism require to change
the way controller are retrieved. Indeed, when using i2c, the children are
located under a parent I2C controller node. This implies to use another
method to parse node heriarchy and ignore the case when the provider
has no phandle.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: dt_driver: remove early return if no phandle is found for provider

This case now happens for various subsystems which do not uses direct
phandles to the controller but rather phandles to child

core: dt_driver: remove early return if no phandle is found for provider

This case now happens for various subsystems which do not uses direct
phandles to the controller but rather phandles to child of the controller.
For such description, the controller itself might not have any "phandle"
property since there is no reference to it.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: dt_driver: add phandle node and fdt to dt_driver_phandle_args

With pinctrl, it is necessary for the provider to access the node which
will need to be apply since it contains custom controller

core: dt_driver: add phandle node and fdt to dt_driver_phandle_args

With pinctrl, it is necessary for the provider to access the node which
will need to be apply since it contains custom controller properties
that need to be parsed. In order to integrate pinctrl with the existing
dt_driver generic support, add these members and fill them when invoking
the get_of_device() callback.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: disable CFG_CRYPTO_SM2_* when ECC CAAM driver is enabled

Disable CFG_CRYPTO_SM2_PKE and CFG_CRYPTO_SM2_KEP as ECC CAAM driver
does not support ECC encryption.
Disable CFG_CRYPTO_SM2_D

drivers: caam: disable CFG_CRYPTO_SM2_* when ECC CAAM driver is enabled

Disable CFG_CRYPTO_SM2_PKE and CFG_CRYPTO_SM2_KEP as ECC CAAM driver
does not support ECC encryption.
Disable CFG_CRYPTO_SM2_DSA as ECC CAAM driver does not support ECC SM2
signature.

This is a temporary fix until a proper software crypto fallback
is implemented.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: crypto: give the platform configuration a higher priority

The platform crypto configuration should always have a higher priority
than the generic crypto configuration.

Signed-off-by: Clement

core: crypto: give the platform configuration a higher priority

The platform crypto configuration should always have a higher priority
than the generic crypto configuration.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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TZASC: Allow 32KB region size

According to the ARM TZC-380 Technical Reference Manual, 32KB is the
minimum region size [1]. But before this patch, tzc_auto_configure()
allowed only 64KB as minimum.

TZASC: Allow 32KB region size

According to the ARM TZC-380 Technical Reference Manual, 32KB is the
minimum region size [1]. But before this patch, tzc_auto_configure()
allowed only 64KB as minimum.

(pow > 15) implies the following:
region_size = (1ULL << pow) = (2^pow) > 32KB

After this patch, (pow >= 15) gives us region_size >= 32KB.

Tested on i.MX6UL.

Link: [1] https://developer.arm.com/documentation/ddi0431/c/programmers-model/register-descriptions/region-attributes--n--register?lang=en
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Acked-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-zynqmp: fixes interrupt controller

Updates GICC_OFFSET to account for the already-offset GIC_BASE.
Additionally initializes the interrupt controller with a pointer
to the interrupt chip.

Signe

plat-zynqmp: fixes interrupt controller

Updates GICC_OFFSET to account for the already-offset GIC_BASE.
Additionally initializes the interrupt controller with a pointer
to the interrupt chip.

Signed-off-by: Zachary Clark <zach.clark@dornerworks.com>
Reviewed-by: Ricardo Salveti <ricardo@foundries.io>

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