drivers: pinctrl: atmel_pio: add pio controller for sama5d2

Add pinctrl driver for sama5d2 PIO controller. This driver adds support
to apply pin muxing configurations that are handled by the PIO
con

drivers: pinctrl: atmel_pio: add pio controller for sama5d2

Add pinctrl driver for sama5d2 PIO controller. This driver adds support
to apply pin muxing configurations that are handled by the PIO
controller.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>

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drivers: pinctrl: add pinctrl support

Add support for pinctrl support using device-tree. The device-tree
"pinctrl-<x>" and "pinctrl-names" properties are supported and
allows to apply a pinctrl conf

drivers: pinctrl: add pinctrl support

Add support for pinctrl support using device-tree. The device-tree
"pinctrl-<x>" and "pinctrl-names" properties are supported and
allows to apply a pinctrl configuration based on this. This support
also includes a way to register pin muxing controllers that can apply
these states.
A few properties of the pinctrl nodes are supported such as
"bias-disable", "bias-pull-up" and "bias-pull-down".

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: dt_driver: add support for DT_DRIVER_PINCTRL

In order to handle pinctrl the same way that other driver are handled by
DT driver support, modify node parsing to refer to the parent node in case

core: dt_driver: add support for DT_DRIVER_PINCTRL

In order to handle pinctrl the same way that other driver are handled by
DT driver support, modify node parsing to refer to the parent node in case
we are handling a pinctrl request.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>

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core: dt_driver: fix a typo

Replace "controlle" with "controller".

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

plat-sam: enable CFG_DRIVERS_GPIO for sama5d27_wlsom1_ek flavor

The PMIC present on this board will needs to access a GPIOs to enter low
power mode.

Signed-off-by: Clément Léger <clement.leger@boot

plat-sam: enable CFG_DRIVERS_GPIO for sama5d27_wlsom1_ek flavor

The PMIC present on this board will needs to access a GPIOs to enter low
power mode.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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dt_driver_test: add tests for gpio controller framework

Add various tests for the GPIO dt controller framework much like what was
done for the rstclr system.

Signed-off-by: Clément Léger <clement.l

dt_driver_test: add tests for gpio controller framework

Add various tests for the GPIO dt controller framework much like what was
done for the rstclr system.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: atmel_piobu: add support for dt parsing

Register the atmel_piobu driver within the GPIO dt framework.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot

drivers: atmel_piobu: add support for dt parsing

Register the atmel_piobu driver within the GPIO dt framework.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: gpio: add device-tree based gpio controller framework

Build a small gpio framework based on the device-tree infrastructure and
on top of the existing gpio.h content. This framework allows t

drivers: gpio: add device-tree based gpio controller framework

Build a small gpio framework based on the device-tree infrastructure and
on top of the existing gpio.h content. This framework allows to register
gpio controllers and to retrieve gpio struct based on a "<name>-gpios"
properties.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: versal_gpio: rename gpio ops to avoid name clash

These functions names are going to be added by GPIO dt support commit.
Rename these by adding "versal_" prefix to avoid name clash.

Signed-

drivers: versal_gpio: rename gpio ops to avoid name clash

These functions names are going to be added by GPIO dt support commit.
Rename these by adding "versal_" prefix to avoid name clash.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: ls_gpio: rename gpio ops to avoid name clash

These functions names are going to be added by GPIO dt support commit.
Rename these by adding "ls_" prefix to avoid name clash.

Signed-off-by:

drivers: ls_gpio: rename gpio ops to avoid name clash

These functions names are going to be added by GPIO dt support commit.
Rename these by adding "ls_" prefix to avoid name clash.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: atmel_piobu: rename ops to avoid name clash

These functions names are going to be added by GPIO dt support commit.
Rename these by adding "secumod_" prefix to avoid name clash.

Signed-off-

drivers: atmel_piobu: rename ops to avoid name clash

These functions names are going to be added by GPIO dt support commit.
Rename these by adding "secumod_" prefix to avoid name clash.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: move gpio.h include to drivers/

GPIOs are typically handled by drivers and this will be modified to add
device-tree support.

Also rename "ena_dis" with "enable_disable" because more explic

drivers: move gpio.h include to drivers/

GPIOs are typically handled by drivers and this will be modified to add
device-tree support.

Also rename "ena_dis" with "enable_disable" because more explicit.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-sam: registers clocks for SCMI usage

Use scmi_clk_add() to register all clocks that are available on the
sama5d2 SoC.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne

plat-sam: registers clocks for SCMI usage

Use scmi_clk_add() to register all clocks that are available on the
sama5d2 SoC.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>

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plat-sam: enable use of SCMI generic clock support

All clocks for the plat-sam are described using the clk framework.
Enable this option to allow using them with SCMI transparently.

Signed-off-by:

plat-sam: enable use of SCMI generic clock support

All clocks for the plat-sam are described using the clk framework.
Enable this option to allow using them with SCMI transparently.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>

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dt-bindings: at91: add SCMI identifiers for clocks

Add defines for clocks that are available via SCMI for this platform.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Jerome Fo

dt-bindings: at91: add SCMI identifiers for clocks

Add defines for clocks that are available via SCMI for this platform.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>

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clk: sam: sckc: add at91_sckc_clk_get() to retrieve slow clock

In order to retrieve and expose clocks through SCMI, add this function
to retrieve the SCKC clock.

Signed-off-by: Clément Léger <cleme

clk: sam: sckc: add at91_sckc_clk_get() to retrieve slow clock

In order to retrieve and expose clocks through SCMI, add this function
to retrieve the SCKC clock.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>

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drivers: clk: sam: add at91_pmc_clk_get() function

In order to retrieve and expose clocks through SCMI, add this function
to retrieve the clocks from the PMC.

Signed-off-by: Clément Léger <clement.

drivers: clk: sam: add at91_pmc_clk_get() function

In order to retrieve and expose clocks through SCMI, add this function
to retrieve the clocks from the PMC.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>

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plat-sam: add support for CFG_SCMI_MSG_SMT_FASTCALL_ENTRY

Add necessary calls to scmi_smt_fastcall_smc_entry from sm_platform
handler to be able to do SCMI calls via SMC.

Signed-off-by: Clément Lég

plat-sam: add support for CFG_SCMI_MSG_SMT_FASTCALL_ENTRY

Add necessary calls to scmi_smt_fastcall_smc_entry from sm_platform
handler to be able to do SCMI calls via SMC.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>

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drivers: scmi-msg: add support for clock using generic clock framework

Integrating the clock framework with SCMI allows to avoid boilerplate
code to do so in platform specific files. This patch adds

drivers: scmi-msg: add support for clock using generic clock framework

Integrating the clock framework with SCMI allows to avoid boilerplate
code to do so in platform specific files. This patch adds a generic
layer that uses the generic clock framework to access and expose clocks.
SCMI clocks can be added from platform code using scmi_clk_add().
A new CFG_SCMI_MSG_USE_CLK configuration option is added to enable
this generic clock support.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-sam: add SCMI server foundation

Add foundations for SCMI server support. This will be used to expose
clocks and regulators to non-secure world.

Signed-off-by: Clément Léger <clement.leger@boot

plat-sam: add SCMI server foundation

Add foundations for SCMI server support. This will be used to expose
clocks and regulators to non-secure world.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>

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plat-sam: nsec-service: Fix include order

Reorder includes in alphabetical order.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

plat-rzn1: increase DDR size to 1GB

There are now some RZ/N1 devices with 1GB rather than 256MB. The
first-stage bootloader does not support passing a DT to OP-TEE, so
static values are set at compi

plat-rzn1: increase DDR size to 1GB

There are now some RZ/N1 devices with 1GB rather than 256MB. The
first-stage bootloader does not support passing a DT to OP-TEE, so
static values are set at compile time. Increase the DDR size so as to
avoid OP-TEE calls failing with TEEC_ERROR_OUT_OF_MEMORY.

Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>

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core: riscv: kernel: Add missing initialization for core local stacks

The thread core local stacks should be initialized when the primary core
performs system initialization.

Fixes: ca8258906949 ("

core: riscv: kernel: Add missing initialization for core local stacks

The thread core local stacks should be initialized when the primary core
performs system initialization.

Fixes: ca8258906949 ("core: split core/arch/arm/kernel/thread.c")
Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: crypto: change TEE_AEDecryptFinal() tag param's attribute

Due to tag parameter was passed in from REE side share memory
same as cipher-text source and nonce buffer/parameters.
Then memory acce

core: crypto: change TEE_AEDecryptFinal() tag param's attribute

Due to tag parameter was passed in from REE side share memory
same as cipher-text source and nonce buffer/parameters.
Then memory access sanity-check marks CCM TAG buffer as
ACCESS_DENIED, which triggers user TA panic.

Change tag parameter's attribute from [in] to [inbuf]. This fix is
expected to be addressed in next GP TEE Internal Core API specification.

Link: https://github.com/OP-TEE/optee_os/issues/5946
Signed-off-by: lei zhou <lei.zhou@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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Add missing conditional compilation for RISC-V

RV64 also uses kern_sp. The elf.h is also used by RV32 and RV64.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jerome Forissier <jerome

Add missing conditional compilation for RISC-V

RV64 also uses kern_sp. The elf.h is also used by RV32 and RV64.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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