riscv: plat-virt: Override default platform ISA extensions

RV64 virtual platform on QEMU supports C(compressed), Zicsr, and
Zifencei extensions. To specify the ISA extensions into RISC-V
toolchain s

riscv: plat-virt: Override default platform ISA extensions

RV64 virtual platform on QEMU supports C(compressed), Zicsr, and
Zifencei extensions. To specify the ISA extensions into RISC-V
toolchain so that toolchain can generate the code correctly, these
ISA extensions should be encoded into "-march" flag. This patch
overrides the default ISA extensions which is defined in riscv.mk
to specify the extension that the platform really supports.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: riscv: Add default variables for platform ISA, ABI and code model

In RISC-V, each platform may have different supported ISA extensions,
ABI, and code model. In this commit, we define the defau

core: riscv: Add default variables for platform ISA, ABI and code model

In RISC-V, each platform may have different supported ISA extensions,
ABI, and code model. In this commit, we define the default variables
of ISA extensions, ABI, and code model in RISC-V core Makefile. The
platform can further overrides the values in their plat-*/conf.mk.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: dt_driver_test: move source file to core/pta/test/

Moves dt_driver_test.c from core/kernel/ to core/pta/test/ where most
embedded tests implementation are located. This is legitimate as the
te

core: dt_driver_test: move source file to core/pta/test/

Moves dt_driver_test.c from core/kernel/ to core/pta/test/ where most
embedded tests implementation are located. This is legitimate as the
test results are retrieved from the Invoke PTA interface, even if the
test is not effectively run from an invocation command of that PTA.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: dt_driver_test: fix test failure status

Before this change, failing clock/reset/gpios tests do print a
"not run" status message because related status dt_test_state.probe_xxx
remains to DEFAUL

core: dt_driver_test: fix test failure status

Before this change, failing clock/reset/gpios tests do print a
"not run" status message because related status dt_test_state.probe_xxx
remains to DEFAULT value and are never set to FAILED. Fix this and
move each test to a specific local function to ease error cases
management using 'goto' instructions.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: dt_driver_test: clarify "not run" status message

Changes trace message from "not passed" to "not run" when a test
is not run.

Suggested-by: Jerome Forissier <jerome.forissier@linaro.org>
Acke

core: dt_driver_test: clarify "not run" status message

Changes trace message from "not passed" to "not run" when a test
is not run.

Suggested-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: interrupt: rename itr_init()

Renames itr_init() to interrupt_main_init() as a later
change will modify interrupt chip API functions using interrupt_
as prefix.

Reviewed-by: Jens Wiklander <je

core: interrupt: rename itr_init()

Renames itr_init() to interrupt_main_init() as a later
change will modify interrupt chip API functions using interrupt_
as prefix.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: interrupt: rename itr_core_handler()

Renames itr_core_handler() to interrupt_main_handler() as a later
change will modify interrupt chip API functions using interrupt_
as prefix.

Reviewed-by:

core: interrupt: rename itr_core_handler()

Renames itr_core_handler() to interrupt_main_handler() as a later
change will modify interrupt chip API functions using interrupt_
as prefix.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: gic: factorize call to gic_init() or gic_init_base_addr()

Platforms call either gic_init() or gic_init_base_addr() depending
on whether CFG_WITH_ARM_TRUSTED_FW is defined or not. This chang

drivers: gic: factorize call to gic_init() or gic_init_base_addr()

Platforms call either gic_init() or gic_init_base_addr() depending
on whether CFG_WITH_ARM_TRUSTED_FW is defined or not. This change
factorize this logic from gic_init() implementation and makes
gic_init_base_addr() local to gic.c.

For that purpose functions gic_init_base_address() and gic_dt_get_irq()
are moved inside gic.c source file.
source file.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: define main interrupt controller data from its driver

All but one platforms define CPU core interrupt controller from their
platform main.c source file next to its main interrupt handler.
This

core: define main interrupt controller data from its driver

All but one platforms define CPU core interrupt controller from their
platform main.c source file next to its main interrupt handler.
This change factorize these implementation by moving the definition
of the controller data instance straight in the controller driver
source file. This change makes each controller driver to implement
straight itr_core_handler() function, preventing a extra branch on
interrupt execution. Interrupt controller driver initialization
function now straight calls itr_core_init().

This changes treats case when CFG_CORE_WORKAROUND_ARM_NMFI is enable
to not conflict with core/arch/arm/kernel/thread.c that already
overrides itr_core_handler() weak implementation.

With this change, the main controller initialization function
(gic_init(), gic_init_base_addr(), gic_cpu_init() and hfic_init())
no more gets the controller data as input argument.

As a consequence, definition of struct hfic_data and struct gic_data
moves from their respective driver header file to the respective
driver source file.

As a consequence, gic_dump() no more requires an argument.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-sam: enable pinctrl and atmel_pio driver for wlsom1 board

The board will need these options to apply I2C pin muxing in order to
communicate with the PMIC.

Signed-off-by: Clément Léger <clement

plat-sam: enable pinctrl and atmel_pio driver for wlsom1 board

The board will need these options to apply I2C pin muxing in order to
communicate with the PMIC.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>

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dts: at91: set PIO controller as secure

Set the PIO pinctrl as secure to ensure pin configurations are not
modifiable by non secure world.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
A

dts: at91: set PIO controller as secure

Set the PIO pinctrl as secure to ensure pin configurations are not
modifiable by non secure world.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>

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drivers: pinctrl: atmel_pio: add pio controller for sama5d2

Add pinctrl driver for sama5d2 PIO controller. This driver adds support
to apply pin muxing configurations that are handled by the PIO
con

drivers: pinctrl: atmel_pio: add pio controller for sama5d2

Add pinctrl driver for sama5d2 PIO controller. This driver adds support
to apply pin muxing configurations that are handled by the PIO
controller.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>

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drivers: pinctrl: add pinctrl support

Add support for pinctrl support using device-tree. The device-tree
"pinctrl-<x>" and "pinctrl-names" properties are supported and
allows to apply a pinctrl conf

drivers: pinctrl: add pinctrl support

Add support for pinctrl support using device-tree. The device-tree
"pinctrl-<x>" and "pinctrl-names" properties are supported and
allows to apply a pinctrl configuration based on this. This support
also includes a way to register pin muxing controllers that can apply
these states.
A few properties of the pinctrl nodes are supported such as
"bias-disable", "bias-pull-up" and "bias-pull-down".

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: dt_driver: add support for DT_DRIVER_PINCTRL

In order to handle pinctrl the same way that other driver are handled by
DT driver support, modify node parsing to refer to the parent node in case

core: dt_driver: add support for DT_DRIVER_PINCTRL

In order to handle pinctrl the same way that other driver are handled by
DT driver support, modify node parsing to refer to the parent node in case
we are handling a pinctrl request.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>

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core: dt_driver: fix a typo

Replace "controlle" with "controller".

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

plat-sam: enable CFG_DRIVERS_GPIO for sama5d27_wlsom1_ek flavor

The PMIC present on this board will needs to access a GPIOs to enter low
power mode.

Signed-off-by: Clément Léger <clement.leger@boot

plat-sam: enable CFG_DRIVERS_GPIO for sama5d27_wlsom1_ek flavor

The PMIC present on this board will needs to access a GPIOs to enter low
power mode.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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dt_driver_test: add tests for gpio controller framework

Add various tests for the GPIO dt controller framework much like what was
done for the rstclr system.

Signed-off-by: Clément Léger <clement.l

dt_driver_test: add tests for gpio controller framework

Add various tests for the GPIO dt controller framework much like what was
done for the rstclr system.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: atmel_piobu: add support for dt parsing

Register the atmel_piobu driver within the GPIO dt framework.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot

drivers: atmel_piobu: add support for dt parsing

Register the atmel_piobu driver within the GPIO dt framework.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: gpio: add device-tree based gpio controller framework

Build a small gpio framework based on the device-tree infrastructure and
on top of the existing gpio.h content. This framework allows t

drivers: gpio: add device-tree based gpio controller framework

Build a small gpio framework based on the device-tree infrastructure and
on top of the existing gpio.h content. This framework allows to register
gpio controllers and to retrieve gpio struct based on a "<name>-gpios"
properties.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: versal_gpio: rename gpio ops to avoid name clash

These functions names are going to be added by GPIO dt support commit.
Rename these by adding "versal_" prefix to avoid name clash.

Signed-

drivers: versal_gpio: rename gpio ops to avoid name clash

These functions names are going to be added by GPIO dt support commit.
Rename these by adding "versal_" prefix to avoid name clash.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: ls_gpio: rename gpio ops to avoid name clash

These functions names are going to be added by GPIO dt support commit.
Rename these by adding "ls_" prefix to avoid name clash.

Signed-off-by:

drivers: ls_gpio: rename gpio ops to avoid name clash

These functions names are going to be added by GPIO dt support commit.
Rename these by adding "ls_" prefix to avoid name clash.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: atmel_piobu: rename ops to avoid name clash

These functions names are going to be added by GPIO dt support commit.
Rename these by adding "secumod_" prefix to avoid name clash.

Signed-off-

drivers: atmel_piobu: rename ops to avoid name clash

These functions names are going to be added by GPIO dt support commit.
Rename these by adding "secumod_" prefix to avoid name clash.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: move gpio.h include to drivers/

GPIOs are typically handled by drivers and this will be modified to add
device-tree support.

Also rename "ena_dis" with "enable_disable" because more explic

drivers: move gpio.h include to drivers/

GPIOs are typically handled by drivers and this will be modified to add
device-tree support.

Also rename "ena_dis" with "enable_disable" because more explicit.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-sam: registers clocks for SCMI usage

Use scmi_clk_add() to register all clocks that are available on the
sama5d2 SoC.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne

plat-sam: registers clocks for SCMI usage

Use scmi_clk_add() to register all clocks that are available on the
sama5d2 SoC.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>

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plat-sam: enable use of SCMI generic clock support

All clocks for the plat-sam are described using the clk framework.
Enable this option to allow using them with SCMI transparently.

Signed-off-by:

plat-sam: enable use of SCMI generic clock support

All clocks for the plat-sam are described using the clk framework.
Enable this option to allow using them with SCMI transparently.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>

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