| b205ee2c | 02-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: default disable CFG_STM32MP1_SCMI_SHM_SYSRAM
Default disable CFG_STM32MP1_SCMI_SHM_SYSRAM to sync with mainline Linux kernel that uses OP-TEE shared memory for SCMI communication on S
plat-stm32mp1: default disable CFG_STM32MP1_SCMI_SHM_SYSRAM
Default disable CFG_STM32MP1_SCMI_SHM_SYSRAM to sync with mainline Linux kernel that uses OP-TEE shared memory for SCMI communication on STM32MP13 platform instead a piece of SRAM [1].
Link: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f0f0682c384d81bf25e6f8b23971fb8f69122f72 Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 8b3ac1f6 | 07-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: default disable reserved shared memory
Changes stm32mp15 default configuration to not embed OP-TEE's reserved static shared memory. This change is aligned with a recent change in TF-A
plat-stm32mp1: default disable reserved shared memory
Changes stm32mp15 default configuration to not embed OP-TEE's reserved static shared memory. This change is aligned with a recent change in TF-A [1] that also default disables the related configuration switch. Note that TF-A/stm32mp1 deprecates this configuration in order to fully remove its support in the future [2].
Note that when CFG_CORE_RESERVED_SHM is disabled the default 2MB area is now used by OP-TEE as secure memory.
Link: https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/commit/?id=fb1d3bd9330ce70f735a344dd4223faffb261118 [1] Link: https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/commit/?id=12e683a68049f6a3d0985a2cd1564e00115e809f [2] Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 0b1eafde | 07-Nov-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: crypto: caam: fix job ring interruption number
The job ring interruption number is 356 for job ring 3.
Fixes: b21f12209671 ("drivers: crypto: caam: use job ring 3 on i.mx8dxlevk") Signed-o
drivers: crypto: caam: fix job ring interruption number
The job ring interruption number is 356 for job ring 3.
Fixes: b21f12209671 ("drivers: crypto: caam: use job ring 3 on i.mx8dxlevk") Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| fb5592f9 | 09-Oct-2023 |
loubaihui <loubaihui1@huawei.com> |
core: drivers: add HiSilicon TRNG implementation
Based on HiSilicon hardware, a matching TRNG module is added. The driver is enabled for the D06 platform (PLATFORM=d06).
Signed-off-by: loubaihui <l
core: drivers: add HiSilicon TRNG implementation
Based on HiSilicon hardware, a matching TRNG module is added. The driver is enabled for the D06 platform (PLATFORM=d06).
Signed-off-by: loubaihui <loubaihui1@huawei.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Xiaoxu Zeng <zengxiaoxu@huawei.com> [jf: amend commit description] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
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| bd1fffe5 | 30-Oct-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
plat-stm32mp2: add new platform support
Initial configuration for STM32MP2x platforms. Add the initial memory layout and the MMU bus reference addresses. Default RAM size is 4GBytes It adds also the
plat-stm32mp2: add new platform support
Initial configuration for STM32MP2x platforms. Add the initial memory layout and the MMU bus reference addresses. Default RAM size is 4GBytes It adds also the console initialization and GIC support.
There are no shared resources on STM32MP25x platforms. Use stm32_pinctrl_set_secure_cfg() API in the STM32 UART driver for now.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 2032343c | 30-Oct-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dts: stm32: add stm32mp257f-ev1 board support
Add STM32MP257F Evaluation board support. It embeds a STM32MP257FAI SoC, with 4GB of DDR4, TSN switch (2+1 ports), 4*USB typeA, 1*USB2 typeC, SNOR OctoS
dts: stm32: add stm32mp257f-ev1 board support
Add STM32MP257F Evaluation board support. It embeds a STM32MP257FAI SoC, with 4GB of DDR4, TSN switch (2+1 ports), 4*USB typeA, 1*USB2 typeC, SNOR OctoSPI, mini PCIe, STPMIC2 for power distribution ...
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 8854076a | 30-Oct-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dts: stm32: introduce STM32MP25 SoCs family
STM32MP25 family is composed of 4 SoCs defined as following:
-STM32MP251: common part composed of 1*cortex-A35, common peripherals like SDMMC, UART, SPI,
dts: stm32: introduce STM32MP25 SoCs family
STM32MP25 family is composed of 4 SoCs defined as following:
-STM32MP251: common part composed of 1*cortex-A35, common peripherals like SDMMC, UART, SPI, I2C, PCIe, USB3, parallel and DSI display, 1*ETH ...
-STM32MP253: STM32MP251 + 1*cortex-A35 (dual CPU), a second ETH, CAN-FD and LVDS display.
-STM32MP255: STM32MP253 + GPU/AI and video encode/decode. -STM32MP257: STM32MP255 + ETH TSN switch (2+1 ports).
A second diversity layer exists for security features/ A35 frequency: -STM32MP25xY, "Y" gives information: -Y = A means A35@1.2GHz + no cryp IP and no secure boot. -Y = C means A35@1.2GHz + cryp IP and secure boot. -Y = D means A35@1.5GHz + no cryp IP and no secure boot. -Y = F means A35@1.5GHz + cryp IP and secure boot.
Available packages are:
STM32MP25xAI: 18*18/FCBGA 172 ios STM32MP25xAK: 14*14/FCBGA 144 ios STM32MP25xAL: 10*10/TFBGA 144 ios
More information available at: Link: https://www.st.com/content/st_com/en/campaigns/microprocessor-stm32mp2.html [1]
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 8370badb | 30-Oct-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_gpio: remove unused APIs
Remove unused stm32_get_gpio_bank_offset() and stm32_get_gpio_count() APIs.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Eti
drivers: stm32_gpio: remove unused APIs
Remove unused stm32_get_gpio_bank_offset() and stm32_get_gpio_count() APIs.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 239dffeb | 02-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
core: io: fix missing include of delay.h
Adds missing include of kernel/delay.h for udelay() used in IO_READ32_POLL_TIMEOUT() macro.
Fixes: 97ea199a2ae8 ("core: io: IO_READ32_POLL_TIMEOUT()") Revie
core: io: fix missing include of delay.h
Adds missing include of kernel/delay.h for udelay() used in IO_READ32_POLL_TIMEOUT() macro.
Fixes: 97ea199a2ae8 ("core: io: IO_READ32_POLL_TIMEOUT()") Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 1238110c | 03-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
core: kernel: interrupt: fix inline description
Fixes the inline description comment for type get_of_device_func and API function dt_driver_device_from_parent().
Fixes: b357d34fe91f ("core: dt_driv
core: kernel: interrupt: fix inline description
Fixes the inline description comment for type get_of_device_func and API function dt_driver_device_from_parent().
Fixes: b357d34fe91f ("core: dt_driver: swap TEE_result and retrieved device reference") Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| ea4cafa0 | 24-Oct-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: ffa: remove AArch32 support
The FF-A and AArch32 configuration was prior to this patch not compile tested and not used upstream. So remove the AArch32 support for FF-A configurations so save m
core: ffa: remove AArch32 support
The FF-A and AArch32 configuration was prior to this patch not compile tested and not used upstream. So remove the AArch32 support for FF-A configurations so save maintenance effort.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| b21f1220 | 02-Nov-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: crypto: caam: use job ring 3 on i.mx8dxlevk
Use the job ring #3 on i.mx8dxl to avoid resource conflict with other software stacks.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acke
drivers: crypto: caam: use job ring 3 on i.mx8dxlevk
Use the job ring #3 on i.mx8dxl to avoid resource conflict with other software stacks.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| b73c9534 | 23-Mar-2022 |
Clement Faure <clement.faure@nxp.com> |
core: imx: add support fox i.MX8DX
Add the support for the i.MX8DX platform.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> |
| f7acc214 | 27-Oct-2023 |
Alvin Chang <alvinga@andestech.com> |
core: riscv: Add support fault mitigations in non-threaded code
The previous commit ce56605a0ede ("core: support fault mitigations in non-threaded code") supports fault mitigations in non-threaded c
core: riscv: Add support fault mitigations in non-threaded code
The previous commit ce56605a0ede ("core: support fault mitigations in non-threaded code") supports fault mitigations in non-threaded code for ARM architecture.
This commit adds the related modification for RISC-V architecture to support it too.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| c41ef459 | 23-Oct-2023 |
Alvin Chang <alvinga@andestech.com> |
drivers: plic: Ignore interrupt source ID 0
According to RISC-V PLIC specification, interrupt ID 0 is reserved to mean "no interrupt". Therefore, we should ignore it.
Signed-off-by: Alvin Chang <al
drivers: plic: Ignore interrupt source ID 0
According to RISC-V PLIC specification, interrupt ID 0 is reserved to mean "no interrupt". Therefore, we should ignore it.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 512f443d | 16-Oct-2023 |
Margarita Glushkin <rutigl@gmail.com> |
plat-nuvoton: update HUK reading
Reading HUK from UUID stored in two scratchpad registers
Co-developed-by: Hila Miranda-Kuzi <hila.miranda.kuzi1@gmail.com> Signed-off-by: Hila Miranda-Kuzi <hila.mi
plat-nuvoton: update HUK reading
Reading HUK from UUID stored in two scratchpad registers
Co-developed-by: Hila Miranda-Kuzi <hila.miranda.kuzi1@gmail.com> Signed-off-by: Hila Miranda-Kuzi <hila.miranda.kuzi1@gmail.com> Signed-off-by: Margarita Glushkin <rutigl@gmail.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| bb053cc1 | 01-Jun-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
core: interrupt: remove old API functions
Remove old itr_xxx() API functions.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> |
| f406e0d7 | 07-May-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-stm32mp1: upgrade to new interrupt framework
Moves plat-stm32mp1 to the new interrupt framework API functions.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Ca
plat-stm32mp1: upgrade to new interrupt framework
Moves plat-stm32mp1 to the new interrupt framework API functions.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 7b89fb4e | 16-May-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-synquacer: upgrade to new interrupt framework
Moves plat-synquacer to the new interrupt framework API functions.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne
plat-synquacer: upgrade to new interrupt framework
Moves plat-synquacer to the new interrupt framework API functions.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 34764f0d | 16-May-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
plat-vexpress: upgrade to new interrupt framework
Moves plat-vexpress to the new interrupt framework API functions.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Ca
plat-vexpress: upgrade to new interrupt framework
Moves plat-vexpress to the new interrupt framework API functions.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 57fec118 | 16-May-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: atmel_piobu: upgrade to new interrupt framework
Moves atmel_piobu driver to the new interrupt framework API functions.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by
drivers: atmel_piobu: upgrade to new interrupt framework
Moves atmel_piobu driver to the new interrupt framework API functions.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| eb5b947d | 16-May-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: sp805_wdt.c: use the new interrupt API
Upgrades sp805_wdt.c driver to the new interrupt API functions as itr_alloc_add() and friends will be removed.
Reviewed-by: Jens Wiklander <jens.wikl
drivers: sp805_wdt.c: use the new interrupt API
Upgrades sp805_wdt.c driver to the new interrupt API functions as itr_alloc_add() and friends will be removed.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 297c6cbc | 16-May-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: crypto: caam: upgrade to new interrupt framework
Moves CAAM job ring driver to the new interrupt framework API functions.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off
drivers: crypto: caam: upgrade to new interrupt framework
Moves CAAM job ring driver to the new interrupt framework API functions.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| c64c658b | 16-May-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: atmel_wdt: upgrade to new interrupt framework
Moves atmel_wdt watchdog driver to the new interrupt framework API functions.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-o
drivers: atmel_wdt: upgrade to new interrupt framework
Moves atmel_wdt watchdog driver to the new interrupt framework API functions.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| da637b6b | 01-Jun-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
core: notif: upgrade to new interrupt framework
Uses main controller ops to call .raise_sgi as the old API functions itr_xxx() are deprecated.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org
core: notif: upgrade to new interrupt framework
Uses main controller ops to call .raise_sgi as the old API functions itr_xxx() are deprecated.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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