drivers: atmel_pio: update to compatible with sama7g5

Add the compatible string to device match table for sama7g5.
Add configuration for PIOE as it is available for sama7g5.

Signed-off-by: Tony Han

drivers: atmel_pio: update to compatible with sama7g5

Add the compatible string to device match table for sama7g5.
Add configuration for PIOE as it is available for sama7g5.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: atmel_shdwc: update to compatible with sama7g5

Add the compatible string to device match table for sama7g5.
As SHDWC is always secure for sama7g5 no need to configure
its security through m

drivers: atmel_shdwc: update to compatible with sama7g5

Add the compatible string to device match table for sama7g5.
As SHDWC is always secure for sama7g5 no need to configure
its security through matrix.
To process DDR controller for sama7g5 pm later.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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driver: crypto: hisilicon: update qm init configs

1. add qm_disable_clock_gate for QM_HW_V3
2. set doorbell timeout to QM_DB_TIMEOUT_SET ns

Signed-off-by: Zexi Yu <yuzexi@hisilicon.com>
Acked-by: J

driver: crypto: hisilicon: update qm init configs

1. add qm_disable_clock_gate for QM_HW_V3
2. set doorbell timeout to QM_DB_TIMEOUT_SET ns

Signed-off-by: Zexi Yu <yuzexi@hisilicon.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: riscv: Add .sbss and .sdata sections to linker script

Currently, the unclean .sbss section in RISC-V binary could be
problematic. This is because variables such as puts_lock may have
non-zero

core: riscv: Add .sbss and .sdata sections to linker script

Currently, the unclean .sbss section in RISC-V binary could be
problematic. This is because variables such as puts_lock may have
non-zero initial values, leading to failures in cpu_spin_trylock().
To address this issue, merge .sbss into .bss so that it is properly
cleared on boot. Both OpenSBI [1] and Linux [2] follow this approach.

Also, to benefit from global pointer relaxation, add .sdata after the
__global_pointer$ symbol.

Link: https://github.com/riscv-software-src/opensbi/blob/bb90a9ebf6d9a2fe7726978d594e82cdbaad7799/firmware/fw_base.ldS#L84 [1]
Link: https://github.com/torvalds/linux/blob/296455ade1fdcf5f8f8c033201633b60946c589a/include/asm-generic/vmlinux.lds.h#L1146 [2]
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-stm32mp1: shared_resource: disable MCKPROT if not needed

Disable RCC MCKPROT if not needed on STM32MP15 platforms to allow
non-secure world to control Cortex-M coprocessor. This change is neede

plat-stm32mp1: shared_resource: disable MCKPROT if not needed

Disable RCC MCKPROT if not needed on STM32MP15 platforms to allow
non-secure world to control Cortex-M coprocessor. This change is needed
when RCC secure hardening is enabled (RCC[TZEN] control bit) as it
also default enable RCC MCKPROT preventing non-secure world from
accessing some coprocessor SoC resources.

This change is needed when using in tree DTS files stm32mp15*-*-scmi.dts
and non-secure world is in charge of loading and managing the
remote processor firmware.

Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: caam: sm2 operation fallback

Fallback to software operations for SM2.

Reverts the temporary solution implemented in commit '3489781e9072
("drivers: caam: disable CFG_CRYPTO_SM2_* when ECC

drivers: caam: sm2 operation fallback

Fallback to software operations for SM2.

Reverts the temporary solution implemented in commit '3489781e9072
("drivers: caam: disable CFG_CRYPTO_SM2_* when ECC CAAM driver is
enabled")'.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Clement Faure <clement.faure@nxp.com>

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drivers: caam: add caam_hal_rng_pr_enabled() for 8QX, 8DX platforms

The SECO firmware enables the RNG prediction resistance by default.
There is no need to read the CAAM RNG status registers.

Signe

drivers: caam: add caam_hal_rng_pr_enabled() for 8QX, 8DX platforms

The SECO firmware enables the RNG prediction resistance by default.
There is no need to read the CAAM RNG status registers.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Clement Faure <clement.faure@nxp.com>

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plat-stm32mp2: conf: default enable RNG and RNG PTA

Default enable RNG and RNG PTA for STM32MP2 platforms.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carr

plat-stm32mp2: conf: default enable RNG and RNG PTA

Default enable RNG and RNG PTA for STM32MP2 platforms.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_rng: print RNG version at driver probe time

Print the RNG version that is read from RNG_VERR at driver probe time.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Re

drivers: stm32_rng: print RNG version at driver probe time

Print the RNG version that is read from RNG_VERR at driver probe time.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_rng: put max noise freq in compatible data

Define max noise clock frequency in the compatible data structure.
This avoids having configuration flags in the driver.

While there, updat

drivers: stm32_rng: put max noise freq in compatible data

Define max noise clock frequency in the compatible data structure.
This avoids having configuration flags in the driver.

While there, update STM32MP13/15 max RNG clock frequency to 48MHz
to align with latest certifications.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_rng: move RNG configuration to compat data

Register values cannot be part of the device tree.
As choosing another RNG configuration that is not the default
NIST-certified one should b

drivers: stm32_rng: move RNG configuration to compat data

Register values cannot be part of the device tree.
As choosing another RNG configuration that is not the default
NIST-certified one should be uncommon, it is acceptable to define
it in the compatible data and require to re-compile OP-TEE to change
the RNG configuration.

Also adds support for RNG V4.1 and above. These versions have a power
optimization and a modification of the seed error concealment. New
health tests and noise source registers are configurable and are part
of the RNG configuration.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_rng: add stm32mp25 support

Add stm32mp25 platform support in stm32_rng driver.
On this platform, a security clock is shared between some hardware
blocks. For the RNG, it is the RNG ke

drivers: stm32_rng: add stm32mp25 support

Add stm32mp25 platform support in stm32_rng driver.
On this platform, a security clock is shared between some hardware
blocks. For the RNG, it is the RNG kernel clock. Therefore, the
clock gate is no more shared between the RNG bus and kernel clocks as
on STM32MP1x platforms and the bus clock has to be managed on its own.

Define the number of clock in the compatible data.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: pta: drop benchmark

Drop Benchmark PTA as current implementation is non-function
and obsolete, and it's not supported anymore.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: E

core: pta: drop benchmark

Drop Benchmark PTA as current implementation is non-function
and obsolete, and it's not supported anymore.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>

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arm: plat: rcar: gen4: adjust memory map

Adjust the OP-TEE memory map for Gen4/S4 SoC to reflect changes of IPL
layout made by Renesas. Now BL31 starts at 0x46400000, so we have less
memory for OP-T

arm: plat: rcar: gen4: adjust memory map

Adjust the OP-TEE memory map for Gen4/S4 SoC to reflect changes of IPL
layout made by Renesas. Now BL31 starts at 0x46400000, so we have less
memory for OP-TEE.

Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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arm: virtualization: don't allow hypervisor to issue std calls

There is standing issue with having two versions of OP-TEE binary:
with virtualization enabled and without it. Correct variant needs to

arm: virtualization: don't allow hypervisor to issue std calls

There is standing issue with having two versions of OP-TEE binary:
with virtualization enabled and without it. Correct variant needs to
be present on board before booting rest of the system.

If non-virtualized variant is present and user tries to boot a
hypervisor, hypervisor can (and should) detect that OP-TEE does not
provide OPTEE_SMC_SEC_CAP_VIRTUALIZATION capability and fail
gracefully.

On other hand, when virtualized variant of OP-TEE is booted, but user
then boots directly into Linux (or any other OS), OP-TEE crashes:

E/TC:0 0 0 Core data-abort at address 0xffffffffffffffa0 (translation fault)
E/TC:0 0 0 esr 0x96000044 ttbr0 0x4418d000 ttbr1 0x00000000 cidr 0x0
E/TC:0 0 0 cpu #0 cpsr 0x00000184
E/TC:0 0 0 x0 0000000032000004 x1 0000000000000004
E/TC:0 0 0 x2 000000008183c000 x3 0000000000000000
E/TC:0 0 0 x4 0000000000000000 x5 0000000000000000
E/TC:0 0 0 x6 0000000000000000 x7 0000000000000000
E/TC:0 0 0 x8 0000000000000000 x9 0000000000000000
E/TC:0 0 0 x10 0000000000000000 x11 0000000000000000
E/TC:0 0 0 x12 0000000000000000 x13 0000000000000000
E/TC:0 0 0 x14 0000000000000000 x15 0000000000000000
E/TC:0 0 0 x16 0000000000000000 x17 0000000000000000
E/TC:0 0 0 x18 0000000000000000 x19 0000000000000000
E/TC:0 0 0 x20 0000000000000000 x21 0000000000000000
E/TC:0 0 0 x22 0000000000000000 x23 0000000000000000
E/TC:0 0 0 x24 0000000000000000 x25 0000000000000000
E/TC:0 0 0 x26 0000000000000000 x27 0000000000000000
E/TC:0 0 0 x28 0000000000000000 x29 0000000000000000
E/TC:0 0 0 x30 0000000044103ce4 elr 0000000044106314
E/TC:0 0 0 sp_el0 0000000000000000
E/TC:0 0 0 TEE load address @ 0x44100000
E/TC:0 0 0 Call stack:
E/TC:0 0 0 0x44106314 thread_handle_std_smc at core/arch/arm/kernel/thread_optee_smc.c:62
E/TC:0 0 0 Panic 'unhandled pageable abort' at core/arch/arm/kernel/abort.c:584 <abort_handler>
E/TC:0 0 0 TEE load address @ 0x44100000
E/TC:0 0 0 Call stack:
E/TC:0 0 0 0x44107e14 print_kernel_stack at core/arch/arm/kernel/unwind_arm64.c:89
E/TC:0 0 0 0x44114ffc __do_panic at core/kernel/panic.c:73
E/TC:0 0 0 0x44107050 get_fault_type at core/arch/arm/kernel/abort.c:500

This crash happens because virtualization code has special case for
guest_id == HYP_CLNT_ID. This case is needed to allow hypervisor to
call fast SMCs, so it can check OP-TEE version, capabilities and ask
OP-TEE to create/destroy guest partitions. Problem is that
thread_handle_std_smc() assumes that virt_set_guest() really sets the
guest partition, which does not happen in this special case.

This patch removes this special case from virt_set_guest(). Instead
thread_handle_fast_smc() function checks for HYP_CLNT_ID explicitly.

If hypervisor really want to be able to issue STD calls, it should
create a partition for itself using OPTEE_SMC_VM_CREATED call.

With this patch applied, virtualized variant of OP-TEE does not crash
anymore when users tries to boot into a baremetal setup.

Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: sam: use header file "platform_config.h" instead of "sama5d2.h"

As "sama5d2.h" is included in "platform_config.h" it's better to use
"#include <platform_config.h>" for support more devices

drivers: sam: use header file "platform_config.h" instead of "sama5d2.h"

As "sama5d2.h" is included in "platform_config.h" it's better to use
"#include <platform_config.h>" for support more devices later.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: atmel_rtc: update to compatible with sama7g5

Add the compatible string to device match table for sama7g5.
As RTC is always secure for sama7g5 no need to configure
its security through matri

drivers: atmel_rtc: update to compatible with sama7g5

Add the compatible string to device match table for sama7g5.
As RTC is always secure for sama7g5 no need to configure
its security through matrix.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Akshay Bhat <akshay.bhat@timesys.com>

show more ...

drivers: atmel_rstc: update to compatible with sama7g5

Add the compatible string to device match table for sama7g5.
As RSTC is always secure for sama7g5 no need to configure
its security through mat

drivers: atmel_rstc: update to compatible with sama7g5

Add the compatible string to device match table for sama7g5.
As RSTC is always secure for sama7g5 no need to configure
its security through matrix.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Akshay Bhat <akshay.bhat@timesys.com>

show more ...

drivers: atmel_trng: update to compatible with sama7g5

Add the compatible string to device match table for sama7g5.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jens Wiklander <jens.w

drivers: atmel_trng: update to compatible with sama7g5

Add the compatible string to device match table for sama7g5.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Akshay Bhat <akshay.bhat@timesys.com>

show more ...

drivers: atmel_piobu: update compatible with sama7g5

The number of tamper pins and some offsets of the registers are different
for sama7g5 and sama5d2.

Signed-off-by: Tony Han <tony.han@microchip.c

drivers: atmel_piobu: update compatible with sama7g5

The number of tamper pins and some offsets of the registers are different
for sama7g5 and sama5d2.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Akshay Bhat <akshay.bhat@timesys.com>

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core: msg_param: remove recursion in included headers

kernel/msg_param.h includes itself.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.s

core: msg_param: remove recursion in included headers

kernel/msg_param.h includes itself.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: tee: initialize dirfile|tadb_entry objects

Coverity reports many errors where dirfile_entry{} and tadb_entry{}
objects are used un-initialized.
Resolve these errors by setting these objects to

core: tee: initialize dirfile|tadb_entry objects

Coverity reports many errors where dirfile_entry{} and tadb_entry{}
objects are used un-initialized.
Resolve these errors by setting these objects to zero on declaration.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: check if binary to bignum conversion succeed

Check return value of crypto_bignum_bin2bn().

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jerome Forissier <jerome.forissier

core: check if binary to bignum conversion succeed

Check return value of crypto_bignum_bin2bn().

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: mmu: assert pointer to manifest device tree

Assert pointer to manifest device tree before using it in
fdt_node_offset_by_compatible().

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Rev

core: mmu: assert pointer to manifest device tree

Assert pointer to manifest device tree before using it in
fdt_node_offset_by_compatible().

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: kernel: dt: check return values from snprintf()

Check return values from snprintf() function.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jerome Forissier <jerome.foriss

core: kernel: dt: check return values from snprintf()

Check return values from snprintf() function.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

show more ...