plat-stm32mp1: add new API to erase SRAM3

Add new API TEE_Result stm32mp_syscfg_erase_sram3(void);
to be able to erase SRAM3 by hardware request.

Signed-off-by: Nicolas Toromanoff <nicolas.toromano

plat-stm32mp1: add new API to erase SRAM3

Add new API TEE_Result stm32mp_syscfg_erase_sram3(void);
to be able to erase SRAM3 by hardware request.

Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: syscfg: add dsb in syscfg driver

Add dsb in syscfg driver to guarantee that the request operations
are performed in SYSCFG register when the external API are called
and before to retu

plat-stm32mp1: syscfg: add dsb in syscfg driver

Add dsb in syscfg driver to guarantee that the request operations
are performed in SYSCFG register when the external API are called
and before to return to caller:
- stm32mp1_iocomp() in init sequence
- stm32mp_set_vddsd_comp_state() and stm32mp_set_hslv_state()
called by PWR driver

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: syscfg: set SYSCFG_CMPCR_READY_TIMEOUT_US to 10ms

CHange timeout to 10 ms instead of 1 ms.
On stm32mp13 we measure 1.5ms delay to have CMPCR_READY equal to 1.
Use 10 ms to be aligned

plat-stm32mp1: syscfg: set SYSCFG_CMPCR_READY_TIMEOUT_US to 10ms

CHange timeout to 10 ms instead of 1 ms.
On stm32mp13 we measure 1.5ms delay to have CMPCR_READY equal to 1.
Use 10 ms to be aligned with TF-A timeout.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: mm: fix zero-length access check inconsistency

Fix vm_check_access_rights() so it handles zero-length memory ranges
consistently. Previously, the function had inconsistent behavior for
zero-le

core: mm: fix zero-length access check inconsistency

Fix vm_check_access_rights() so it handles zero-length memory ranges
consistently. Previously, the function had inconsistent behavior for
zero-length checks:
- For page-aligned addresses: Would skip the page checking loop entirely
and return TEE_SUCCESS.
- For unaligned addresses: Would round uaddr down to page boundary and
return a result based on that page.

With this change flags = SECURE | NON_SECURE will still fail to preserve
the sanity checking, but all other zero-length ranges result in
TEE_SUCCESS.

Specifically this was required due to an interaction between OP-TEE and
Rust where Keymint [0] would call the Teaclave [1] wrapper around
TEE_MACComputeFinal with an empty temporary slice (pointer + length
pair) as the final message (&[]). Rust always requires the pointer to be
non-null, but allows it to dangle when length is zero. As a result the
arguments passed to TEE_MACComputeFinal were message=(void *)1,
messageLen=0. These arguments are passed unmodified to
vm_check_access_rights regardless of the length and presumably relied
on the page-aligned case to handle NULL + 0.

[0] https://android.googlesource.com/tee/optee/ta/keymint/
[1] https://github.com/apache/teaclave-trustzone-sdk

Signed-off-by: Martin Nyhus <martin@nyhus.dev>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: crypto: fix AES-GCM in-place decryption order

Fix AES-GCM in-place decryption to ensure GHASH always uses the original
ciphertext. Previously, plaintext could overwrite ciphertext before GHASH

core: crypto: fix AES-GCM in-place decryption order

Fix AES-GCM in-place decryption to ensure GHASH always uses the original
ciphertext. Previously, plaintext could overwrite ciphertext before GHASH,
causing authentication failures. Now GHASH is processed before decryption,
so in-place and non in-place decryption both work correctly without extra
buffering or conditional checks.

Tested with both in-place and non in-place decryption; all cases now
produce correct authentication tags.

Fixes: 1fca7e269b13 ("core: crypto: add new AES-GCM implementation")
Signed-off-by: Rayan Hu <rayan.hu@mediatek.com>
Reviewed-by: Menson Chen <menson.chen@mediatek.com>
Reviewed-by: ChingMing Chen <chingming.chen@mediatek.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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dts: stm32: move compatible of agent1 as the first line of the node

Move compatible of agent1 as the first line of the node to be aligned
with stm32mp23-st-scmi-cfg.dtsi

Signed-off-by: Thomas Bourg

dts: stm32: move compatible of agent1 as the first line of the node

Move compatible of agent1 as the first line of the node to be aligned
with stm32mp23-st-scmi-cfg.dtsi

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_rifsc: add support of stm32mp23

Add support of stm32mp23 platform in RIFSC driver.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne

drivers: stm32_rifsc: add support of stm32mp23

Add support of stm32mp23 platform in RIFSC driver.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_tamp: support STM32MP23x SoC family

Add support for STM32MP23 SoC family.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@fo

drivers: stm32_tamp: support STM32MP23x SoC family

Add support for STM32MP23 SoC family.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dt-bindings: shared bindings between STM32MP25x and STM32MP23x boards

As the STM32MP23 SoC family is a derivative of the STM32MP25 SoC family,
the device tree bindings can be shared as they are comp

dt-bindings: shared bindings between STM32MP25x and STM32MP23x boards

As the STM32MP23 SoC family is a derivative of the STM32MP25 SoC family,
the device tree bindings can be shared as they are compatible.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp2: conf: support STM32MP23x SoC family

Add support for the STM32MP23 SoC family and the stm32mp235f-dk board.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: E

plat-stm32mp2: conf: support STM32MP23x SoC family

Add support for the STM32MP23 SoC family and the stm32mp235f-dk board.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dts: stm32: add stm32mp235f-dk board support

Add STM32MP235F Discovery Kit board support. It embeds a STM32MP235FAK
SoC, with 2GB of LPDDR4, 2*USB typeA, 1*USB3 typeC, 1*ETH, wifi/BT
combo, DSI HDMI

dts: stm32: add stm32mp235f-dk board support

Add STM32MP235F Discovery Kit board support. It embeds a STM32MP235FAK
SoC, with 2GB of LPDDR4, 2*USB typeA, 1*USB3 typeC, 1*ETH, wifi/BT
combo, DSI HDMI, LVDS connector ...

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dts: stm32: introduce stm32mp23 SoCs family

STM32MP23 family is composed of 3 SoCs defined as following:

-STM32MP231: common part composed of 1*Cortex-A35, common peripherals
like SDMMC, UART, SPI,

dts: stm32: introduce stm32mp23 SoCs family

STM32MP23 family is composed of 3 SoCs defined as following:

-STM32MP231: common part composed of 1*Cortex-A35, common peripherals
like SDMMC, UART, SPI, I2C, parallel display, 1*ETH ...

-STM32MP233: STM32MP231 + 1*Cortex-A35 (dual CPU), a second ETH, CAN-FD.

-STM32MP235: STM32MP233 + GPU/AI and video encode/decode, DSI and LDVS
display.

A second diversity layer exists for security features/ A35 frequency:
-STM32MP23xY, "Y" gives information:
-Y = A means A35@1.2GHz + no cryp IP and no secure boot.
-Y = C means A35@1.2GHz + cryp IP and secure boot.
-Y = D means A35@1.5GHz + no cryp IP and no secure boot.
-Y = F means A35@1.5GHz + cryp IP and secure boot.

Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dts: stm32: fix memory ranges on fmc node for stm32mp251

Fix memory ranges on fmc node for in stm32mp251.dtsi

Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Signed-off-by: Thoma

dts: stm32: fix memory ranges on fmc node for stm32mp251

Fix memory ranges on fmc node for in stm32mp251.dtsi

Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Signed-off-by: Thomas BOURGOIN <thomas.bourgoin@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: ree_fs: initialize ta_ver.db when its size is zero

Creating and writing db_hdr involves several RPC commands. If a
power loss occurs during the creation flow, it may result in a
db file with a

core: ree_fs: initialize ta_ver.db when its size is zero

Creating and writing db_hdr involves several RPC commands. If a
power loss occurs during the creation flow, it may result in a
db file with an empty db_hdr. Attempting to read this file
subsequently leads to a TEE_ERROR_BAD_STATE error.

Instead of returning TEE_ERROR_BAD_STATE, continue the db_hdr
initialization flow to support subsequent functionality.

Link: https://github.com/OP-TEE/optee_os/issues/7513
Fixes: 183398139c9c ("core: enable rollback protection for REE-FS TAs")

Signed-off-by: Ox Yeh <ox.yeh@mediatek.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-stm32mp2: conf: default enable CFG_SCMI_SCPFW

For STM32MP2x families the SCP firmware is the only SCMI server
supported.
Default enable CFG_SCMI_SCPFW=y in conf.mk

Signed-off-by: Thomas Bourgo

plat-stm32mp2: conf: default enable CFG_SCMI_SCPFW

For STM32MP2x families the SCP firmware is the only SCMI server
supported.
Default enable CFG_SCMI_SCPFW=y in conf.mk

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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drivers: stm32_gpio: move dt_flags support in the new ops configure

Move the GPIO configuration based on dt_flags previously done in
get_dt ops in the new gpio configure ops.

To avoid glitch on GPI

drivers: stm32_gpio: move dt_flags support in the new ops configure

Move the GPIO configuration based on dt_flags previously done in
get_dt ops in the new gpio configure ops.

To avoid glitch on GPIO line, the write in register GPIO_MODER is only
kept in the ops stm32_gpio_set_direction(), called by gpio framework
function gpio_configure() after the call of configure ops, so
we have no more transient GPIO input configuration.

Moreover, this patch allows to correctly apply the dt_flags when
they are modify after the call of stm32_gpio_get_dt(),
for example in drivers regulator fixed and gpio.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: gpio: add new ops configure to initialize gpio

Add the new ops configure to initialize the GPIO resource based on
dt_flags. This new ops is require to support the modification of dt_flag
do

drivers: gpio: add new ops configure to initialize gpio

Add the new ops configure to initialize the GPIO resource based on
dt_flags. This new ops is require to support the modification of dt_flag
done by caller after gpio_dt_init_by_index() and before call of
gpio_configure().

It is done by example in driver of regulator fixed and gpio.

The new ops is called only in gpio_dt_cfg_by_index() or in
gpio_configure() so usage of one of this API is manadatory after
this patch.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: gpio: add configure functions

Align the OP-TEE GPIO driver with GPIO lib (devm_gpiod_get_index with
enum gpiod_flags) and add a way to select the GPIO configuration directly
during request

drivers: gpio: add configure functions

Align the OP-TEE GPIO driver with GPIO lib (devm_gpiod_get_index with
enum gpiod_flags) and add a way to select the GPIO configuration directly
during request with the new function, gpio_dt_cfg_by_index().

This patch remove assumption on GPIO direction (gpio input was assumed in
GPIO driver) or output level when the GPIO is requested by consumer.
with this patch it must be requested explicitly with:
- GPIO_IN: configure the input GPIO
- GPIO_ASIS: direction is managed by caller later with gpio_set_value()
call.
- GPIO_OUT_LOW / GPIO_OUT_HIGH: output GPIO at expected level,
the sequence for GPIO have the correct order to avoid glitch by using
the gpio function at the correct order.

This patch is a preliminary step for the introduction of ops configure.
The API gpio_dt_get_by_index() is keep for backward compatibility but
should be used with gpio_configure() or replaced by gpio_dt_cfg_by_index().

Now gpio_configure() is only used in the 2 drivers, regulator_fixed and
regulator_gpio, because in these drivers the flags gpio->dt_flags are
modified after call of gpio_dt_get_by_index().

For get_voltage_level_gpio(), GPIO_OUT_HIGH is used by default as it is
done in Linux function of_get_gpio_regulator_config().

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: regulator: simplify device tree parsing

Use gpio_dt_get_by_index() to get the properties in device tree with
all the possible variant name: "gpio" and "gpios".

Signed-off-by: Patrick Delau

drivers: regulator: simplify device tree parsing

Use gpio_dt_get_by_index() to get the properties in device tree with
all the possible variant name: "gpio" and "gpios".

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: gpio: support gpio suffix in device tree

Align the OP-TEE GPIO driver on the Linux GPIO lib behavior for the gpio
properties in device tree: search "gpios" or "gpio" when gpio_name is
omit

drivers: gpio: support gpio suffix in device tree

Align the OP-TEE GPIO driver on the Linux GPIO lib behavior for the gpio
properties in device tree: search "gpios" or "gpio" when gpio_name is
omitted and "foo-gpios" or "foo-gpio" when and if the gpio_name="foo".

This patch allows use of the function gpio_dt_get_by_index()
by GPIO consumers for all supported bindings.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: console: Allow setting logging verbosity during runtime

The default console can be disabled at runtime for power management. Any
prints after boot from OP-TEE could cause a bus data abort if t

core: console: Allow setting logging verbosity during runtime

The default console can be disabled at runtime for power management. Any
prints after boot from OP-TEE could cause a bus data abort if the UART has
been disabled. Add an option to change the log level after boot has
completed which can be used to disable the console log.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dts: stm32: enable IWDG1 on stm32mp257f-dk board

Enable IWDG1 node and set a 32s timeout.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier

dts: stm32: enable IWDG1 on stm32mp257f-dk board

Enable IWDG1 node and set a 32s timeout.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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core: arm: refactor RD-1AE and RD-Aspen into automotive_rd flavors

This change moves RD-1AE and RD-Aspen under a single
automotive_rd platform with per-flavor configuration.

Key updates:
- Introduc

core: arm: refactor RD-1AE and RD-Aspen into automotive_rd flavors

This change moves RD-1AE and RD-Aspen under a single
automotive_rd platform with per-flavor configuration.

Key updates:
- Introduce plat-automotive_rd/ with shared main.c,
platform_config.h and Makefiles.
- Define RD-1AE and RD-Aspen are selected
via PLATFORM_FLAVOR rd1ae or rdaspen.
- Merge flavor settings (UART/GIC/DRAM/topology)
into platform_config.h and conf.mk files.
- Use default get_core_pos_mpidr() by setting appropriate
CFG_CORE_CLUSTER_SHIFT / CFG_CORE_THREAD_SHIFT for rdaspen,
eliminating custom assembly where not required.

Benefits:
- Consistent with OP-TEE’s platform/variant framework.
- Reduces code duplication between RD-1AE and RD-Aspen.
- Simplifies adding new automotive reference design flavors
in the future.

Usage:
- Set PLATFORM=automotive_rd
- Set PLATFORM_FLAVOR to rdaspen or rd1ae

Signed-off-by: Ahmed Tiba <ahmed.tiba@arm.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: kernel: align the address of transfer entry

Fix two issues in transfer_list_add() and transfer_list_add_with_align(),
which cause incompliance with the Firmware Handoff spec v1.0 [1].

1. Avoi

core: kernel: align the address of transfer entry

Fix two issues in transfer_list_add() and transfer_list_add_with_align(),
which cause incompliance with the Firmware Handoff spec v1.0 [1].

1. Avoid adding entries at an unaligned address.
2. Remove the implicit padding at the end of a transfer entry which is
included by 'tl->size'.

[1] https://github.com/FirmwareHandoff/firmware_handoff/releases/tag/v1.0

Fixes: a12225022bd5 ("core: add transfer list API")
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: arm: stmm_sp: return FFA_NOT_SUPPORTED for undefined FFA functions

edk2's patch ("ArmFfaLib: Add Rx/Tx support for Stmm secure partition") [0]
added Rx/Tx buffer mapping support to ArmFfaStand

core: arm: stmm_sp: return FFA_NOT_SUPPORTED for undefined FFA functions

edk2's patch ("ArmFfaLib: Add Rx/Tx support for Stmm secure partition") [0]
added Rx/Tx buffer mapping support to ArmFfaStandaloneMm(Core)Lib.

However, stmm_sp does not require Rx/Tx buffer mapping and
its SVC handler is lightweight. Therefore, when it receives
an undefined FFA function, it is sufficient to return FFA_NOT_SUPPORTED to
StandaloneMm instead of panicking.

This also aligns with the FF-A specification, which requires returning
FFA_NOT_SUPPORTED when an unimplemented function ID is received.

If StandaloneMm fails to initialize, it will return FFA_ERROR.
In this case, there is no way to keep the stmm_sp TA alive,
so panic is called.
Otherwise, StandaloneMm will return with DIRECT_MSG_RESP.

Link: https://github.com/tianocore/edk2/pull/11080/commits/75ca159e57dbe081b89373046280f34d67571852 [0]
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Mikko Rapeli <mikko.rapeli@linaro.org>

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