| 8ea50d3b | 20-Apr-2022 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: pta: scmi: new API to support MSG header communication protocol
in the SCMI PTA. Adds a new capability and a new command to the SCMI PTA API to support SCMI MSG header communication protocol.
core: pta: scmi: new API to support MSG header communication protocol
in the SCMI PTA. Adds a new capability and a new command to the SCMI PTA API to support SCMI MSG header communication protocol. Capability PTA_SCMI_CAPS_MSG_HEADER allows client and service to negotiate the desired transport configuration. Command PTA_SCMI_CMD_PROCESS_MSG_CHANNEL allows client to request processing of a message sent based on that message exchange protocol where input and output SCMI messages are exchange using OP-TEE shared memory references provided by the client.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 916cc52a | 29-Apr-2022 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: scmi-msg: add SCMI MSG message protocol
Implements MSG header protocol to handle SCMI messages. MSG header protocol was introduced in Linux kernel v5.15 [1]. It relies on normal cached shar
drivers: scmi-msg: add SCMI MSG message protocol
Implements MSG header protocol to handle SCMI messages. MSG header protocol was introduced in Linux kernel v5.15 [1]. It relies on normal cached shared memory buffer using a 32bit header followed by the SCMI message payload.
To support this message interface, the SCMI PTA defines a new capability and a new command. Capability PTA_SCMI_CAPS_MSG_HEADER allows client and service to negotiate the desired transport configuration. Command PTA_SCMI_CMD_PROCESS_MSG_CHANNEL allows client to request processing of a message sent based on that message exchange protocol.
Platforms shall enable configuration switch CFG_SCMI_MSG_SHM_MSG to have their SCMI service supporting that communication protocol.
Link: [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f301bba0ca7392d16a6ea4f1d264a91f1fadea1a Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 6105aa86 | 12-Apr-2022 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: map TA memory using TEE_MATTR_MEM_TYPE_TAGGED
Maps TA memory using the TEE_MATTR_MEM_TYPE_TAGGED which results in tagged cached memory if the system has it enabled.
Acked-by: Etienne Carriere
core: map TA memory using TEE_MATTR_MEM_TYPE_TAGGED
Maps TA memory using the TEE_MATTR_MEM_TYPE_TAGGED which results in tagged cached memory if the system has it enabled.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| d783b681 | 19-Nov-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: dt_driver: drivers to test probe deferral
Implements driver providers for some emulated resource (clocks and reset controllers), consumer drivers and a embedded test DTSI file to test the DT_D
core: dt_driver: drivers to test probe deferral
Implements driver providers for some emulated resource (clocks and reset controllers), consumer drivers and a embedded test DTSI file to test the DT_DRIVER probe sequence.
The driver consumer run few tests and logs results locally. The result participates in core self test result reported by the PTA test interface.
One can test with vexpress platform flavor qemu_virt and qemu_v8 using, for example, the build instruction below: make PLATFORM=vexpress-qemu_virt \ CFG_DT_DRIVER_EMBEDDED_TEST=y \ CFG_EMBED_DTB_SOURCE_FILE=embedded_dtb_test.dts
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 7e05ec25 | 27-Oct-2021 |
Jerome Forissier <jerome@forissier.org> |
core: pta: add remote attestation PTA
Add a PTA to perform remote attestation of user space TAs and TEE core memory. Enabled with CFG_ATTESTATION_PTA=y. Four commands are defined:
- PTA_ATTESTATION
core: pta: add remote attestation PTA
Add a PTA to perform remote attestation of user space TAs and TEE core memory. Enabled with CFG_ATTESTATION_PTA=y. Four commands are defined:
- PTA_ATTESTATION_GET_PUBKEY
Returns the public RSA key used to sign the measurements generated by the other commands. The key pair is generated on first call (any command) and saved to secure storage. It is therefore device-specific.
- PTA_ATTESTATION_GET_TA_SHDR_DIGEST
Returns the digest found in the secure header (struct shdr) of a TA or trusted shared library given its UUID.
- PTA_ATTESTATION_HASH_TA_MEMORY
This command must be called by a user space TA (not a CA). It computes a hash of the memory pages that belong to the caller and contain code or read-only data. This hash is therefore a runtime measurement of the TA execution environment, including shared libraries (if any). It can be used to remotely attest that the device is running untampered TA code.
- PTA_ATTESTATION_HASH_TEE_MEMORY
Returns a hash of the TEE OS core (.text and .rodata sections, less the small part of .text that may be modified at boot). Similar to PTA_ATTESTATION_HASH_TA_MEMORY, the hash is computed each time the command is called, so that the result reflects the actual memory content.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| cea1eb0b | 09-Feb-2022 |
Clément Léger <clement.leger@bootlin.com> |
pta: add PTA for RTC
On some systems, when the RTC is secured, there is no way for the normal world to access it. This PTA uses the RTC API to allow a Linux OP-TEE based RTC driver to communicate wi
pta: add PTA for RTC
On some systems, when the RTC is secured, there is no way for the normal world to access it. This PTA uses the RTC API to allow a Linux OP-TEE based RTC driver to communicate with the RTC that is secured.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| 9c4aaf67 | 11-Jan-2022 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: make mobj_get_va() more secure
Adds a length parameter to allow mobj_get_va() to check that the entire va range requested is available.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.
core: make mobj_get_va() more secure
Adds a length parameter to allow mobj_get_va() to check that the entire va range requested is available.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| c6b34ea8 | 29-Nov-2021 |
Jerome Forissier <jerome@forissier.org> |
core: fix build dependencies for fs_htree.c
core/tee/fs_htree.c is used when CFG_REE_FS=y, and is also used by the test PTA core/pta/tests/fs_htree.c. Rather than make the implementation depend on t
core: fix build dependencies for fs_htree.c
core/tee/fs_htree.c is used when CFG_REE_FS=y, and is also used by the test PTA core/pta/tests/fs_htree.c. Rather than make the implementation depend on the test (CFG_TEE_CORE_EMBED_INTERNAL_TESTS), do the opposite.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b0e1c5e4 | 13-Nov-2021 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
core: pta: APDU pseudo trusted application
Allow trusted applications and REE clients to send APDU frames to a secure element.
Even though secure elements are usually accessible from serial buses,
core: pta: APDU pseudo trusted application
Allow trusted applications and REE clients to send APDU frames to a secure element.
Even though secure elements are usually accessible from serial buses, when they have been initialized in OP-TEE is possible that the SCP03 secret keys are only available in the Trusted World and therefore APDU requests must be handled in OP-TEE.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| ff0c5d42 | 13-Nov-2021 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
core: crypto: Secure Element cryptographic interface
Extract cryptographic operations specific to Secure Elements from the more generic cryptographic interface.
Also, the Secure Channel Protocol03
core: crypto: Secure Element cryptographic interface
Extract cryptographic operations specific to Secure Elements from the more generic cryptographic interface.
Also, the Secure Channel Protocol03 is a global protocol supported by most SEs and not NXP SE05X specific. Use this commit to reflect this fact.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| afb1cc80 | 24-Nov-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: Fix warning in gprof_send_rpc()
Fixes a -Wdeclaration-after-statement warning in gprof_send_rpc(): core/pta/gprof.c: In function ‘gprof_send_rpc’: core/pta/gprof.c:35:2: error: ISO C90 forbids
core: Fix warning in gprof_send_rpc()
Fixes a -Wdeclaration-after-statement warning in gprof_send_rpc(): core/pta/gprof.c: In function ‘gprof_send_rpc’: core/pta/gprof.c:35:2: error: ISO C90 forbids mixed declarations and code [-Werror=declaration-after-statement] struct thread_param params[3] = { ^~~~~~
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 195b88be | 16-Nov-2021 |
Elvira Khabirova <e.khabirova@omp.ru> |
pta: tests: fs_htree: make sure all local variables are initialized
Update the whole source file to initialize all local variables.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-
pta: tests: fs_htree: make sure all local variables are initialized
Update the whole source file to initialize all local variables.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Elvira Khabirova <e.khabirova@omp.ru>
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| e1761059 | 09-Nov-2021 |
Elvira Khabirova <e.khabirova@omp.ru> |
pta: tests: add a just-in-case default return value to test_write_read()
test_write_read() is never called with num_blocks == 0, but assign a default value to res anyway.
Reviewed-by: Jens Wiklande
pta: tests: add a just-in-case default return value to test_write_read()
test_write_read() is never called with num_blocks == 0, but assign a default value to res anyway.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Elvira Khabirova <e.khabirova@omp.ru>
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| cd61ab7e | 30-Aug-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: pta/bcm/elog: add missing buffer size check
Adds a missing buffer size check in pta_elog_load_nitro_fw(). This prevents writing beyond the memory range reserved for the nitro firmware.
Fixes:
core: pta/bcm/elog: add missing buffer size check
Adds a missing buffer size check in pta_elog_load_nitro_fw(). This prevents writing beyond the memory range reserved for the nitro firmware.
Fixes: e605fbdfd7a0 ("pta: bcm: Add PTA to handle Broadcom error logs") Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| efc49495 | 07-Sep-2021 |
Jerome Forissier <jerome@forissier.org> |
core: remove interrupt test PTA
The interrupt test PTA does not support CFG_TEE_CORE_NB_CORE > 7 and there is a compilation warning when it is > 31:
$ make -s CFG_TEE_CORE_NB_CORE=32 CFG_TEE_CORE_
core: remove interrupt test PTA
The interrupt test PTA does not support CFG_TEE_CORE_NB_CORE > 7 and there is a compilation warning when it is > 31:
$ make -s CFG_TEE_CORE_NB_CORE=32 CFG_TEE_CORE_EMBED_INTERNAL_TESTS=y \ CFG_WERROR=y In file included from core/include/kernel/interrupt.h:10, from core/pta/tests/interrupt.c:7: core/pta/tests/interrupt.c: In function ‘test_sgi’: lib/libutils/ext/include/util.h:117:44: error: left shift count >= width of type [-Werror=shift-count-overflow] 117 | #define SHIFT_U32(v, shift) ((uint32_t)(v) << (shift)) | ^~ core/pta/tests/interrupt.c:97:18: note: in expansion of macro ‘SHIFT_U32’ 97 | (uint8_t)(SHIFT_U32(1, CFG_TEE_CORE_NB_CORE) - 1)); | ^~~~~~~~~ cc1: all warnings being treated as errors
Since this PTA is unused, remove it.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| c2e4eb43 | 23-May-2021 |
Anton Rybakov <a.rybakov@omp.ru> |
core_mmu: fix phys_to_virt() to check length
phys_to_virt() function without length parameter doesn`t always have ability to find the correct mapping for requested physical address. This is because
core_mmu: fix phys_to_virt() to check length
phys_to_virt() function without length parameter doesn`t always have ability to find the correct mapping for requested physical address. This is because physical address can be mapped in the same time in different virtual regions with different length. So the first found region which contains the requested physical address possibly doesn`t have enough mapped data. This is fixed by adding the length parameter to phys_to_virt() function. Length parameter can be set to 1 if caller knows that requested (pa + len) doesn`t cross mapping granule boundary.
core_mmu_get_va() and io_pa_or_va() functions now are take length parameter too as they based on phys_to_virt() in case of MMU enabled.
Signed-off-by: Anton Rybakov <a.rybakov@omp.ru> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1-157C_DK2) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qpsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek)
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| 6e733a8b | 18-Aug-2021 |
Jelle Sels <jelle.sels@arm.com> |
core: rename TA_VASPACE to TS_VASPACE
The TA_VASPACE memory will be used by both TAs and SPs. Rename it to TS_VASPACE so it is clearer that it can be used by both.
Signed-off-by: Jelle Sels <jelle.
core: rename TA_VASPACE to TS_VASPACE
The TA_VASPACE memory will be used by both TAs and SPs. Rename it to TS_VASPACE so it is clearer that it can be used by both.
Signed-off-by: Jelle Sels <jelle.sels@arm.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| f2dad489 | 21-May-2021 |
Sergiy Kibrik <Sergiy_Kibrik@epam.com> |
core: pta: add generic RNG pseudo TA
Platforms that include hardware-based RNGs and implement hw_get_random_byte() may benefit from already implemented bus framework and rng driver [1]. For this rea
core: pta: add generic RNG pseudo TA
Platforms that include hardware-based RNGs and implement hw_get_random_byte() may benefit from already implemented bus framework and rng driver [1]. For this reason the interface of rng.pta implemented for Developerbox platform is re-used. Interface is generic and corresponds to in-kernel optee-rng driver.
Pseudo TA interface is specifically used so that credible entropy is available to REE early at boot, even before user-space is fully up.
[1] https://lwn.net/Articles/777260/
Signed-off-by: Sergiy Kibrik <Sergiy_Kibrik@epam.com> Reviewed-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| d7b5407f | 12-May-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: pta: scmi: fix missing threaded state of the channel
Enable SMT channel threaded state when SCMI PTA gets a channel. Before this fixup, Core panics when SCMI message is posted since the assert
core: pta: scmi: fix missing threaded state of the channel
Enable SMT channel threaded state when SCMI PTA gets a channel. Before this fixup, Core panics when SCMI message is posted since the assertion on channel threaded field value in scmi_smt_threaded_entry() when in debug mode.
Fixes: b0a1c2504aaf ("core: pta: scmi: new interface to REE SCMI agent") Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b0a1c250 | 05-Apr-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: pta: scmi: new interface to REE SCMI agent
Adds a PTA interface to REE SCMI agents to get SCMI message communication channel for processing in OP-TEE SCMI server.
Currently implement supports
core: pta: scmi: new interface to REE SCMI agent
Adds a PTA interface to REE SCMI agents to get SCMI message communication channel for processing in OP-TEE SCMI server.
Currently implement supports for a SCMI server built with CFG_SCMI_MSG_SMT=y. The implementation is made so that an alternate SCMI server implementation can added.
Client gets SCMI channel capabilities with PTA_SCMI_CMD_CAPABILITIES. Client gets a handle for an SCMI channel with command PTA_SCMI_CMD_GET_CHANNEL_HANDLE. Client pushes SCMI messages with command PTA_SCMI_CMD_PROCESS_SMT_CHANNEL or PTA_SCMI_CMD_PROCESS_SMT_CHANNEL_MESSAGE.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| fc5d98e8 | 23-Feb-2021 |
Manish Tomar <manish.tomar@nxp.com> |
core: gpio.h: Add 'struct gpio_chip *chip' in 'struct gpio_ops'
To get the GPIO controller base address, 'struct gpio_chip *chip' is passed as a member in the container 'struct gpio_ops'
Also updat
core: gpio.h: Add 'struct gpio_chip *chip' in 'struct gpio_ops'
To get the GPIO controller base address, 'struct gpio_chip *chip' is passed as a member in the container 'struct gpio_ops'
Also updated bcm_gpio and pl061_gpio as per modified gpio.h definition.
Signed-off-by: Manish Tomar <manish.tomar@nxp.com> Reviewed-by: Victor Chong <victor.chong@linaro.org> Reviewed-by: Clement Faure <clement.faure@nxp.com> Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com>
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| 3dd5cda2 | 19-Feb-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add NULL check in system_dlsym()
system_dlsym() takes a uuid in one of the memref parameters. Prior to this patch that memref wasn't checked correctly in all cases. system_dlsym() passes the u
core: add NULL check in system_dlsym()
system_dlsym() takes a uuid in one of the memref parameters. Prior to this patch that memref wasn't checked correctly in all cases. system_dlsym() passes the uuid to ldelf_dlsym() which uses this uuid so the pointer must be valid and of the expected size. Fix this by checking that the pointer is non-NULL and of the correct size.
This fixes coverity scan: CID 1501812 (#1 of 1): Dereference after null check (FORWARD_NULL)
Fixes: ebef121c1f5c ("core, ldelf: add support for runtime loading of shared libraries") Reviewed-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| e4ad5ccd | 08-Dec-2020 |
Aleksandr Anisimov <a.anisimov@omprussia.ru> |
libutee: add a new API to interact with plugins from TA
This patch adds a new API to libutee to interact with tee-supplicant plugins from TEE userspace.
Every user TA can use 'tee_invoke_supp_plugi
libutee: add a new API to interact with plugins from TA
This patch adds a new API to libutee to interact with tee-supplicant plugins from TEE userspace.
Every user TA can use 'tee_invoke_supp_plugin()' to send any commands to a plugin. The commands are predefined by the plugin developer.
See the https://github.com/linaro-swg/optee_examples repo for an example of using plugins.
Signed-off-by: Aleksandr Anisimov <a.anisimov@omprussia.ru> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 14d79887 | 08-Jan-2021 |
Igor Opaniuk <igor.opaniuk@gmail.com> |
core: pta: drop SDP PTA
Drop SDP PTA as it is not used anywhere and looks like isn't maintained. When is CFG_SDP_PTA=y the build fails with compile errors:
error: implicit declaration of function ‘
core: pta: drop SDP PTA
Drop SDP PTA as it is not used anywhere and looks like isn't maintained. When is CFG_SDP_PTA=y the build fails with compile errors:
error: implicit declaration of function ‘tee_ta_get_calling_session’; did you mean ‘ts_get_calling_session’? [-Werror=implicit-function-declaration] ... error: ‘struct tee_ta_session’ has no member named ‘ctx’
Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| baa5161d | 11-Dec-2020 |
Balint Dobszay <balint.dobszay@arm.com> |
core: ldelf: implement separate syscalls for ldelf
Implements a separate syscall handler for ldelf to decouple it from user TAs and enable using it for all TSs. The calling convention is the same as
core: ldelf: implement separate syscalls for ldelf
Implements a separate syscall handler for ldelf to decouple it from user TAs and enable using it for all TSs. The calling convention is the same as for utee_* syscalls. To distinguish between the different SVCs, the syscall handler pointer is updated before entering ldelf and restored after returning. The step of opening a system PTA session and invoking the commands there is eliminated, the necessary functionality is implemented in the ldelf syscall functions.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>
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