drivers: rtc: add RTC functions and millisecond field

Add a millisecond field in the optee_rtc_time structure.

Add different APIs to manipulate optee_rtc_time structures:
rtc_is_a_leap_year(): Dete

drivers: rtc: add RTC functions and millisecond field

Add a millisecond field in the optee_rtc_time structure.

Add different APIs to manipulate optee_rtc_time structures:
rtc_is_a_leap_year(): Detects if the given year is a leap year
rtc_get_month_days(): Returns the number of day in the given month
rtc_timecmp(): Compare two time captures
rtc_diff_calendar_ms(): Returns the difference in milliseconds between
two time captures
rtc_diff_calendar_tick(): Returns the difference in number of ticks
between two time captures

Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dt-bindings: stm32: fix CLKSRC for RTC in stm32mp13 clock bindings

Bad copy/paste, use MUX ID to configure the clock source of RTC and not
the clock ID.

Signed-off-by: Gabriel Fernandez <gabriel.fe

dt-bindings: stm32: fix CLKSRC for RTC in stm32mp13 clock bindings

Bad copy/paste, use MUX ID to configure the clock source of RTC and not
the clock ID.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Fixes: 19a4632e0f17 ("dt-bindings: stm32: add stm32mp13 clock and reset bindings")

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drivers: gic: Dynamically assign interrupts to non-secure world

Add gic_spi_release_to_ns() API function in GIC driver to release an
interrupt to Non secure settings. This functionality is essential

drivers: gic: Dynamically assign interrupts to non-secure world

Add gic_spi_release_to_ns() API function in GIC driver to release an
interrupt to Non secure settings. This functionality is essential for
scenarios where a specific interrupt needs to be dynamically set to
either Group 1 Secure (G1S) or Group 1 Non-Secure (G1NS) at different
times.

Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: boot_mem: keep track of padding

When boot_mem_alloc() allocates memory up to alignment - 1 number of
bytes may have be skipped to satisfy the required alignment of the
returned pointer. If the

core: boot_mem: keep track of padding

When boot_mem_alloc() allocates memory up to alignment - 1 number of
bytes may have be skipped to satisfy the required alignment of the
returned pointer. If the skipped bytes, or padding, is large enough,
it's recorded in a list of padding. The list of paddings can be
processed and consumed with boot_mem_foreach_padding(). This allows
sufficiently large paddings to be added to for instance the heap instead
of being wasted.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: atmel_rstc: add functions to allocate/get reset controller/lines

Define new functions for getting the reset controller, find or allocate
the reset lines.

Signed-off-by: Tony Han <tony.han@

drivers: atmel_rstc: add functions to allocate/get reset controller/lines

Define new functions for getting the reset controller, find or allocate
the reset lines.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: atmel_rstc: new data and functions to handle reset assert/deassert

Define new struct and functions for handling the reset controller, reset
lines and the reset operations (assert, deassert)

drivers: atmel_rstc: new data and functions to handle reset assert/deassert

Define new struct and functions for handling the reset controller, reset
lines and the reset operations (assert, deassert).

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-telechips: Add initial support for Telechips platform (TCC805x)

This is the initial support for Telechips Platform (TCC805x).

* xtest results (-l 15):
| 334474 subtests of which 0 failed
| 108

plat-telechips: Add initial support for Telechips platform (TCC805x)

This is the initial support for Telechips Platform (TCC805x).

* xtest results (-l 15):
| 334474 subtests of which 0 failed
| 108 test cases of which 0 failed
| 0 test cases were skipped
| TEE test application done!

* Compiled with:
| make PLATFORM=telechips-tcc805x

Signed-off-by: Sungmin Han <sungminhan@telechips.com>
Signed-off-by: GY Hwang <gy.hwang@telechips.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_uart: remove registering to shared_resources driver

Remove registering of STM32 UART driver to shared_resources driver that
is deprecated since integration of the firewall framework a

drivers: stm32_uart: remove registering to shared_resources driver

Remove registering of STM32 UART driver to shared_resources driver that
is deprecated since integration of the firewall framework and will soon
be removed.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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core: merge core_mmu_init_phys_mem() and core_mmu_init_virtualization()

Moves the implementation of core_mmu_init_virtualization() into
core_mmu_init_phys_mem().

This simplifies init_primary() in c

core: merge core_mmu_init_phys_mem() and core_mmu_init_virtualization()

Moves the implementation of core_mmu_init_virtualization() into
core_mmu_init_phys_mem().

This simplifies init_primary() in core/arch/arm/kernel/boot.c.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: initialize guest physical memory early

Initialize guest physical memory in virt_guest_created() before the
first entry into the guest from normal world. This replaces the call to
core_mmu_init

core: initialize guest physical memory early

Initialize guest physical memory in virt_guest_created() before the
first entry into the guest from normal world. This replaces the call to
core_mmu_init_phys_mem() in init_tee_runtime().

Remove unused code in core_mmu_init_phys_mem() and the now unused
functions core_mmu_get_ta_range() and virt_get_ta_ram().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: mm: allocate temporary memory map array

With CFG_BOOT_MEM enabled, allocate a temporary memory map array using
boot_mem_alloc_tmp() instead of using the global static_mmap_regions[].
core_mmu_

core: mm: allocate temporary memory map array

With CFG_BOOT_MEM enabled, allocate a temporary memory map array using
boot_mem_alloc_tmp() instead of using the global static_mmap_regions[].
core_mmu_save_mem_map() is added and called from
boot_init_primary_late() before the temporary memory is reused.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: add CFG_BOOT_MEM and boot_mem_*() functions

Adds CFG_BOOT_MEM to support stack-like memory allocations during boot
before a heap has been configured.

Signed-off-by: Jens Wiklander <jens.wikl

core: add CFG_BOOT_MEM and boot_mem_*() functions

Adds CFG_BOOT_MEM to support stack-like memory allocations during boot
before a heap has been configured.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: mm: replace MEM_AREA_TA_RAM

Replace MEM_AREA_TA_RAM with MEM_AREA_SEC_RAM_OVERALL.

All read/write secure memory is covered by MEM_AREA_SEC_RAM_OVERALL,
sometimes using an aliased map. But sec

core: mm: replace MEM_AREA_TA_RAM

Replace MEM_AREA_TA_RAM with MEM_AREA_SEC_RAM_OVERALL.

All read/write secure memory is covered by MEM_AREA_SEC_RAM_OVERALL,
sometimes using an aliased map. But secure read-only or execute core
memory is not covered as that would defeat the purpose of
CFG_CORE_RWDATA_NOEXEC.

Since the partition TA memory isn't accessed via MEM_AREA_TA_RAM any
longer, don't map it using the partition specific map.

This is needed later where unification of OP-TEE core and physical TA
memory is possible.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: add VCORE_FREE_{PA,SZ,END_PA}

Add VCORE_FREE_{PA,SZ,END_PA} defines to identify the unused and free
memory range at the end of TEE_RAM_START..(TEE_RAM_START +
TEE_RAM_VA_SIZE).

VCORE_FREE_SZ

core: add VCORE_FREE_{PA,SZ,END_PA}

Add VCORE_FREE_{PA,SZ,END_PA} defines to identify the unused and free
memory range at the end of TEE_RAM_START..(TEE_RAM_START +
TEE_RAM_VA_SIZE).

VCORE_FREE_SZ is 0 in a pager configuration since all the memory is
used by the pager.

The VCORE_FREE range is excluded from the TEE_RAM_RW area for
CFG_NS_VIRTUALIZATION=y and instead put in a separate NEX_RAM_RW area.
This makes each partition use a bit less memory and leaves the
VCORE_FREE range available for the Nexus.

The VCORE_FREE range is added to the TEE_RAM_RW area for the normal
configuration with CFG_NS_VIRTUALIZATION=n and CFG_WITH_PAGER=n. It's in
practice unchanged behaviour in this configuration.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: remove CORE_MEM_TA_RAM

The buffer attribute CORE_MEM_TA_RAM isn't used to query the status of a
buffer anywhere. So remove the attribute to allow future
simplifications.

Signed-off-by: Jens W

core: remove CORE_MEM_TA_RAM

The buffer attribute CORE_MEM_TA_RAM isn't used to query the status of a
buffer anywhere. So remove the attribute to allow future
simplifications.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: mm: add vaddr_to_phys()

Add a wrapper function for virt_to_phys() using vaddr_t instead of a
void pointer.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Foriss

core: mm: add vaddr_to_phys()

Add a wrapper function for virt_to_phys() using vaddr_t instead of a
void pointer.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_gpio: remove gpio/pinctrl API function to set secure state

Remove stm32_gpio_set_secure_cfg() and stm32_pinctrl_set_secure_cfg()
functions that are no more used since the STM32 GPIO a

drivers: stm32_gpio: remove gpio/pinctrl API function to set secure state

Remove stm32_gpio_set_secure_cfg() and stm32_pinctrl_set_secure_cfg()
functions that are no more used since the STM32 GPIO and pins secure
configurations are managed only through the firewall framework
facilities.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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dt-bindings: pinctrl: stm32mp: flags for non-secure pins

Define stm32 pinctrl DT bindings bit flags for pins that are
expected to be used in non-secure state.

Signed-off-by: Etienne Carriere <etien

dt-bindings: pinctrl: stm32mp: flags for non-secure pins

Define stm32 pinctrl DT bindings bit flags for pins that are
expected to be used in non-secure state.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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dt-bindings: gpio: stm32mp: flags for non-secure GPIOs

Define STM32 GPIO DT bindings bit flags for GPIOs that are to be used
in non-secure state.

Signed-off-by: Etienne Carriere <etienne.carriere@f

dt-bindings: gpio: stm32mp: flags for non-secure GPIOs

Define STM32 GPIO DT bindings bit flags for GPIOs that are to be used
in non-secure state.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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drivers: stm32_tamp: configure the backup registers when driver is probing

Update the driver to be able to configure the backup registers when
the driver is probing and remove call to stm32_tamp_set

drivers: stm32_tamp: configure the backup registers when driver is probing

Update the driver to be able to configure the backup registers when
the driver is probing and remove call to stm32_tamp_set_secure_bkpregs()
in plat-stm32mp1 main.c.

Remove old implementation of stm32_bkpregs_conf structure and rename
stm32_bkpregs_conf_new to stm32_bkpregs_conf.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: regulator: change tree trace level

Change regulator trace level of print tree so that
it can bee seen when it is requested by
xtest --stats --regulators.

Signed-off-by: Pascal Paillet <p.p

drivers: regulator: change tree trace level

Change regulator trace level of print tree so that
it can bee seen when it is requested by
xtest --stats --regulators.

Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: clk: change tree trace level

Change clock trace level of print tree so that
it can bee seen when it is requested by
xtest --stats --clocks.

Signed-off-by: Pascal Paillet <p.paillet@foss.st

drivers: clk: change tree trace level

Change clock trace level of print tree so that
it can bee seen when it is requested by
xtest --stats --clocks.

Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_rif: update and fix RIF configuration parsing

Fix the parsing of the RIF configuration by using device tree bindings,
when necessary. Generalize RIF bit fields and use them when deali

drivers: stm32_rif: update and fix RIF configuration parsing

Fix the parsing of the RIF configuration by using device tree bindings,
when necessary. Generalize RIF bit fields and use them when dealing
with generic RIF functions. Update drivers that use stm32_rif_parse_cfg()
accordingly.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Fixes: 1506f47af917 ("drivers: firewall: add stm32_rif driver for common RIF features")

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core: thread: clarify thread_rpc_alloc_*_payload() inline description

The thread_rpc_alloc_*_payload APIs are consistent with the thread_shm_type
enumerations, as seen in the alloc_shm function. How

core: thread: clarify thread_rpc_alloc_*_payload() inline description

The thread_rpc_alloc_*_payload APIs are consistent with the thread_shm_type
enumerations, as seen in the alloc_shm function. However, the name and
comments of thread_rpc_alloc_payload might be misleading, suggesting it is
a universal API. To maintain backward compatibility, only the code comments
have been updated for clarity.

Signed-off-by: Yitong Cheng <santongding@foxmail.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: firewall: add memory range firewall controller ops

Add a firewall driver operation handle and a firewall framework API
function to configure memory access rights, base on physical address
rang

core: firewall: add memory range firewall controller ops

Add a firewall driver operation handle and a firewall framework API
function to configure memory access rights, base on physical address
range arguments.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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