| ded20780 | 23-Oct-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_i2c: use compatible st,stm32mp15-i2c-non-secure
Change STM32 I2C driver to rely on the compatible DT property of the node to store whether the bus is expected assigned to secure or no
drivers: stm32_i2c: use compatible st,stm32mp15-i2c-non-secure
Change STM32 I2C driver to rely on the compatible DT property of the node to store whether the bus is expected assigned to secure or non-secure world. Using a non-secure I2C bus in OP-TEE on stm32mp1 platforms is something expected only on STM32MP15 variant for compatibility with platform already supported in upstream Linux/U-Boot components, as defined by st,stm32mp15-i2c-non-secure specific compatible string ID.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| dc2cf47a | 16-Jan-2025 |
Etienne Carriere <etienne.carriere@foss.st.com> |
core: rpmb: get RPMB storage space allocation stats
Add rpmb_mem_stats() to get the RPMB secure storage space allocation statistics.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> A
core: rpmb: get RPMB storage space allocation stats
Add rpmb_mem_stats() to get the RPMB secure storage space allocation statistics.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| b0b019b8 | 12-Dec-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: counter: stm32_stgen: add STGEN driver
STGEN is the platform timer. It generates a time-count value that provides a consistent view of time for multiple processors and other blocks in a dev
drivers: counter: stm32_stgen: add STGEN driver
STGEN is the platform timer. It generates a time-count value that provides a consistent view of time for multiple processors and other blocks in a device. It is physically linked to the ARM generic timer.
Add the STGEN driver that is in charge of configuring the ARM generic timer source and send an SMC to the BL31 monitor to update the CP15 register. This driver is only compatible for 64bits platforms.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 73aafcc9 | 08-Jan-2025 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: rtc: check data consistency in rtc_set_time()
Ensure that arguments passed to rtc_set_time() are coherent to defined RTC range and Gregorian calendar values.
Signed-off-by: Gatien Chevalli
drivers: rtc: check data consistency in rtc_set_time()
Ensure that arguments passed to rtc_set_time() are coherent to defined RTC range and Gregorian calendar values.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| a83e616e | 08-Jan-2025 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: rtc: add RTC_TIME() helper macro
Add RTC_TIME() helper macro that allows to initialize all fields of a struct optee_rtc_time.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.co
drivers: rtc: add RTC_TIME() helper macro
Add RTC_TIME() helper macro that allows to initialize all fields of a struct optee_rtc_time.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 26899ca2 | 05-Feb-2024 |
Clément Le Goffic <clement.legoffic@foss.st.com> |
drivers: rtc: add RTC functions and millisecond field
Add a millisecond field in the optee_rtc_time structure.
Add different APIs to manipulate optee_rtc_time structures: rtc_is_a_leap_year(): Dete
drivers: rtc: add RTC functions and millisecond field
Add a millisecond field in the optee_rtc_time structure.
Add different APIs to manipulate optee_rtc_time structures: rtc_is_a_leap_year(): Detects if the given year is a leap year rtc_get_month_days(): Returns the number of day in the given month rtc_timecmp(): Compare two time captures rtc_diff_calendar_ms(): Returns the difference in milliseconds between two time captures rtc_diff_calendar_tick(): Returns the difference in number of ticks between two time captures
Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com> Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| bd64a3f4 | 06-Sep-2023 |
Gabriel Fernandez <gabriel.fernandez@foss.st.com> |
dt-bindings: stm32: fix CLKSRC for RTC in stm32mp13 clock bindings
Bad copy/paste, use MUX ID to configure the clock source of RTC and not the clock ID.
Signed-off-by: Gabriel Fernandez <gabriel.fe
dt-bindings: stm32: fix CLKSRC for RTC in stm32mp13 clock bindings
Bad copy/paste, use MUX ID to configure the clock source of RTC and not the clock ID.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Fixes: 19a4632e0f17 ("dt-bindings: stm32: add stm32mp13 clock and reset bindings")
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| 10cc5912 | 21-Jun-2024 |
Runyang Chen <runyang.chen@mediatek.com> |
drivers: gic: Dynamically assign interrupts to non-secure world
Add gic_spi_release_to_ns() API function in GIC driver to release an interrupt to Non secure settings. This functionality is essential
drivers: gic: Dynamically assign interrupts to non-secure world
Add gic_spi_release_to_ns() API function in GIC driver to release an interrupt to Non secure settings. This functionality is essential for scenarios where a specific interrupt needs to be dynamically set to either Group 1 Secure (G1S) or Group 1 Non-Secure (G1NS) at different times.
Signed-off-by: Runyang Chen <runyang.chen@mediatek.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| c62a7972 | 16-Sep-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: boot_mem: keep track of padding
When boot_mem_alloc() allocates memory up to alignment - 1 number of bytes may have be skipped to satisfy the required alignment of the returned pointer. If the
core: boot_mem: keep track of padding
When boot_mem_alloc() allocates memory up to alignment - 1 number of bytes may have be skipped to satisfy the required alignment of the returned pointer. If the skipped bytes, or padding, is large enough, it's recorded in a list of padding. The list of paddings can be processed and consumed with boot_mem_foreach_padding(). This allows sufficiently large paddings to be added to for instance the heap instead of being wasted.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 5aa44b2b | 12-Oct-2024 |
Tony Han <tony.han@microchip.com> |
drivers: atmel_rstc: add functions to allocate/get reset controller/lines
Define new functions for getting the reset controller, find or allocate the reset lines.
Signed-off-by: Tony Han <tony.han@
drivers: atmel_rstc: add functions to allocate/get reset controller/lines
Define new functions for getting the reset controller, find or allocate the reset lines.
Signed-off-by: Tony Han <tony.han@microchip.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 9e86f0a2 | 12-Oct-2024 |
Tony Han <tony.han@microchip.com> |
drivers: atmel_rstc: new data and functions to handle reset assert/deassert
Define new struct and functions for handling the reset controller, reset lines and the reset operations (assert, deassert)
drivers: atmel_rstc: new data and functions to handle reset assert/deassert
Define new struct and functions for handling the reset controller, reset lines and the reset operations (assert, deassert).
Signed-off-by: Tony Han <tony.han@microchip.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| c1e65709 | 23-Dec-2024 |
Sungmin Han <sungminhan@telechips.com> |
plat-telechips: Add initial support for Telechips platform (TCC805x)
This is the initial support for Telechips Platform (TCC805x).
* xtest results (-l 15): | 334474 subtests of which 0 failed | 108
plat-telechips: Add initial support for Telechips platform (TCC805x)
This is the initial support for Telechips Platform (TCC805x).
* xtest results (-l 15): | 334474 subtests of which 0 failed | 108 test cases of which 0 failed | 0 test cases were skipped | TEE test application done!
* Compiled with: | make PLATFORM=telechips-tcc805x
Signed-off-by: Sungmin Han <sungminhan@telechips.com> Signed-off-by: GY Hwang <gy.hwang@telechips.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 7a1f6540 | 22-Oct-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_uart: remove registering to shared_resources driver
Remove registering of STM32 UART driver to shared_resources driver that is deprecated since integration of the firewall framework a
drivers: stm32_uart: remove registering to shared_resources driver
Remove registering of STM32 UART driver to shared_resources driver that is deprecated since integration of the firewall framework and will soon be removed.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| 8fda89c7 | 13-Sep-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: merge core_mmu_init_phys_mem() and core_mmu_init_virtualization()
Moves the implementation of core_mmu_init_virtualization() into core_mmu_init_phys_mem().
This simplifies init_primary() in c
core: merge core_mmu_init_phys_mem() and core_mmu_init_virtualization()
Moves the implementation of core_mmu_init_virtualization() into core_mmu_init_phys_mem().
This simplifies init_primary() in core/arch/arm/kernel/boot.c.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| e712be7a | 13-Sep-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: initialize guest physical memory early
Initialize guest physical memory in virt_guest_created() before the first entry into the guest from normal world. This replaces the call to core_mmu_init
core: initialize guest physical memory early
Initialize guest physical memory in virt_guest_created() before the first entry into the guest from normal world. This replaces the call to core_mmu_init_phys_mem() in init_tee_runtime().
Remove unused code in core_mmu_init_phys_mem() and the now unused functions core_mmu_get_ta_range() and virt_get_ta_ram().
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| f1284346 | 13-Sep-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: mm: allocate temporary memory map array
With CFG_BOOT_MEM enabled, allocate a temporary memory map array using boot_mem_alloc_tmp() instead of using the global static_mmap_regions[]. core_mmu_
core: mm: allocate temporary memory map array
With CFG_BOOT_MEM enabled, allocate a temporary memory map array using boot_mem_alloc_tmp() instead of using the global static_mmap_regions[]. core_mmu_save_mem_map() is added and called from boot_init_primary_late() before the temporary memory is reused.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| fe85eae5 | 13-Sep-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add CFG_BOOT_MEM and boot_mem_*() functions
Adds CFG_BOOT_MEM to support stack-like memory allocations during boot before a heap has been configured.
Signed-off-by: Jens Wiklander <jens.wikl
core: add CFG_BOOT_MEM and boot_mem_*() functions
Adds CFG_BOOT_MEM to support stack-like memory allocations during boot before a heap has been configured.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 2f2f69df | 13-Sep-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: mm: replace MEM_AREA_TA_RAM
Replace MEM_AREA_TA_RAM with MEM_AREA_SEC_RAM_OVERALL.
All read/write secure memory is covered by MEM_AREA_SEC_RAM_OVERALL, sometimes using an aliased map. But sec
core: mm: replace MEM_AREA_TA_RAM
Replace MEM_AREA_TA_RAM with MEM_AREA_SEC_RAM_OVERALL.
All read/write secure memory is covered by MEM_AREA_SEC_RAM_OVERALL, sometimes using an aliased map. But secure read-only or execute core memory is not covered as that would defeat the purpose of CFG_CORE_RWDATA_NOEXEC.
Since the partition TA memory isn't accessed via MEM_AREA_TA_RAM any longer, don't map it using the partition specific map.
This is needed later where unification of OP-TEE core and physical TA memory is possible.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| a5ac48d6 | 13-Sep-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add VCORE_FREE_{PA,SZ,END_PA}
Add VCORE_FREE_{PA,SZ,END_PA} defines to identify the unused and free memory range at the end of TEE_RAM_START..(TEE_RAM_START + TEE_RAM_VA_SIZE).
VCORE_FREE_SZ
core: add VCORE_FREE_{PA,SZ,END_PA}
Add VCORE_FREE_{PA,SZ,END_PA} defines to identify the unused and free memory range at the end of TEE_RAM_START..(TEE_RAM_START + TEE_RAM_VA_SIZE).
VCORE_FREE_SZ is 0 in a pager configuration since all the memory is used by the pager.
The VCORE_FREE range is excluded from the TEE_RAM_RW area for CFG_NS_VIRTUALIZATION=y and instead put in a separate NEX_RAM_RW area. This makes each partition use a bit less memory and leaves the VCORE_FREE range available for the Nexus.
The VCORE_FREE range is added to the TEE_RAM_RW area for the normal configuration with CFG_NS_VIRTUALIZATION=n and CFG_WITH_PAGER=n. It's in practice unchanged behaviour in this configuration.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 1fbe848c | 13-Sep-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: remove CORE_MEM_TA_RAM
The buffer attribute CORE_MEM_TA_RAM isn't used to query the status of a buffer anywhere. So remove the attribute to allow future simplifications.
Signed-off-by: Jens W
core: remove CORE_MEM_TA_RAM
The buffer attribute CORE_MEM_TA_RAM isn't used to query the status of a buffer anywhere. So remove the attribute to allow future simplifications.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| 041b1fa2 | 13-Sep-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: mm: add vaddr_to_phys()
Add a wrapper function for virt_to_phys() using vaddr_t instead of a void pointer.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Foriss
core: mm: add vaddr_to_phys()
Add a wrapper function for virt_to_phys() using vaddr_t instead of a void pointer.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| b3f7ebef | 04-Jul-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
drivers: stm32_gpio: remove gpio/pinctrl API function to set secure state
Remove stm32_gpio_set_secure_cfg() and stm32_pinctrl_set_secure_cfg() functions that are no more used since the STM32 GPIO a
drivers: stm32_gpio: remove gpio/pinctrl API function to set secure state
Remove stm32_gpio_set_secure_cfg() and stm32_pinctrl_set_secure_cfg() functions that are no more used since the STM32 GPIO and pins secure configurations are managed only through the firewall framework facilities.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| 0ef3a5ef | 17-Sep-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
dt-bindings: pinctrl: stm32mp: flags for non-secure pins
Define stm32 pinctrl DT bindings bit flags for pins that are expected to be used in non-secure state.
Signed-off-by: Etienne Carriere <etien
dt-bindings: pinctrl: stm32mp: flags for non-secure pins
Define stm32 pinctrl DT bindings bit flags for pins that are expected to be used in non-secure state.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| 788156eb | 04-Jul-2024 |
Etienne Carriere <etienne.carriere@foss.st.com> |
dt-bindings: gpio: stm32mp: flags for non-secure GPIOs
Define STM32 GPIO DT bindings bit flags for GPIOs that are to be used in non-secure state.
Signed-off-by: Etienne Carriere <etienne.carriere@f
dt-bindings: gpio: stm32mp: flags for non-secure GPIOs
Define STM32 GPIO DT bindings bit flags for GPIOs that are to be used in non-secure state.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| 92ab6535 | 14-Nov-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_tamp: configure the backup registers when driver is probing
Update the driver to be able to configure the backup registers when the driver is probing and remove call to stm32_tamp_set
drivers: stm32_tamp: configure the backup registers when driver is probing
Update the driver to be able to configure the backup registers when the driver is probing and remove call to stm32_tamp_set_secure_bkpregs() in plat-stm32mp1 main.c.
Remove old implementation of stm32_bkpregs_conf structure and rename stm32_bkpregs_conf_new to stm32_bkpregs_conf.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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