drivers: firewall: add stm32_risaf driver

Add the stm32_risaf driver to handle all RISAFs instances on a SoC.
Through RISAF registers, a trusted domain application, or the application
to whom the co

drivers: firewall: add stm32_risaf driver

Add the stm32_risaf driver to handle all RISAFs instances on a SoC.
Through RISAF registers, a trusted domain application, or the application
to whom the configuration has been delegated, assigns memory regions to
one or more security domains (secure, privilege, compartment).
RISAF4 includes the DDR memory cipher engine (DDRMCE) feature.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dt-bindings: add stm32mp25 RISAF bindings

Add stm32mp25 specific RISAF device tree bindings. This file contains
device tree contains helpers and RISAFPROT macro that is used to
define the RIF config

dt-bindings: add stm32mp25 RISAF bindings

Add stm32mp25 specific RISAF device tree bindings. This file contains
device tree contains helpers and RISAFPROT macro that is used to
define the RIF configuration for a RISAF region.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: pm: add unregister_pm_cb()

Add unregister_pm_cb() API function and its helper variants to
allow unregistering a PM callback entry. This can be needed for
example in the GPIO framework where gp

core: pm: add unregister_pm_cb()

Add unregister_pm_cb() API function and its helper variants to
allow unregistering a PM callback entry. This can be needed for
example in the GPIO framework where gpio_put() can release a GPIO
that a driver no more consumed. In case a PM callback was previously
registered for such a GPIO, consumer driver needs mean to unregister
it.

This change implies that the PM callbacks list is protected from
concurrent accesses hence add a lock for that purpose.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: stm32_rif: tag unused parameters as __unused

When CFG_STM32_RIF is not set, inclusion of this header file causes
warnings because of function parameters not being tagged as unused.
Tag them

drivers: stm32_rif: tag unused parameters as __unused

When CFG_STM32_RIF is not set, inclusion of this header file causes
warnings because of function parameters not being tagged as unused.
Tag them properly.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Fixes: 1506f47af917 ("drivers: firewall: add stm32_rif driver for common RIF features")
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: define plat_rng_init() as a weak alias of __plat_rng_init()

Rename the function plat_rng_init() to __plat_rng_init() and define
plat_rng_init() as a weak alias of __plat_rng_init().
This allow

core: define plat_rng_init() as a weak alias of __plat_rng_init()

Rename the function plat_rng_init() to __plat_rng_init() and define
plat_rng_init() as a weak alias of __plat_rng_init().
This allow to use the default RNG initialization in the platform
plat_rng_init() function.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: timeout_elapsed(): fix expiration threshold

Fix timeout threshold that should return once the time expires,
not 1 tick after it has expired. This change makes udelay(0) to
immediately return a

core: timeout_elapsed(): fix expiration threshold

Fix timeout threshold that should return once the time expires,
not 1 tick after it has expired. This change makes udelay(0) to
immediately return and not wait a generic timer counter increment.

This change fixes an issue where a driver stops the counter feeding
Arm generic timer counter and indirectly calls IO_READ32_POLL_TIMEOUT()
with a delay of 0us. It that case, since counter never increments, the
udelay(0) call in IO_READ32_POLL_TIMEOUT() never returns while we expect
the macro to endlessly poll (as timeout would never be detected) until
poll condition is met or system watchdog is triggered.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: mm: core_mmu: add core_mmu_user_va_range_is_defined() for RISC-V

The function hasn't been implemented for RISC-V, so move the
core_mmu_user_va_range_is_defined() definition to generic
core_mmu

core: mm: core_mmu: add core_mmu_user_va_range_is_defined() for RISC-V

The function hasn't been implemented for RISC-V, so move the
core_mmu_user_va_range_is_defined() definition to generic
core_mmu.h and function implementations to arch-specific files.

Also, update the assertions where checks if user va range is defined.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
Tested-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: rpmb: probe for kernel RPMB driver

Three RPC functions are added to support RPMB probing and properly align
RPMB frames, OPTEE_RPC_CMD_RPMB_PROBE_RESET,
OPTEE_RPC_CMD_RPMB_PROBE_NEXT, and OPTE

core: rpmb: probe for kernel RPMB driver

Three RPC functions are added to support RPMB probing and properly align
RPMB frames, OPTEE_RPC_CMD_RPMB_PROBE_RESET,
OPTEE_RPC_CMD_RPMB_PROBE_NEXT, and OPTEE_RPC_CMD_RPMB_FRAMES.

OPTEE_RPC_CMD_RPMB_PROBE_RESET resets probing to a well known state and
returns the shared memory type needed when allocating shared memory for
communication with later RPMB functions.

OPTEE_RPC_CMD_RPMB_PROBE_NEXT selects the next RPMB device and returns
its device information. Later calls to OPTEE_RPC_CMD_RPMB will use this
selected device.

OPTEE_RPC_CMD_RPMB_FRAMES sends the raw RPMB frames to normal world for
further routing to the RPMB device.

tee_rpmb_reinit() is added to allow re-initializing the RPMB FS if a
boot stage has used RPMB.

Backwards compatibility is maintained by falling back to the old type of
initialization if OPTEE_RPC_CMD_RPMB_PROBE_RESET returns
TEE_ERROR_NOT_SUPPORTED.

Whether RPMB devices are probed by the kernel or tee-supplicant is
decided by the kernel driver where the shared memory type returned by
OPTEE_RPC_CMD_RPMB_PROBE_RESET plays a vital role.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: add THREAD_SHM_CACHE_USER_RPMB

Add an enum to cache RPMB shared memory allocations.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@l

core: add THREAD_SHM_CACHE_USER_RPMB

Add an enum to cache RPMB shared memory allocations.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: rstctrl: Fix function description

Fix the description of functions rstctrl_dt_get_func() and
rstctrl_register_provider() and rstctrl_get_exclusive().

By the way, append parentheses ("()")

drivers: rstctrl: Fix function description

Fix the description of functions rstctrl_dt_get_func() and
rstctrl_register_provider() and rstctrl_get_exclusive().

By the way, append parentheses ("()") to function names in
inline description comment for consistency in core header files.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: rename to core_mmu_init_phys_mem()

Rename core_mmu_init_ta_ram() to core_mmu_init_phys_mem() for a more
accurate name of the function.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org

core: rename to core_mmu_init_phys_mem()

Rename core_mmu_init_ta_ram() to core_mmu_init_phys_mem() for a more
accurate name of the function.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: replace tee_mm_sec_ddr with phys_mem functions

Replace the tee_mm_sec_ddr mm pool with the phys_mem functions. This
doesn't change the behaviour.

Signed-off-by: Jens Wiklander <jens.wiklander

core: replace tee_mm_sec_ddr with phys_mem functions

Replace the tee_mm_sec_ddr mm pool with the phys_mem functions. This
doesn't change the behaviour.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: add phys_mem allocation functions

Add nex_phys_mem and phys_mem allocation functions. These functions are
intended to replace the previous calls to tee_mm functions on with the
virt_mapper_poo

core: add phys_mem allocation functions

Add nex_phys_mem and phys_mem allocation functions. These functions are
intended to replace the previous calls to tee_mm functions on with the
virt_mapper_pool or tee_mm_sec_ddr as arguments.

The pool of physical memory is divided into two parts, core and ta. All
physical TA memory allocations are done from the core pool if a ta pool
isn't added. This might be the case if core and ta physical memory
resides in the same physical memory range.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: open-code thread_init_stack()

The implementations of thread_init_stack() are identical and trivial for
both arm and riscv. So simplify code further and open-code it where it's
called from in c

core: open-code thread_init_stack()

The implementations of thread_init_stack() are identical and trivial for
both arm and riscv. So simplify code further and open-code it where it's
called from in core/kernel/thread.c.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
Tested-by: Alvin Chang <alvinga@andestech.com>

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drivers: stm32_remoteproc: Add remote processor memories cleanup function

This patch introduces a new function stm32_rproc_clean_up_memories() to
clean up the memory regions used by the remote proce

drivers: stm32_remoteproc: Add remote processor memories cleanup function

This patch introduces a new function stm32_rproc_clean_up_memories() to
clean up the memory regions used by the remote processor.
The function iterates over each memory region, maps it, clears the memory
by setting it to zero, and then unmaps it.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_rif: add stm32_rif_access_violation_action()

This function should be used by peripherals capable on raising
access violation interrupts (SERC, IAC). The behavior of the platform
on su

drivers: stm32_rif: add stm32_rif_access_violation_action()

This function should be used by peripherals capable on raising
access violation interrupts (SERC, IAC). The behavior of the platform
on such event is platform-specific. Therefore, its definition must be
done at platform level.

Also add CFG_STM32_PANIC_ON_IAC_EVENT and CFG_STM32_PANIC_ON_SERC_EVENT
to choose if the platform should panic upon receiving an IAC or a
SERC event.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: add and use service_init_crypto() macro

Add the service_init_crypto() used to initialize the internal crypto API
before the rest of the registered service_init functions are called.

Signed-of

core: add and use service_init_crypto() macro

Add the service_init_crypto() used to initialize the internal crypto API
before the rest of the registered service_init functions are called.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: add call_{early,service,driver}_initcalls()

Add more fine-grained replacements for call_initcalls() to enable
initcalls at several separate stages.

Signed-off-by: Jens Wiklander <jens.wikland

core: add call_{early,service,driver}_initcalls()

Add more fine-grained replacements for call_initcalls() to enable
initcalls at several separate stages.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: arm: introduce boot_init_primary_final()

Introduce boot_init_primary_final() and move the call to
call_finalcalls() into that function.

This is needed in later patches to enabled PAUTH before

core: arm: introduce boot_init_primary_final()

Introduce boot_init_primary_final() and move the call to
call_finalcalls() into that function.

This is needed in later patches to enabled PAUTH before
boot_init_primary_final() is called.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: clk: clk_get_rates_array() returns ordered rates

Explicitly state in clk_get_rates_array() inline description comment
that the output rates arrays is ordered by increasing frequency
values.

drivers: clk: clk_get_rates_array() returns ordered rates

Explicitly state in clk_get_rates_array() inline description comment
that the output rates arrays is ordered by increasing frequency
values. This change allows to better fit the sole consumer of this
API function that is the SCMI server implementation. SCMI specification
states that discrete clock rates list shall follow this order.

Update at91_cpu_opp clock driver to ensure it satisfy this constraint.
The SAM platforms that embed this driver (sama7g5) already satisfy this
constraints but only at its DTS level. This change ensures the driver
will always.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: mm: add core_mmu_for_each_map()

Add core_mmu_for_each_map() to iterate over all memory regions, struct
tee_mmap_region.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by:

core: mm: add core_mmu_for_each_map()

Add core_mmu_for_each_map() to iterate over all memory regions, struct
tee_mmap_region.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: mm: introduce struct memory_map

Introduce struct memory_map to keep track of the array of struct
tee_mmap_region, covering number of used entries and number of allocated
entries.

core_mmap_is

core: mm: introduce struct memory_map

Introduce struct memory_map to keep track of the array of struct
tee_mmap_region, covering number of used entries and number of allocated
entries.

core_mmap_is_end_of_table() and MEM_AREA_END are now unused so remove
them.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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kernel: pm: add suspend type hint

When entering suspend type, the suspend level is platform dependent and
can be set to various values depending on these platform. In order to
allow platforms settin

kernel: pm: add suspend type hint

When entering suspend type, the suspend level is platform dependent and
can be set to various values depending on these platform. In order to
allow platforms setting it in a generic way when entering suspend,
reserve some bits in the suspend/resume hint to pass this information.
Driver can then used it in a platform independent way to execute
specific code depending on it.

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: imx_mu: enable support for i.MX91

Enable MU driver support for i.MX91

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

core: kernel: Fix checking register convention r1/x1 value of transfer_list

According to recently firmware handsoff spec [1]'s
"Register usage at handoff boundary", Transfer List's signature value
w

core: kernel: Fix checking register convention r1/x1 value of transfer_list

According to recently firmware handsoff spec [1]'s
"Register usage at handoff boundary", Transfer List's signature value
was changed from 0x40_b10b (3 bytes) to 4a0f_b10b (4 bytes).

As updating of TL's signature, register value of x1/r1 should be:

In aarch32's r1 value should be
R1[23:0]: set to the TL signature (4a0f_b10b->masked value: 0f_b10b)
R1[31:24]: version of the register convention == 1
and
In aarch64's x1 value should be
X1[31:0]: set to the TL signature (4a0f_b10b)
X1[39:32]: version of the register convention == 1
X1[63:40]: MBZ
(See the [2] and [3]).

Therefore, it requires to separate mask and shift value for register
convention version field when checking each r1/x1 value.

This patch fix two problems:
1. breaking X1 value with updated specification in aarch64
- change of length of signature field.

2. previous error value set in R1 in arm32.
- length of signature should be 24, but it uses 32bit signature.

This patch is a breaking change. It works only TF-A is updated.

Link: https://github.com/FirmwareHandoff/firmware_handoff [1]
Link: https://github.com/FirmwareHandoff/firmware_handoff/issues/32 [2]
Link: https://github.com/FirmwareHandoff/firmware_handoff/commit/5aa7aa1d3a1db75213e458d392b751f0707de027 [3]
Fixes: 508e2476b232 ("core: update transfer list header and signature")
Signed-off-by: Levi Yun <yeoreum.yun@arm.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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