drivers: add RISC-V APLIC interrupt driver

The RISC-V Advanced Interrupt Architecture (AIA) specification introduces
the APLIC, which can serve as a new external interrupt controller to
replace the

drivers: add RISC-V APLIC interrupt driver

The RISC-V Advanced Interrupt Architecture (AIA) specification introduces
the APLIC, which can serve as a new external interrupt controller to
replace the original Platform-Level Interrupt Controller (PLIC) or as a
device to convert wired interrupts into message-signaled interrupts
(MSIs) and forward them to the Incoming MSI Controller (IMSIC).

The APLIC driver supports both "direct delivery mode" and
"MSI delivery mode." Use the `CFG_RISCV_APLIC` flag to enable the
APLIC driver in "direct delivery mode," and use the
`CFG_RISCV_APLIC_MSI` flag to enable the APLIC driver in "MSI
delivery mode" when selecting `CFG_RISCV_IMSIC`.

APLIC initialization can be done through the device tree.

For more details, see: https://github.com/riscv/riscv-aia

Signed-off-by: Huang Borong <huangborong@bosc.ac.cn>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: add RISC-V IMSIC interrupt driver

The RISC-V Advanced Interrupt Architecture (AIA) specification introduces
the IMSIC as a new external interrupt controller. An IMSIC receives and
records i

drivers: add RISC-V IMSIC interrupt driver

The RISC-V Advanced Interrupt Architecture (AIA) specification introduces
the IMSIC as a new external interrupt controller. An IMSIC receives and
records incoming message-signaled interrupts (MSIs).

This commit enables the initialization of the IMSIC based on the device
tree and adds control and status registers (CSRs) for indirect access to
the IMSIC as well as for reading interrupt identities.

Use the `CFG_RISCV_IMSIC` flag to control whether to build this driver.

For more details, see: https://github.com/riscv/riscv-aia

Signed-off-by: Huang Borong <huangborong@bosc.ac.cn>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp2: add platform-specific abort handler

When a data abort occurs and its fault type is FAULT_TYPE_IGNORE, it
may be an abort generated by the SERC hardware block. Check if a
SERC Illegal

plat-stm32mp2: add platform-specific abort handler

When a data abort occurs and its fault type is FAULT_TYPE_IGNORE, it
may be an abort generated by the SERC hardware block. Check if a
SERC Illegal Access was caught and print the SERC register and panic()
if that is the case.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: firewall: stm32_etzpc: remove header file

Remove stm32_etzpc.h header file that is not required since the
declared and defined resources are used internally in stm32_etzpc.c

By the way, al

drivers: firewall: stm32_etzpc: remove header file

Remove stm32_etzpc.h header file that is not required since the
declared and defined resources are used internally in stm32_etzpc.c

By the way, also remove inclusion of stm32mp15-etzpc.h DT bindings
header file from stm32_rng.c where it is not needed.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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drivers: stm32_i2c: use compatible st,stm32mp15-i2c-non-secure

Change STM32 I2C driver to rely on the compatible DT property of the
node to store whether the bus is expected assigned to secure or
no

drivers: stm32_i2c: use compatible st,stm32mp15-i2c-non-secure

Change STM32 I2C driver to rely on the compatible DT property of the
node to store whether the bus is expected assigned to secure or
non-secure world. Using a non-secure I2C bus in OP-TEE on stm32mp1
platforms is something expected only on STM32MP15 variant for
compatibility with platform already supported in upstream Linux/U-Boot
components, as defined by st,stm32mp15-i2c-non-secure specific
compatible string ID.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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drivers: counter: stm32_stgen: add STGEN driver

STGEN is the platform timer. It generates a time-count value that provides
a consistent view of time for multiple processors and other blocks in a
dev

drivers: counter: stm32_stgen: add STGEN driver

STGEN is the platform timer. It generates a time-count value that provides
a consistent view of time for multiple processors and other blocks in a
device. It is physically linked to the ARM generic timer.

Add the STGEN driver that is in charge of configuring the ARM generic
timer source and send an SMC to the BL31 monitor to update the CP15
register. This driver is only compatible for 64bits platforms.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: rtc: check data consistency in rtc_set_time()

Ensure that arguments passed to rtc_set_time() are coherent to defined
RTC range and Gregorian calendar values.

Signed-off-by: Gatien Chevalli

drivers: rtc: check data consistency in rtc_set_time()

Ensure that arguments passed to rtc_set_time() are coherent to defined
RTC range and Gregorian calendar values.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: rtc: add RTC_TIME() helper macro

Add RTC_TIME() helper macro that allows to initialize all fields of a
struct optee_rtc_time.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.co

drivers: rtc: add RTC_TIME() helper macro

Add RTC_TIME() helper macro that allows to initialize all fields of a
struct optee_rtc_time.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: rtc: add RTC functions and millisecond field

Add a millisecond field in the optee_rtc_time structure.

Add different APIs to manipulate optee_rtc_time structures:
rtc_is_a_leap_year(): Dete

drivers: rtc: add RTC functions and millisecond field

Add a millisecond field in the optee_rtc_time structure.

Add different APIs to manipulate optee_rtc_time structures:
rtc_is_a_leap_year(): Detects if the given year is a leap year
rtc_get_month_days(): Returns the number of day in the given month
rtc_timecmp(): Compare two time captures
rtc_diff_calendar_ms(): Returns the difference in milliseconds between
two time captures
rtc_diff_calendar_tick(): Returns the difference in number of ticks
between two time captures

Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: gic: Dynamically assign interrupts to non-secure world

Add gic_spi_release_to_ns() API function in GIC driver to release an
interrupt to Non secure settings. This functionality is essential

drivers: gic: Dynamically assign interrupts to non-secure world

Add gic_spi_release_to_ns() API function in GIC driver to release an
interrupt to Non secure settings. This functionality is essential for
scenarios where a specific interrupt needs to be dynamically set to
either Group 1 Secure (G1S) or Group 1 Non-Secure (G1NS) at different
times.

Signed-off-by: Runyang Chen <runyang.chen@mediatek.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: atmel_rstc: add functions to allocate/get reset controller/lines

Define new functions for getting the reset controller, find or allocate
the reset lines.

Signed-off-by: Tony Han <tony.han@

drivers: atmel_rstc: add functions to allocate/get reset controller/lines

Define new functions for getting the reset controller, find or allocate
the reset lines.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: atmel_rstc: new data and functions to handle reset assert/deassert

Define new struct and functions for handling the reset controller, reset
lines and the reset operations (assert, deassert)

drivers: atmel_rstc: new data and functions to handle reset assert/deassert

Define new struct and functions for handling the reset controller, reset
lines and the reset operations (assert, deassert).

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-telechips: Add initial support for Telechips platform (TCC805x)

This is the initial support for Telechips Platform (TCC805x).

* xtest results (-l 15):
| 334474 subtests of which 0 failed
| 108

plat-telechips: Add initial support for Telechips platform (TCC805x)

This is the initial support for Telechips Platform (TCC805x).

* xtest results (-l 15):
| 334474 subtests of which 0 failed
| 108 test cases of which 0 failed
| 0 test cases were skipped
| TEE test application done!

* Compiled with:
| make PLATFORM=telechips-tcc805x

Signed-off-by: Sungmin Han <sungminhan@telechips.com>
Signed-off-by: GY Hwang <gy.hwang@telechips.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_uart: remove registering to shared_resources driver

Remove registering of STM32 UART driver to shared_resources driver that
is deprecated since integration of the firewall framework a

drivers: stm32_uart: remove registering to shared_resources driver

Remove registering of STM32 UART driver to shared_resources driver that
is deprecated since integration of the firewall framework and will soon
be removed.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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drivers: stm32_gpio: remove gpio/pinctrl API function to set secure state

Remove stm32_gpio_set_secure_cfg() and stm32_pinctrl_set_secure_cfg()
functions that are no more used since the STM32 GPIO a

drivers: stm32_gpio: remove gpio/pinctrl API function to set secure state

Remove stm32_gpio_set_secure_cfg() and stm32_pinctrl_set_secure_cfg()
functions that are no more used since the STM32 GPIO and pins secure
configurations are managed only through the firewall framework
facilities.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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drivers: stm32_tamp: configure the backup registers when driver is probing

Update the driver to be able to configure the backup registers when
the driver is probing and remove call to stm32_tamp_set

drivers: stm32_tamp: configure the backup registers when driver is probing

Update the driver to be able to configure the backup registers when
the driver is probing and remove call to stm32_tamp_set_secure_bkpregs()
in plat-stm32mp1 main.c.

Remove old implementation of stm32_bkpregs_conf structure and rename
stm32_bkpregs_conf_new to stm32_bkpregs_conf.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: regulator: change tree trace level

Change regulator trace level of print tree so that
it can bee seen when it is requested by
xtest --stats --regulators.

Signed-off-by: Pascal Paillet <p.p

drivers: regulator: change tree trace level

Change regulator trace level of print tree so that
it can bee seen when it is requested by
xtest --stats --regulators.

Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: clk: change tree trace level

Change clock trace level of print tree so that
it can bee seen when it is requested by
xtest --stats --clocks.

Signed-off-by: Pascal Paillet <p.paillet@foss.st

drivers: clk: change tree trace level

Change clock trace level of print tree so that
it can bee seen when it is requested by
xtest --stats --clocks.

Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_rif: update and fix RIF configuration parsing

Fix the parsing of the RIF configuration by using device tree bindings,
when necessary. Generalize RIF bit fields and use them when deali

drivers: stm32_rif: update and fix RIF configuration parsing

Fix the parsing of the RIF configuration by using device tree bindings,
when necessary. Generalize RIF bit fields and use them when dealing
with generic RIF functions. Update drivers that use stm32_rif_parse_cfg()
accordingly.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Fixes: 1506f47af917 ("drivers: firewall: add stm32_rif driver for common RIF features")

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core: firewall: add memory range firewall controller ops

Add a firewall driver operation handle and a firewall framework API
function to configure memory access rights, base on physical address
rang

core: firewall: add memory range firewall controller ops

Add a firewall driver operation handle and a firewall framework API
function to configure memory access rights, base on physical address
range arguments.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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drivers: stm32_remote_proc: add stm32_rproc_is_secure()

Add stm32_remoteproc driver API function stm32_rproc_is_secure()
that return whether of not remote processor management shall be
handled throu

drivers: stm32_remote_proc: add stm32_rproc_is_secure()

Add stm32_remoteproc driver API function stm32_rproc_is_secure()
that return whether of not remote processor management shall be
handled through OP-TEE remoteproc secure services.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>

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dt-bindings: add stm32 bindings for TZC400 platform configuration

Add stm32 specific peripheral IDs for the TZC400 configuration.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Re

dt-bindings: add stm32 bindings for TZC400 platform configuration

Add stm32 specific peripheral IDs for the TZC400 configuration.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_etzpc: update driver to set ETZPC configuration from DT

Remove old implementation where the ETZPC configuration was a hard
coded table in the shared resources file and use the device

drivers: stm32_etzpc: update driver to set ETZPC configuration from DT

Remove old implementation where the ETZPC configuration was a hard
coded table in the shared resources file and use the device tree to
get it.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dt-bindings: add platform specific ETZPC bindings

Define ETZPC bindings for STM32MP15 and STM32MP13 and add these
header files into the stm32mp_dt_bindings helper. While there, also
update some incl

dt-bindings: add platform specific ETZPC bindings

Define ETZPC bindings for STM32MP15 and STM32MP13 and add these
header files into the stm32mp_dt_bindings helper. While there, also
update some includes to fix the path errors.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_risab: add RISAB internal memory firewall driver

This driver implements the RISAB driver. Through RISAB registers, a
trusted compartment, or the compartment to which the page configur

drivers: stm32_risab: add RISAB internal memory firewall driver

This driver implements the RISAB driver. Through RISAB registers, a
trusted compartment, or the compartment to which the page configuration
has been delegated, configures the firewall attributes necessary to
access a page.

Each RISAB is dedicated to a internal memory and can cover 128KBytes of
data, separated in 32 pages of 4 KBytes, containing 8 blocks each.

It is possible to align a RISAB secure and privilege regions
allocations with an ARM Cortex M, which defines in its address space
configurable regions with a 256Bytes granularity. The configuration
would be 512Bytes block-based in order to align the two.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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