drivers: caam: add RNG data check error code

Check if the CAAM RNG driver returns DATA_FAILURE error code.
If the data check returns DATA_FAILURE, the function returns
CAAM_FAILURE.

Fixes: 2d7a896

drivers: caam: add RNG data check error code

Check if the CAAM RNG driver returns DATA_FAILURE error code.
If the data check returns DATA_FAILURE, the function returns
CAAM_FAILURE.

Fixes: 2d7a896 ("driver: implement CAAM driver")
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: fix CAAM Job Ring halt/flush/cancel

Fix CAAM halt/flush jobs by calling dequeue operation to complete all jobs.
Add spinlock management in the cancel function because of the shared JR

drivers: caam: fix CAAM Job Ring halt/flush/cancel

Fix CAAM halt/flush jobs by calling dequeue operation to complete all jobs.
Add spinlock management in the cancel function because of the shared JR
structure.

Fixes: 2d7a896 ("driver: implement CAAM driver")
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: Fix hal clock registers read/write

Fix CAAM Clock registers access to use io_read/write() functions and
not io_caam_read/write().

Fixes: 2d7a896 ("driver: implement CAAM driver")
Sig

drivers: caam: Fix hal clock registers read/write

Fix CAAM Clock registers access to use io_read/write() functions and
not io_caam_read/write().

Fixes: 2d7a896 ("driver: implement CAAM driver")
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: fix hal control split key detection

Fix the CAAM Version ID MS register address (CAAM Control + JR Offset).
Change HAL caam_hal_ctrl_splitkey() to read the parameters register LS
bit

drivers: caam: fix hal control split key detection

Fix the CAAM Version ID MS register address (CAAM Control + JR Offset).
Change HAL caam_hal_ctrl_splitkey() to read the parameters register LS
bit 14 (SPLIT_KEY) that indicates the support for the split key.

Fixes: 81ab436 ("drivers: caam: implement NXP CAAM Driver - HMAC")
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: hwrng fix perf drop after suspend/resume

RNG performance drops after a suspend/resume cycle on parts where caam
loses power, since the initial U-boot settings are not restored by OP-T

drivers: caam: hwrng fix perf drop after suspend/resume

RNG performance drops after a suspend/resume cycle on parts where caam
loses power, since the initial U-boot settings are not restored by OP-TEE
when resuming.
Modifying the TRNG "sample size" (the total number of entropy samples that
will be taken during entropy generation) from it's default conservative
value of 2500 to be more in line with the "sample size" that the caam
driver in U-boot/Linux kernel select(512) will solve the performance hit.

Changed the default minimum entropy delay value for I.MX 6SX from 4800
to 3200 to be in line with U-boot and Kernel setting for this value.
The higher default entropy delay value for OP-TEE would have caused a
perceived performance hit after/suspend resume.

Fixes: 2d7a896 ("driver: implement CAAM driver")
Signed-off-by: Dragos Rosioru <dragos.rosioru@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: fix missing output additional length

CAAM HW Module requires additional bytes in output buffer
to perform the requested operation.
This is the case for ECDSA operation, signature must

drivers: caam: fix missing output additional length

CAAM HW Module requires additional bytes in output buffer
to perform the requested operation.
This is the case for ECDSA operation, signature must be 16 bytes
aligned.
The CAAM DMA object is adding the required bytes if the signature
output buffer is too short. The issue is that this additional
bytes were not added in the DMA buffer to be allocated.

Fixes: 38923d4 ("drivers: caam: implement CAAM DMA Object")
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: ack the interrupt when completing a job

The ITR will only be acked if the job finishes between the
do_jr_dequeue() and caam_hal_jr_check_ack_itr().
With this fix, we ensure the ITR is

drivers: caam: ack the interrupt when completing a job

The ITR will only be acked if the job finishes between the
do_jr_dequeue() and caam_hal_jr_check_ack_itr().
With this fix, we ensure the ITR is acked when leaving
caam_jr_dequeue() function.

Fixes: 2d7a896 ("driver: implement CAAM driver")
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-stm32mp1: Don't call get_embedded_dt() without CFG_EMBED_DT

Several pieces of stm32mp1 code call get_embedded_dt(), then use the
resulting pointer without checks, or initiate a panic if it is N

plat-stm32mp1: Don't call get_embedded_dt() without CFG_EMBED_DT

Several pieces of stm32mp1 code call get_embedded_dt(), then use the
resulting pointer without checks, or initiate a panic if it is NULL.
Thus hitting this code results in a non-working binary. For example:

"PLATFORM=stm32mp1 CFG_DT=y"

The get_embedded_dt() uses were #ifdef'd out based on CFG_DT. However,
as shown, this is problematic, as the calls assumed a valid fdt must
be returned. A non-NULL fdt can be guaranteed with CFG_EMBED_DT, so
use this as the basis for the #ifdefs.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: scmi-msg: fix typo

Fix a trivial typo (§ -> /)

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

core_mmu: fix phys_to_virt() to check length

phys_to_virt() function without length parameter doesn`t
always have ability to find the correct mapping for
requested physical address. This is because

core_mmu: fix phys_to_virt() to check length

phys_to_virt() function without length parameter doesn`t
always have ability to find the correct mapping for
requested physical address. This is because physical
address can be mapped in the same time in different virtual
regions with different length. So the first found region
which contains the requested physical address possibly
doesn`t have enough mapped data. This is fixed by adding
the length parameter to phys_to_virt() function. Length
parameter can be set to 1 if caller knows that requested
(pa + len) doesn`t cross mapping granule boundary.

core_mmu_get_va() and io_pa_or_va() functions now are
take length parameter too as they based on phys_to_virt()
in case of MMU enabled.

Signed-off-by: Anton Rybakov <a.rybakov@omp.ru>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1-157C_DK2)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabreauto)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qpsabreauto)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek)

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drivers: imx_i2c: support i2c4

Extend the driver functionality to support i2c4

Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: De

drivers: imx_i2c: support i2c4

Extend the driver functionality to support i2c4

Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: Devendra Devadiga <devendradevadiga01@gmail.com>

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drivers: imx_i2c: fix support for MX8MQ

Add missing config required to enable the support

Reviewed-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: Devendra Devadiga <devendradevadiga01

drivers: imx_i2c: fix support for MX8MQ

Add missing config required to enable the support

Reviewed-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: Devendra Devadiga <devendradevadiga01@gmail.com>

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drivers: caam: fix DMA object when only output reallocated

Use case:
- cipher block to encrypt/decrypt is more than 1 Kbytes (e.g. 1232
bytes)
- input data are accessible from CAAM (no reallocatio

drivers: caam: fix DMA object when only output reallocated

Use case:
- cipher block to encrypt/decrypt is more than 1 Kbytes (e.g. 1232
bytes)
- input data are accessible from CAAM (no reallocation)
- output data is not accessible from CAAM (reallocation of DMA buffer).

In case of cipher operation, the input and output CAAM SGT/Buffer
are built in same time through function caam_dmaobj_sgtbuf_inout_build()
to ensure that both SGT/Buffer do the same cipher block size.
Function caam_dmaobj_sgtbuf_inout_build() calls the function
caam_dmaobj_sgtbuf_build():
- first to build the input data SGT/Buffer. Length returned is
whole cipher buffer size (i.e. 1232 bytes).
- secondly to build the output data SGT/Buffer. Length return is
whole cipher buffer size (i.e. 1232 bytes) whereas it must be 1024 bytes
because output data must use the reallocation DMA buffer (max 1KBytes).

Fix consist in returning the SGT/Buffer length effectively mapped and
not the maximum length that is the input data SGT/Buffer length.

Consequence of this fix, AES CMAC update loop has to be fixed.

Fixes: 38923d487567 ("drivers: caam: implement CAAM DMA Object")

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: imx_i2c: add support for MX8MQ

Add support for iMX8MQ.

Signed-off-by: David Griego <david.griego@foundries.io>
Reviewed-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Acked-by: Jens Wiklande

drivers: imx_i2c: add support for MX8MQ

Add support for iMX8MQ.

Signed-off-by: David Griego <david.griego@foundries.io>
Reviewed-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core_mmu: fix implicit behavior of core_mmu_add_mapping()

In core_mmu_add_mapping() requested physical address
rounded up/down to granule size (0x100000), which leads
to establishing of virtual mapp

core_mmu: fix implicit behavior of core_mmu_add_mapping()

In core_mmu_add_mapping() requested physical address
rounded up/down to granule size (0x100000), which leads
to establishing of virtual mappings with overlapped
physical counterparts. If two virtual mappings overlaps
due to such roundings, then following phys_to_virt() can
implicitly return result of virtual address from
unexpected mapping. This patch fix such behavior by
returning virtual address of newly established mapping.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Anton Rybakov <a.rybakov@omp.ru>

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drivers:caam: Update DRVCRYPT_OID_MB_US_RSADSI macro with correct value

This macro forms the HASH OID for MD5 algorithm,

It is defined as:
id-md5 OBJECT IDENTIFIER ::= {
iso(1) member-body(2) us(

drivers:caam: Update DRVCRYPT_OID_MB_US_RSADSI macro with correct value

This macro forms the HASH OID for MD5 algorithm,

It is defined as:
id-md5 OBJECT IDENTIFIER ::= {
iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 5
}

According to OpenSSL,
iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 5
part is encoded as
0x2A,0x86,0x48,0x86,0xF7,0x0D,0x02,0x05

Links for reference:
OpenSSL: https://bit.ly/3hVZ7Is
RFC: https://datatracker.ietf.org/doc/html/rfc8017#section-9.2[Page 46]

But in this case it was being formed as
0x2A,0x86,0x48,0x86,0x48,0x02,0x05 which was wrong.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: scif: update base address in scif_uart_init()

Prior this patch function scif_uart_init() didn't called io_pa_or_va()
to determine correct base address for the device. This worked fine
becau

drivers: scif: update base address in scif_uart_init()

Prior this patch function scif_uart_init() didn't called io_pa_or_va()
to determine correct base address for the device. This worked fine
because in most cases OP-TEE address space is identity mapped. But,
this breaks if are trying to enable ASLR, because SCIF MMIO range is
no more 1:1 mapped.

To fix this we need to use io_pa_or_va() as all other drivers do.

Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome@forissier.org>

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drivers: caam: fix CMAC data input handling

Depending on the memory buffer input configuration, the function
caam_dmaobj_sgtbuf_build() might modify the data size to be processed in
the loop.
This c

drivers: caam: fix CMAC data input handling

Depending on the memory buffer input configuration, the function
caam_dmaobj_sgtbuf_build() might modify the data size to be processed in
the loop.
This case happens sometimes on the imx8mp where the input buffer
physical address in above 32 bits.
This implies reporting the data size re-ajustment when data is saved in
the context buffer.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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drivers: caam: remove faulty DMAOJB_TRACE()

Remove DMA object debug trace that would print a structure
variable through a NULL pointer.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed

drivers: caam: remove faulty DMAOJB_TRACE()

Remove DMA object debug trace that would print a structure
variable through a NULL pointer.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jerome Forissier <jerome@forissier.org>

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drivers: caam: add support for mx8mp platforms

Add support for mx8mp in the CAAM HAL.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
A

drivers: caam: add support for mx8mp platforms

Add support for mx8mp in the CAAM HAL.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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imx: pm: add support for reset2 function

Add support for SYSTEM_RESET2, which asserts WDOG-generated reset signal
WDOG_RESET_B_DEB (internal reset).

For additional details check WDOGx_WCR fields de

imx: pm: add support for reset2 function

Add support for SYSTEM_RESET2, which asserts WDOG-generated reset signal
WDOG_RESET_B_DEB (internal reset).

For additional details check WDOGx_WCR fields description in iMX
Applications Processor Reference Manual.

Acked-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>

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drivers: gic_it_enable(): remove assert that itr is disabled

Prior to this patch there was an assert in gic_it_enable() that non-SGI
interrupts where disabled before this function would enable that

drivers: gic_it_enable(): remove assert that itr is disabled

Prior to this patch there was an assert in gic_it_enable() that non-SGI
interrupts where disabled before this function would enable that
interrupt. This forces the caller to keep track of the state of the
interrupt in question and may also require additional locking to avoid
races around this assert. Enabling an interrupt twice is unnecessary,
but quite harmless. So remove the assert to simplify things for the
caller where possible.

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: caam: implement NXP CAAM Driver - DSA

Add DSA CAAM drivers.

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Foris

drivers: caam: implement NXP CAAM Driver - DSA

Add DSA CAAM drivers.

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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drivers: caam: append RSA to CAAM prime driver

Rename caam_prime.c to caam_prime_rsa.c
Rename struct prime_data {} to struct prime_data_rsa {}
Rename caam_prime_gen() to caam_prime_rsa_gen()

The re

drivers: caam: append RSA to CAAM prime driver

Rename caam_prime.c to caam_prime_rsa.c
Rename struct prime_data {} to struct prime_data_rsa {}
Rename caam_prime_gen() to caam_prime_rsa_gen()

The reason why specifying the RSA algorithm for the current CAAM prime
implementation is to prepare the merge for DSA algorithm that will
feature a different prime generation implementation.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jerome Forissier <jerome@forissier.org>

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drivers: crypto: implement crypto device driver - DSA

Add a generic cryptographic DSA driver interface connecting
TEE Crypto generic APIs to HW driver interface

Signed-off-by: Cedric Neveux <cedric

drivers: crypto: implement crypto device driver - DSA

Add a generic cryptographic DSA driver interface connecting
TEE Crypto generic APIs to HW driver interface

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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