| 4793519c | 01-Dec-2021 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
crypto: drivers: se050: object identifier range
With the introduction of the se050 APDU driver, external clients can create persistent objects on the secure element non-volatile memory.
The unique
crypto: drivers: se050: object identifier range
With the introduction of the se050 APDU driver, external clients can create persistent objects on the secure element non-volatile memory.
The unique identifiers for these objects do not necessarily need to fall within the range defined for objects created using the cyptographic operation interfaces (keypair_gen).
This commit fixes the use case where a key stored in the SE05x device (for example via a cloud service communicating to the optee-client's libseteec) is imported into the pkcs#11 database and then used for authentication (ie, EC sign)
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 7ca695bf | 16-Nov-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: clk: add verbosity on provider probe error case
Prints the names of the parent node and node for which core failed to probe a clock instance. Also prints the returned error code. These adde
drivers: clk: add verbosity on provider probe error case
Prints the names of the parent node and node for which core failed to probe a clock instance. Also prints the returned error code. These added debug information help understanding where and FDT parsing failed.
Acked-by: Clément Léger <clement.leger@bootlin.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| bb04f4b9 | 02-Dec-2021 |
Sahil Malhotra <sahil.malhotra@nxp.com> |
core: drivers: caam: disable jobring in DT only in case of external DTB
On LX2160 board, Embedded DTB is enabled. While booting with CAAM enabled, a crash comes in OP-TEE because it tries to disable
core: drivers: caam: disable jobring in DT only in case of external DTB
On LX2160 board, Embedded DTB is enabled. While booting with CAAM enabled, a crash comes in OP-TEE because it tries to disable the Job Ring in Embedded DTB, which is read only. So disable Job ring only when using External DTB.
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 8dca59b4 | 19-Nov-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: dt_driver: use driver type when finding a driver provider
Adds driver type argument to functions dt_driver_get_provider_by_node(), and dt_driver_get_provider_by_phandle() to differentiate driv
core: dt_driver: use driver type when finding a driver provider
Adds driver type argument to functions dt_driver_get_provider_by_node(), and dt_driver_get_provider_by_phandle() to differentiate driver provider references when a single DT node relates to several driver providers that are of different type by DT binding definition. For example, a DT node may describe a device that acts both as a clock provider and a reset controller, for which two driver references are needed in the driver provider list.
Updates dt_driver_device_from_node_idx_prop() accordingly.
Fixes: f498c4042931 ("core: dt_driver: factorize clk_get_provider_by_*()") Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 5dac4bd1 | 30-Nov-2021 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: crypto: stm32_cryp: register secure peripheral
Adds registering of CRYP1 device as a secure peripheral when it is registered as a crypto driver.
Fixes: 95134dac4b22 ("plat-stm32mp1: enable
drivers: crypto: stm32_cryp: register secure peripheral
Adds registering of CRYP1 device as a secure peripheral when it is registered as a crypto driver.
Fixes: 95134dac4b22 ("plat-stm32mp1: enable CRYPTO HW if available") Reviewed-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 289611b8 | 24-Nov-2021 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
crypto: drivers: se050: object identifier persistence property
The persistence of the object identifiers can be obtained by interrogating the device. Since objects can now be created by external act
crypto: drivers: se050: object identifier persistence property
The persistence of the object identifiers can be obtained by interrogating the device. Since objects can now be created by external actors using the APDU PTA, we will drop the current implementation which flags the object transient property using a bit on the object identifier itself.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jerome Forissier <jerome@forissier.org>
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| 32ddbffb | 13-Nov-2021 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
crypto: se050: APDU driver
This driver allows trusted applications to send raw APDU frames to the SE050 device. The Plug-and-Trust subsystem will route the frames back to OP-TEE for SCP03 encryption
crypto: se050: APDU driver
This driver allows trusted applications to send raw APDU frames to the SE050 device. The Plug-and-Trust subsystem will route the frames back to OP-TEE for SCP03 encryption and I2C transmission to the bus.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jerome Forissier <jerome@forissier.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| ff0c5d42 | 13-Nov-2021 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
core: crypto: Secure Element cryptographic interface
Extract cryptographic operations specific to Secure Elements from the more generic cryptographic interface.
Also, the Secure Channel Protocol03
core: crypto: Secure Element cryptographic interface
Extract cryptographic operations specific to Secure Elements from the more generic cryptographic interface.
Also, the Secure Channel Protocol03 is a global protocol supported by most SEs and not NXP SE05X specific. Use this commit to reflect this fact.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 8c8316db | 24-Nov-2021 |
Etienne Carriere <etienne.carriere@st.com> |
drivers: stm32_bsec: move to early_init stage
BSEC driver shall initialize a early_init initcall level to prepare OTP access needed to read the HUK from OTPs.
Acked-by: Jerome Forissier <jerome@for
drivers: stm32_bsec: move to early_init stage
BSEC driver shall initialize a early_init initcall level to prepare OTP access needed to read the HUK from OTPs.
Acked-by: Jerome Forissier <jerome@forissier.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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| 7b05d514 | 24-Nov-2021 |
Etienne Carriere <etienne.carriere@st.com> |
drivers: stm32_bsec: fix error on SAFMEM power-up
Fix unbalanced access locking when SAFMEM power up sequence fails.
Acked-by: Jerome Forissier <jerome@forissier.org> Acked-by: Jens Wiklander <jens
drivers: stm32_bsec: fix error on SAFMEM power-up
Fix unbalanced access locking when SAFMEM power up sequence fails.
Acked-by: Jerome Forissier <jerome@forissier.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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| b76fcab5 | 24-Nov-2021 |
Etienne Carriere <etienne.carriere@st.com> |
drivers: stm32_bsec: increase timeout
Increase stm32_bsec timeout to handle worst case at 10ms.
Acked-by: Jerome Forissier <jerome@forissier.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org
drivers: stm32_bsec: increase timeout
Increase stm32_bsec timeout to handle worst case at 10ms.
Acked-by: Jerome Forissier <jerome@forissier.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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| 8afb7c41 | 24-Nov-2021 |
Etienne Carriere <etienne.carriere@st.com> |
drivers: stm32_bsec: return busy/bad parms where applicable
Change stm32_bsec driver to return TEE_ERROR_BUSY when the BSEC interface reports a busy state and TEE_ERROR_BAD_PARAMETERS word programmi
drivers: stm32_bsec: return busy/bad parms where applicable
Change stm32_bsec driver to return TEE_ERROR_BUSY when the BSEC interface reports a busy state and TEE_ERROR_BAD_PARAMETERS word programming/locking has failed which means provided arguments were invalid.
Acked-by: Jerome Forissier <jerome@forissier.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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| 5411b322 | 11-Nov-2021 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
crypto: se050: rename huk driver to die_id
The current HUK driver is not providing the platform Hardware Unique Key but the DIE_ID.
This can logically be a source of confusion (and bugs) for many u
crypto: se050: rename huk driver to die_id
The current HUK driver is not providing the platform Hardware Unique Key but the DIE_ID.
This can logically be a source of confusion (and bugs) for many users not enabling this option.
This commit renames the huk.c file to die_id.c and replaces the previous configuration option with another one that is semantically accurate.
CFG_NXP_SE05X_HUK_DRV --> CFG_NXP_SE05X_DIEID_DRV
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org>
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| add5ac80 | 20-Oct-2021 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
crypto: se050: Foundries Plug-and-Trust release 0.0.4
Notice that rebasing the Plug-and-Trust stack to pick up the NXP Plug-and-Trust 3.03.00 release broke backwards compatibility with previous OP-T
crypto: se050: Foundries Plug-and-Trust release 0.0.4
Notice that rebasing the Plug-and-Trust stack to pick up the NXP Plug-and-Trust 3.03.00 release broke backwards compatibility with previous OP-TEE versions. This is why this commit includes the necessary update to adaptors/apdu.c
https://github.com/foundriesio/plug-and-trust/releases/tag/v0.0.3
Also the v.0.0.4 release includes support for APDU raw frame transmission to the secure element (a new interface). The OP-TEE PTA that makes use of that functionality shall be merged after this commit.
https://github.com/foundriesio/plug-and-trust/releases/tag/v0.0.4
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Acked-by: Jerome Forissier <jerome@forissier.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 7f857cd6 | 18-Jun-2021 |
Clément Léger <clement.leger@bootlin.com> |
drivers: add sub.mk for sam
Add sub.mk to for sam directory build.
Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com> |
| 16521289 | 18-Jun-2021 |
Clément Léger <clement.leger@bootlin.com> |
drivers: sam: add sama5d2 clock description
Add complete sama5d2 clock tree description which uses all the previously described clocks.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acke
drivers: sam: add sama5d2 clock description
Add complete sama5d2 clock tree description which uses all the previously described clocks.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| 538f5068 | 18-Jun-2021 |
Clément Léger <clement.leger@bootlin.com> |
drivers: sam: add at91 clock interface
Add interface to all clocks that are needed to describe sama5d2 clock tree.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Nicolas Ferre <
drivers: sam: add at91 clock interface
Add interface to all clocks that are needed to describe sama5d2 clock tree.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| 5558f7fc | 18-Jun-2021 |
Clément Léger <clement.leger@bootlin.com> |
drivers: sam: add pmc clock registering
Add all functions that will be used for PMC clocks registration.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Nicolas Ferre <nicolas.fe
drivers: sam: add pmc clock registering
Add all functions that will be used for PMC clocks registration.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| 5ee2fe59 | 18-Jun-2021 |
Clément Léger <clement.leger@bootlin.com> |
drivers: sam: add at91_system clock driver
Add driver for system clock.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Acked-by: Bori
drivers: sam: add at91_system clock driver
Add driver for system clock.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Acked-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| 82444cc2 | 18-Jun-2021 |
Clément Léger <clement.leger@bootlin.com> |
drivers: sam: add at91_utmi clock driver
Add driver for UTMI clock.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Acked-by: Boris Br
drivers: sam: add at91_utmi clock driver
Add driver for UTMI clock.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Acked-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| 7bf8a43b | 18-Jun-2021 |
Clément Léger <clement.leger@bootlin.com> |
drivers: sam: add at91_usb clock driver
Add driver for USB clocks.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Acked-by: Boris Bre
drivers: sam: add at91_usb clock driver
Add driver for USB clocks.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Acked-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| 98226f4a | 18-Jun-2021 |
Clément Léger <clement.leger@bootlin.com> |
drivers: sam: add at91_sckc clock driver
Add driver for slow clock controller.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Acked-b
drivers: sam: add at91_sckc clock driver
Add driver for slow clock controller.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Acked-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| 162917ff | 18-Jun-2021 |
Clément Léger <clement.leger@bootlin.com> |
drivers: sam: add at91_programmable clock driver
Add driver for programmable clocks.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> A
drivers: sam: add at91_programmable clock driver
Add driver for programmable clocks.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Acked-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| e48dcdad | 18-Jun-2021 |
Clément Léger <clement.leger@bootlin.com> |
drivers: sam: add at91_plldiv clock driver
Add driver for PLLDIV.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Acked-by: Boris Brez
drivers: sam: add at91_plldiv clock driver
Add driver for PLLDIV.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Acked-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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| dd6be631 | 18-Jun-2021 |
Clément Léger <clement.leger@bootlin.com> |
drivers: sam: add at91_pll clock driver
Add driver for PLL.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Acked-by: Boris Brezillon
drivers: sam: add at91_pll clock driver
Add driver for PLL.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Acked-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
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