1 // SPDX-License-Identifier: BSD-2-Clause 2 /* 3 * Copyright (c) 2021, Bootlin 4 */ 5 6 #include <assert.h> 7 #include <drivers/clk.h> 8 #include <drivers/clk_dt.h> 9 #include <initcall.h> 10 #include <kernel/boot.h> 11 #include <kernel/dt_driver.h> 12 #include <kernel/panic.h> 13 #include <libfdt.h> 14 #include <stddef.h> 15 16 struct clk *clk_dt_get_by_name(const void *fdt, int nodeoffset, 17 const char *name, TEE_Result *res) 18 { 19 int clk_id = 0; 20 21 clk_id = fdt_stringlist_search(fdt, nodeoffset, "clock-names", name); 22 if (clk_id < 0) { 23 *res = TEE_ERROR_GENERIC; 24 return NULL; 25 } 26 27 return clk_dt_get_by_idx(fdt, nodeoffset, clk_id, res); 28 } 29 30 static struct clk *clk_dt_get_by_idx_prop(const char *prop_name, 31 const void *fdt, int nodeoffset, 32 unsigned int clk_idx, TEE_Result *res) 33 { 34 void *device = dt_driver_device_from_node_idx_prop(prop_name, fdt, 35 nodeoffset, clk_idx, 36 DT_DRIVER_CLK, 37 res); 38 39 return (struct clk *)device; 40 } 41 42 struct clk *clk_dt_get_by_idx(const void *fdt, int nodeoffset, 43 unsigned int clk_idx, TEE_Result *res) 44 { 45 return clk_dt_get_by_idx_prop("clocks", fdt, nodeoffset, clk_idx, res); 46 } 47 48 /* Recursively called from parse_clock_property() */ 49 static TEE_Result clk_probe_clock_provider_node(const void *fdt, int node); 50 51 static TEE_Result parse_clock_property(const void *fdt, int node) 52 { 53 int len = 0; 54 int idx = 0; 55 int parent_node = 0; 56 int clock_cells = 0; 57 uint32_t phandle = 0; 58 const uint32_t *prop = NULL; 59 TEE_Result res = TEE_ERROR_GENERIC; 60 61 prop = fdt_getprop(fdt, node, "clocks", &len); 62 if (!prop) 63 return TEE_SUCCESS; 64 65 len /= sizeof(uint32_t); 66 while (idx < len) { 67 phandle = fdt32_to_cpu(prop[idx]); 68 69 parent_node = fdt_node_offset_by_phandle(fdt, phandle); 70 if (parent_node < 0) 71 return TEE_ERROR_GENERIC; 72 73 /* Parent probe should not fail or clock won't be available */ 74 res = clk_probe_clock_provider_node(fdt, parent_node); 75 if (res) 76 panic("Failed to probe parent clock"); 77 78 clock_cells = fdt_get_dt_driver_cells(fdt, parent_node, 79 DT_DRIVER_CLK); 80 if (clock_cells < 0) 81 return TEE_ERROR_GENERIC; 82 83 idx += 1 + clock_cells; 84 } 85 86 return TEE_SUCCESS; 87 } 88 89 static TEE_Result clk_probe_clock_provider_node(const void *fdt, int node) 90 { 91 int len = 0; 92 int status = 0; 93 TEE_Result res = TEE_ERROR_GENERIC; 94 95 status = _fdt_get_status(fdt, node); 96 if (!(status & DT_STATUS_OK_SEC)) 97 return TEE_ERROR_ITEM_NOT_FOUND; 98 99 /* Check if the node is a clock provider */ 100 if (!fdt_getprop(fdt, node, "#clock-cells", &len)) 101 return TEE_ERROR_ITEM_NOT_FOUND; 102 103 /* Check if node has already been probed */ 104 if (dt_driver_get_provider_by_node(node, DT_DRIVER_CLK)) 105 return TEE_SUCCESS; 106 107 /* Check if the node has a clock property first to probe parent */ 108 res = parse_clock_property(fdt, node); 109 if (res) 110 return res; 111 112 return dt_driver_probe_device_by_node(fdt, node, DT_DRIVER_CLK); 113 } 114 115 static void clk_probe_node(const void *fdt, int parent_node) 116 { 117 int child = 0; 118 int status = 0; 119 __maybe_unused TEE_Result res = TEE_ERROR_GENERIC; 120 121 fdt_for_each_subnode(child, fdt, parent_node) { 122 status = _fdt_get_status(fdt, child); 123 if (status == DT_STATUS_DISABLED) 124 continue; 125 126 res = clk_probe_clock_provider_node(fdt, child); 127 assert(res == TEE_SUCCESS || res == TEE_ERROR_ITEM_NOT_FOUND); 128 129 clk_probe_node(fdt, child); 130 } 131 } 132 133 static void parse_assigned_clock(const void *fdt, int nodeoffset) 134 { 135 int rate_len = 0; 136 int clock_idx = 0; 137 struct clk *clk = NULL; 138 unsigned long rate = 0; 139 struct clk *parent = NULL; 140 const uint32_t *rate_prop = NULL; 141 TEE_Result res = TEE_ERROR_GENERIC; 142 143 rate_prop = fdt_getprop(fdt, nodeoffset, "assigned-clock-rates", 144 &rate_len); 145 rate_len /= sizeof(uint32_t); 146 147 while (1) { 148 clk = clk_dt_get_by_idx_prop("assigned-clocks", fdt, nodeoffset, 149 clock_idx, &res); 150 if (!clk) 151 return; 152 153 parent = clk_dt_get_by_idx_prop("assigned-clock-parents", fdt, 154 nodeoffset, clock_idx, &res); 155 if (parent) { 156 if (clk_set_parent(clk, parent)) { 157 EMSG("Could not set clk %s parent to clock %s", 158 clk->name, parent->name); 159 panic(); 160 } 161 } 162 163 if (rate_prop && clock_idx <= rate_len) { 164 rate = fdt32_to_cpu(rate_prop[clock_idx]); 165 if (rate && clk_set_rate(clk, rate) != TEE_SUCCESS) 166 panic(); 167 } 168 169 clock_idx++; 170 } 171 } 172 173 static void clk_probe_assigned(const void *fdt, int parent_node) 174 { 175 int len = 0; 176 int child = 0; 177 int status = 0; 178 179 fdt_for_each_subnode(child, fdt, parent_node) { 180 clk_probe_assigned(fdt, child); 181 182 status = _fdt_get_status(fdt, child); 183 if (status == DT_STATUS_DISABLED) 184 continue; 185 186 if (fdt_getprop(fdt, child, "assigned-clocks", &len)) 187 parse_assigned_clock(fdt, child); 188 } 189 } 190 191 static TEE_Result clk_dt_probe(void) 192 { 193 const void *fdt = get_embedded_dt(); 194 195 DMSG("Probing clocks from devicetree"); 196 if (!fdt) 197 panic(); 198 199 clk_probe_node(fdt, -1); 200 201 clk_probe_assigned(fdt, -1); 202 203 return TEE_SUCCESS; 204 } 205 early_init(clk_dt_probe); 206