History log of /optee_os/core/drivers/ (Results 626 – 650 of 1287)
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cd0d1dd603-Jan-2023 Jorge Ramirez-Ortiz <jorge@foundries.io>

drivers: versal: hardware unique key

The hardware unique key is calculated as the AS-GCM encrypted value
of the SoC DNA unique identifier.

The key source used for encryption is selectable at build

drivers: versal: hardware unique key

The hardware unique key is calculated as the AS-GCM encrypted value
of the SoC DNA unique identifier.

The key source used for encryption is selectable at build time using
the CFG_VERSAL_HUK_KEY configuration flag.

The following sources are supported
VERSAL_AES_EFUSE_USER_KEY_0 (CFG_VERSAL_HUK_KEY = 6)
VERSAL_AES_EFUSE_USER_KEY_1 (CFG_VERSAL_HUK_KEY = 7)
VERSAL_AES_PUF_KEY (CFG_VERSAL_HUK_KEY = 11)
VERSAL_AES_USER_KEY_0 (CFG_VERSAL_HUK_KEY = 12 (default))

The default configuration does not generate a secret HUK since the
key is hardcoded in the driver - it however validates the algorithm;
but security-wise it is not different than not enabling CFG_VERSAL_HUK
and therefore using the OP-TEE provided HUK stub.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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c36f205e17-Jan-2023 Jorge Ramirez-Ortiz <jorge@foundries.io>

crypto: se050: update policies

Certain devices (depending on the applet) will use the common
policies for the object's read/write permissions.

This commit makes sure both are supported.

Signed-off

crypto: se050: update policies

Certain devices (depending on the applet) will use the common
policies for the object's read/write permissions.

This commit makes sure both are supported.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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7c10274204-Jan-2023 Gatien Chevallier <gatien.chevallier@foss.st.com>

drivers: rstctrl: differentiate error codes if items not found

Differentiates error codes in rstctrl_dt_get_by_name() if reset-names
property does not exist by returning TEE_ERROR_ITEM_NOT_FOUND.
Ad

drivers: rstctrl: differentiate error codes if items not found

Differentiates error codes in rstctrl_dt_get_by_name() if reset-names
property does not exist by returning TEE_ERROR_ITEM_NOT_FOUND.
Add comment for rstctrl_dt_get_by_index() that can now return
TEE_ERROR_ITEM_NOT_FOUND.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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5df61a5d05-Jul-2021 Clément Léger <clement.leger@bootlin.com>

drivers: clk: add support for clk_get_rates_array

In order to query rates from clients, add get_rates_array() which
returns a supported rate array.

Reviewed-by: Xiaoxu Zeng <zengxiaoxu@huawei.com>

drivers: clk: add support for clk_get_rates_array

In order to query rates from clients, add get_rates_array() which
returns a supported rate array.

Reviewed-by: Xiaoxu Zeng <zengxiaoxu@huawei.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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10fb0d9712-Dec-2022 Gatien Chevallier <gatien.chevallier@foss.st.com>

drivers: stm32_bsec: use DT NVMEM layout API

Uses OTP definition in the device tree, by using the function
stm32_bsec_find_otp_in_nvmem_layout() and removes the
hardcoded OTP index in platform confi

drivers: stm32_bsec: use DT NVMEM layout API

Uses OTP definition in the device tree, by using the function
stm32_bsec_find_otp_in_nvmem_layout() and removes the
hardcoded OTP index in platform config.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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0ec4521612-Dec-2022 Gatien Chevallier <gatien.chevallier@foss.st.com>

drivers: stm32_bsec: st,non-secure-otp-provisioning property

Implementation of a new "st,non-secure-provisioning-otp" property,
destined for non-secure OTP access with restrictions. At BSEC
initiali

drivers: stm32_bsec: st,non-secure-otp-provisioning property

Implementation of a new "st,non-secure-provisioning-otp" property,
destined for non-secure OTP access with restrictions. At BSEC
initialization, OTPs defined with this property will grant their access
to non-secure world only if the fuses are not permanently locked.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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7cb0cbba06-Jan-2023 Gatien Chevallier <gatien.chevallier@foss.st.com>

drivers: stm32mp15_huk: fix use of stm32mp_is_closed_device()

This function is no more defined because it was superseded by BSEC
driver API function stm32_bsec_get_state().

Implements use of the ne

drivers: stm32mp15_huk: fix use of stm32mp_is_closed_device()

This function is no more defined because it was superseded by BSEC
driver API function stm32_bsec_get_state().

Implements use of the new API.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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0042538e05-Jan-2023 Etienne Carriere <etienne.carriere@linaro.org>

plat-stm32mp1: fix visibility of stm32_bsec_shadow_register()

Makes stm32_bsec_shadow_register() function a visible driver API
function as it is needed when CFG_STM32_BSEC_SIP is enabled.
Fixed comm

plat-stm32mp1: fix visibility of stm32_bsec_shadow_register()

Makes stm32_bsec_shadow_register() function a visible driver API
function as it is needed when CFG_STM32_BSEC_SIP is enabled.
Fixed commit made it a local function which was wrong.

Fixes: a638030bce84 ("drivers: stm32_bsec: remove unused functions")
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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00b7e9c703-Jan-2023 Jorge Ramirez-Ortiz <jorge@foundries.io>

crypto: se050: fix typo in information message

The SCP03 "built-in" keys were incorrectly being reported to the
console as a nonsensical "build-int".

Signed-off-by: Jorge Ramirez-Ortiz <jorge@found

crypto: se050: fix typo in information message

The SCP03 "built-in" keys were incorrectly being reported to the
console as a nonsensical "build-int".

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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39100dea12-Dec-2022 Jorge Ramirez-Ortiz <jorge@foundries.io>

crypto: se050: fix build warning

When the configured logging level does not output IMSG, the static
function get_scp03_ksrc_name() is not called.

This causes a function unused warning which might l

crypto: se050: fix build warning

When the configured logging level does not output IMSG, the static
function get_scp03_ksrc_name() is not called.

This causes a function unused warning which might lead to a build
error.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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6cc77cdd08-Dec-2022 Jorge Ramirez-Ortiz <jorge@foundries.io>

crypto: drivers: se050-f: ecc: can fallback to softw-ops

The SE050-F device can select to fallback to specific unsupported
operations.

This allows xtests to run to completion without errors.

Signe

crypto: drivers: se050-f: ecc: can fallback to softw-ops

The SE050-F device can select to fallback to specific unsupported
operations.

This allows xtests to run to completion without errors.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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58986cdf12-Dec-2022 Jorge Ramirez-Ortiz <jorge@foundries.io>

crypto: drivers: se050-f: rsa: can fallback to softw-ops

The SE050-F device can select to fallback to specific unsupported
operations.

This allows xtests to run to completion without errors.

Signe

crypto: drivers: se050-f: rsa: can fallback to softw-ops

The SE050-F device can select to fallback to specific unsupported
operations.

This allows xtests to run to completion without errors.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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d8eed0c108-Dec-2022 Jorge Ramirez-Ortiz <jorge@foundries.io>

crypto: drivers: se050: ecc: fallback to softw-ops

Operations that require a public key might fallback to a software
based implementation.

Operations that require a private key might fallback to a

crypto: drivers: se050: ecc: fallback to softw-ops

Operations that require a public key might fallback to a software
based implementation.

Operations that require a private key might fallback to a software
based implementation as long as the private key is not in the secure
element.

Use CFG_NXP_SE05X_ECC_DRV_FALLBACK to enable this feature.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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a40be7eb08-Dec-2022 Jorge Ramirez-Ortiz <jorge@foundries.io>

crypto: drivers: se050: rsa: fallback to softw-ops

Operations that require a public key might fallback to a software
based implementation.

Operations that require a private key might fallback to a

crypto: drivers: se050: rsa: fallback to softw-ops

Operations that require a public key might fallback to a software
based implementation.

Operations that require a private key might fallback to a software
based implementation as long as the private key is not in the secure
element.

Use CFG_NXP_SE05X_RSA_DRV_FALLBACK to enable this feature.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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f8dc366908-Dec-2022 Jorge Ramirez-Ortiz <jorge@foundries.io>

crypto: drivers: se050-f: rsa: fix support

The NXP SE050-F does not support raw RSA keys, only CRT types.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Acked-by: Jerome Forissier <jerome.

crypto: drivers: se050-f: rsa: fix support

The NXP SE050-F does not support raw RSA keys, only CRT types.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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73bc4c5908-Dec-2022 Jorge Ramirez-Ortiz <jorge@foundries.io>

crypto: drivers: se050: adaptor: provide the oefid interface

Not all the NXP SE05X secure elements provide the same level of
cryptographic support. This interface allows runtime identification
of th

crypto: drivers: se050: adaptor: provide the oefid interface

Not all the NXP SE05X secure elements provide the same level of
cryptographic support. This interface allows runtime identification
of the device under control

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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4b4b84a812-Dec-2022 Gatien Chevallier <gatien.chevallier@foss.st.com>

drivers: stm32_bsec: remove protection on debug configuration

Keeps stm32_bsec_write_debug_conf() out of CFG_STM32_BSEC_WRITE
purpose. This switch must protect OTP memory writes, not accesses
to BSE

drivers: stm32_bsec: remove protection on debug configuration

Keeps stm32_bsec_write_debug_conf() out of CFG_STM32_BSEC_WRITE
purpose. This switch must protect OTP memory writes, not accesses
to BSEC configuration registers.

CFG_STM32_BSEC_WRITE is now default enabled and not set to
CFG_TEE_CORE_DEBUG value.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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a638030b07-Dec-2022 Gatien Chevallier <gatien.chevallier@foss.st.com>

drivers: stm32_bsec: remove unused functions

Removes unused functions stm32_bsec_otp_lock() and
stm32_bsec_shadow_register().

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-o

drivers: stm32_bsec: remove unused functions

Removes unused functions stm32_bsec_otp_lock() and
stm32_bsec_shadow_register().

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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e090bb5a12-Dec-2022 Gatien Chevallier <gatien.chevallier@foss.st.com>

drivers: stm32_bsec: update for stm32mp13

Adds support for stm32mp13x platforms in BSEC driver.
Permanent lock status is updated without reset.

Signed-off-by: Patrick Delaunay <patrick.delaunay@fos

drivers: stm32_bsec: update for stm32mp13

Adds support for stm32mp13x platforms in BSEC driver.
Permanent lock status is updated without reset.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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d6df31b012-Dec-2022 Gatien Chevallier <gatien.chevallier@foss.st.com>

drivers: stm32_bsec: add low power management

Adds low power management in BSEC driver to save and restore
the debug settings.

It is a preliminary step for BSEC support on STM32MP13.

Signed-off-by

drivers: stm32_bsec: add low power management

Adds low power management in BSEC driver to save and restore
the debug settings.

It is a preliminary step for BSEC support on STM32MP13.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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7dfc80ab12-Dec-2022 Gatien Chevallier <gatien.chevallier@foss.st.com>

drivers: stm32_bsec: add new generic interfaces

Exports generic functions to retrieve the BSEC state and check
if a fuse can be read depending on the BSEC current state.
Adds some robustness in the

drivers: stm32_bsec: add new generic interfaces

Exports generic functions to retrieve the BSEC state and check
if a fuse can be read depending on the BSEC current state.
Adds some robustness in the driver to enforce security when
trying to access a fuse.

It is a preliminary step for BSEC PTA introduction.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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d5d94b3502-Nov-2022 Clément Léger <clement.leger@bootlin.com>

drivers: atmel_wdt: enable watchdog reset

In order to reset the system rather that using an interrupt handler, set
the WDT_MR_WDRSTEN bit which allows to reboot the system.

Signed-off-by: Clément L

drivers: atmel_wdt: enable watchdog reset

In order to reset the system rather that using an interrupt handler, set
the WDT_MR_WDRSTEN bit which allows to reboot the system.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Suggested-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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c2daaa3725-Jan-2022 Clément Léger <clement.leger@bootlin.com>

drivers: atmel-shdwc: check secure status

Check for the shutdown controller secure-status property and if true,
then set it as secure.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked

drivers: atmel-shdwc: check secure status

Check for the shutdown controller secure-status property and if true,
then set it as secure.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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c2c7da1d25-Jan-2022 Clément Léger <clement.leger@bootlin.com>

drivers: atmel-rstc: check for secure status

Check for the reset controller secure-status property and if true, then
set it as secure.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked

drivers: atmel-rstc: check for secure status

Check for the reset controller secure-status property and if true, then
set it as secure.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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667e576e04-Jul-2022 Jorge Ramirez-Ortiz <jorge@foundries.io>

drivers: versal: physical unclonable function

This driver uses the PLM xilpuf service to deliver the physical
unclonable function (PUF).

The Physical unclonable function (PUF) generates two device

drivers: versal: physical unclonable function

This driver uses the PLM xilpuf service to deliver the physical
unclonable function (PUF).

The Physical unclonable function (PUF) generates two device unique
signatures per die. One signature is used for the key encryption key
(KEK) and one signature is used as an unique identification value.

The Unique ID is fully accessible and its value can be cleared
(hidden) and regenerated.

The KEK is never accessible and only usable from the AES-GCM engine.

https://github.com/Xilinx/embeddedsw

[1] TRM: https://docs.xilinx.com/r/en-US/am011-versal-acap-trm

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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