xref: /optee_os/core/arch/arm/dts/at91-sama5d27_wlsom1.dtsi (revision 3cd271a44bb7aafdda808fd47c47def83be41ad7) 
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * at91-sama5d27_wlsom1.dtsi - Device Tree file for SAMA5D27 WLSOM1
4 *
5 * Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries
6 *
7 * Author: Nicolas Ferre <nicolas.ferre@microcihp.com>
8 * Author: Eugen Hristev <eugen.hristev@microcihp.com>
9 */
10#include "sama5d2.dtsi"
11#include "sama5d2-pinfunc.h"
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/mfd/atmel-flexcom.h>
14
15/ {
16	model = "Microchip SAMA5D27 WLSOM1";
17	compatible = "microchip,sama5d27-wlsom1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
18
19	aliases {
20		i2c0 = &i2c0;
21	};
22
23	clocks {
24		slow_xtal {
25			clock-frequency = <32768>;
26		};
27
28		main_xtal {
29			clock-frequency = <24000000>;
30		};
31	};
32};
33
34&flx1 {
35	atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
36
37	uart6: serial@200 {
38		pinctrl-0 = <&pinctrl_flx1_default>;
39		pinctrl-names = "default";
40	};
41};
42
43&i2c0 {
44	pinctrl-0 = <&pinctrl_i2c0_default>;
45	pinctrl-1 = <&pinctrl_i2c0_gpio>;
46	pinctrl-names = "default", "gpio";
47	sda-gpios = <&pioA PIN_PD21 GPIO_ACTIVE_HIGH>;
48	scl-gpios = <&pioA PIN_PD22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
49	status = "okay";
50};
51
52&i2c1 {
53	dmas = <0>, <0>;
54	pinctrl-names = "default", "gpio";
55	pinctrl-0 = <&pinctrl_i2c1_default>;
56	pinctrl-1 = <&pinctrl_i2c1_gpio>;
57	sda-gpios = <&pioA PIN_PD19 GPIO_ACTIVE_HIGH>;
58	scl-gpios = <&pioA PIN_PD20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
59	status = "okay";
60
61	mcp16502@5b {
62		compatible = "microchip,mcp16502";
63		reg = <0x5b>;
64		status = "okay";
65		lpm-gpios = <&pioBU 0 GPIO_ACTIVE_LOW>;
66
67		regulators {
68			vdd_3v3: VDD_IO {
69				regulator-name = "VDD_IO";
70				regulator-min-microvolt = <1200000>;
71				regulator-max-microvolt = <3700000>;
72				regulator-initial-mode = <2>;
73				regulator-allowed-modes = <2>, <4>;
74				regulator-always-on;
75
76				regulator-state-standby {
77					regulator-on-in-suspend;
78					regulator-mode = <4>;
79				};
80
81				regulator-state-mem {
82					regulator-off-in-suspend;
83					regulator-mode = <4>;
84				};
85			};
86
87			vddio_ddr: VDD_DDR {
88				regulator-name = "VDD_DDR";
89				regulator-min-microvolt = <600000>;
90				regulator-max-microvolt = <1850000>;
91				regulator-initial-mode = <2>;
92				regulator-allowed-modes = <2>, <4>;
93				regulator-always-on;
94
95				regulator-state-standby {
96					regulator-on-in-suspend;
97					regulator-suspend-microvolt = <1200000>;
98					regulator-changeable-in-suspend;
99					regulator-mode = <4>;
100				};
101
102				regulator-state-mem {
103					regulator-on-in-suspend;
104					regulator-suspend-microvolt = <1200000>;
105					regulator-changeable-in-suspend;
106					regulator-mode = <4>;
107				};
108			};
109
110			vdd_core: VDD_CORE {
111				regulator-name = "VDD_CORE";
112				regulator-min-microvolt = <600000>;
113				regulator-max-microvolt = <1850000>;
114				regulator-initial-mode = <2>;
115				regulator-allowed-modes = <2>, <4>;
116				regulator-always-on;
117
118				regulator-state-standby {
119					regulator-on-in-suspend;
120					regulator-mode = <4>;
121				};
122
123				regulator-state-mem {
124					regulator-off-in-suspend;
125					regulator-mode = <4>;
126				};
127			};
128
129			vdd_ddr: VDD_OTHER {
130				regulator-name = "VDD_OTHER";
131				regulator-min-microvolt = <1800000>;
132				regulator-max-microvolt = <1800000>;
133				regulator-initial-mode = <2>;
134				regulator-allowed-modes = <2>, <4>;
135				regulator-always-on;
136
137				regulator-state-standby {
138					regulator-on-in-suspend;
139					regulator-suspend-microvolt = <1800000>;
140					regulator-changeable-in-suspend;
141					regulator-mode = <4>;
142				};
143
144				regulator-state-mem {
145					regulator-on-in-suspend;
146					regulator-suspend-microvolt = <1800000>;
147					regulator-changeable-in-suspend;
148					regulator-mode = <4>;
149				};
150			};
151
152			LDO1 {
153				regulator-name = "LDO1";
154				regulator-min-microvolt = <1200000>;
155				regulator-max-microvolt = <3700000>;
156				regulator-always-on;
157
158				regulator-state-standby {
159					regulator-on-in-suspend;
160				};
161
162				regulator-state-mem {
163					regulator-off-in-suspend;
164				};
165			};
166
167			LDO2 {
168				regulator-name = "LDO2";
169				regulator-min-microvolt = <1200000>;
170				regulator-max-microvolt = <3700000>;
171				regulator-always-on;
172
173				regulator-state-standby {
174					regulator-on-in-suspend;
175				};
176
177				regulator-state-mem {
178					regulator-off-in-suspend;
179				};
180			};
181		};
182	};
183};
184
185&macb0 {
186	pinctrl-names = "default";
187	pinctrl-0 = <&pinctrl_macb0_default>;
188	phy-mode = "rmii";
189
190	ethernet-phy@0 {
191		reg = <0x0>;
192		interrupt-parent = <&pioA>;
193		interrupts = <PIN_PB24 IRQ_TYPE_LEVEL_LOW>;
194		pinctrl-names = "default";
195		pinctrl-0 = <&pinctrl_macb0_phy_irq>;
196	};
197};
198
199&pmc {
200	atmel,osc-bypass;
201};
202
203&qspi1 {
204	pinctrl-names = "default";
205	pinctrl-0 = <&pinctrl_qspi1_default>;
206	status = "disabled";
207
208	qspi1_flash: spi_flash@0 {
209		#address-cells = <1>;
210		#size-cells = <1>;
211		compatible = "jedec,spi-nor";
212		reg = <0>;
213		spi-max-frequency = <80000000>;
214		spi-rx-bus-width = <4>;
215		spi-tx-bus-width = <4>;
216		m25p,fast-read;
217		status = "disabled";
218
219		at91bootstrap@0 {
220			label = "at91bootstrap";
221			reg = <0x0 0x40000>;
222		};
223
224		bootloader@40000 {
225			label = "bootloader";
226			reg = <0x40000 0xc0000>;
227		};
228
229		bootloaderenvred@100000 {
230			label = "bootloader env redundant";
231			reg = <0x100000 0x40000>;
232		};
233
234		bootloaderenv@140000 {
235			label = "bootloader env";
236			reg = <0x140000 0x40000>;
237		};
238
239		dtb@180000 {
240			label = "device tree";
241			reg = <0x180000 0x80000>;
242		};
243
244		kernel@200000 {
245			label = "kernel";
246			reg = <0x200000 0x600000>;
247		};
248	};
249};
250
251&pioA {
252	pinctrl_flx1_default: flx1_usart_default {
253		pinmux = <PIN_PA24__FLEXCOM1_IO0>,
254			 <PIN_PA23__FLEXCOM1_IO1>,
255			 <PIN_PA25__FLEXCOM1_IO3>,
256			 <PIN_PA26__FLEXCOM1_IO4>;
257		bias-disable;
258	};
259
260	pinctrl_i2c0_default: i2c0_default {
261		pinmux = <PIN_PD21__TWD0>,
262			 <PIN_PD22__TWCK0>;
263		bias-disable;
264	};
265
266	pinctrl_i2c0_gpio: i2c0_gpio {
267		pinmux = <PIN_PD21__GPIO>,
268			 <PIN_PD22__GPIO>;
269		bias-disable;
270	};
271
272	pinctrl_i2c1_default: i2c1_default {
273		pinmux = <PIN_PD19__TWD1>,
274			 <PIN_PD20__TWCK1>;
275		bias-disable;
276	};
277
278	pinctrl_i2c1_gpio: i2c1_gpio {
279		pinmux = <PIN_PD19__GPIO>,
280			 <PIN_PD20__GPIO>;
281		bias-disable;
282	};
283
284	pinctrl_macb0_default: macb0_default {
285		pinmux = <PIN_PB14__GTXCK>,
286			 <PIN_PB15__GTXEN>,
287			 <PIN_PB16__GRXDV>,
288			 <PIN_PB17__GRXER>,
289			 <PIN_PB18__GRX0>,
290			 <PIN_PB19__GRX1>,
291			 <PIN_PB20__GTX0>,
292			 <PIN_PB21__GTX1>,
293			 <PIN_PB22__GMDC>,
294			 <PIN_PB23__GMDIO>;
295		bias-disable;
296	};
297
298	pinctrl_macb0_phy_irq: macb0_phy_irq {
299		pinmux = <PIN_PB24__GPIO>;
300		bias-disable;
301	};
302
303	pinctrl_qspi1_default: qspi1_default {
304		pinmux = <PIN_PB5__QSPI1_SCK>,
305			 <PIN_PB6__QSPI1_CS>,
306			 <PIN_PB7__QSPI1_IO0>,
307			 <PIN_PB8__QSPI1_IO1>,
308			 <PIN_PB9__QSPI1_IO2>,
309			 <PIN_PB10__QSPI1_IO3>;
310		bias-pull-up;
311	};
312};
313
314