History log of /optee_os/core/drivers/ (Results 426 – 450 of 1287)
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9b72ef0917-Nov-2023 loubaihui <loubaihui1@huawei.com>

core: drivers: fix random number reading errors in hisi_trng

Fixes arguments passed to IO_READ32_POLL_TIMEOUT() macro
and missing local variable definition in hisi_trng driver.

Fixes: fb5592f9cfeb

core: drivers: fix random number reading errors in hisi_trng

Fixes arguments passed to IO_READ32_POLL_TIMEOUT() macro
and missing local variable definition in hisi_trng driver.

Fixes: fb5592f9cfeb ("core: drivers: add HiSilicon TRNG implementation")
Signed-off-by: loubaihui <loubaihui1@huawei.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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7d41fd4c13-Nov-2023 loubaihui <loubaihui1@huawei.com>

core: drivers: modify debug and error messages in hisi_trng

Modify debug and error messages in hisi_trng.c

Fixes: fb5592f9cfeb ("core: drivers: add HiSilicon TRNG implementation")
Signed-off-by: lo

core: drivers: modify debug and error messages in hisi_trng

Modify debug and error messages in hisi_trng.c

Fixes: fb5592f9cfeb ("core: drivers: add HiSilicon TRNG implementation")
Signed-off-by: loubaihui <loubaihui1@huawei.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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c7f9abce21-Nov-2023 Xiaoxu Zeng <zengxiaoxu@huawei.com>

drivers: implement HiSilicon Queue Management (QM) module

The Hisilicon QM is a Queue Management module.
In order to unify the interface between accelerator and software,
a unified queue management

drivers: implement HiSilicon Queue Management (QM) module

The Hisilicon QM is a Queue Management module.
In order to unify the interface between accelerator and software,
a unified queue management module QM is used to interact with software.
Each accelerator module integrates a QM. Software issues tasks to the SQ
(Submmision Queue),and the QM obtains the address of the SQE (Submmision
Queue Element). The BD (Buffer Description, same as SQE) information is
sent to the accelerator. After the task processing is complete, the
accelerator applies for a write-back address from the QM to write back
the SQ.

Signed-off-by: Xiaoxu Zeng <zengxiaoxu@huawei.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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23f9bd9902-Nov-2023 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: regulator: IO domain regulators for STM32MP13

Add STM32MP13 IO domains regulators allowing a consumer to
manage IO domains are voltage regulators.

Acked-by: Patrick Delaunay <patrick.delau

drivers: regulator: IO domain regulators for STM32MP13

Add STM32MP13 IO domains regulators allowing a consumer to
manage IO domains are voltage regulators.

Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Co-developed-by: Pascal Paillet <p.paillet@foss.st.com>
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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8c7282be10-Oct-2023 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: gic: use DT bindings

Use DT bindings GIC_PPI and GIC_SIP instead of 1 and 0 raw values.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@li

drivers: gic: use DT bindings

Use DT bindings GIC_PPI and GIC_SIP instead of 1 and 0 raw values.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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14885eb105-Oct-2023 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: gic: register to dt_driver

Registers GIC driver as an interrupt controller in DT_DRIVER
providers when DT is supported. This change allows interrupt
consumer nodes to leverage interrupts an

drivers: gic: register to dt_driver

Registers GIC driver as an interrupt controller in DT_DRIVER
providers when DT is supported. This change allows interrupt
consumer nodes to leverage interrupts and interrupts-extended
properties DT bindings for their device drivers to retrieve
their interrupts.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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33a0c83514-Jun-2023 Etienne Carriere <etienne.carriere@foss.st.com>

core: interrupt: registering interrupt providers

Adds interrupt chip framework API functions for an interrupt controller
to register as an interrupt provider in the driver probing sequence
based on

core: interrupt: registering interrupt providers

Adds interrupt chip framework API functions for an interrupt controller
to register as an interrupt provider in the driver probing sequence
based on device tree. This allows interrupt consumer to be deferred
when a dependent interrupt controller is not yet initialized.

Interrupt controllers register a driver in DT_DRIVER providers list
with: interrupt_register_provider().

Interrupt consumer can get their interrupt through DT data with
interrupt_dt_get(), interrupt_dt_get_by_index() or
interrupt_dt_get_by_name().

This change removes inclusion of interrupt.h from kernel/dt.h as it is
not needed and conflicts with inclusion of kernel/dt.h from
kernel/interrupt.h.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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cd04d13817-Nov-2023 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: clk: print clock tree summary

Adds clk_print_summary() to print the clock tree current state on core
console using the info trace level. Clock framework spinlock is help
while clock tree is

drivers: clk: print clock tree summary

Adds clk_print_summary() to print the clock tree current state on core
console using the info trace level. Clock framework spinlock is help
while clock tree is printed.

The feature depends on CFG_DRIVERS_CLK_PRINT_TREE being enabled.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Co-developed-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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bce2f88a19-Nov-2023 Vincent Mailhol <mailhol.vincent@wanadoo.fr>

tree-wide: remove useless newline character in *MSG() messages

The *MSG() macros take care of printing a newline. Adding a newline
character ('\n') is useless. Remove it.

Signed-off-by: Vincent Mai

tree-wide: remove useless newline character in *MSG() messages

The *MSG() macros take care of printing a newline. Adding a newline
character ('\n') is useless. Remove it.

Signed-off-by: Vincent Mailhol <mailhol.vincent@wanadoo.fr>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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f164f0f811-Sep-2023 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: regulator: GPIO controlled regulator

Implements a GPIO controlled regulators driver compliant with DT nodes
compatible with regulator-gpio. These regulators use GPIO pins to select
the volt

drivers: regulator: GPIO controlled regulator

Implements a GPIO controlled regulators driver compliant with DT nodes
compatible with regulator-gpio. These regulators use GPIO pins to select
the voltage level. The implementation supports only dual voltage level
selection using a single pin. The DT bindings allows more pins to
select between more voltages but no known platform currently requires
that so we preferred the simplified case.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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ec740b9f23-Oct-2023 Jens Wiklander <jens.wiklander@linaro.org>

core: interrupt_raise_sgi() updates

Adds ITR_CPU_MASK_TO_THIS_CPU and ITR_CPU_MASK_TO_OTHER_CPUS to simplify
targeting CPUs in some use cases. The cpu_mask parameter is changed to a
uint32_t to make

core: interrupt_raise_sgi() updates

Adds ITR_CPU_MASK_TO_THIS_CPU and ITR_CPU_MASK_TO_OTHER_CPUS to simplify
targeting CPUs in some use cases. The cpu_mask parameter is changed to a
uint32_t to make room for the two new flags.

The gic driver is updated to support this new flag.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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0b1eafde07-Nov-2023 Clement Faure <clement.faure@nxp.com>

drivers: crypto: caam: fix job ring interruption number

The job ring interruption number is 356 for job ring 3.

Fixes: b21f12209671 ("drivers: crypto: caam: use job ring 3 on i.mx8dxlevk")
Signed-o

drivers: crypto: caam: fix job ring interruption number

The job ring interruption number is 356 for job ring 3.

Fixes: b21f12209671 ("drivers: crypto: caam: use job ring 3 on i.mx8dxlevk")
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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fb5592f909-Oct-2023 loubaihui <loubaihui1@huawei.com>

core: drivers: add HiSilicon TRNG implementation

Based on HiSilicon hardware, a matching TRNG module is added.
The driver is enabled for the D06 platform (PLATFORM=d06).

Signed-off-by: loubaihui <l

core: drivers: add HiSilicon TRNG implementation

Based on HiSilicon hardware, a matching TRNG module is added.
The driver is enabled for the D06 platform (PLATFORM=d06).

Signed-off-by: loubaihui <loubaihui1@huawei.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Xiaoxu Zeng <zengxiaoxu@huawei.com>
[jf: amend commit description]
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>

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bd1fffe530-Oct-2023 Gatien Chevallier <gatien.chevallier@foss.st.com>

plat-stm32mp2: add new platform support

Initial configuration for STM32MP2x platforms.
Add the initial memory layout and the MMU bus reference
addresses. Default RAM size is 4GBytes
It adds also the

plat-stm32mp2: add new platform support

Initial configuration for STM32MP2x platforms.
Add the initial memory layout and the MMU bus reference
addresses. Default RAM size is 4GBytes
It adds also the console initialization and GIC support.

There are no shared resources on STM32MP25x platforms. Use
stm32_pinctrl_set_secure_cfg() API in the STM32 UART driver for now.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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8370badb30-Oct-2023 Gatien Chevallier <gatien.chevallier@foss.st.com>

drivers: stm32_gpio: remove unused APIs

Remove unused stm32_get_gpio_bank_offset() and stm32_get_gpio_count()
APIs.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Eti

drivers: stm32_gpio: remove unused APIs

Remove unused stm32_get_gpio_bank_offset() and stm32_get_gpio_count()
APIs.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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b21f122002-Nov-2023 Clement Faure <clement.faure@nxp.com>

drivers: crypto: caam: use job ring 3 on i.mx8dxlevk

Use the job ring #3 on i.mx8dxl to avoid resource conflict with other
software stacks.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acke

drivers: crypto: caam: use job ring 3 on i.mx8dxlevk

Use the job ring #3 on i.mx8dxl to avoid resource conflict with other
software stacks.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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c41ef45923-Oct-2023 Alvin Chang <alvinga@andestech.com>

drivers: plic: Ignore interrupt source ID 0

According to RISC-V PLIC specification, interrupt ID 0 is reserved to
mean "no interrupt". Therefore, we should ignore it.

Signed-off-by: Alvin Chang <al

drivers: plic: Ignore interrupt source ID 0

According to RISC-V PLIC specification, interrupt ID 0 is reserved to
mean "no interrupt". Therefore, we should ignore it.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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57fec11816-May-2023 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: atmel_piobu: upgrade to new interrupt framework

Moves atmel_piobu driver to the new interrupt framework API functions.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by

drivers: atmel_piobu: upgrade to new interrupt framework

Moves atmel_piobu driver to the new interrupt framework API functions.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

show more ...

eb5b947d16-May-2023 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: sp805_wdt.c: use the new interrupt API

Upgrades sp805_wdt.c driver to the new interrupt API functions as
itr_alloc_add() and friends will be removed.

Reviewed-by: Jens Wiklander <jens.wikl

drivers: sp805_wdt.c: use the new interrupt API

Upgrades sp805_wdt.c driver to the new interrupt API functions as
itr_alloc_add() and friends will be removed.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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297c6cbc16-May-2023 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: crypto: caam: upgrade to new interrupt framework

Moves CAAM job ring driver to the new interrupt framework API functions.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off

drivers: crypto: caam: upgrade to new interrupt framework

Moves CAAM job ring driver to the new interrupt framework API functions.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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c64c658b16-May-2023 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: atmel_wdt: upgrade to new interrupt framework

Moves atmel_wdt watchdog driver to the new interrupt framework
API functions.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-o

drivers: atmel_wdt: upgrade to new interrupt framework

Moves atmel_wdt watchdog driver to the new interrupt framework
API functions.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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/optee_os/.gitignore
/optee_os/CHANGELOG.md
/optee_os/Makefile
/optee_os/core/arch/arm/include/arm.h
/optee_os/core/arch/arm/include/arm32.h
/optee_os/core/arch/arm/include/arm64.h
/optee_os/core/arch/arm/include/crypto/ghash-ce-core.h
/optee_os/core/arch/arm/include/kernel/misc_arch.h
/optee_os/core/arch/arm/include/kernel/tee_l2cc_mutex.h
/optee_os/core/arch/arm/include/kernel/tlb_helpers.h
/optee_os/core/arch/arm/include/kernel/tz_proc_def.h
/optee_os/core/arch/arm/include/kernel/tz_ssvce_def.h
/optee_os/core/arch/arm/include/kernel/tz_ssvce_pl310.h
/optee_os/core/arch/arm/include/kernel/vfp.h
/optee_os/core/arch/arm/include/mm/core_mmu_arch.h
/optee_os/core/arch/arm/include/scmi/scmi_server.h
/optee_os/core/arch/arm/include/sm/optee_smc.h
/optee_os/core/arch/arm/include/sm/pm.h
/optee_os/core/arch/arm/include/sm/psci.h
/optee_os/core/arch/arm/include/sm/sm.h
/optee_os/core/arch/arm/include/sm/std_smc.h
/optee_os/core/arch/arm/include/sm/teesmc_opteed.h
/optee_os/core/arch/arm/include/sm/teesmc_opteed_macros.h
/optee_os/core/arch/arm/include/sm/watchdog_smc.h
/optee_os/core/arch/arm/include/tee/entry_fast.h
/optee_os/core/arch/arm/kernel/boot.c
/optee_os/core/arch/arm/kernel/entry_a32.S
/optee_os/core/arch/arm/kernel/entry_a64.S
/optee_os/core/arch/arm/kernel/link_dummies_init.c
/optee_os/core/arch/arm/kernel/link_dummies_paged.c
/optee_os/core/arch/riscv/include/kernel/misc_arch.h
/optee_os/core/arch/riscv/include/kernel/tee_l2cc_mutex.h
/optee_os/core/arch/riscv/include/kernel/tlb_helpers.h
/optee_os/core/arch/riscv/include/mm/core_mmu_arch.h
/optee_os/core/arch/riscv/include/riscv.h
/optee_os/core/arch/riscv/include/sbi.h
/optee_os/core/arch/riscv/include/tee/entry_fast.h
/optee_os/core/arch/riscv/include/tee/optee_abi.h
/optee_os/core/arch/riscv/include/tee/teeabi_opteed.h
/optee_os/core/arch/riscv/include/tee/teeabi_opteed_macros.h
/optee_os/core/arch/riscv/kernel/boot.c
atmel_wdt.c
/optee_os/core/include/bench.h
/optee_os/core/include/console.h
/optee_os/core/include/crypto/crypto_se.h
/optee_os/core/include/crypto/sm2-kdf.h
/optee_os/core/include/drivers/amlogic_uart.h
/optee_os/core/include/drivers/atmel_uart.h
/optee_os/core/include/drivers/bcm/bnxt.h
/optee_os/core/include/drivers/bcm_gpio.h
/optee_os/core/include/drivers/bcm_hwrng.h
/optee_os/core/include/drivers/bcm_sotp.h
/optee_os/core/include/drivers/caam_extension.h
/optee_os/core/include/drivers/cbmem_console.h
/optee_os/core/include/drivers/cdns_uart.h
/optee_os/core/include/drivers/gpio.h
/optee_os/core/include/drivers/hi16xx_uart.h
/optee_os/core/include/drivers/imx/dcp.h
/optee_os/core/include/drivers/imx_ocotp.h
/optee_os/core/include/drivers/imx_uart.h
/optee_os/core/include/drivers/imx_wdog.h
/optee_os/core/include/drivers/lpc_uart.h
/optee_os/core/include/drivers/mvebu_uart.h
/optee_os/core/include/drivers/ns16550.h
/optee_os/core/include/drivers/pl011.h
/optee_os/core/include/drivers/pl022_spi.h
/optee_os/core/include/drivers/pl061_gpio.h
/optee_os/core/include/drivers/plic.h
/optee_os/core/include/drivers/regulator.h
/optee_os/core/include/drivers/rtc.h
/optee_os/core/include/drivers/sam/at91_ddr.h
/optee_os/core/include/drivers/scif.h
/optee_os/core/include/drivers/scmi-msg.h
/optee_os/core/include/drivers/scmi.h
/optee_os/core/include/drivers/serial8250_uart.h
/optee_os/core/include/drivers/sp805_wdt.h
/optee_os/core/include/drivers/sprd_uart.h
/optee_os/core/include/drivers/stih_asc.h
/optee_os/core/include/drivers/stm32_bsec.h
/optee_os/core/include/drivers/stm32_etzpc.h
/optee_os/core/include/drivers/stm32_gpio.h
/optee_os/core/include/drivers/stm32_i2c.h
/optee_os/core/include/drivers/stm32_iwdg.h
/optee_os/core/include/drivers/stm32_uart.h
/optee_os/core/include/drivers/stm32mp_dt_bindings.h
/optee_os/core/include/drivers/stpmic1.h
/optee_os/core/include/drivers/wdt.h
/optee_os/core/include/gen-asm-defines.h
/optee_os/core/include/initcall.h
/optee_os/core/include/io.h
/optee_os/core/include/keep.h
/optee_os/core/include/kernel/abort.h
/optee_os/core/include/kernel/boot.h
/optee_os/core/include/kernel/chip_services.h
/optee_os/core/include/kernel/dt.h
/optee_os/core/include/kernel/dt_driver.h
/optee_os/core/include/kernel/early_ta.h
/optee_os/core/include/kernel/embedded_ts.h
/optee_os/core/include/kernel/handle.h
/optee_os/core/include/kernel/ldelf_loader.h
/optee_os/core/include/kernel/ldelf_syscalls.h
/optee_os/core/include/kernel/misc.h
/optee_os/core/include/kernel/msg_param.h
/optee_os/core/include/kernel/mutex.h
/optee_os/core/include/kernel/panic.h
/optee_os/core/include/kernel/pseudo_ta.h
/optee_os/core/include/kernel/rpc_io_i2c.h
/optee_os/core/include/kernel/spinlock.h
/optee_os/core/include/kernel/tee_common.h
/optee_os/core/include/kernel/tee_common_otp.h
/optee_os/core/include/kernel/tee_misc.h
/optee_os/core/include/kernel/tee_ta_manager.h
/optee_os/core/include/kernel/tee_time.h
/optee_os/core/include/kernel/thread.h
/optee_os/core/include/kernel/time_source.h
/optee_os/core/include/kernel/timer.h
/optee_os/core/include/kernel/trace_ta.h
/optee_os/core/include/kernel/unwind.h
/optee_os/core/include/kernel/user_ta.h
/optee_os/core/include/kernel/virtualization.h
/optee_os/core/include/kernel/wait_queue.h
/optee_os/core/include/mm/core_memprot.h
/optee_os/core/include/mm/core_mmu.h
/optee_os/core/include/mm/pgt_cache.h
/optee_os/core/include/mm/tee_mm.h
/optee_os/core/include/mm/tee_mmu_types.h
/optee_os/core/include/mm/tee_pager.h
/optee_os/core/include/mm/vm.h
/optee_os/core/include/optee_msg.h
/optee_os/core/include/signed_hdr.h
/optee_os/core/include/ta_pub_key.h
/optee_os/core/include/tee/cache.h
/optee_os/core/include/tee/entry_std.h
/optee_os/core/include/tee/svc_cache.h
/optee_os/core/include/tee/tee_cryp_concat_kdf.h
/optee_os/core/include/tee/tee_cryp_hkdf.h
/optee_os/core/include/tee/tee_cryp_pbkdf2.h
/optee_os/core/include/tee/tee_cryp_utl.h
/optee_os/core/include/tee/tee_fs.h
/optee_os/core/include/tee/tee_fs_key_manager.h
/optee_os/core/include/tee/tee_fs_rpc.h
/optee_os/core/include/tee/tee_obj.h
/optee_os/core/include/tee/tee_pobj.h
/optee_os/core/include/tee/tee_supp_plugin_rpc.h
/optee_os/core/include/tee/tee_svc.h
/optee_os/core/include/tee/tee_svc_cryp.h
/optee_os/core/include/tee/tee_svc_storage.h
/optee_os/core/include/tee/tee_ta_enc_manager.h
/optee_os/core/kernel/notif.c
/optee_os/mk/config.mk
/optee_os/scripts/gen_compile_commands.py
a20a065d17-Oct-2023 Clement Faure <clement.faure@nxp.com>

drivers: caam: remove unnecessary header file

Remove #include <caam_utils_status.h>

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

8c49825d06-Sep-2023 Etienne Carriere <etienne.carriere@foss.st.com>

plat-stm32mp1: stm32mp1_pmic: regulators voltage list

Implements operator supported_voltages for stm32mp1 PMIC regulators
driver. A voltage list array is allocated during initialization and
freed up

plat-stm32mp1: stm32mp1_pmic: regulators voltage list

Implements operator supported_voltages for stm32mp1 PMIC regulators
driver. A voltage list array is allocated during initialization and
freed upon core initialization completion. This prevents wasting heap
when the list is queried only during boot time.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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312d447607-Sep-2023 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: regulator: stm32_vrefbuf

Implements and enable STM32 VREFBUF regulator driver for stm32mp1
platform.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carr

drivers: regulator: stm32_vrefbuf

Implements and enable STM32 VREFBUF regulator driver for stm32mp1
platform.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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d5cb088213-Oct-2023 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: crypto: stm32: lower verbosity on SAES use

Changes SAES context allocation/release trace message from debug level
to flow level otherwise each access to the secure storage emits debug
messa

drivers: crypto: stm32: lower verbosity on SAES use

Changes SAES context allocation/release trace message from debug level
to flow level otherwise each access to the secure storage emits debug
messages.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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