History log of /optee_os/core/drivers/gic.c (Results 51 – 61 of 61)
Revision Date Author Comments
# 007a97a2 15-May-2016 Jens Wiklander <jens.wiklander@linaro.org>

core: fixes undefined behavior

Fixes undefined behavior detected with CFG_CORE_SANITIZE_UNDEFINED=y

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@l

core: fixes undefined behavior

Fixes undefined behavior detected with CFG_CORE_SANITIZE_UNDEFINED=y

Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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# 7315b7b4 21-Apr-2016 Jens Wiklander <jens.wiklander@linaro.org>

core: add interrupt framework

Adds interrupt frameworks and adjusts gic driver to fit in.

Update plat-vexpress and sunxi platforms to initialize gic with slightly
modified interface.

Reviewed-by:

core: add interrupt framework

Adds interrupt frameworks and adjusts gic driver to fit in.

Update plat-vexpress and sunxi platforms to initialize gic with slightly
modified interface.

Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU, FVP)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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# 30a673e3 30-Oct-2015 Peter Maydell <peter.maydell@linaro.org>

drivers/core/gic.c: Set priority mask to allow NS interrupts

The non-secure world's view of interrupt priorities only allows
it to set priorities between 0x80 and 0xff. This means that the
secure wo

drivers/core/gic.c: Set priority mask to allow NS interrupts

The non-secure world's view of interrupt priorities only allows
it to set priorities between 0x80 and 0xff. This means that the
secure world has to set the GICC_PMR (priority mask register) to
a value that allows NS interrupts, otherwise the non-secure
world will never see interrupts and has no way to set the
priorities so that it will ever see them.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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# e06e6e74 30-Oct-2015 Peter Maydell <peter.maydell@linaro.org>

drivers/core/gic.c: Fix indentation in gic_cpu_init()

The indentation in gic_cpu_init() is using spaces rather than
tabs. Since it's a very short function and we're about to add
some code to it, fix

drivers/core/gic.c: Fix indentation in gic_cpu_init()

The indentation in gic_cpu_init() is using spaces rather than
tabs. Since it's a very short function and we're about to add
some code to it, fix the indentation first.

Fix a comment typo while we're here.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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# 1f60363a 19-Mar-2015 Jens Wiklander <jens.wiklander@linaro.org>

select base types based on ILP32 and LP64 defines

* Selects base types base on the __ILP32__ and __LP64__ defines
* Fixes warnings from change of base types

Signed-off-by: Jens Wiklander <jens.wikl

select base types based on ILP32 and LP64 defines

* Selects base types base on the __ILP32__ and __LP64__ defines
* Fixes warnings from change of base types

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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# bedc2b9f 07-Nov-2014 sunny <sunny@allwinnertech.com>

driver/gic: add gic_cpu_init interface.

The interface mainly use for secondary cpu bootup.
When secondary cpu bootup, It will initialize per-cpu gic-cpu-interface.
The gic_cpu_init main work include

driver/gic: add gic_cpu_init interface.

The interface mainly use for secondary cpu bootup.
When secondary cpu bootup, It will initialize per-cpu gic-cpu-interface.
The gic_cpu_init main work include:
1.Set the per-cpu interrupts as Group1;
2.Enable Group0-interrupts/Group1-interrupts/FIQEn.

Signed-off-by: sunny <sunny@allwinnertech.com>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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# 4de4bebc 20-Oct-2014 Jens Wiklander <jens.wiklander@linaro.org>

Merge tee_{core,uta}_trace.h into libutil

Merges tee_core_trace.h and tee_uta_trace.h into a common trace.h
in libutil. Since the trace functions now resides libutil they have
to rely on core and li

Merge tee_{core,uta}_trace.h into libutil

Merges tee_core_trace.h and tee_uta_trace.h into a common trace.h
in libutil. Since the trace functions now resides libutil they have
to rely on core and libutee to provide functions to print to the
log device.

* Keeps compatible interface from tee_kta_trace.h
* Adds TAMSG() and TAMSG_RAW() to log TA related events
* Removes the TRACE_ALWAYS level

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU virt platform)
Reviewed-by: Etienne Carriere <etienne.carriere@st.com>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (STM platform)

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# ff97306f 26-Sep-2014 Jens Wiklander <jens.wiklander@linaro.org>

fvp: enable uart1 fiq

Configures UART1/GIC to generate a FIQ when there's input on
UART1.


# 79f008d3 24-Sep-2014 Jens Wiklander <jens.wiklander@linaro.org>

gic: bugfix probe_max_it


# 53bd332a 11-Aug-2014 SY Chiu <sy.chiu@linaro.org>

Add GIC status dump utility

- fixed fvp gic cpu interface and distrubtor offset
- added new mapping for distrubtor
- add utility to dump gic status


# b0104773 12-Jun-2014 Pascal Brand <pascal.brand@st.com>

Open-source the TEE Core

Signed-off-by: Pascal Brand <pascal.brand@st.com>


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