drivers: caam: fix CAAM Job Ring halt/flush/cancel

Fix CAAM halt/flush jobs by calling dequeue operation to complete all jobs.
Add spinlock management in the cancel function because of the shared JR

drivers: caam: fix CAAM Job Ring halt/flush/cancel

Fix CAAM halt/flush jobs by calling dequeue operation to complete all jobs.
Add spinlock management in the cancel function because of the shared JR
structure.

Fixes: 2d7a896 ("driver: implement CAAM driver")
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: Fix hal clock registers read/write

Fix CAAM Clock registers access to use io_read/write() functions and
not io_caam_read/write().

Fixes: 2d7a896 ("driver: implement CAAM driver")
Sig

drivers: caam: Fix hal clock registers read/write

Fix CAAM Clock registers access to use io_read/write() functions and
not io_caam_read/write().

Fixes: 2d7a896 ("driver: implement CAAM driver")
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: fix hal control split key detection

Fix the CAAM Version ID MS register address (CAAM Control + JR Offset).
Change HAL caam_hal_ctrl_splitkey() to read the parameters register LS
bit

drivers: caam: fix hal control split key detection

Fix the CAAM Version ID MS register address (CAAM Control + JR Offset).
Change HAL caam_hal_ctrl_splitkey() to read the parameters register LS
bit 14 (SPLIT_KEY) that indicates the support for the split key.

Fixes: 81ab436 ("drivers: caam: implement NXP CAAM Driver - HMAC")
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: hwrng fix perf drop after suspend/resume

RNG performance drops after a suspend/resume cycle on parts where caam
loses power, since the initial U-boot settings are not restored by OP-T

drivers: caam: hwrng fix perf drop after suspend/resume

RNG performance drops after a suspend/resume cycle on parts where caam
loses power, since the initial U-boot settings are not restored by OP-TEE
when resuming.
Modifying the TRNG "sample size" (the total number of entropy samples that
will be taken during entropy generation) from it's default conservative
value of 2500 to be more in line with the "sample size" that the caam
driver in U-boot/Linux kernel select(512) will solve the performance hit.

Changed the default minimum entropy delay value for I.MX 6SX from 4800
to 3200 to be in line with U-boot and Kernel setting for this value.
The higher default entropy delay value for OP-TEE would have caused a
perceived performance hit after/suspend resume.

Fixes: 2d7a896 ("driver: implement CAAM driver")
Signed-off-by: Dragos Rosioru <dragos.rosioru@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: fix missing output additional length

CAAM HW Module requires additional bytes in output buffer
to perform the requested operation.
This is the case for ECDSA operation, signature must

drivers: caam: fix missing output additional length

CAAM HW Module requires additional bytes in output buffer
to perform the requested operation.
This is the case for ECDSA operation, signature must be 16 bytes
aligned.
The CAAM DMA object is adding the required bytes if the signature
output buffer is too short. The issue is that this additional
bytes were not added in the DMA buffer to be allocated.

Fixes: 38923d4 ("drivers: caam: implement CAAM DMA Object")
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: caam: ack the interrupt when completing a job

The ITR will only be acked if the job finishes between the
do_jr_dequeue() and caam_hal_jr_check_ack_itr().
With this fix, we ensure the ITR is

drivers: caam: ack the interrupt when completing a job

The ITR will only be acked if the job finishes between the
do_jr_dequeue() and caam_hal_jr_check_ack_itr().
With this fix, we ensure the ITR is acked when leaving
caam_jr_dequeue() function.

Fixes: 2d7a896 ("driver: implement CAAM driver")
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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core_mmu: fix phys_to_virt() to check length

phys_to_virt() function without length parameter doesn`t
always have ability to find the correct mapping for
requested physical address. This is because

core_mmu: fix phys_to_virt() to check length

phys_to_virt() function without length parameter doesn`t
always have ability to find the correct mapping for
requested physical address. This is because physical
address can be mapped in the same time in different virtual
regions with different length. So the first found region
which contains the requested physical address possibly
doesn`t have enough mapped data. This is fixed by adding
the length parameter to phys_to_virt() function. Length
parameter can be set to 1 if caller knows that requested
(pa + len) doesn`t cross mapping granule boundary.

core_mmu_get_va() and io_pa_or_va() functions now are
take length parameter too as they based on phys_to_virt()
in case of MMU enabled.

Signed-off-by: Anton Rybakov <a.rybakov@omp.ru>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1-157C_DK2)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabreauto)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qpsabreauto)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek)
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek)

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drivers: caam: fix DMA object when only output reallocated

Use case:
- cipher block to encrypt/decrypt is more than 1 Kbytes (e.g. 1232
bytes)
- input data are accessible from CAAM (no reallocatio

drivers: caam: fix DMA object when only output reallocated

Use case:
- cipher block to encrypt/decrypt is more than 1 Kbytes (e.g. 1232
bytes)
- input data are accessible from CAAM (no reallocation)
- output data is not accessible from CAAM (reallocation of DMA buffer).

In case of cipher operation, the input and output CAAM SGT/Buffer
are built in same time through function caam_dmaobj_sgtbuf_inout_build()
to ensure that both SGT/Buffer do the same cipher block size.
Function caam_dmaobj_sgtbuf_inout_build() calls the function
caam_dmaobj_sgtbuf_build():
- first to build the input data SGT/Buffer. Length returned is
whole cipher buffer size (i.e. 1232 bytes).
- secondly to build the output data SGT/Buffer. Length return is
whole cipher buffer size (i.e. 1232 bytes) whereas it must be 1024 bytes
because output data must use the reallocation DMA buffer (max 1KBytes).

Fix consist in returning the SGT/Buffer length effectively mapped and
not the maximum length that is the input data SGT/Buffer length.

Consequence of this fix, AES CMAC update loop has to be fixed.

Fixes: 38923d487567 ("drivers: caam: implement CAAM DMA Object")

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core_mmu: fix implicit behavior of core_mmu_add_mapping()

In core_mmu_add_mapping() requested physical address
rounded up/down to granule size (0x100000), which leads
to establishing of virtual mapp

core_mmu: fix implicit behavior of core_mmu_add_mapping()

In core_mmu_add_mapping() requested physical address
rounded up/down to granule size (0x100000), which leads
to establishing of virtual mappings with overlapped
physical counterparts. If two virtual mappings overlaps
due to such roundings, then following phys_to_virt() can
implicitly return result of virtual address from
unexpected mapping. This patch fix such behavior by
returning virtual address of newly established mapping.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Anton Rybakov <a.rybakov@omp.ru>

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drivers:caam: Update DRVCRYPT_OID_MB_US_RSADSI macro with correct value

This macro forms the HASH OID for MD5 algorithm,

It is defined as:
id-md5 OBJECT IDENTIFIER ::= {
iso(1) member-body(2) us(

drivers:caam: Update DRVCRYPT_OID_MB_US_RSADSI macro with correct value

This macro forms the HASH OID for MD5 algorithm,

It is defined as:
id-md5 OBJECT IDENTIFIER ::= {
iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 5
}

According to OpenSSL,
iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 5
part is encoded as
0x2A,0x86,0x48,0x86,0xF7,0x0D,0x02,0x05

Links for reference:
OpenSSL: https://bit.ly/3hVZ7Is
RFC: https://datatracker.ietf.org/doc/html/rfc8017#section-9.2[Page 46]

But in this case it was being formed as
0x2A,0x86,0x48,0x86,0x48,0x02,0x05 which was wrong.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: caam: fix CMAC data input handling

Depending on the memory buffer input configuration, the function
caam_dmaobj_sgtbuf_build() might modify the data size to be processed in
the loop.
This c

drivers: caam: fix CMAC data input handling

Depending on the memory buffer input configuration, the function
caam_dmaobj_sgtbuf_build() might modify the data size to be processed in
the loop.
This case happens sometimes on the imx8mp where the input buffer
physical address in above 32 bits.
This implies reporting the data size re-ajustment when data is saved in
the context buffer.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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drivers: caam: remove faulty DMAOJB_TRACE()

Remove DMA object debug trace that would print a structure
variable through a NULL pointer.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed

drivers: caam: remove faulty DMAOJB_TRACE()

Remove DMA object debug trace that would print a structure
variable through a NULL pointer.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jerome Forissier <jerome@forissier.org>

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drivers: caam: add support for mx8mp platforms

Add support for mx8mp in the CAAM HAL.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
A

drivers: caam: add support for mx8mp platforms

Add support for mx8mp in the CAAM HAL.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: caam: implement NXP CAAM Driver - DSA

Add DSA CAAM drivers.

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Foris

drivers: caam: implement NXP CAAM Driver - DSA

Add DSA CAAM drivers.

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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drivers: caam: append RSA to CAAM prime driver

Rename caam_prime.c to caam_prime_rsa.c
Rename struct prime_data {} to struct prime_data_rsa {}
Rename caam_prime_gen() to caam_prime_rsa_gen()

The re

drivers: caam: append RSA to CAAM prime driver

Rename caam_prime.c to caam_prime_rsa.c
Rename struct prime_data {} to struct prime_data_rsa {}
Rename caam_prime_gen() to caam_prime_rsa_gen()

The reason why specifying the RSA algorithm for the current CAAM prime
implementation is to prepare the merge for DSA algorithm that will
feature a different prime generation implementation.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Jerome Forissier <jerome@forissier.org>

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drivers: crypto: implement crypto device driver - DSA

Add a generic cryptographic DSA driver interface connecting
TEE Crypto generic APIs to HW driver interface

Signed-off-by: Cedric Neveux <cedric

drivers: crypto: implement crypto device driver - DSA

Add a generic cryptographic DSA driver interface connecting
TEE Crypto generic APIs to HW driver interface

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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drivers: caam: implement NXP CAAM Driver - DH

Add DH CAAM driver.

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Etienne Carrier

drivers: caam: implement NXP CAAM Driver - DH

Add DH CAAM driver.

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: crypto: implement crypto driver - DH

Add a generic cryptographic DH driver interface connecting
TEE Crypto generic APIs to HW driver interface

Signed-off-by: Cedric Neveux <cedric.neveux@n

drivers: crypto: implement crypto driver - DH

Add a generic cryptographic DH driver interface connecting
TEE Crypto generic APIs to HW driver interface

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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drivers: caam: fix CMAC update operation

Fix an issue in the CMAC do_update() operation that
would happen in the following conditions:
* a data temporay buffer full (16 bytes).
* an input message

drivers: caam: fix CMAC update operation

Fix an issue in the CMAC do_update() operation that
would happen in the following conditions:
* a data temporay buffer full (16 bytes).
* an input message of 16 bytes.

These conditions would set the data size to be processed by the CAAM
equals to zero. This would result on the loss of 16 bytes of the input
message and a wrong CMAC.

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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drivers: caam: fix input data size for CMAC do_update()

Fix a corner case where the CAAM would try to allocate an input
DMA object with a size of 0 bytes.

Signed-off-by: Cedric Neveux <cedric.neveu

drivers: caam: fix input data size for CMAC do_update()

Fix a corner case where the CAAM would try to allocate an input
DMA object with a size of 0 bytes.

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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core: dt: take account type of interrupt in dt_get_irq()

Interrupt DT binding is defined by at least 2 cells as per DT binding
documentation [1]:
```
-The 1st cell is the interrupt type; 0 for SPI i

core: dt: take account type of interrupt in dt_get_irq()

Interrupt DT binding is defined by at least 2 cells as per DT binding
documentation [1]:
```
-The 1st cell is the interrupt type; 0 for SPI interrupts,
1 for PPI interrupts.
-The 2nd cell contains the interrupt number for the interrupt type.
SPI interrupts are in the range [0-987].
PPI interrupts are in the range [0-15].
```

This patch takes the first cell into account to return absolute value
required for itr_enable() interface.

Update CAAM crypto driver accordingly.

Link: [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml?h=v5.9#n66
Signed-off-by: Ludovic Barre <ludovic.barre@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome@forissier.org>

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core: dt: split dt_get_irq() between interrupt framework and drivers

To welcome other interrupt drivers (coming from other platform for
example), we need to rework dt_get_irq() which was dedicated t

core: dt: split dt_get_irq() between interrupt framework and drivers

To welcome other interrupt drivers (coming from other platform for
example), we need to rework dt_get_irq() which was dedicated to ARM
platform more specifically GIC driver.
This change moves dt_get_irq() in interrupt framework, this manages the
generic part of interrupt bindings (specified by devicetree.org [1]) and
then call a driver callback to translate specific properties.
This callback is registered by drivers while its init step.

Update CAAM crypto driver accordingly.

Link: [1] https://www.devicetree.org/specifications/
Signed-off-by: Ludovic Barre <ludovic.barre@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome@forissier.org>

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drivers: se050: Fix incorrect handling of se050 cipher operation mode

A boolean encrypt flag was being passed to the cipher init function
that instead expects a TEE_OperationMode enum. Given that th

drivers: se050: Fix incorrect handling of se050 cipher operation mode

A boolean encrypt flag was being passed to the cipher init function
that instead expects a TEE_OperationMode enum. Given that the enum
TEE_MODE_ENCRYPT has as a value of 0, encrypt and decrypt operations
were effectively swapped. This error has no practical effect on current
se050 mainline code because the only AES mode currently supported for
se050 is CTR, which ignores the passed value and always performs an
encrypt. But it needs to be fixed before adding support for ECB or CBC,
for example.

Signed-off-by: Dave Herron <dave.herron@gallagher.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jorge Ramirez-Ortiz <jorge@foundries.org>

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drivers: caam: implement NXP CAAM Driver - ECC

Add ECC CAAM driver.

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklande

drivers: caam: implement NXP CAAM Driver - ECC

Add ECC CAAM driver.

Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: caam: add missing SCFGR offset for LS platforms

Add missing CAAM security configuration register offset for LS
platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Sah

drivers: caam: add missing SCFGR offset for LS platforms

Add missing CAAM security configuration register offset for LS
platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jerome Forissier <jerome@forissier.org>

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