crypto: stm32: fix stm32_saes CTR mode on small input buffers

Fix missing cast when saving pre-computed masks in STM32 SAES driver
CTR implementation when several small input data is provided to
the

crypto: stm32: fix stm32_saes CTR mode on small input buffers

Fix missing cast when saving pre-computed masks in STM32 SAES driver
CTR implementation when several small input data is provided to
the update handler.

The issue is revealed by xtest regression_4017 when run with at least
level 12, e.g. "xtest -l 15 regression_4017".

Fixes: 4320f5cf30c5 ("crypto: stm32: SAES cipher support")
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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crypto: stm32: fix stm32_cryp CTR mode on small input buffers

Fix missing cast when saving pre-computed masks in STM32 CRYP driver
CTR implementation when several small input data is provided to
the

crypto: stm32: fix stm32_cryp CTR mode on small input buffers

Fix missing cast when saving pre-computed masks in STM32 CRYP driver
CTR implementation when several small input data is provided to
the update handler.

The issue could be found, for example, by assigning STM32 CRYP to OP-TEE
in stm32mp1-157C_DK2 board DTS file (patch below) and running xtest
regression_4017 with level 15 ("xtest -l 15 regression_4017").

Example of a patch on stm32mp157c-dk2.dts file to use CRYP driver for
AES operations:
+&cryp1 { status = "okay"; };
+
&etzpc {
st,decprot =
(...)
- <DECPROT(STM32MP1_ETZPC_CRYP1_ID, DECPROT_NS_RW, DECPROT_UNLOCK)>,
+ <DECPROT(STM32MP1_ETZPC_CRYP1_ID, DECPROT_S_RW, DECPROT_UNLOCK)>,
(...)
}

Fixes: 5e64ae6796b7 ("crypto: stm32: use CRYP IP for CIPHER algorithms")
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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crypto: stm32: use HASH IP for HASH and HMAC algorithm

Add HASH IP drivers, and add hooks in OP-TEE crypto framework to use
HASH IP to do HASH and HMAC process

Signed-off-by: Nicolas Toromanoff <ni

crypto: stm32: use HASH IP for HASH and HMAC algorithm

Add HASH IP drivers, and add hooks in OP-TEE crypto framework to use
HASH IP to do HASH and HMAC process

Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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crypto: stm32: use PKA IP for ECC algorithm

Add PKA IP drivers, and add hooks in OP-TEE crypto framework to use
PKA IP to do ECC process.

Truncate hash during ECDSA signature according to the NIST

crypto: stm32: use PKA IP for ECC algorithm

Add PKA IP drivers, and add hooks in OP-TEE crypto framework to use
PKA IP to do ECC process.

Truncate hash during ECDSA signature according to the NIST
recommendation:
https://nvlpubs.nist.gov/nistpubs/FIPS/NIST.FIPS.186-5.pdf

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Co-developed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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tree-wide: use power-of-2 rounding macros where applicable

Use ROUNDUP2(), ROUNDUP2_OVERFLOW(), ROUNDUP2_DIV() and ROUNDDOWN2() at
places where the rounding argument is a variable value and we want

tree-wide: use power-of-2 rounding macros where applicable

Use ROUNDUP2(), ROUNDUP2_OVERFLOW(), ROUNDUP2_DIV() and ROUNDDOWN2() at
places where the rounding argument is a variable value and we want to
leverage the implementation of these routines optimized for a
power-of-2 rounding argument.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: stm32_cryp: remove registering to shared_resource driver

Remove registering of STM32 CRYP driver to shared_resources driver that
is deprecated since integration of the firewall framework an

drivers: stm32_cryp: remove registering to shared_resource driver

Remove registering of STM32 CRYP driver to shared_resources driver that
is deprecated since integration of the firewall framework and will soon
be removed.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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drivers: use fdt_reg_info()

Use fdt_reg_info() instead of fdt_reg_base_address() and fdt_reg_size()
to optimize look up in the DT due to finding parent node.

Signed-off-by: Etienne Carriere <etienn

drivers: use fdt_reg_info()

Use fdt_reg_info() instead of fdt_reg_base_address() and fdt_reg_size()
to optimize look up in the DT due to finding parent node.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: crypto: stm32: fix SAES driver set_field_u32 usage

set_field_u32() is a function that allows you to change a specific bit
in a register by using a mask. The function returns the full value

drivers: crypto: stm32: fix SAES driver set_field_u32 usage

set_field_u32() is a function that allows you to change a specific bit
in a register by using a mask. The function returns the full value of
the register, which means that the use of bitwise OR here is a mistake.
The current code works here only because the modified registers are
initialized. Moreover, I've reverted a commit as there is no
need to shift the value as the function already does it.

Fix the usage of the function in the SAES driver by replacing
bitwise OR assignments with simple assignments.

Fixes: c83a542f3734 ("drivers: crypto: stm32: fix SAES key selection")
Fixes: 4320f5cf30c5 ("crypto: stm32: SAES cipher support")
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: crypto: stm32: add an error trace when registering CRYP and SAES

Drvcrypt framework can only register one symmetric cipher driver.
Add an explicit error trace in function stm32_register_cip

drivers: crypto: stm32: add an error trace when registering CRYP and SAES

Drvcrypt framework can only register one symmetric cipher driver.
Add an explicit error trace in function stm32_register_cipher() when
several cipher drivers are registered.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: crypto: stm32_saes: SAES depends on RNG clock

Fixes missing dependency of SAES device on RNG clock.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Thomas Bou

drivers: crypto: stm32_saes: SAES depends on RNG clock

Fixes missing dependency of SAES device on RNG clock.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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drivers: crypto: stm32_saes: add PM to SAES driver

Add power management support to the SAES driver through suspend/resume
callbacks.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
S

drivers: crypto: stm32_saes: add PM to SAES driver

Add power management support to the SAES driver through suspend/resume
callbacks.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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drivers: crypto: remove assertions on device handlers

Remove assertions added by the commit referred below. They are useless
since the handlers are registered only if the related device (stm32_cryp

drivers: crypto: remove assertions on device handlers

Remove assertions added by the commit referred below. They are useless
since the handlers are registered only if the related device (stm32_cryp
or stm32_saes) has its driver successfully probed. These assertion also
prevent enabling both CFG_STM32_SAES and CFG_STM32_CRYP for a platform
which is a valid configuration for when we rely on the DT to state
which of both is enabled.

Fixes: 03de2c7bb316 ("drivers: crypto: stm32_saes: fallback to software on 192bit AES keys")
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>

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drivers: crypto: stm32_cryp: add pm to CRYP driver

Add power management support to the CRYP driver through suspend/resume
callbacks.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Sig

drivers: crypto: stm32_cryp: add pm to CRYP driver

Add power management support to the CRYP driver through suspend/resume
callbacks.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: crypto: stm32_cryp: add delay when resetting CRYP peripheral.

Add 2 us of delay between reset assert and reset deassert to ensure the
peripheral is properly reset.

Signed-off-by: Thomas Bo

drivers: crypto: stm32_cryp: add delay when resetting CRYP peripheral.

Add 2 us of delay between reset assert and reset deassert to ensure the
peripheral is properly reset.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: crypto: stm32_cryp: remove reset binding requirements

Remove panic during probe when "resets" property is not found because
it's optional in most cases.

Signed-off-by: Thomas Bourgoin <tho

drivers: crypto: stm32_cryp: remove reset binding requirements

Remove panic during probe when "resets" property is not found because
it's optional in most cases.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: crypto: stm32_saes: fallback to software on 192bit AES keys

Implement AES software operation for 192 bits keys as these are not
supported by the STM32 SAES peripheral. For that purpose ciph

drivers: crypto: stm32_saes: fallback to software on 192bit AES keys

Implement AES software operation for 192 bits keys as these are not
supported by the STM32 SAES peripheral. For that purpose ciphering final,
context copy and context freeing operations common functions are split
into CRYP/SAES peripheral specific functions.

Reviewed-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: crypto: stm32: cleanup cipher operation structure

Move cryp_ops definition in the source file to have it defined right
next to the CRYP ciphering operation handlers.

Add missing static key

drivers: crypto: stm32: cleanup cipher operation structure

Move cryp_ops definition in the source file to have it defined right
next to the CRYP ciphering operation handlers.

Add missing static keyword in CRYP and SAES operation handlers
structures that are local to the source file.

No functional changes.

Reviewed-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: crypto: stm32: move context allocation/free functions

Move cipher context allocation and free functions to place them
next to each other for CRYP and SAES support to ease their maintenance

drivers: crypto: stm32: move context allocation/free functions

Move cipher context allocation and free functions to place them
next to each other for CRYP and SAES support to ease their maintenance
as the context free sequence is the counter part of the context
allocation sequence. No functional changes.

Reviewed-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: crypto: stm32: clean function references

Remove useless & operator in function references of stm32 crypto drivers.
No functional changes.

Reviewed-by: Thomas Bourgoin <thomas.bourgoin@foss

drivers: crypto: stm32: clean function references

Remove useless & operator in function references of stm32 crypto drivers.
No functional changes.

Reviewed-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: crypto: stm32: fix SAES key selection

Correction selection of key in STM32 SAES driver that missed a
left bit shift operation. The bug was not experienced before as
current platform tests i

drivers: crypto: stm32: fix SAES key selection

Correction selection of key in STM32 SAES driver that missed a
left bit shift operation. The bug was not experienced before as
current platform tests involve only the software key selection
(_SAES_CR_KEYSEL_SOFT) which value is 0 and matches the SoC default
key selection register value.

Fixes: 4320f5cf30c5 ("crypto: stm32: SAES cipher support")
Acked-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: crypto: stm32: lower verbosity on SAES use

Changes SAES context allocation/release trace message from debug level
to flow level otherwise each access to the secure storage emits debug
messa

drivers: crypto: stm32: lower verbosity on SAES use

Changes SAES context allocation/release trace message from debug level
to flow level otherwise each access to the secure storage emits debug
messages.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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crypto: stm32: fix SAES reset at probe time

Uses SAES internal reset sequence only when external reset controller
is not available. This change fixes a non-systematic SAES error
seen when SAES inter

crypto: stm32: fix SAES reset at probe time

Uses SAES internal reset sequence only when external reset controller
is not available. This change fixes a non-systematic SAES error
seen when SAES internal reset is triggered right after external reset
sequence. Whereas a fix could be to add a delay between external reset
and internal reset sequences, this change simplifies the sequence as
internal reset sequence is not needed when SAES instance is reset using
its external reset controller.

Fixes: 4320f5cf30c5 ("crypto: stm32: SAES cipher support")
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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crypto: stm32: use generic macro in authenc.c

Replace TOBE32 and FROMBE32 macros with generic TEE_U32_TO_BIG_ENDIAN and
TEE_U32_FROM_BIG_ENDIAN respectively.

Signed-off-by: Thomas Bourgoin <thomas.

crypto: stm32: use generic macro in authenc.c

Replace TOBE32 and FROMBE32 macros with generic TEE_U32_TO_BIG_ENDIAN and
TEE_U32_FROM_BIG_ENDIAN respectively.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_saes: redefine huk_subkey_derive()

We set huk_subkey_derive() as a weak function and we define it in SAES
driver to be able to use SAES IP to make a secure key derivation from
the SAE

drivers: stm32_saes: redefine huk_subkey_derive()

We set huk_subkey_derive() as a weak function and we define it in SAES
driver to be able to use SAES IP to make a secure key derivation from
the SAES only accessible SOC unique secret key.

We use the Key Derivation function (KDF) in counter mode defined in [1]
using as the PRF (pseudo random function) the PRF(AES-CMAC).
PRF(AES-CMAC) is hardware accelerated by SAES, and use the secure DHUK
(derived hardware unique key) only readable by the SAES IP.

Link: https://nvlpubs.nist.gov/nistpubs/SpecialPublications/NIST.SP.800-108r1.pdf [1]
Co-developed-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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crypto: stm32: SAES cipher support

Add SAES HW driver, and update OP-TEE cipher hooks to be able to use
SAES or CRYP for cipher algorithms.
SAES and CRYP cannot be enabled at the same time in OP-TEE

crypto: stm32: SAES cipher support

Add SAES HW driver, and update OP-TEE cipher hooks to be able to use
SAES or CRYP for cipher algorithms.
SAES and CRYP cannot be enabled at the same time in OP-TEE.

Co-developed-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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