plat-stm32mp1: use gic_init_per_cpu()

Call gic_init_per_cpu() instead of the now deprecated gic_cpu_init().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <

plat-stm32mp1: use gic_init_per_cpu()

Call gic_init_per_cpu() instead of the now deprecated gic_cpu_init().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-rzn1: use gic_init_per_cpu()

Call gic_init_per_cpu() instead of the now deprecated gic_cpu_init().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Sumit Garg <sumit.garg@li

plat-rzn1: use gic_init_per_cpu()

Call gic_init_per_cpu() instead of the now deprecated gic_cpu_init().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Sumit Garg <sumit.garg@linaro.org>

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plat-rockchip: use gic_init_per_cpu()

Call gic_init_per_cpu() instead of the now deprecated gic_cpu_init().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

plat-rcar: use gic_init_per_cpu()

Call gic_init_per_cpu() instead of the now deprecated gic_cpu_init().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Volodymyr Babchuk <vol

plat-rcar: use gic_init_per_cpu()

Call gic_init_per_cpu() instead of the now deprecated gic_cpu_init().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>

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plat-ls: use gic_init_per_cpu()

Call gic_init_per_cpu() instead of the now deprecated gic_cpu_init().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Sahil Malhotra <sahil.ma

plat-ls: use gic_init_per_cpu()

Call gic_init_per_cpu() instead of the now deprecated gic_cpu_init().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com>

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plat-k3: use gic_init_per_cpu()

Call gic_init_per_cpu() instead of the now deprecated gic_cpu_init().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Andrew Davis <afd@ti.com>

plat-imx: use gic_init_per_cpu()

Call gic_init_per_cpu() instead of the now deprecated gic_cpu_init()

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Clement Faure <clement.fau

plat-imx: use gic_init_per_cpu()

Call gic_init_per_cpu() instead of the now deprecated gic_cpu_init()

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qsabresd, imx-mx6ulevk, imx-mx8qmmek, imx-mx8mnevk)

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plat-corstone1000: use gic_init_per_cpu()

Call gic_init_per_cpu() instead of the now deprecated gic_cpu_init().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

plat-aspeed: use gic_init_per_cpu()

Call gic_init_per_cpu() instead of the now deprecated gic_cpu_init().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Chia-Wei Wang <chiaw

plat-aspeed: use gic_init_per_cpu()

Call gic_init_per_cpu() instead of the now deprecated gic_cpu_init().

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>

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plat-vexpress: use CFG_AUTO_MAX_PA_BITS on virtual platforms

By default set CFG_AUTO_MAX_PA_BITS=y on the virtual platforms fvp and
qemu_armv8a to allow automatic configuration of the maximal suppor

plat-vexpress: use CFG_AUTO_MAX_PA_BITS on virtual platforms

By default set CFG_AUTO_MAX_PA_BITS=y on the virtual platforms fvp and
qemu_armv8a to allow automatic configuration of the maximal supported
physical address.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: add CFG_AUTO_MAX_PA_BITS

Add the configuration variable CFG_AUTO_MAX_PA_BITS that enables
automatic discovery of maximal PA supported by the hardware.

Signed-off-by: Jens Wiklander <jens.wikl

core: add CFG_AUTO_MAX_PA_BITS

Add the configuration variable CFG_AUTO_MAX_PA_BITS that enables
automatic discovery of maximal PA supported by the hardware.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: arm64.h: add read_id_aa64mmfr0_el1()

Add a read function for the system register ID_AA64MMFR0_EL1 and the
mask ID_AA64MMFR0_EL1_PARANGE_MASK to extract the PARange field.

Signed-off-by: Jens

core: arm64.h: add read_id_aa64mmfr0_el1()

Add a read function for the system register ID_AA64MMFR0_EL1 and the
mask ID_AA64MMFR0_EL1_PARANGE_MASK to extract the PARange field.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: ffa: return fpi size from FFA_PARTITION_INFO_GET

Until now has FFA_PARTITION_INFO_GET always returned zero in w3, but
FF-A v1.1 requires FFA_PARTITION_INFO_GET to return the size of each
parti

core: ffa: return fpi size from FFA_PARTITION_INFO_GET

Until now has FFA_PARTITION_INFO_GET always returned zero in w3, but
FF-A v1.1 requires FFA_PARTITION_INFO_GET to return the size of each
partition information descriptor returned if
FFA_PARTITION_INFO_GET_COUNT_FLAG isn't set. So fix this by returning
the size of a FF-A v1.1 partition information descriptor in w3.

Fixes: a1c53023cc80 ("core: spmc: support FF-A 1.1")
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: exposes a fastcall SMC watchdog service

Default defines watchdog management SMC based service for non-secure
world to manage the watchdog supervised by OP-TEE secure world.
Non-secure

plat-stm32mp1: exposes a fastcall SMC watchdog service

Default defines watchdog management SMC based service for non-secure
world to manage the watchdog supervised by OP-TEE secure world.
Non-secure world system can leverage this service for example by
enabling a "arm,smc-wdt" compatible node with arm,smc-id=<0xbc000000>
property in its DT.

Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dts: stm32mp15: disable non-secure IWDG2 on ST boards

Disable non-secure IWDG2 watchdog device in ST boards stm32mp157a-dk1,
stm32mp157c-dk2, stm32mp157c-ed1 and stm32mp157c-ev1. This watchdog is
fu

dts: stm32mp15: disable non-secure IWDG2 on ST boards

Disable non-secure IWDG2 watchdog device in ST boards stm32mp157a-dk1,
stm32mp157c-dk2, stm32mp157c-ed1 and stm32mp157c-ev1. This watchdog is
fully under control of the non-secure world and OP-TEE is not expected
to interfere with it.

Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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dts: stm32mp15: enable secure IWDG1 on ST boards

Enable IWDG1 watchdog device in ST boards stm32mp157a-dk1,
stm32mp157c-dk2, stm32mp157c-ed1 and stm32mp157c-ev1.

Reviewed-by: Gatien Chevallier <gat

dts: stm32mp15: enable secure IWDG1 on ST boards

Enable IWDG1 watchdog device in ST boards stm32mp157a-dk1,
stm32mp157c-dk2, stm32mp157c-ed1 and stm32mp157c-ev1.

Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: arm: rpc_alloc: remove size limit for kernel payload

Removes the size limit of 1 page imposed in
thread_rpc_alloc_kernel_payload(). The purpose of this limit was to
error out early since the k

core: arm: rpc_alloc: remove size limit for kernel payload

Removes the size limit of 1 page imposed in
thread_rpc_alloc_kernel_payload(). The purpose of this limit was to
error out early since the kernel doesn't supply a list of physical pages
and the source of the error is not obvious at first glance. This is
now about to change so remove the limit since the kernel now may
supply the needed list of physical pages.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-mediatek: disable console when CFG_TEE_CORE_LOG_LEVEL is 0

Following our usage, it can be interesting to disable the console,
typically for a final product.

Acked-by: Jens Wiklander <jens.wikl

plat-mediatek: disable console when CFG_TEE_CORE_LOG_LEVEL is 0

Following our usage, it can be interesting to disable the console,
typically for a final product.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Co-developed-by: Guillaume La Roque <glaroque@baylibre.com>
Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Signed-off-by: Julien Masson <jmasson@baylibre.com>

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plat-stm32mp1: scmi_server: remove useless bounding of voltage levels

Remove bounding of regulators supported voltage levels according
to mix/max levels now that drivers take care of that.

Acked-by

plat-stm32mp1: scmi_server: remove useless bounding of voltage levels

Remove bounding of regulators supported voltage levels according
to mix/max levels now that drivers take care of that.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: set voltage list at pmic driver init

Bound stm32mp1_pmic supported voltage levels list to min/max voltage
level values set from the DT. This change free quite a bit of byte in
the hea

plat-stm32mp1: set voltage list at pmic driver init

Bound stm32mp1_pmic supported voltage levels list to min/max voltage
level values set from the DT. This change free quite a bit of byte in
the heap for this platform.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: ffa: fix FFA_NOTIFICATION_GET vm_id

handle_notification_get() has until now read the receiver endpoint ID
from the upper 16 bits of w1, but the receiver endpoint ID is passed in
the lower 16 b

core: ffa: fix FFA_NOTIFICATION_GET vm_id

handle_notification_get() has until now read the receiver endpoint ID
from the upper 16 bits of w1, but the receiver endpoint ID is passed in
the lower 16 bits of w1 passed to FFA_NOTIFICATION_GET. So fix the
function to read the lower 16 bits instead.

Fixes: 2e02a7374b86 ("core: ffa: add notifications with SPMC at S-EL1")
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: regulator: fix variable sized voltages fallback

Fix build issue reported by Clang on variable size field desc
not being located at the end of struct voltages_fallback. The
error was reporte

drivers: regulator: fix variable sized voltages fallback

Fix build issue reported by Clang on variable size field desc
not being located at the end of struct voltages_fallback. The
error was reported with a trace message like below:

core/include/drivers/regulator.h:118:4: warning: field 'voltages_fallback' with variable sized type 'struct voltages_fallback' not at the end of a struct or class is a GNU extension [-Wgnu-variable-sized-type-not-at-end]
} voltages_fallback;
^
core/drivers/regulator/regulator_fixed.c:27:19: warning: field 'regulator' with variable sized type 'struct regulator' not at the end of a struct or class is a GNU extension [-Wgnu-variable-sized-type-not-at-end]
struct regulator regulator;
^
2 warnings generated.

To achieve this the variable size field entries is removed from
struct regulator_voltages that is renamed struct regulator_voltages_desc.
API function regulator_supported_voltages() and regulator drivers handler
function ::supported_voltages are updated the get 2 input arguments the
second being the levels arrays which size is defined by the description
argument.

Impacted sources files are updated accordingly.

Fixes: 43c155ba111d ("drivers: regulator: list supported levels")
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-sam: fix warnings found during checkpatch

Remove 'extern' from function prototypes in .h files.
Align the parameters in functions.

Signed-off-by: Tony Han <tony.han@microchip.com>
Reviewed-by:

plat-sam: fix warnings found during checkpatch

Remove 'extern' from function prototypes in .h files.
Align the parameters in functions.

Signed-off-by: Tony Han <tony.han@microchip.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-aspeed: ast2700: use gic_init_v3()

Use gic_init_v3() with the GICR base address.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

core: arm: fix NS entry for secondary cores

The NS entry was originally stashed from LR to R5.
The commit f332e77c4b7c ("core: arm: refactor boot argument handling")
revised the LR preservation to R

core: arm: fix NS entry for secondary cores

The NS entry was originally stashed from LR to R5.
The commit f332e77c4b7c ("core: arm: refactor boot argument handling")
revised the LR preservation to R8. Therefore, the way to retrieve the
NS entry for secondary cores should be updated as well.

Fixes: f332e77c4b7c ("core: arm: refactor boot argument handling")
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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