core: remove user_ta_elf::is_main

The 'is_main' boolean in struct user_ta_elf is used in a single
function: load_elf_from_store(). At this point we have another way of
determining if the ELF we're l

core: remove user_ta_elf::is_main

The 'is_main' boolean in struct user_ta_elf is used in a single
function: load_elf_from_store(). At this point we have another way of
determining if the ELF we're loading is the main executable or not.
Therefore, user_ta_elf::is_main is not really needed. Remove it.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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Remove license notice from STMicroelectronics files

Since a while the source files license info are defined by SPDX
identifiers. We can safely remove the verbose license text from the
files that are

Remove license notice from STMicroelectronics files

Since a while the source files license info are defined by SPDX
identifiers. We can safely remove the verbose license text from the
files that are owned by either only STMicroelectronics or only both
Linaro and STMicroelectronics.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core_self_tests.c: add more SUB_OVERFLOW() tests

Adds more SUB_OVERFLOW() tests involving larger than 32-bit types and
mixed types.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed

core_self_tests.c: add more SUB_OVERFLOW() tests

Adds more SUB_OVERFLOW() tests involving larger than 32-bit types and
mixed types.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core_self_tests.c: add more ADD_OVERFLOW() tests

Adds more ADD_OVERFLOW() tests involving larger than 32-bit types and
mixed types.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed

core_self_tests.c: add more ADD_OVERFLOW() tests

Adds more ADD_OVERFLOW() tests involving larger than 32-bit types and
mixed types.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-mediatek: support generic RAM layout

Move default secure and non-secure Optee memory locations from
platform_config.h to conf.mk using the generic_ram_layout.

Signed-off-by: Etienne Carriere <

plat-mediatek: support generic RAM layout

Move default secure and non-secure Optee memory locations from
platform_config.h to conf.mk using the generic_ram_layout.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>

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plat-hikey: support generic RAM layout

Move default secure and non-secure Optee memory locations from
platform_config.h to conf.mk using the generic_ram_layout.

Signed-off-by: Etienne Carriere <eti

plat-hikey: support generic RAM layout

Move default secure and non-secure Optee memory locations from
platform_config.h to conf.mk using the generic_ram_layout.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey960)

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plat-d02: support generic RAM layout

Move default secure and non-secure Optee memory locations from
platform_config.h to conf.mk using the generic_ram_layout.

Signed-off-by: Etienne Carriere <etien

plat-d02: support generic RAM layout

Move default secure and non-secure Optee memory locations from
platform_config.h to conf.mk using the generic_ram_layout.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (D02)

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plat-stm: support generic RAM layout

Legacy stm platforms build env set CFG_DDR_TEETZ_RESERVED_START/_SIZE
and CFG_CORE_TZSRAM_EMUL_START/_SIZE. This change converts these into
CFG_TZxRAM_START/_SIZ

plat-stm: support generic RAM layout

Legacy stm platforms build env set CFG_DDR_TEETZ_RESERVED_START/_SIZE
and CFG_CORE_TZSRAM_EMUL_START/_SIZE. This change converts these into
CFG_TZxRAM_START/_SIZE and CFG_SHMEM_START/_SIZE from the platform
conf.mk.

Introduce stm platform specific configuration directive
CFG_STM_RSV_DRAM_STARTBYTES to carve out reserved bottom DDR from
REE main memory. Remove CFG_DDR_SECURE_BASE which is no more required.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (b2120, b2260)

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core: generic RAM layout

Include mm/generic_ram_layout.h at top of platform_config.h to
to get the TEE_RAM_*, TEE_TA_*, TEE_SHMEM_*, etc... defined from
generic configuration directives.

See descri

core: generic RAM layout

Include mm/generic_ram_layout.h at top of platform_config.h to
to get the TEE_RAM_*, TEE_TA_*, TEE_SHMEM_*, etc... defined from
generic configuration directives.

See description from generic_ram_layout.h head comments.

Suggested-by: Jordan Rhee <jordanrh@microsoft.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>

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arm32: stack unwinding for dynamically linked TAs

Update the ELF loader so that TAs that contain multiple ELF binaries
have a valid exception index table (EXIDX). This table is the entry
point for t

arm32: stack unwinding for dynamically linked TAs

Update the ELF loader so that TAs that contain multiple ELF binaries
have a valid exception index table (EXIDX). This table is the entry
point for the call stack unwinding code. When a TA uses shared
libraries, we create a new EXIDX table by joining all the tables found
in each ELF and patching them to account for the new table address.
Information about the ARM unwind tables can be found in [1].

Link: [1] https://wiki.linaro.org/KenWerner/Sandbox/libunwind?action=AttachFile&do=get&target=libunwind-LDS.pdf
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-imx: implement PL310 SMC protocol

When Windows runs in normal world, it expects the PL310 to be initially
disabled, and then invokes SMCs to enable it.
When CFG_PL310_SIP_PROTOCOL=y, the L2 cac

plat-imx: implement PL310 SMC protocol

When Windows runs in normal world, it expects the PL310 to be initially
disabled, and then invokes SMCs to enable it.
When CFG_PL310_SIP_PROTOCOL=y, the L2 cache will be left untouched until
the OS enables it.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jordan Rhee <jordanrh@microsoft.com>
Tested-by: Jordan Rhee <jordanrh@microsoft.com>

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plat-ls: consume CFG_SECONDARY_INIT_CNTFRQ

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Jordan Rhee <jordanrh@microsoft.com>

core: add CFG_SECONDARY_INIT_CNTFRQ

Add configuration option to initialize CNTFRQ on secondary cores
to the same value as the primary core.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
S

core: add CFG_SECONDARY_INIT_CNTFRQ

Add configuration option to initialize CNTFRQ on secondary cores
to the same value as the primary core.

Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Jordan Rhee <jordanrh@microsoft.com>

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core_self_tests:.c: add SUB_OVERFLOW() test

Add a test that fails with GCC 4.9.4 (Linaro GCC 4.9-2017.01) [1] with the
original overflow macros prior to commit 86ab9ffe82c6 ("util: fix fallback
SUB_

core_self_tests:.c: add SUB_OVERFLOW() test

Add a test that fails with GCC 4.9.4 (Linaro GCC 4.9-2017.01) [1] with the
original overflow macros prior to commit 86ab9ffe82c6 ("util: fix fallback
SUB_OVERFLOW() macro").

Link: [1] http://releases.linaro.org/components/toolchain/binaries/4.9-2017.01/arm-linux-gnueabihf/gcc-linaro-4.9.4-2017.01-x86_64_arm-linux-gnueabihf.tar.xz
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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core_self_tests:.c: add ADD_OVERFLOW() test

Add a test that fails with GCC 4.9.4 (Linaro GCC 4.9-2017.01) [1] with the
original overflow macros prior to commit 2b30433772af ("util: fix fallback
ADD_

core_self_tests:.c: add ADD_OVERFLOW() test

Add a test that fails with GCC 4.9.4 (Linaro GCC 4.9-2017.01) [1] with the
original overflow macros prior to commit 2b30433772af ("util: fix fallback
ADD_OVERFLOW() macro").

Link: [1] http://releases.linaro.org/components/toolchain/binaries/4.9-2017.01/arm-linux-gnueabihf/gcc-linaro-4.9.4-2017.01-x86_64_arm-linux-gnueabihf.tar.xz
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: arm32: add support for dynamically linked TAs

This commit adds support for 32-bit dynamically linked Trusted
Applications. The config flag for this feature is CFG_TA_DYNLINK,
default enabled.

core: arm32: add support for dynamically linked TAs

This commit adds support for 32-bit dynamically linked Trusted
Applications. The config flag for this feature is CFG_TA_DYNLINK,
default enabled.

Why do this? Several reasons:

1. Save space in the TA storage area. The OP-TEE core libraries
(libutee, libutils, libmpa) could very well be provided as shared
objects (.so) rather than archive files (.a). They would be installed
only once in the TA storage, instead of being duplicated inside each TA.
2. Allow upgrade of some libraries without re-linking the TAs.
3. Pave the way to sharing code pages between TAs, thus potentially
reducing the memory footprint of the TEE.

The ELF loader is updated as follows:

- Locate the dynamic section in the program headers (PT_DYNAMIC entry).
- Find the required external libraries by looking for DT_NEEDED entries
in the dynamic section. Libraries are .so files signed like TAs and
identified by a UUID so that the TA stores can be re-used. Using a UUID
is also more flexible, because a new versions of a library may keep the
same UUID or use another one.
- Load all the libraries.
- Process the dynamic relocations of type R_ARM_GLOB_DAT and
R_ARM_JUMP_SLOT by resolving symbols by name, in breadth first order.
- Map the library code and data into the user VA space.

The stack unwinding code will be updated in a later commit. As a result
only the main executable may be unwound ; stack dumps will stop if the
call stack goes inside a shared library.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (QEMU)
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey960 32/64)
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>

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core: arm32: do not unwind TA stack if .ARM.exidx is not present

If a TA has no exception index table (.ARM.exidx section), it is not
rejected by the loader but it cannot be unwound. Therefore, the

core: arm32: do not unwind TA stack if .ARM.exidx is not present

If a TA has no exception index table (.ARM.exidx section), it is not
rejected by the loader but it cannot be unwound. Therefore, the unwind
code should detect this condition to avoid crashing a bit further down.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>

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plat-rockchip: move some CFG_'s from platform_config.h to conf.mk

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>

core: move CFG_TEE_CORE_NB_CORE to conf.mk for various platforms

Update platforms d02, rcar, sam, hikey, mediatek, poplar, rpi3, sprd,
zynqmp and marvell.

These platforms no more defines CFG_ confi

core: move CFG_TEE_CORE_NB_CORE to conf.mk for various platforms

Update platforms d02, rcar, sam, hikey, mediatek, poplar, rpi3, sprd,
zynqmp and marvell.

These platforms no more defines CFG_ configuration directives as
NB_CORE was the last remaining one.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>

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plat-vexpress: move CFG_TEE_CORE_NB_CORE to platform conf.mk

Aggregate juno config.
Use same platform ordering in conf.mk and platform_config.h.

Signed-off-by: Etienne Carriere <etienne.carriere@li

plat-vexpress: move CFG_TEE_CORE_NB_CORE to platform conf.mk

Aggregate juno config.
Use same platform ordering in conf.mk and platform_config.h.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>

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Fix crash when bumping qemu to 2.12.0

The implementation of a memory access error handler in qemu/qemu@c79c0a3
is the cause of this crash. OP-TEE's PASSTHRU_READER driver had been
accessing invalid

Fix crash when bumping qemu to 2.12.0

The implementation of a memory access error handler in qemu/qemu@c79c0a3
is the cause of this crash. OP-TEE's PASSTHRU_READER driver had been
accessing invalid memory addresses, which were ignored till the handler
was added to qemu.

Fixes: https://github.com/OP-TEE/optee_os/issues/2291
Signed-off-by: Harikrishnan R <rharikrishnan95@gmail.com>
Acked-by: Joakim Bech <joakim.bech@linaro.org>

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plat-zynq7k: move some CFG_'s from platform_config.h to conf.mk

Legacy zyn7k does not allow reconfiguring the memory layout, hence
internal labels used are local: discard CFG_DDR_TEETZ_RESERVED_STAR

plat-zynq7k: move some CFG_'s from platform_config.h to conf.mk

Legacy zyn7k does not allow reconfiguring the memory layout, hence
internal labels used are local: discard CFG_DDR_TEETZ_RESERVED_START
CFG_DDR_TEETZ_RESERVED_SIZE, CFG_CORE_TZSRAM_EMUL_START in favor
of hardcoded addresses.

Discard local CFG_PUB_RAM_SIZE in favor to TEE_SHMEM_START/SIZE.

Remove useless DRAM0_BASE/_SIZE, DDR_PHYS_START, DDR_SIZE and
CFG_DDR_START/_SIZE.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Yan Yan <yan.yan@windriver.com>

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plat-stm: move some CFG_'s from platform_config.h to conf.mk

STM platform can be configured from CFG_DDR_START/_SIZE,
CFG_CORE_TZSRAM_EMUL_START and CFG_DDR_TEETZ_RESERVED_START/_SIZE.

Signed-off-b

plat-stm: move some CFG_'s from platform_config.h to conf.mk

STM platform can be configured from CFG_DDR_START/_SIZE,
CFG_CORE_TZSRAM_EMUL_START and CFG_DDR_TEETZ_RESERVED_START/_SIZE.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-ti: move some CFG_'s from platform_config.h to conf.mk

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Andrew F. Davis <afd@ti.com>

plat-ls: move some CFG_'s from platform_config.h to conf.mk

Remove CFG_DDR_TEETZ_RESERVED_START/_SIZE: internal to platform.
Remove CFG_PUB_RAM_SIZE, use TEE_SHMEM_SIZE instead.
Remove useless defin

plat-ls: move some CFG_'s from platform_config.h to conf.mk

Remove CFG_DDR_TEETZ_RESERVED_START/_SIZE: internal to platform.
Remove CFG_PUB_RAM_SIZE, use TEE_SHMEM_SIZE instead.
Remove useless definition of DDR_PHYS_START, DDR_SIZE, DRAM0_BASE/_SIZE,
CFG_DDR_START/_SIZE.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: Pankaj Gupta <pankaj.gupta@nxp.com>

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