plat-stm32mp1: add new API to erase SRAM3

Add new API TEE_Result stm32mp_syscfg_erase_sram3(void);
to be able to erase SRAM3 by hardware request.

Signed-off-by: Nicolas Toromanoff <nicolas.toromano

plat-stm32mp1: add new API to erase SRAM3

Add new API TEE_Result stm32mp_syscfg_erase_sram3(void);
to be able to erase SRAM3 by hardware request.

Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: syscfg: add dsb in syscfg driver

Add dsb in syscfg driver to guarantee that the request operations
are performed in SYSCFG register when the external API are called
and before to retu

plat-stm32mp1: syscfg: add dsb in syscfg driver

Add dsb in syscfg driver to guarantee that the request operations
are performed in SYSCFG register when the external API are called
and before to return to caller:
- stm32mp1_iocomp() in init sequence
- stm32mp_set_vddsd_comp_state() and stm32mp_set_hslv_state()
called by PWR driver

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: syscfg: set SYSCFG_CMPCR_READY_TIMEOUT_US to 10ms

CHange timeout to 10 ms instead of 1 ms.
On stm32mp13 we measure 1.5ms delay to have CMPCR_READY equal to 1.
Use 10 ms to be aligned

plat-stm32mp1: syscfg: set SYSCFG_CMPCR_READY_TIMEOUT_US to 10ms

CHange timeout to 10 ms instead of 1 ms.
On stm32mp13 we measure 1.5ms delay to have CMPCR_READY equal to 1.
Use 10 ms to be aligned with TF-A timeout.

Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: stm32mp1_pwr: fix compatible

Remove the unexpected comma in compatible name "st,stm32mp1,pwr-reg"

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Thomas

plat-stm32mp1: stm32mp1_pwr: fix compatible

Remove the unexpected comma in compatible name "st,stm32mp1,pwr-reg"

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: retrieve chip id from syscfg

Chip ID is read from SYSCFG. Add the associated read
function and new CHIP IDs.

Use the chip id to dynamically detect the CRYPTO hardware
support, the se

plat-stm32mp1: retrieve chip id from syscfg

Chip ID is read from SYSCFG. Add the associated read
function and new CHIP IDs.

Use the chip id to dynamically detect the CRYPTO hardware
support, the second CPU core, and CPU OPP.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: add stm32 CPU DVFS driver

drivers/cpu_opp.c implements dynamic voltage and frequency
scaling for the CPU.
It is used at boot time to set an higher operating point than
the one used to boot.

drivers: add stm32 CPU DVFS driver

drivers/cpu_opp.c implements dynamic voltage and frequency
scaling for the CPU.
It is used at boot time to set an higher operating point than
the one used to boot.
It will be used by the SCMI performance service.

Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_i2c: use compatible st,stm32mp15-i2c-non-secure

Change STM32 I2C driver to rely on the compatible DT property of the
node to store whether the bus is expected assigned to secure or
no

drivers: stm32_i2c: use compatible st,stm32mp15-i2c-non-secure

Change STM32 I2C driver to rely on the compatible DT property of the
node to store whether the bus is expected assigned to secure or
non-secure world. Using a non-secure I2C bus in OP-TEE on stm32mp1
platforms is something expected only on STM32MP15 variant for
compatibility with platform already supported in upstream Linux/U-Boot
components, as defined by st,stm32mp15-i2c-non-secure specific
compatible string ID.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: remove PMIC registering to shared_resources driver

Remove registering of STM32MP1 PMIC driver to shared_resources driver
that is deprecated since integration of the firewall framework

plat-stm32mp1: remove PMIC registering to shared_resources driver

Remove registering of STM32MP1 PMIC driver to shared_resources driver
that is deprecated since integration of the firewall framework and
will soon be removed.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: stm32mp1_stpmic: remove use of shared_resource for pinctrl

Remove use of shared_resources platform driver in STM32MP15 PMIC driver
to manage the secure state of the pins of a pinctrl

plat-stm32mp1: stm32mp1_stpmic: remove use of shared_resource for pinctrl

Remove use of shared_resources platform driver in STM32MP15 PMIC driver
to manage the secure state of the pins of a pinctrl state since this is
now managed using the firewall framework.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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plat-stm32mp1: remove unused stm32mp_nsec_can_access_pmic_regu()

Remove unused platform function stm32mp_nsec_can_access_pmic_regu().

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

plat-stm32mp1: remove unused stm32mp_nsec_can_access_pmic_regu()

Remove unused platform function stm32mp_nsec_can_access_pmic_regu().

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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dt-bindings: add platform specific ETZPC bindings

Define ETZPC bindings for STM32MP15 and STM32MP13 and add these
header files into the stm32mp_dt_bindings helper. While there, also
update some incl

dt-bindings: add platform specific ETZPC bindings

Define ETZPC bindings for STM32MP15 and STM32MP13 and add these
header files into the stm32mp_dt_bindings helper. While there, also
update some includes to fix the path errors.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: fix use after free in PMIC driver

Fix PMIC regulator levels arrays handling that missed a pointer reset
after the buffer is freed. At runtime, pmic_list_voltages() handler
function us

plat-stm32mp1: fix use after free in PMIC driver

Fix PMIC regulator levels arrays handling that missed a pointer reset
after the buffer is freed. At runtime, pmic_list_voltages() handler
function uses that reference and is expected to allocate back the
buffer in case non-secure world requests voltage enumeration for the
related regulator.

Fixes: a7990eb02b82 ("plat-stm32mp1: set voltage list at pmic driver init")
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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plat-stm32mp1: leverage qsort_int() in PMIC driver

Use recently added qsort_int() helper function.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jens Wiklander <jens.w

plat-stm32mp1: leverage qsort_int() in PMIC driver

Use recently added qsort_int() helper function.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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plat-stm32mp1: set voltage list at pmic driver init

Bound stm32mp1_pmic supported voltage levels list to min/max voltage
level values set from the DT. This change free quite a bit of byte in
the hea

plat-stm32mp1: set voltage list at pmic driver init

Bound stm32mp1_pmic supported voltage levels list to min/max voltage
level values set from the DT. This change free quite a bit of byte in
the heap for this platform.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: regulator: fix variable sized voltages fallback

Fix build issue reported by Clang on variable size field desc
not being located at the end of struct voltages_fallback. The
error was reporte

drivers: regulator: fix variable sized voltages fallback

Fix build issue reported by Clang on variable size field desc
not being located at the end of struct voltages_fallback. The
error was reported with a trace message like below:

core/include/drivers/regulator.h:118:4: warning: field 'voltages_fallback' with variable sized type 'struct voltages_fallback' not at the end of a struct or class is a GNU extension [-Wgnu-variable-sized-type-not-at-end]
} voltages_fallback;
^
core/drivers/regulator/regulator_fixed.c:27:19: warning: field 'regulator' with variable sized type 'struct regulator' not at the end of a struct or class is a GNU extension [-Wgnu-variable-sized-type-not-at-end]
struct regulator regulator;
^
2 warnings generated.

To achieve this the variable size field entries is removed from
struct regulator_voltages that is renamed struct regulator_voltages_desc.
API function regulator_supported_voltages() and regulator drivers handler
function ::supported_voltages are updated the get 2 input arguments the
second being the levels arrays which size is defined by the description
argument.

Impacted sources files are updated accordingly.

Fixes: 43c155ba111d ("drivers: regulator: list supported levels")
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: regulator: IO domain regulators for STM32MP13

Add STM32MP13 IO domains regulators allowing a consumer to
manage IO domains are voltage regulators.

Acked-by: Patrick Delaunay <patrick.delau

drivers: regulator: IO domain regulators for STM32MP13

Add STM32MP13 IO domains regulators allowing a consumer to
manage IO domains are voltage regulators.

Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Co-developed-by: Pascal Paillet <p.paillet@foss.st.com>
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: pwr: use IO_READ32_POLL_TIMEOUT()

Update stm32mp1_pwr driver to use IO_READ32_POLL_TIMEOUT() macro.

Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Gatien Chevall

plat-stm32mp1: pwr: use IO_READ32_POLL_TIMEOUT()

Update stm32mp1_pwr driver to use IO_READ32_POLL_TIMEOUT() macro.

Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: pwr: remove test on CFG_DRIVERS_REGULATOR

Remove tests on CFG_DRIVERS_REGULATOR value has the config switch
is always enabled on stm32mp1 platform.

Acked-by: Patrick Delaunay <patric

plat-stm32mp1: pwr: remove test on CFG_DRIVERS_REGULATOR

Remove tests on CFG_DRIVERS_REGULATOR value has the config switch
is always enabled on stm32mp1 platform.

Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: pwr: configure HSLV for fixed VDD supplied domain

Update PWR driver to configure High Speed Low Voltage mode for
fixed VDD supplied domain thanks to recently introduced SYSCFG HSLV
AP

plat-stm32mp1: pwr: configure HSLV for fixed VDD supplied domain

Update PWR driver to configure High Speed Low Voltage mode for
fixed VDD supplied domain thanks to recently introduced SYSCFG HSLV
API functions. This configuration must be appleid at boot time and
when resuming from a system low power state.

This configuration depends on VDD voltage level. It can protected by
a OTP bit (HW2 bit 13) described in the chip reference manual for when
VDD is supplied with a voltage below 2.5V. As stated in the chip
reference manual, enabling HSLV mode with a VDD voltage level above
2.7V may be destructive hence the driver panics in such case.

Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Co-developed-by: Pascal Paillet <p.paillet@foss.st.com>
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: syscfg: HLSV mode for IO domains

Add platform API functions stm32mp_set_hslv_state() and
stm32mp_enable_fixed_vdd_hslv() to configure High Speed Low Voltage
mode of IO domains.

Platf

plat-stm32mp1: syscfg: HLSV mode for IO domains

Add platform API functions stm32mp_set_hslv_state() and
stm32mp_enable_fixed_vdd_hslv() to configure High Speed Low Voltage
mode of IO domains.

Platform function stm32mp_enable_fixed_vdd_hslv() is designed for
fixed voltage IO domains that need to be enable at boot time only
since the supply voltage level never changes.

On STM32MP13 variants, SDMMC IO domains may not be supplied by fixed
voltage VDD but rather by a supply which voltage level can change
at runtime for example to support SD/MMC normative 1.8V and 3.3V voltage
modes. Therefore these IO domains require a runtime configuration
function implemented by stm32mp_set_hslv_state().

Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Co-developed-by: Pascal Paillet <p.paillet@foss.st.com>
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: syscfg: STM32MP13 dynamic IO compensation

Replace IO compensation API functions
stm32mp_syscfg_enable_io_compensation() and
stm32mp_syscfg_disable_io_compensation() with a new API fun

plat-stm32mp1: syscfg: STM32MP13 dynamic IO compensation

Replace IO compensation API functions
stm32mp_syscfg_enable_io_compensation() and
stm32mp_syscfg_disable_io_compensation() with a new API function
stm32mp_set_io_comp_by_index() dedicated to runtime configuration
of STM32MP13 SDMMC's domains IO compensation only.

On STM32MP15 variant, the configuration is enabled only during
initialization. On STM32MP13 variant, the same feature is also enabled
during initialization but the device embeds 2 more IO domains
(SDMMC1 and SDMMC2) for which the new API function allow runtime
reconfiguration support.

For sake of simplicity, keep related clocks always on.

Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Co-developed-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: syscfg: compute base address once

Compute SYSCFG virtual address only once.

Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@f

plat-stm32mp1: syscfg: compute base address once

Compute SYSCFG virtual address only once.

Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: syscfg: use U() macro

Use U() macro where applicable in stm32mp1_syscfg.c driver.

Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Gatien Chevallier <gatien.cheval

plat-stm32mp1: syscfg: use U() macro

Use U() macro where applicable in stm32mp1_syscfg.c driver.

Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: stm32mp1_pmic: regulators voltage list

Implements operator supported_voltages for stm32mp1 PMIC regulators
driver. A voltage list array is allocated during initialization and
freed up

plat-stm32mp1: stm32mp1_pmic: regulators voltage list

Implements operator supported_voltages for stm32mp1 PMIC regulators
driver. A voltage list array is allocated during initialization and
freed upon core initialization completion. This prevents wasting heap
when the list is queried only during boot time.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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plat-stm32mp1: stm32mp1_pmic: register pmic regulators

Ports stm32mp1 PMIC driver to the regulator framework and register
regulators from the secure DT content.

Acked-by: Gatien Chevallier <gatien.

plat-stm32mp1: stm32mp1_pmic: register pmic regulators

Ports stm32mp1 PMIC driver to the regulator framework and register
regulators from the secure DT content.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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