1PLATFORM_FLAVOR ?= mt8173 2 3CFG_ARM64_core ?= y 4 5include core/arch/arm/cpu/cortex-armv8-0.mk 6 7$(call force,CFG_8250_UART,y) 8$(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 9$(call force,CFG_WITH_ARM_TRUSTED_FW,y) 10 11ifneq ($(CFG_ARM64_core),y) 12$(call force,CFG_ARM32_core,y) 13endif 14 15# default DRAM base address 16CFG_DRAM_BASE ?= 0x40000000 17 18# default DRAM size 1 GiB 19CFG_DRAM_SIZE ?= 0x40000000 20 21ifeq ($(PLATFORM_FLAVOR),mt8173) 22# 2**1 = 2 cores per cluster 23$(call force,CFG_TEE_CORE_NB_CORE,4) 24$(call force,CFG_CORE_CLUSTER_SHIFT,1) 25CFG_TZDRAM_START ?= 0xbe000000 26CFG_TZDRAM_SIZE ?= 0x01e00000 27CFG_SHMEM_START ?= 0xbfe00000 28CFG_SHMEM_SIZE ?= 0x00200000 29endif 30 31ifeq ($(PLATFORM_FLAVOR),mt8175) 32$(call force,CFG_TEE_CORE_NB_CORE,4) 33$(call force,CFG_CORE_CLUSTER_SHIFT,2) 34$(call force,CFG_ARM_GICV3,y) 35$(call force,CFG_GIC,y) 36CFG_TZDRAM_START ?= 0x43200000 37CFG_TZDRAM_SIZE ?= 0x00a00000 38CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE)) 39CFG_SHMEM_SIZE ?= 0x00200000 40endif 41 42ifeq ($(PLATFORM_FLAVOR),mt8516) 43$(call force,CFG_TEE_CORE_NB_CORE,4) 44$(call force,CFG_CORE_CLUSTER_SHIFT,2) 45CFG_TZDRAM_START ?= 0x4fd00000 46CFG_TZDRAM_SIZE ?= 0x00300000 47CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE)) 48CFG_SHMEM_SIZE ?= 0x00200000 49endif 50 51ifeq ($(PLATFORM_FLAVOR),mt8183) 52$(call force,CFG_TEE_CORE_NB_CORE,8) 53$(call force,CFG_CORE_CLUSTER_SHIFT,2) 54$(call force,CFG_ARM_GICV3,y) 55$(call force,CFG_GIC,y) 56CFG_TZDRAM_START ?= 0x4fd00000 57CFG_TZDRAM_SIZE ?= 0x00300000 58CFG_SHMEM_START ?= ($(CFG_TZDRAM_START) + $(CFG_TZDRAM_SIZE)) 59CFG_SHMEM_SIZE ?= 0x00200000 60endif 61