| #
720ffc4a |
| 24-Oct-2025 |
Thomas Bourgoin <thomas.bourgoin@foss.st.com> |
dts: stm32: add i2c1 to i2c3 nodes in stm32mp211.dtsi
The STM32MP23x has a total of 3 instances of I2C.
Add all of them in stm32mp231.dtsi.
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.c
dts: stm32: add i2c1 to i2c3 nodes in stm32mp211.dtsi
The STM32MP23x has a total of 3 instances of I2C.
Add all of them in stm32mp231.dtsi.
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
show more ...
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| #
859c5213 |
| 30-Jun-2025 |
Clément Le Goffic <clement.legoffic@foss.st.com> |
dts: stm32: add IWDG[1-2] nodes in stm32mp21x soc device-tree
Add support for IWDG[1-2] in stm32mp21x soc device-trees.
Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
Acked-by: Gat
dts: stm32: add IWDG[1-2] nodes in stm32mp21x soc device-tree
Add support for IWDG[1-2] in stm32mp21x soc device-trees.
Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| #
d8faf33f |
| 13-Jun-2025 |
Gabriel Fernandez <gabriel.fernandez@foss.st.com> |
dts: stm32: enable Reset and Clock Controller for stm32mp215f-dk
Add device tree files for stm32mp215f-dk board.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Acked-by: Etienne C
dts: stm32: enable Reset and Clock Controller for stm32mp215f-dk
Add device tree files for stm32mp215f-dk board.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
show more ...
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| #
e48588a3 |
| 01-Oct-2023 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
dts: st: introduce stm32mp21 SoCs family
STM32MP21 family is composed of 3 SoCs defined as following:
-STM32MP211: common part composed of 1*Cortex-A35, common peripherals
like SDMMC, UART, SPI, I2
dts: st: introduce stm32mp21 SoCs family
STM32MP21 family is composed of 3 SoCs defined as following:
-STM32MP211: common part composed of 1*Cortex-A35, common peripherals
like SDMMC, UART, SPI, I2C, parallel display, 1*ETH ...
-STM32MP213: STM32MP211 + a second ETH, CAN-FD.
-STM32MP215: STM32MP213 + Display and CSI2.
A second diversity layer exists for security features/ A35 frequency:
-STM32MP21xY, "Y" gives information:
-Y = A means A35@1.2GHz + no CRYP IP and no secure boot.
-Y = C means A35@1.2GHz + cryp IP and secure boot.
-Y = D means A35@1.5GHz + no CRYP IP and no secure boot.
-Y = F means A35@1.5GHz + cryp IP and secure boot.
Available packages are:
STM32MP21xxAM: 14x14mm/TFBGA289 123 ios
STM32MP21xxAN: 11x11mm/VFBGA273 123 ios
STM32MP21xxAL: 10x10mm/VFBGA361 123 ios
STM32MP21xxAO: 8x8mm/VFBGA225 98 ios
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
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