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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 //////////////////////////////////////////////////////////////////////////////////////////////////// 96 /// 97 /// @file drvCMDQ.h 98 /// @brief CMDQ Driver Interface 99 /// @author MStar Semiconductor,Inc. 100 /// 101 //////////////////////////////////////////////////////////////////////////////////////////////////// 102 103 #ifndef _DRVCMDQ_H_ 104 #define _DRVCMDQ_H_ 105 106 #include "MsTypes.h" 107 #include "MsCommon.h" 108 109 #ifdef __cplusplus 110 extern "C" 111 { 112 #endif 113 114 //-------------------------------------------------------------------------------------------------- 115 // Define 116 //-------------------------------------------------------------------------------------------------- 117 #define AES_ENABLE 0x01 118 #define TDES_ENABLE 0x10 119 #define WORD_MASK 0x0000000F 120 121 #define DIRECT_MODE 0x01 122 #define INCREMENT_MODE 0x00 123 #define RING_BUFFER_MODE 0x04 124 125 #define MSIF_CMDQ_LIB_CODE {'C','M','D','Q'} //Lib code 126 #define MSIF_CMDQ_LIBVER {'0','1'} //LIB version 127 #define MSIF_CMDQ_BUILDNUM {'0','1'} //Build Number 128 #define MSIF_CMDQ_CHANGELIST {'0','0','0','0','0','0','0','0'} //P4 ChangeList Number 129 130 #define CMDQ_DRV_VERSION /* Character String for DRV/API version */ \ 131 MSIF_TAG, /* 'MSIF' */ \ 132 MSIF_CLASS, /* '00' */ \ 133 MSIF_CUS, /* 0x0000 */ \ 134 MSIF_MOD, /* 0x0000 */ \ 135 MSIF_CHIP, \ 136 MSIF_CPU, \ 137 MSIF_CMDQ_LIB_CODE, /* IP__ */ \ 138 MSIF_CMDQ_LIBVER, /* 0.0 ~ Z.Z */ \ 139 MSIF_CMDQ_BUILDNUM, /* 00 ~ 99 */ \ 140 MSIF_CMDQ_CHANGELIST, /* CL# */ \ 141 MSIF_OS 142 143 typedef enum 144 { 145 E_DRVCMDQ_DBG_Release = 0, 146 E_DRVCMDQ_DBG_L1, // display debug msg 147 } DrvCMDQ_DbgLevel; 148 149 // Trigger Bus 150 typedef enum // wait command signal defination 151 { 152 GE_GE2CMDQ_TRI = 0, 153 BDMA_INT_BDMA_0, 154 BDMA_INT_BDMA_1, 155 GPU_GPU2CMDQ_TRIG, 156 GOPG0_GOP_CMDQ_INT_0, 157 GOPG1_GOP_CMDQ_INT_1, 158 GOPG2_GOP_CMDQ_INT_2, 159 GOPG3_GOP_CMDQ_INT_3, 160 SCALAR_SC2CMDQ_TRIG_0, 161 SCALAR_SC2CMDQ_TRIG_1, 162 SCALAR_SC2CMDQ_TRIG_2, 163 SCALAR_SC2CMDQ_TRIG_3, 164 AESDMA_CMDQDMA_FINISHED, 165 VOP_DCM2GOP_VDE, 166 VOP_DCS2GOP_VDE, 167 168 NONE_USED_SIGNAL = 15, 169 }EN_CMDQTriggerBus_ID; 170 171 #define CMDQ_Write_RIU_Command 'W' 172 #define CMDQ_Polling_RIU_EQ_Command 'p' 173 #define CMDQ_Polling_RIU_NEQ_Command 'C' 174 #define CMDQ_Wait_SIG_Command 'F' 175 176 //-------------------------------------------------------------------------------------------------- 177 // Driver Capability 178 //-------------------------------------------------------------------------------------------------- 179 180 //-------------------------------------------------------------------------------------------------- 181 // Local variable 182 //----------------------------------------------------------------------------------------------- 183 #define CMDQ_DUMMY_ZERO 0x00000000 184 #define CMDQ_DUMMY_BIT_0x00 0x00000001 185 #define CMDQ_DUMMY_BIT_0x01 0x00000002 186 #define CMDQ_DUMMY_BIT_0x02 0x00000004 187 #define CMDQ_DUMMY_BIT_0x03 0x00000008 188 #define CMDQ_DUMMY_BIT_0x04 0x00000010 189 #define CMDQ_DUMMY_BIT_0x05 0x00000020 190 #define CMDQ_DUMMY_BIT_0x06 0x00000040 191 #define CMDQ_DUMMY_BIT_0x07 0x00000080 192 #define CMDQ_DUMMY_BIT_0x08 0x00000100 193 #define CMDQ_DUMMY_BIT_0x09 0x00000200 194 #define CMDQ_DUMMY_BIT_0x0A 0x00000400 195 #define CMDQ_DUMMY_BIT_0x0B 0x00000800 196 #define CMDQ_DUMMY_BIT_0x0C 0x00001000 197 #define CMDQ_DUMMY_BIT_0x0D 0x00002000 198 #define CMDQ_DUMMY_BIT_0x0E 0x00004000 199 #define CMDQ_DUMMY_BIT_0x0F 0x00008000 200 //-------------------------------------------------------------------------------------------------- 201 // Type and Structure 202 //-------------------------------------------------------------------------------------------------- 203 struct COMMAND_ARRAY_FORMAT 204 { 205 MS_U8 operation; 206 MS_U32 destionation_address; // the writed register address 207 MS_U16 destionation_value; // value writed to register 208 MS_U16 mask; // value of mask 209 }; 210 211 typedef struct COMMAND_ARRAY_FORMAT CAF_Struct; 212 typedef CAF_Struct *CAF_Struct_Pointer; 213 214 struct CMDQ_HEAD 215 { 216 MS_SIZE Command_Number; 217 CAF_Struct_Pointer Pointer_To_CAFArray; 218 }; 219 typedef struct CMDQ_HEAD CH_Struct; 220 typedef CH_Struct *CH_Struct_Pointer; 221 222 223 /// CMDQ DDI return value 224 typedef MS_U32 DRVCMDQ_RESULT; 225 226 /// @name DRVCMDQ_RESULT 227 /// @ref DRVCMDQ_RESULT 228 /// return value 229 /// @{ 230 #define DRVCMDQ_OK 0x00000000 231 #define DRVCMDQ_FAIL 0x00000001 232 #define DRVCMDQ_INVALID_PARAM 0x00000002 233 #define DRVCMDQ_FUNC_ERROR 0x00000003 234 #define DRVCMDQ_MIU_ADDR_ERROR 0x00000004 235 #define DRVCMDQ_CMDQ_FULL 0x00000005 236 237 /// @} 238 239 #define CMDQ_DMA_DONE 0x00010000 240 #define CMDQ_DMA_PAUSE 0x00020000 241 #define CMDQ_STATES_GROUP (CMDQ_DMA_DONE | \ 242 CMDQ_DMA_PAUSE ) 243 244 245 #define CMDQ_VERSION 0x00000001 246 247 /*! \defgroup SYS SYS modules 248 The CMDQ(COMMAND QUEUE) reads a set of commands from memory and then decodes commands and execute it. There are five actions as below: 249 - Null: do nothing but execute next command. 250 - Write: write RIU command to XARB. 251 - Wait: wait for a specified bit of trigger bus and then execute next command. 252 - Polling_eq: read RIU data and check specified bits. If it is equal, next command will be executed. 253 - Polling_neq: read RIU data and check specified bits. If it is not equal, next command will be executed.\n 254 For more information,see \link SYS_CMDQ Hardware command Q interface (drvCMDQ.h) \endlink \n 255 256 MMIO maps the RIU to userspace so that drivers are capable to access it directly.\n 257 For more information,see \link MMIO_BASIC basic mmio interface \endlink \n 258 259 MsOS is an OS abstraction layer, which is for utopia drivers 260 not to consider different system API usage on each platform.\n 261 For more information,see \link MSOS MsOS interface (MsOS.h) \endlink \n 262 263 * \defgroup SYS_CMDQ Hardware command Q interface (drvCMDQ.h) 264 * \ingroup SYS 265 266 The CMDQ(COMMAND QUEUE) reads a set of commands from memory and then decodes commands and execute it. There are five actions as below: 267 - Null: do nothing but execute next command. 268 - Write: write RIU command to XARB. 269 - Wait: wait for a specified bit of trigger bus and then execute next command. 270 - Polling_eq: read RIU data and check specified bits. If it is equal, next command will be executed. 271 - Polling_neq: read RIU data and check specified bits. If it is not equal, next command will be executed. 272 These five commands have their own format and each command occupies 64 bits. Therefore, for command queue, a 128-bit MIU interface of this IP, two commands are placed at the same address 273 274 The CMDQ execution mode we use is Ring-Buffer Mode. There are two address pointers, r and w, move around a given memory space, which is limited between start pointer and end pointer. 275 Software part tells cmdq where is the current write address pointer(w), and cmdq will do the command sets that software writes. 276 Once software finishes storing commands in memory, it needs write current write address pointer(sw_wr_mi_wadr) and generate a trigger(mov_cmd_ptr) to inform cmdq. 277 If software wants to know where cmdq reads, the trigger signal, rd_mi_radr_trig, needs to send to cmdq to grab current read address pointer (rd_mi_radr). 278 Note that current read address pointer does not represent all data that is behind current read address pointer is sent to cmdq. 279 280 <b> CMDQ Block Diagram: </b> \n 281 \image html drvCMDQ_block_diagram.png 282 283 <b> Command Format: </b> \n 284 \image html drvCMDQ_command_format.png 285 286 <b> Commands in Memory: </b> \n 287 \image html drvCMDQ_command_in_memory.png 288 289 <b> Null Command: </b> \n 290 \image html drvCMDQ_null_cmd.png 291 292 <b> Write Command: </b> \n 293 \image html drvCMDQ_write_cmd.png 294 295 <b> Wait Command: </b> \n 296 \image html drvCMDQ_wait_cmd.png 297 298 <b> Polling eq Command: </b> \n 299 \image html drvCMDQ_polling_eq_cmd.png 300 301 <b> Polling neq Command: </b> \n 302 \image html drvCMDQ_polling_neq_cmd.png 303 304 <b> Ring-Buffer: </b> \n 305 \image html drvCMDQ_ring_buffer.png 306 307 * \defgroup CMDQ_BASIC 308 * \ingroup SYS_CMDQ 309 */ 310 311 /// CMDQ notification function 312 313 314 //-------------------------------------------------------------------------------------------------- 315 // Function Prototype 316 //-------------------------------------------------------------------------------------------------- 317 //------------------------------------------------------------------------------------------------- 318 /// Initialize CMDQ driver setting, including mmio and mutex 319 /// @ingroup CMDQ_BASIC 320 /// @param CMDQ_MIU_SELECT 321 /// @return 322 /// @return 323 //------------------------------------------------------------------------------------------------- 324 DRVCMDQ_RESULT MDrv_CMDQ_Init(MS_U32 CMDQ_MIU_SELECT); 325 326 //------------------------------------------------------------------------------------------------- 327 /// Get CMDQ driver lib version 328 /// @ingroup CMDQ_BASIC 329 /// @param ppVersion 330 /// @return 331 /// @return 332 //------------------------------------------------------------------------------------------------- 333 // DRVCMDQ_RESULT MDrv_CMDQ_GetLibVer(const MSIF_Version **ppVersion); 334 335 //------------------------------------------------------------------------------------------------- 336 /// Trigger CMDQ hw to do cmd 337 /// @ingroup CMDQ_BASIC 338 /// @param bStart 339 /// @return 340 /// @return 341 //------------------------------------------------------------------------------------------------- 342 // DRVCMDQ_RESULT MDrv_CMDQ_Start(MS_BOOL bStart); 343 //------------------------------------------------------------------------------------------------- 344 /// Set the Start and End address of CMDQ DRAM(use miu_offset and miu_select to get phy_addr) 345 /// @ingroup CMDQ_BASIC 346 /// @param SmallAddr 347 /// @param BigAddr 348 /// @param miu_select 349 /// @return 350 /// @return 351 //------------------------------------------------------------------------------------------------- 352 DRVCMDQ_RESULT MDrv_CMDQ_Get_Memory_Size(MS_PHY SmallAddr, MS_PHY BigAddr, MS_U32 miu_select); 353 354 //------------------------------------------------------------------------------------------------- 355 /// Set Start and End address to RIU throw hal layer 356 /// @ingroup CMDQ_BASIC 357 /// @param StartAddr 358 /// @param EndAddr 359 /// @return 360 /// @return 361 //------------------------------------------------------------------------------------------------- 362 // DRVCMDQ_RESULT MDrv_CMDQ_Set_Buffer(MS_PHY StartAddr, MS_PHY EndAddr); 363 //------------------------------------------------------------------------------------------------- 364 /// To be remove 365 /// @ingroup CMDQ_BASIC 366 /// @return 367 /// @return 368 //------------------------------------------------------------------------------------------------- 369 // DRVCMDQ_RESULT MDrv_CMDQ_Reset(void); 370 371 //------------------------------------------------------------------------------------------------- 372 /// To be remove 373 /// @ingroup CMDQ_BASIC 374 /// @return 375 /// @return 376 //------------------------------------------------------------------------------------------------- 377 // DRVCMDQ_RESULT MDrv_CMDQ_Exit(void); 378 379 //------------------------------------------------------------------------------------------------- 380 /// To be remove 381 /// @ingroup CMDQ_BASIC 382 /// @return 383 /// @return 384 //------------------------------------------------------------------------------------------------- 385 // DRVCMDQ_RESULT MDrv_CMDQ_Stop(void); 386 387 //------------------------------------------------------------------------------------------------- 388 /// Set debug_level(for print) 389 /// @ingroup CMDQ_BASIC 390 /// @param DbgLevel 391 /// @return 392 /// @return 393 //------------------------------------------------------------------------------------------------- 394 DRVCMDQ_RESULT MDrv_CMDQ_SetDbgLevel(DrvCMDQ_DbgLevel DbgLevel); 395 396 //------------------------------------------------------------------------------------------------- 397 /// Receive CMDQ command 398 /// @ingroup CMDQ_BASIC 399 /// @param New_IP_Head 400 /// @return 401 /// @return 402 //------------------------------------------------------------------------------------------------- 403 // DRVCMDQ_RESULT MDrv_CMDQ_Receive(CH_Struct_Pointer New_IP_Head); 404 405 //------------------------------------------------------------------------------------------------- 406 /// Insert null command 407 /// @ingroup CMDQ_BASIC 408 /// @param Need_Null_Number 409 //------------------------------------------------------------------------------------------------- 410 // void Insert_Redundant_Null(MS_U32 Need_Null_Number); 411 412 //------------------------------------------------------------------------------------------------- 413 /// Transfer command to memory 414 /// @ingroup CMDQ_BASIC 415 /// @param Array_Command 416 /// @param Number_Array_Command 417 //------------------------------------------------------------------------------------------------- 418 // void MDrv_CMDQ_Transfer(CAF_Struct_Pointer Array_Command, MS_SIZE Number_Array_Command); 419 420 //------------------------------------------------------------------------------------------------- 421 /// Set dummy register for CMDQ 422 /// @ingroup CMDQ_BASIC 423 /// @param dummyAddr 424 //------------------------------------------------------------------------------------------------- 425 // void MDrv_CMDQ_Set_dummy_Address(MS_U32 DummyValue); 426 //------------------------------------------------------------------------------------------------- 427 /// Set CMD buffer in which MIU 428 /// @ingroup CMDQ_BASIC 429 /// @param miu_select 430 //------------------------------------------------------------------------------------------------- 431 // void MDrv_CMDQ_Set_MIU_SELECT(MS_U32 miu_select); 432 433 //------------------------------------------------------------------------------------------------- 434 /// Set CMDQ wait command timeout 435 /// @ingroup CMDQ_BASIC 436 /// @param time 437 /// @param ratio 438 /// @return 439 /// @return 440 //------------------------------------------------------------------------------------------------- 441 // DRVCMDQ_RESULT MDrv_CMDQ_Set_timer_ratio(MS_U32 time,MS_U32 ratio); 442 443 //------------------------------------------------------------------------------------------------- 444 /// Print command of CMDQ�Afor debug usage 445 /// @ingroup CMDQ_BASIC 446 /// @return 447 /// @return 448 //------------------------------------------------------------------------------------------------- 449 // DRVCMDQ_RESULT MDrv_CMDQ_Printf_Crash_Command(void); 450 451 //------------------------------------------------------------------------------------------------- 452 /// Produce wait_command for some specific HW IP behaviour 453 /// @ingroup CMDQ_BASIC 454 /// @param WaitTrigger_Bus_Command 455 /// @param u16Tigger_ID 456 /// @param bDetect_Falling_Mode 457 //------------------------------------------------------------------------------------------------- 458 // void MDrv_CMDQ_Gen_WaitTrigger_Bus_Command(CAF_Struct_Pointer WaitTrigger_Bus_Command, EN_CMDQTriggerBus_ID u16Tigger_ID, MS_BOOL bDetect_Falling_Mode); 459 460 //------------------------------------------------------------------------------------------------- 461 /// Get CMDQ write point 462 /// @ingroup CMDQ_BASIC 463 /// @return 464 /// @return 465 //------------------------------------------------------------------------------------------------- 466 // MS_U32 MDrv_CMDQ_GetWritePoint(void); 467 468 //------------------------------------------------------------------------------------------------- 469 /// Str_usage 470 /// @ingroup CMDQ_BASIC 471 /// @param u16PowerState 472 /// @return 473 /// @return 474 //------------------------------------------------------------------------------------------------- 475 MS_U32 MDrv_CMDQ_SetPowerState(EN_POWER_MODE u16PowerState); 476 477 #ifdef __cplusplus 478 } 479 #endif 480 481 482 #endif // _DRVCMDQ_H_ 483