1*53ee8cc1Swenshuai.xi #ifndef __MHAL_CMD_SERVICE_HH__ 2*53ee8cc1Swenshuai.xi #define __MHAL_CMD_SERVICE_HH__ 3*53ee8cc1Swenshuai.xi 4*53ee8cc1Swenshuai.xi #define MHAL_CMDQ_POLLNEQ_TIMEOUT (0x1<<8) 5*53ee8cc1Swenshuai.xi #define MHAL_CMDQ_POLLEQ_TIMEOUT (0x1<<9) 6*53ee8cc1Swenshuai.xi #define MHAL_CMDQ_WAIT_TIMEOUT (0x1<<10) 7*53ee8cc1Swenshuai.xi #define MHAL_CMDQ_WRITE_TIMEOUT (0x1<<12) 8*53ee8cc1Swenshuai.xi 9*53ee8cc1Swenshuai.xi #define MHAL_CMDQ_ERROR_STATUS (MHAL_CMDQ_POLLNEQ_TIMEOUT|MHAL_CMDQ_POLLEQ_TIMEOUT |MHAL_CMDQ_WAIT_TIMEOUT|MHAL_CMDQ_WRITE_TIMEOUT) 10*53ee8cc1Swenshuai.xi 11*53ee8cc1Swenshuai.xi typedef enum 12*53ee8cc1Swenshuai.xi { 13*53ee8cc1Swenshuai.xi E_MHAL_CMDQEVE_S0_MDW_W_DONE, //Only for cmdq1&cmdq5 14*53ee8cc1Swenshuai.xi E_MHAL_CMDQEVE_S0_MGW_FIRE, //Only for cmdq1&cmdq5 15*53ee8cc1Swenshuai.xi E_MHAL_CMDQEVE_S1_MDW_W_DONE, //Only for cmdq2&cmdq4 16*53ee8cc1Swenshuai.xi E_MHAL_CMDQEVE_S1_MGW_FIRE, //Only for cmdq2&cmdq4 17*53ee8cc1Swenshuai.xi E_MHAL_CMDQEVE_DMAGEN_TRIGGER0, //Only for cmdq2&cmdq4 18*53ee8cc1Swenshuai.xi E_MHAL_CMDQEVE_DMAGEN_TRIGGER1, //Only for cmdq2&cmdq4 19*53ee8cc1Swenshuai.xi E_MHAL_CMDQEVE_BDMA_TRIGGER0, //Only for cmdq3&cmdq5 20*53ee8cc1Swenshuai.xi E_MHAL_CMDQEVE_BDMA_TRIGGER1, //Only for cmdq3 21*53ee8cc1Swenshuai.xi E_MHAL_CMDQEVE_IVE_CMDQ_TRIG, //Only for cmdq3&cmdq5 22*53ee8cc1Swenshuai.xi E_MHAL_CMDQEVE_LDC_CMDQ_TRIG, //Only for cmdq1&cmdq3 23*53ee8cc1Swenshuai.xi E_MHAL_CMDQEVE_GE_CMDQ_TRIG, //Only for cmdq1&cmdq3 24*53ee8cc1Swenshuai.xi E_MHAL_CMDQEVE_REG_DUMMY_TRIG, //Only for cmdq1&cmdq2&cmdq4&cmdq5 25*53ee8cc1Swenshuai.xi E_MHAL_CMDQEVE_CORE1_MHE_TRIG, //Only for ALL 26*53ee8cc1Swenshuai.xi E_MHAL_CMDQEVE_CORE0_MHE_TRIG, //Only for ALL 27*53ee8cc1Swenshuai.xi E_MHAL_CMDQEVE_CORE1_MFE_TRIG, //Only for ALL 28*53ee8cc1Swenshuai.xi E_MHAL_CMDQEVE_CORE0_MFE_TRIG, //Only for ALL 29*53ee8cc1Swenshuai.xi E_MHAL_CMDQEVE_DIP_TRIG, //Only for ALL 30*53ee8cc1Swenshuai.xi E_MHAL_CMDQEVE_GOP_TRIG4, //Only for ALL 31*53ee8cc1Swenshuai.xi E_MHAL_CMDQEVE_GOP_TRIG2, //Only for ALL 32*53ee8cc1Swenshuai.xi E_MHAL_CMDQEVE_GOP_TRIG013, //Only for ALL 33*53ee8cc1Swenshuai.xi E_MHAL_CMDQEVE_SC_TRIG2, //Only for ALL 34*53ee8cc1Swenshuai.xi E_MHAL_CMDQEVE_SC_TRIG013, //Only for ALL 35*53ee8cc1Swenshuai.xi E_MHAL_CMDQEVE_ISP_TRIG, //Only for ALL 36*53ee8cc1Swenshuai.xi E_MHAL_CMDQEVE_MAX 37*53ee8cc1Swenshuai.xi } MHAL_CMDQ_EventId_e; 38*53ee8cc1Swenshuai.xi 39*53ee8cc1Swenshuai.xi typedef enum 40*53ee8cc1Swenshuai.xi { 41*53ee8cc1Swenshuai.xi E_MHAL_CMDQ_ID_VPE = 0, 42*53ee8cc1Swenshuai.xi E_MHAL_CMDQ_ID_DIVP, 43*53ee8cc1Swenshuai.xi E_MHAL_CMDQ_ID_H265_VENC0, 44*53ee8cc1Swenshuai.xi E_MHAL_CMDQ_ID_H265_VENC1, 45*53ee8cc1Swenshuai.xi E_MHAL_CMDQ_ID_H264_VENC0, 46*53ee8cc1Swenshuai.xi E_MHAL_CMDQ_ID_MAX 47*53ee8cc1Swenshuai.xi } MHAL_CMDQ_Id_e; 48*53ee8cc1Swenshuai.xi 49*53ee8cc1Swenshuai.xi typedef struct MHAL_CMDQ_BufDescript_s 50*53ee8cc1Swenshuai.xi { 51*53ee8cc1Swenshuai.xi MS_U32 u32CmdqBufSize; 52*53ee8cc1Swenshuai.xi MS_U16 u32CmdqBufSizeAlign; 53*53ee8cc1Swenshuai.xi MS_U32 u32MloadBufSize; 54*53ee8cc1Swenshuai.xi MS_U16 u16MloadBufSizeAlign; 55*53ee8cc1Swenshuai.xi } MHAL_CMDQ_BufDescript_t; 56*53ee8cc1Swenshuai.xi 57*53ee8cc1Swenshuai.xi typedef struct MHAL_CMDQ_Mmap_Info_s 58*53ee8cc1Swenshuai.xi { 59*53ee8cc1Swenshuai.xi MS_U8 u8CmdqMmapGid; // Mmap ID 60*53ee8cc1Swenshuai.xi MS_U8 u8CmdqMmapLayer; // Memory Layer 61*53ee8cc1Swenshuai.xi MS_U8 u8CmdqMmapMiuNo; // 0: MIU0 / 1: MIU1 / 2: MIU2 62*53ee8cc1Swenshuai.xi MS_U8 u8CmdqMmapCMAHid; // Memory CMAHID 63*53ee8cc1Swenshuai.xi MS_U32 u32CmdqMmapPhyAddr; // phy Memory Address 64*53ee8cc1Swenshuai.xi MS_U32 u32CmdqMmapVirAddr; // vir Memory Address 65*53ee8cc1Swenshuai.xi MS_U32 u32CmdqMmapSize; // Memory Size 66*53ee8cc1Swenshuai.xi MS_U32 u32CmdqMmapAlign; // Memory Align 67*53ee8cc1Swenshuai.xi MS_U32 u32CmdqMmapMemoryType; 68*53ee8cc1Swenshuai.xi 69*53ee8cc1Swenshuai.xi MS_U8 u8MloadMmapGid; // Mmap ID 70*53ee8cc1Swenshuai.xi MS_U8 u8MloadMmapLayer; // Memory Layer 71*53ee8cc1Swenshuai.xi MS_U8 u8MloadMmapMiuNo; // 0: MIU0 / 1: MIU1 / 2: MIU2 72*53ee8cc1Swenshuai.xi MS_U8 u8MloadMmapCMAHid; // Memory CMAHID 73*53ee8cc1Swenshuai.xi MS_U32 u32MloadMmapPhyAddr; //phy Memory Address 74*53ee8cc1Swenshuai.xi MS_U32 u32MloadMmapVirAddr; //vir Memory Address 75*53ee8cc1Swenshuai.xi MS_U32 u32MloadMmapSize; // Memory Size 76*53ee8cc1Swenshuai.xi MS_U32 u32MloadMmapAlign; // Memory Align 77*53ee8cc1Swenshuai.xi MS_U32 u32MloadMmapMemoryType; 78*53ee8cc1Swenshuai.xi } MHAL_CMDQ_Mmap_Info_t; 79*53ee8cc1Swenshuai.xi 80*53ee8cc1Swenshuai.xi typedef struct MHAL_CMDQ_CmdqInterface_s MHAL_CMDQ_CmdqInterface_t; 81*53ee8cc1Swenshuai.xi 82*53ee8cc1Swenshuai.xi struct MHAL_CMDQ_CmdqInterface_s 83*53ee8cc1Swenshuai.xi { 84*53ee8cc1Swenshuai.xi //menuload ring buffer dynamic allocation service 85*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 86*53ee8cc1Swenshuai.xi /// @brief Get Menuload buffer current write point 87*53ee8cc1Swenshuai.xi /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface 88*53ee8cc1Swenshuai.xi /// @param[out]MS_PHYADDR* phyWritePtr : assign write point here 89*53ee8cc1Swenshuai.xi /// @return MHAL_SUCCESS : is ok 90*53ee8cc1Swenshuai.xi /// @return MHAL_FAILURE : is failed 91*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 92*53ee8cc1Swenshuai.xi MS_S32(*MHAL_CMDQ_GetNextMlodRignBufWritePtr)(MHAL_CMDQ_CmdqInterface_t *pCmdinf, MS_PHYADDR* phyWritePtr); 93*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 94*53ee8cc1Swenshuai.xi /// @brief Update Menuload buffer read point 95*53ee8cc1Swenshuai.xi /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface 96*53ee8cc1Swenshuai.xi /// @param[in] MS_PHYADDR phyReadPtr : read point to updtae 97*53ee8cc1Swenshuai.xi /// @param[out] 98*53ee8cc1Swenshuai.xi /// @return MHAL_SUCCESS : is ok 99*53ee8cc1Swenshuai.xi /// @return MHAL_FAILURE : is failed 100*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 101*53ee8cc1Swenshuai.xi MS_S32(*MHAL_CMDQ_UpdateMloadRingBufReadPtr)(MHAL_CMDQ_CmdqInterface_t* pCmdinf, MS_PHYADDR phyReadPtr); 102*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 103*53ee8cc1Swenshuai.xi /// @brief copy buffer to cmdq 's Menuload buffer 104*53ee8cc1Swenshuai.xi /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface 105*53ee8cc1Swenshuai.xi /// @param[in] void * MloadBuf 106*53ee8cc1Swenshuai.xi /// @param[in] MS_U32 u32Size 107*53ee8cc1Swenshuai.xi /// @param[in] MS_U16 u16Alignment 108*53ee8cc1Swenshuai.xi /// @param[out]MS_PHYADDR *phyRetAddr : menuload buffer head 109*53ee8cc1Swenshuai.xi /// @return MHAL_SUCCESS : is ok 110*53ee8cc1Swenshuai.xi /// @return MHAL_FAILURE : is failed 111*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 112*53ee8cc1Swenshuai.xi MS_S32(*MHAL_CMDQ_MloadCopyBuf)(MHAL_CMDQ_CmdqInterface_t *pCmdinf, void * MloadBuf, MS_U32 u32Size, MS_U16 u16Alignment, MS_PHYADDR *phyRetAddr); 113*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 114*53ee8cc1Swenshuai.xi /// @brief check cmdq buffer is available 115*53ee8cc1Swenshuai.xi /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface 116*53ee8cc1Swenshuai.xi /// @param[in] MS_U32 u32CmdqNum : check cmd number 117*53ee8cc1Swenshuai.xi /// @param[out] 118*53ee8cc1Swenshuai.xi /// @return 0 : is unavailable 119*53ee8cc1Swenshuai.xi /// @return current cmdq available number : is success 120*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 121*53ee8cc1Swenshuai.xi MS_S32(*MHAL_CMDQ_CheckBufAvailable)(MHAL_CMDQ_CmdqInterface_t *pCmdinf, MS_U32 u32CmdqNum); 122*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 123*53ee8cc1Swenshuai.xi /// @brief write CMDQ dummy register 124*53ee8cc1Swenshuai.xi /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface 125*53ee8cc1Swenshuai.xi /// @param[in] MS_U16 u16Value 126*53ee8cc1Swenshuai.xi /// @param[out] 127*53ee8cc1Swenshuai.xi /// @return MHAL_SUCCESS : is ok 128*53ee8cc1Swenshuai.xi /// @return MHAL_FAILURE : is failed 129*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 130*53ee8cc1Swenshuai.xi MS_S32(*MHAL_CMDQ_WriteDummyRegCmdq)(MHAL_CMDQ_CmdqInterface_t *pCmdinf, MS_U16 u16Value); 131*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 132*53ee8cc1Swenshuai.xi /// @brief Read CMDQ dummy register 133*53ee8cc1Swenshuai.xi /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface 134*53ee8cc1Swenshuai.xi /// @param[out]MS_U16* u16RegVal : assign cmdq dummy register value. 135*53ee8cc1Swenshuai.xi /// @return MHAL_SUCCESS : is ok 136*53ee8cc1Swenshuai.xi /// @return MHAL_FAILURE : is failed 137*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 138*53ee8cc1Swenshuai.xi MS_S32(*MHAL_CMDQ_ReadDummyRegCmdq)(MHAL_CMDQ_CmdqInterface_t *pCmdinf, MS_U16* u16RegVal); 139*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 140*53ee8cc1Swenshuai.xi /// @brief add write command with Mask 141*53ee8cc1Swenshuai.xi /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface. 142*53ee8cc1Swenshuai.xi /// @param[in] MS_U32 u32RegAddr 143*53ee8cc1Swenshuai.xi /// @param[in] MS_U16 u16Value 144*53ee8cc1Swenshuai.xi /// @param[in] MS_U16 u16WriteMask : set bit as 1 , this bit is available. 145*53ee8cc1Swenshuai.xi /// @return MHAL_SUCCESS : is ok 146*53ee8cc1Swenshuai.xi /// @return MHAL_FAILURE : is failed 147*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 148*53ee8cc1Swenshuai.xi MS_S32(*MHAL_CMDQ_WriteRegCmdqMask)(MHAL_CMDQ_CmdqInterface_t *pCmdinf, MS_U32 u32RegAddr, MS_U16 u16Value, MS_U16 u16WriteMask); 149*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 150*53ee8cc1Swenshuai.xi /// @brief add write command without Mask 151*53ee8cc1Swenshuai.xi /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface. 152*53ee8cc1Swenshuai.xi /// @param[in] MS_U32 u32RegAddr 153*53ee8cc1Swenshuai.xi /// @param[in] MS_U16 u16Value 154*53ee8cc1Swenshuai.xi /// @return MHAL_SUCCESS : is ok 155*53ee8cc1Swenshuai.xi /// @return MHAL_FAILURE : is failed 156*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 157*53ee8cc1Swenshuai.xi MS_S32(*MHAL_CMDQ_WriteRegCmdq)(MHAL_CMDQ_CmdqInterface_t *pCmdinf, MS_U32 u32RegAddr, MS_U16 u16Value); 158*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 159*53ee8cc1Swenshuai.xi /// @brief add poll command with Mask 160*53ee8cc1Swenshuai.xi /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface. 161*53ee8cc1Swenshuai.xi /// @param[in] MS_U32 u32RegAddr 162*53ee8cc1Swenshuai.xi /// @param[in] MS_U16 u16Value 163*53ee8cc1Swenshuai.xi /// @param[in] MS_U16 u16WriteMask 164*53ee8cc1Swenshuai.xi /// @param[in] MS_BOOL bPollEq : true is poll eq command , false is poll neq command 165*53ee8cc1Swenshuai.xi /// @return MHAL_SUCCESS : is ok 166*53ee8cc1Swenshuai.xi /// @return MHAL_FAILURE : is failed 167*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 168*53ee8cc1Swenshuai.xi MS_S32(*MHAL_CMDQ_CmdqPollRegBits)(MHAL_CMDQ_CmdqInterface_t *pCmdinf, MS_U32 u32RegAddr, MS_U16 u16Value, MS_U16 u16WriteMask, MS_BOOL bPollEq); 169*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 170*53ee8cc1Swenshuai.xi /// @brief add wait command 171*53ee8cc1Swenshuai.xi /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface. 172*53ee8cc1Swenshuai.xi /// @param[in] MHAL_CMDQ_EventId_e eEvent 173*53ee8cc1Swenshuai.xi /// @return MHAL_SUCCESS : is ok 174*53ee8cc1Swenshuai.xi /// @return MHAL_FAILURE : is failed 175*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 176*53ee8cc1Swenshuai.xi MS_S32(*MHAL_CMDQ_CmdqAddWaitEventCmd)(MHAL_CMDQ_CmdqInterface_t *pCmdinf, MHAL_CMDQ_EventId_e eEvent); 177*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 178*53ee8cc1Swenshuai.xi /// @brief Abort cmdq buffer , will go back previrous write point 179*53ee8cc1Swenshuai.xi /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface. 180*53ee8cc1Swenshuai.xi /// @return MHAL_SUCCESS : is ok 181*53ee8cc1Swenshuai.xi /// @return MHAL_FAILURE : is failed 182*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 183*53ee8cc1Swenshuai.xi MS_S32(*MHAL_CMDQ_CmdqAbortBuffer)(MHAL_CMDQ_CmdqInterface_t *pCmdinf); 184*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 185*53ee8cc1Swenshuai.xi /// @brief reset cmdq engine 186*53ee8cc1Swenshuai.xi /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface. 187*53ee8cc1Swenshuai.xi /// @return MHAL_SUCCESS : is ok 188*53ee8cc1Swenshuai.xi /// @return MHAL_FAILURE : is failed 189*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 190*53ee8cc1Swenshuai.xi MS_S32(*MHAL_CMDQ_CmdqResetEngine)(MHAL_CMDQ_CmdqInterface_t *pCmdinf); 191*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 192*53ee8cc1Swenshuai.xi /// @brief Read cmdq current status 193*53ee8cc1Swenshuai.xi /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface. 194*53ee8cc1Swenshuai.xi /// @return MHAL_SUCCESS : is ok 195*53ee8cc1Swenshuai.xi /// @return MHAL_FAILURE : is failed 196*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 197*53ee8cc1Swenshuai.xi MS_S32(*MHAL_CMDQ_ReadStatusCmdq)(MHAL_CMDQ_CmdqInterface_t *pCmdinf, MS_U32* u32StatVal); 198*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 199*53ee8cc1Swenshuai.xi /// @brief kick off cmdq 200*53ee8cc1Swenshuai.xi /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface. 201*53ee8cc1Swenshuai.xi /// @return < 0 : is failed 202*53ee8cc1Swenshuai.xi /// @return kick off cmd number : is success 203*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 204*53ee8cc1Swenshuai.xi MS_S32(*MHAL_CMDQ_KickOffCmdq)(MHAL_CMDQ_CmdqInterface_t *pCmdinf); 205*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 206*53ee8cc1Swenshuai.xi /// @brief clear all trigger bus event 207*53ee8cc1Swenshuai.xi /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface. 208*53ee8cc1Swenshuai.xi /// @return MHAL_SUCCESS : is ok 209*53ee8cc1Swenshuai.xi /// @return MHAL_FAILURE : is failed 210*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 211*53ee8cc1Swenshuai.xi MS_S32(*MHAL_CMDQ_ClearTriggerEvent)(MHAL_CMDQ_CmdqInterface_t *pCmdinf); 212*53ee8cc1Swenshuai.xi 213*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 214*53ee8cc1Swenshuai.xi /// @brief check cmdq is empty 215*53ee8cc1Swenshuai.xi /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface. 216*53ee8cc1Swenshuai.xi /// @param[out],MS_BOOL* bIdleVal : idle value 217*53ee8cc1Swenshuai.xi /// @return MHAL_SUCCESS : is ok 218*53ee8cc1Swenshuai.xi /// @return MHAL_FAILURE : is failed 219*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 220*53ee8cc1Swenshuai.xi MS_S32(*MHAL_CMDQ_IsCmdqEmptyIdle)(MHAL_CMDQ_CmdqInterface_t *pCmdinf, MS_BOOL* bIdleVal); 221*53ee8cc1Swenshuai.xi VOID * pCtx; 222*53ee8cc1Swenshuai.xi }; 223*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 224*53ee8cc1Swenshuai.xi /// @brief Init CMDQ mmap info 225*53ee8cc1Swenshuai.xi /// @param[in] MHAL_CMDQ_Mmap_Info_t *pCmdqMmapInfo 226*53ee8cc1Swenshuai.xi /// @param[out] 227*53ee8cc1Swenshuai.xi /// @return MHAL_SUCCESS : is ok 228*53ee8cc1Swenshuai.xi /// @return MHAL_FAILURE : is failed 229*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 230*53ee8cc1Swenshuai.xi MS_S32 MHAL_CMDQ_InitCmdqMmapInfo(MHAL_CMDQ_Mmap_Info_t *pCmdqMmapInfo); 231*53ee8cc1Swenshuai.xi 232*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 233*53ee8cc1Swenshuai.xi /// @brief Get Cmdq service 234*53ee8cc1Swenshuai.xi /// @param[in] MHAL_CMDQ_Id_e eCmdqId : CMDQ ID 235*53ee8cc1Swenshuai.xi /// @param[in] MHAL_CMDQ_BufDescript_t *pCmdqBufDesp : CMDQ buffer description 236*53ee8cc1Swenshuai.xi /// @param[in] MS_BOOL bForceRIU : CMDQ RIU mode 237*53ee8cc1Swenshuai.xi /// @param[out] 238*53ee8cc1Swenshuai.xi /// @return NULL : is failed 239*53ee8cc1Swenshuai.xi /// @return MHAL_CMDQ_CmdqInterface_t point is success 240*53ee8cc1Swenshuai.xi /// @return MI_ERR_INVALID_PARAMETER: Null parameter 241*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 242*53ee8cc1Swenshuai.xi MHAL_CMDQ_CmdqInterface_t *MHAL_CMDQ_GetSysCmdqService(MHAL_CMDQ_Id_e eCmdqId, MHAL_CMDQ_BufDescript_t *pCmdqBufDesp, MS_BOOL bForceRIU); 243*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 244*53ee8cc1Swenshuai.xi /// @brief release cmdq service 245*53ee8cc1Swenshuai.xi /// @param[in] MHAL_CMDQ_Id_e eCmdqId : CMDQ ID 246*53ee8cc1Swenshuai.xi /// @param[out] 247*53ee8cc1Swenshuai.xi /// @return 248*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 249*53ee8cc1Swenshuai.xi void MHAL_CMDQ_ReleaseSysCmdqService(MHAL_CMDQ_Id_e eCmdqId); 250*53ee8cc1Swenshuai.xi 251*53ee8cc1Swenshuai.xi #endif 252