xref: /utopia/UTPA2-700.0.x/mxlib/include/mhal_cmdq.h (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
1 #ifndef __MHAL_CMD_SERVICE_HH__
2 #define __MHAL_CMD_SERVICE_HH__
3 
4 #define MHAL_CMDQ_POLLNEQ_TIMEOUT        (0x1<<8)
5 #define MHAL_CMDQ_POLLEQ_TIMEOUT         (0x1<<9)
6 #define MHAL_CMDQ_WAIT_TIMEOUT           (0x1<<10)
7 #define MHAL_CMDQ_WRITE_TIMEOUT          (0x1<<12)
8 
9 #define MHAL_CMDQ_ERROR_STATUS           (MHAL_CMDQ_POLLNEQ_TIMEOUT|MHAL_CMDQ_POLLEQ_TIMEOUT |MHAL_CMDQ_WAIT_TIMEOUT|MHAL_CMDQ_WRITE_TIMEOUT)
10 
11 typedef enum
12 {
13     E_MHAL_CMDQEVE_S0_MDW_W_DONE,          //Only for cmdq1&cmdq5
14     E_MHAL_CMDQEVE_S0_MGW_FIRE,            //Only for cmdq1&cmdq5
15     E_MHAL_CMDQEVE_S1_MDW_W_DONE,          //Only for cmdq2&cmdq4
16     E_MHAL_CMDQEVE_S1_MGW_FIRE,            //Only for cmdq2&cmdq4
17     E_MHAL_CMDQEVE_DMAGEN_TRIGGER0,        //Only for cmdq2&cmdq4
18     E_MHAL_CMDQEVE_DMAGEN_TRIGGER1,        //Only for cmdq2&cmdq4
19     E_MHAL_CMDQEVE_BDMA_TRIGGER0,          //Only for cmdq3&cmdq5
20     E_MHAL_CMDQEVE_BDMA_TRIGGER1,          //Only for cmdq3
21     E_MHAL_CMDQEVE_IVE_CMDQ_TRIG,          //Only for cmdq3&cmdq5
22     E_MHAL_CMDQEVE_LDC_CMDQ_TRIG,          //Only for cmdq1&cmdq3
23     E_MHAL_CMDQEVE_GE_CMDQ_TRIG,           //Only for cmdq1&cmdq3
24     E_MHAL_CMDQEVE_REG_DUMMY_TRIG,         //Only for cmdq1&cmdq2&cmdq4&cmdq5
25     E_MHAL_CMDQEVE_CORE1_MHE_TRIG,         //Only for ALL
26     E_MHAL_CMDQEVE_CORE0_MHE_TRIG,         //Only for ALL
27     E_MHAL_CMDQEVE_CORE1_MFE_TRIG,         //Only for ALL
28     E_MHAL_CMDQEVE_CORE0_MFE_TRIG,         //Only for ALL
29     E_MHAL_CMDQEVE_DIP_TRIG,               //Only for ALL
30     E_MHAL_CMDQEVE_GOP_TRIG4,              //Only for ALL
31     E_MHAL_CMDQEVE_GOP_TRIG2,              //Only for ALL
32     E_MHAL_CMDQEVE_GOP_TRIG013,            //Only for ALL
33     E_MHAL_CMDQEVE_SC_TRIG2,               //Only for ALL
34     E_MHAL_CMDQEVE_SC_TRIG013,             //Only for ALL
35     E_MHAL_CMDQEVE_ISP_TRIG,               //Only for ALL
36     E_MHAL_CMDQEVE_MAX
37 } MHAL_CMDQ_EventId_e;
38 
39 typedef enum
40 {
41     E_MHAL_CMDQ_ID_VPE = 0,
42     E_MHAL_CMDQ_ID_DIVP,
43     E_MHAL_CMDQ_ID_H265_VENC0,
44     E_MHAL_CMDQ_ID_H265_VENC1,
45     E_MHAL_CMDQ_ID_H264_VENC0,
46     E_MHAL_CMDQ_ID_MAX
47 } MHAL_CMDQ_Id_e;
48 
49 typedef struct MHAL_CMDQ_BufDescript_s
50 {
51     MS_U32 u32CmdqBufSize;
52     MS_U16 u32CmdqBufSizeAlign;
53     MS_U32 u32MloadBufSize;
54     MS_U16 u16MloadBufSizeAlign;
55 } MHAL_CMDQ_BufDescript_t;
56 
57 typedef struct MHAL_CMDQ_Mmap_Info_s
58 {
59     MS_U8     u8CmdqMmapGid;                         // Mmap ID
60     MS_U8     u8CmdqMmapLayer;                       // Memory Layer
61     MS_U8     u8CmdqMmapMiuNo;                       // 0: MIU0 / 1: MIU1 / 2: MIU2
62     MS_U8     u8CmdqMmapCMAHid;                      // Memory CMAHID
63     MS_U32    u32CmdqMmapPhyAddr;                       // phy Memory Address
64     MS_U32    u32CmdqMmapVirAddr;                       // vir Memory Address
65     MS_U32    u32CmdqMmapSize;                       // Memory Size
66     MS_U32    u32CmdqMmapAlign;                      // Memory Align
67     MS_U32    u32CmdqMmapMemoryType;
68 
69     MS_U8     u8MloadMmapGid;                         // Mmap ID
70     MS_U8     u8MloadMmapLayer;                       // Memory Layer
71     MS_U8     u8MloadMmapMiuNo;                       // 0: MIU0 / 1: MIU1 / 2: MIU2
72     MS_U8     u8MloadMmapCMAHid;                      // Memory CMAHID
73     MS_U32    u32MloadMmapPhyAddr;                       //phy Memory Address
74     MS_U32    u32MloadMmapVirAddr;                       //vir Memory Address
75     MS_U32    u32MloadMmapSize;                       // Memory Size
76     MS_U32    u32MloadMmapAlign;                      // Memory Align
77     MS_U32    u32MloadMmapMemoryType;
78 } MHAL_CMDQ_Mmap_Info_t;
79 
80 typedef struct MHAL_CMDQ_CmdqInterface_s     MHAL_CMDQ_CmdqInterface_t;
81 
82 struct MHAL_CMDQ_CmdqInterface_s
83 {
84     //menuload ring buffer dynamic allocation service
85 //------------------------------------------------------------------------------
86 /// @brief Get Menuload buffer current write point
87 /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface
88 /// @param[out]MS_PHYADDR* phyWritePtr : assign write point here
89 /// @return MHAL_SUCCESS : is ok
90 /// @return MHAL_FAILURE : is failed
91 //------------------------------------------------------------------------------
92     MS_S32(*MHAL_CMDQ_GetNextMlodRignBufWritePtr)(MHAL_CMDQ_CmdqInterface_t *pCmdinf, MS_PHYADDR* phyWritePtr);
93 //------------------------------------------------------------------------------
94 /// @brief Update Menuload buffer read point
95 /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface
96 /// @param[in] MS_PHYADDR phyReadPtr : read point to updtae
97 /// @param[out]
98 /// @return MHAL_SUCCESS : is ok
99 /// @return MHAL_FAILURE : is failed
100 //------------------------------------------------------------------------------
101     MS_S32(*MHAL_CMDQ_UpdateMloadRingBufReadPtr)(MHAL_CMDQ_CmdqInterface_t* pCmdinf, MS_PHYADDR phyReadPtr);
102 //------------------------------------------------------------------------------
103 /// @brief copy buffer to cmdq 's Menuload buffer
104 /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface
105 /// @param[in] void * MloadBuf
106 /// @param[in] MS_U32 u32Size
107 /// @param[in] MS_U16 u16Alignment
108 /// @param[out]MS_PHYADDR *phyRetAddr : menuload buffer head
109 /// @return MHAL_SUCCESS : is ok
110 /// @return MHAL_FAILURE : is failed
111 //------------------------------------------------------------------------------
112     MS_S32(*MHAL_CMDQ_MloadCopyBuf)(MHAL_CMDQ_CmdqInterface_t *pCmdinf, void * MloadBuf, MS_U32 u32Size, MS_U16 u16Alignment, MS_PHYADDR *phyRetAddr);
113 //------------------------------------------------------------------------------
114 /// @brief check cmdq buffer is available
115 /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface
116 /// @param[in] MS_U32 u32CmdqNum : check cmd number
117 /// @param[out]
118 /// @return 0 : is unavailable
119 /// @return current cmdq available number : is success
120 //------------------------------------------------------------------------------
121     MS_S32(*MHAL_CMDQ_CheckBufAvailable)(MHAL_CMDQ_CmdqInterface_t *pCmdinf, MS_U32 u32CmdqNum);
122 //------------------------------------------------------------------------------
123 /// @brief write CMDQ dummy register
124 /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface
125 /// @param[in] MS_U16 u16Value
126 /// @param[out]
127 /// @return MHAL_SUCCESS : is ok
128 /// @return MHAL_FAILURE : is failed
129 //------------------------------------------------------------------------------
130     MS_S32(*MHAL_CMDQ_WriteDummyRegCmdq)(MHAL_CMDQ_CmdqInterface_t *pCmdinf, MS_U16 u16Value);
131 //------------------------------------------------------------------------------
132 /// @brief Read CMDQ dummy register
133 /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface
134 /// @param[out]MS_U16* u16RegVal : assign cmdq dummy register value.
135 /// @return MHAL_SUCCESS : is ok
136 /// @return MHAL_FAILURE : is failed
137 //------------------------------------------------------------------------------
138     MS_S32(*MHAL_CMDQ_ReadDummyRegCmdq)(MHAL_CMDQ_CmdqInterface_t *pCmdinf, MS_U16* u16RegVal);
139 //------------------------------------------------------------------------------
140 /// @brief add write command with Mask
141 /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface.
142 /// @param[in] MS_U32 u32RegAddr
143 /// @param[in] MS_U16 u16Value
144 /// @param[in] MS_U16 u16WriteMask : set bit as 1 , this bit is available.
145 /// @return MHAL_SUCCESS : is ok
146 /// @return MHAL_FAILURE : is failed
147 //------------------------------------------------------------------------------
148     MS_S32(*MHAL_CMDQ_WriteRegCmdqMask)(MHAL_CMDQ_CmdqInterface_t *pCmdinf, MS_U32 u32RegAddr, MS_U16 u16Value, MS_U16 u16WriteMask);
149 //------------------------------------------------------------------------------
150 /// @brief add write command without Mask
151 /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface.
152 /// @param[in] MS_U32 u32RegAddr
153 /// @param[in] MS_U16 u16Value
154 /// @return MHAL_SUCCESS : is ok
155 /// @return MHAL_FAILURE : is failed
156 //------------------------------------------------------------------------------
157     MS_S32(*MHAL_CMDQ_WriteRegCmdq)(MHAL_CMDQ_CmdqInterface_t *pCmdinf, MS_U32 u32RegAddr, MS_U16 u16Value);
158 //------------------------------------------------------------------------------
159 /// @brief add poll command with Mask
160 /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface.
161 /// @param[in] MS_U32 u32RegAddr
162 /// @param[in] MS_U16 u16Value
163 /// @param[in] MS_U16 u16WriteMask
164 /// @param[in] MS_BOOL bPollEq : true is poll eq command , false is poll neq command
165 /// @return MHAL_SUCCESS : is ok
166 /// @return MHAL_FAILURE : is failed
167 //------------------------------------------------------------------------------
168     MS_S32(*MHAL_CMDQ_CmdqPollRegBits)(MHAL_CMDQ_CmdqInterface_t *pCmdinf, MS_U32 u32RegAddr, MS_U16 u16Value,  MS_U16 u16WriteMask, MS_BOOL bPollEq);
169 //------------------------------------------------------------------------------
170 /// @brief add wait command
171 /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface.
172 /// @param[in] MHAL_CMDQ_EventId_e eEvent
173 /// @return MHAL_SUCCESS : is ok
174 /// @return MHAL_FAILURE : is failed
175 //------------------------------------------------------------------------------
176     MS_S32(*MHAL_CMDQ_CmdqAddWaitEventCmd)(MHAL_CMDQ_CmdqInterface_t *pCmdinf, MHAL_CMDQ_EventId_e eEvent);
177 //------------------------------------------------------------------------------
178 /// @brief Abort cmdq buffer , will go back previrous write point
179 /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface.
180 /// @return MHAL_SUCCESS : is ok
181 /// @return MHAL_FAILURE : is failed
182 //------------------------------------------------------------------------------
183     MS_S32(*MHAL_CMDQ_CmdqAbortBuffer)(MHAL_CMDQ_CmdqInterface_t *pCmdinf);
184 //------------------------------------------------------------------------------
185 /// @brief reset cmdq engine
186 /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface.
187 /// @return MHAL_SUCCESS : is ok
188 /// @return MHAL_FAILURE : is failed
189 //------------------------------------------------------------------------------
190     MS_S32(*MHAL_CMDQ_CmdqResetEngine)(MHAL_CMDQ_CmdqInterface_t *pCmdinf);
191 //------------------------------------------------------------------------------
192 /// @brief Read cmdq current status
193 /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface.
194 /// @return MHAL_SUCCESS : is ok
195 /// @return MHAL_FAILURE : is failed
196 //------------------------------------------------------------------------------
197     MS_S32(*MHAL_CMDQ_ReadStatusCmdq)(MHAL_CMDQ_CmdqInterface_t *pCmdinf, MS_U32* u32StatVal);
198 //------------------------------------------------------------------------------
199 /// @brief kick off cmdq
200 /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface.
201 /// @return < 0 : is failed
202 /// @return kick off cmd number : is success
203 //------------------------------------------------------------------------------
204     MS_S32(*MHAL_CMDQ_KickOffCmdq)(MHAL_CMDQ_CmdqInterface_t *pCmdinf);
205 //------------------------------------------------------------------------------
206 /// @brief clear all trigger bus event
207 /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface.
208 /// @return MHAL_SUCCESS : is ok
209 /// @return MHAL_FAILURE : is failed
210 //------------------------------------------------------------------------------
211     MS_S32(*MHAL_CMDQ_ClearTriggerEvent)(MHAL_CMDQ_CmdqInterface_t *pCmdinf);
212 
213 //------------------------------------------------------------------------------
214 /// @brief check cmdq is empty
215 /// @param[in] MHAL_CMDQ_CmdqInterface_t *pCmdinf : CMDQ interface.
216 /// @param[out],MS_BOOL* bIdleVal : idle value
217 /// @return MHAL_SUCCESS : is ok
218 /// @return MHAL_FAILURE : is failed
219 //------------------------------------------------------------------------------
220     MS_S32(*MHAL_CMDQ_IsCmdqEmptyIdle)(MHAL_CMDQ_CmdqInterface_t *pCmdinf, MS_BOOL* bIdleVal);
221     VOID *  pCtx;
222 };
223 //------------------------------------------------------------------------------
224 /// @brief Init CMDQ mmap info
225 /// @param[in] MHAL_CMDQ_Mmap_Info_t *pCmdqMmapInfo
226 /// @param[out]
227 /// @return MHAL_SUCCESS : is ok
228 /// @return MHAL_FAILURE : is failed
229 //------------------------------------------------------------------------------
230 MS_S32 MHAL_CMDQ_InitCmdqMmapInfo(MHAL_CMDQ_Mmap_Info_t *pCmdqMmapInfo);
231 
232 //------------------------------------------------------------------------------
233 /// @brief Get Cmdq service
234 /// @param[in] MHAL_CMDQ_Id_e eCmdqId : CMDQ ID
235 /// @param[in] MHAL_CMDQ_BufDescript_t *pCmdqBufDesp : CMDQ buffer description
236 /// @param[in] MS_BOOL bForceRIU : CMDQ RIU mode
237 /// @param[out]
238 /// @return NULL : is failed
239 /// @return MHAL_CMDQ_CmdqInterface_t point is success
240 /// @return MI_ERR_INVALID_PARAMETER: Null parameter
241 //------------------------------------------------------------------------------
242 MHAL_CMDQ_CmdqInterface_t *MHAL_CMDQ_GetSysCmdqService(MHAL_CMDQ_Id_e eCmdqId, MHAL_CMDQ_BufDescript_t *pCmdqBufDesp, MS_BOOL bForceRIU);
243 //------------------------------------------------------------------------------
244 /// @brief release cmdq service
245 /// @param[in] MHAL_CMDQ_Id_e eCmdqId : CMDQ ID
246 /// @param[out]
247 /// @return
248 //------------------------------------------------------------------------------
249 void MHAL_CMDQ_ReleaseSysCmdqService(MHAL_CMDQ_Id_e eCmdqId);
250 
251 #endif
252