1*53ee8cc1Swenshuai.xi //<MStar Software> 2*53ee8cc1Swenshuai.xi //****************************************************************************** 3*53ee8cc1Swenshuai.xi // MStar Software 4*53ee8cc1Swenshuai.xi // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved. 5*53ee8cc1Swenshuai.xi // All software, firmware and related documentation herein ("MStar Software") are 6*53ee8cc1Swenshuai.xi // intellectual property of MStar Semiconductor, Inc. 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These terms shall be governed by and construed in accordance with the laws 66*53ee8cc1Swenshuai.xi // of Taiwan, R.O.C., excluding its conflict of law rules. 67*53ee8cc1Swenshuai.xi // Any and all dispute arising out hereof or related hereto shall be finally 68*53ee8cc1Swenshuai.xi // settled by arbitration referred to the Chinese Arbitration Association, 69*53ee8cc1Swenshuai.xi // Taipei in accordance with the ROC Arbitration Law and the Arbitration 70*53ee8cc1Swenshuai.xi // Rules of the Association by three (3) arbitrators appointed in accordance 71*53ee8cc1Swenshuai.xi // with the said Rules. 72*53ee8cc1Swenshuai.xi // The place of arbitration shall be in Taipei, Taiwan and the language shall 73*53ee8cc1Swenshuai.xi // be English. 74*53ee8cc1Swenshuai.xi // The arbitration award shall be final and binding to both parties. 75*53ee8cc1Swenshuai.xi // 76*53ee8cc1Swenshuai.xi //****************************************************************************** 77*53ee8cc1Swenshuai.xi //<MStar Software> 78*53ee8cc1Swenshuai.xi //////////////////////////////////////////////////////////////////////////////// 79*53ee8cc1Swenshuai.xi // 80*53ee8cc1Swenshuai.xi // Copyright (c) 2006-2009 MStar Semiconductor, Inc. 81*53ee8cc1Swenshuai.xi // All rights reserved. 82*53ee8cc1Swenshuai.xi // 83*53ee8cc1Swenshuai.xi // Unless otherwise stipulated in writing, any and all information contained 84*53ee8cc1Swenshuai.xi // herein regardless in any format shall remain the sole proprietary of 85*53ee8cc1Swenshuai.xi // MStar Semiconductor Inc. and be kept in strict confidence 86*53ee8cc1Swenshuai.xi // ("MStar Confidential Information") by the recipient. 87*53ee8cc1Swenshuai.xi // Any unauthorized act including without limitation unauthorized disclosure, 88*53ee8cc1Swenshuai.xi // copying, use, reproduction, sale, distribution, modification, disassembling, 89*53ee8cc1Swenshuai.xi // reverse engineering and compiling of the contents of MStar Confidential 90*53ee8cc1Swenshuai.xi // Information is unlawful and strictly prohibited. MStar hereby reserves the 91*53ee8cc1Swenshuai.xi // rights to any and all damages, losses, costs and expenses resulting therefrom. 92*53ee8cc1Swenshuai.xi // 93*53ee8cc1Swenshuai.xi //////////////////////////////////////////////////////////////////////////////// 94*53ee8cc1Swenshuai.xi 95*53ee8cc1Swenshuai.xi //////////////////////////////////////////////////////////////////////////////////////////////////// 96*53ee8cc1Swenshuai.xi /// 97*53ee8cc1Swenshuai.xi /// @file drvIPAPool.h 98*53ee8cc1Swenshuai.xi /// @brief drv IPA Pool Control Interface 99*53ee8cc1Swenshuai.xi /// @author MStar Semiconductor,Inc. 100*53ee8cc1Swenshuai.xi /// 101*53ee8cc1Swenshuai.xi //////////////////////////////////////////////////////////////////////////////////////////////////// 102*53ee8cc1Swenshuai.xi #ifndef _DRVCMAPOOL_H_ 103*53ee8cc1Swenshuai.xi #define _DRVCMAPOOL_H_ 104*53ee8cc1Swenshuai.xi 105*53ee8cc1Swenshuai.xi #if defined (CONFIG_MSTAR_IPAPOOL) 106*53ee8cc1Swenshuai.xi #ifdef __cplusplus 107*53ee8cc1Swenshuai.xi extern "C" 108*53ee8cc1Swenshuai.xi { 109*53ee8cc1Swenshuai.xi #endif 110*53ee8cc1Swenshuai.xi 111*53ee8cc1Swenshuai.xi #include "MsTypes.h" 112*53ee8cc1Swenshuai.xi #define TEST_USE_SELF_KO_MAKEFILE_TOTAL 0//do not enable this in p4.this only test code. 113*53ee8cc1Swenshuai.xi 114*53ee8cc1Swenshuai.xi #define IPAPOOL_HEAP_NAME_MAX_LEN_Param 32 115*53ee8cc1Swenshuai.xi 116*53ee8cc1Swenshuai.xi enum IPA_SPACE_TYPE 117*53ee8cc1Swenshuai.xi { 118*53ee8cc1Swenshuai.xi IPA_SPACE_TYPE_PA = 0,//directly PA space 119*53ee8cc1Swenshuai.xi IPA_SPACE_TYPE_CMA = 1, //CMA space 120*53ee8cc1Swenshuai.xi IPA_IPA_SPACE_TYPE_INVALID = 0xFFFFFFFF//force enum size to be 4 byte alignment 121*53ee8cc1Swenshuai.xi }; 122*53ee8cc1Swenshuai.xi 123*53ee8cc1Swenshuai.xi struct IPA_Pool_InstallIpcHandle_Param 124*53ee8cc1Swenshuai.xi { 125*53ee8cc1Swenshuai.xi MS_U32 ipc_handle_id; //in: returned by kernel, when get IPC handle 126*53ee8cc1Swenshuai.xi MS_U32 pool_handle_id; //out: pool handle id 127*53ee8cc1Swenshuai.xi MS_S32 error_code; // out: error code when failed 128*53ee8cc1Swenshuai.xi }; 129*53ee8cc1Swenshuai.xi 130*53ee8cc1Swenshuai.xi struct IPA_Pool_GetIpcHandle_Param 131*53ee8cc1Swenshuai.xi { 132*53ee8cc1Swenshuai.xi MS_U32 pool_handle_id; //in: pool handle id, when pool init, returned by kernel 133*53ee8cc1Swenshuai.xi MS_U32 ipc_handle_id; //out: returned by kernel 134*53ee8cc1Swenshuai.xi MS_S32 error_code; // out: error code when failed 135*53ee8cc1Swenshuai.xi }; 136*53ee8cc1Swenshuai.xi 137*53ee8cc1Swenshuai.xi struct IPA_Pool_Heap_Attr_Param 138*53ee8cc1Swenshuai.xi { 139*53ee8cc1Swenshuai.xi MS_U32 heap_id; //in: maybe shared with more than one pools which based on this heap 140*53ee8cc1Swenshuai.xi 141*53ee8cc1Swenshuai.xi char name[IPAPOOL_HEAP_NAME_MAX_LEN_Param]; //out: heap name 142*53ee8cc1Swenshuai.xi MS_U64 heap_miu_start_offset; //out: heap start offset in miu 143*53ee8cc1Swenshuai.xi MS_U64 heap_length; //out: heap length 144*53ee8cc1Swenshuai.xi MS_U32 miu; //out: miu id this heap belongs, index from 0. 145*53ee8cc1Swenshuai.xi enum IPA_SPACE_TYPE heap_type;//out: return heap type to application (enum IPA_SPACE_TYPE ) 146*53ee8cc1Swenshuai.xi MS_S32 error_code; // error code when failed 147*53ee8cc1Swenshuai.xi }; 148*53ee8cc1Swenshuai.xi enum IPA_DCACHE_FLUSH_TYPE_Param 149*53ee8cc1Swenshuai.xi { 150*53ee8cc1Swenshuai.xi IPA_DCACHE_FLUSH_Param,//flush dcache into DRAM 151*53ee8cc1Swenshuai.xi IPA_DCACHE_INVALID_Param,// invalid dcache lines 152*53ee8cc1Swenshuai.xi IPA_DCACHE_FLUSH_INVALID_Param// flush and invalid dcache lines 153*53ee8cc1Swenshuai.xi }; 154*53ee8cc1Swenshuai.xi 155*53ee8cc1Swenshuai.xi struct IPA_Pool_DCacheFlush_Param 156*53ee8cc1Swenshuai.xi { 157*53ee8cc1Swenshuai.xi MS_U64 virt_addr; //in: the VA need to flush 158*53ee8cc1Swenshuai.xi MS_U64 length; //in: flush length 159*53ee8cc1Swenshuai.xi enum IPA_DCACHE_FLUSH_TYPE_Param flush_type;// in: flush type (enum IPA_DCACHE_FLUSH_TYPE) 160*53ee8cc1Swenshuai.xi }; 161*53ee8cc1Swenshuai.xi 162*53ee8cc1Swenshuai.xi struct IPA_Pool_Unmap_Param 163*53ee8cc1Swenshuai.xi { 164*53ee8cc1Swenshuai.xi MS_U64 virt_addr; //in: the VA need to unmap 165*53ee8cc1Swenshuai.xi MS_U64 length; //in: unmap length 166*53ee8cc1Swenshuai.xi }; 167*53ee8cc1Swenshuai.xi 168*53ee8cc1Swenshuai.xi //enum for mapping virtual address type 169*53ee8cc1Swenshuai.xi enum IPA_MAP_VA_TYPE_Param 170*53ee8cc1Swenshuai.xi { 171*53ee8cc1Swenshuai.xi IPA_MAP_VA_NO_NEEDED_Param = 0, //we don't need to map VA 172*53ee8cc1Swenshuai.xi IPA_VA_CACHE_WRITE_BACK_Param = 1, //we need to map VA with cache type "write back", which is normally used 173*53ee8cc1Swenshuai.xi IPA_VA_CACHE_WRITE_THROUGH_Param = 2, //we need to map VA with cache type "write through", which is //mostly used by graphic system 174*53ee8cc1Swenshuai.xi IPA_VA_CACHE_NONE_CACHE_Param = 3, //we don't need data cache 175*53ee8cc1Swenshuai.xi IPA_VA_TYPE_MAX_Param = 0xFFFFFFFF//force enum size to be 4 byte alignment 176*53ee8cc1Swenshuai.xi }; 177*53ee8cc1Swenshuai.xi 178*53ee8cc1Swenshuai.xi struct IPA_Pool_Map_Param 179*53ee8cc1Swenshuai.xi { 180*53ee8cc1Swenshuai.xi MS_U32 pool_handle_id; //in: pool handle id, when pool init, returned by kernel 181*53ee8cc1Swenshuai.xi MS_U64 offset_in_pool; //in: offset in pool 182*53ee8cc1Swenshuai.xi MS_U64 length; //in get memory length 183*53ee8cc1Swenshuai.xi enum IPA_MAP_VA_TYPE_Param cache_type; //in cache type of mapping 184*53ee8cc1Swenshuai.xi 185*53ee8cc1Swenshuai.xi MS_U64 virt_addr; //out: virtual address for user mode access 186*53ee8cc1Swenshuai.xi MS_S32 error_code; // out�� reason about why map failed 187*53ee8cc1Swenshuai.xi }; 188*53ee8cc1Swenshuai.xi 189*53ee8cc1Swenshuai.xi 190*53ee8cc1Swenshuai.xi struct IPA_Pool_PutMem_Param 191*53ee8cc1Swenshuai.xi { 192*53ee8cc1Swenshuai.xi MS_U32 pool_handle_id; //in: pool handle id, when pool init, returned by kernel 193*53ee8cc1Swenshuai.xi MS_U64 offset_in_pool; //in: offset in pool 194*53ee8cc1Swenshuai.xi MS_U64 length; //in 195*53ee8cc1Swenshuai.xi }; 196*53ee8cc1Swenshuai.xi 197*53ee8cc1Swenshuai.xi struct IPA_Pool_GetMem_Param 198*53ee8cc1Swenshuai.xi { 199*53ee8cc1Swenshuai.xi MS_U32 pool_handle_id; //in: pool handle id, when pool init, returned by kernel 200*53ee8cc1Swenshuai.xi MS_U64 offset_in_pool; //in: offset in pool 201*53ee8cc1Swenshuai.xi MS_U64 length; //in get memory length 202*53ee8cc1Swenshuai.xi MS_S32 error_code; // out�� reason about why MApi_IPA_Pool_GetMem failed 203*53ee8cc1Swenshuai.xi }; 204*53ee8cc1Swenshuai.xi 205*53ee8cc1Swenshuai.xi struct IPA_Pool_Init_Param 206*53ee8cc1Swenshuai.xi { 207*53ee8cc1Swenshuai.xi MS_U32 space_id; //in: space id the pool will be created in 208*53ee8cc1Swenshuai.xi char *pool_name;//in: global identify name for pool to shared between multiple process 209*53ee8cc1Swenshuai.xi 210*53ee8cc1Swenshuai.xi MS_U64 offset_in_heap; //in: pool location in space 211*53ee8cc1Swenshuai.xi MS_U64 len; //in: pool length in space 212*53ee8cc1Swenshuai.xi 213*53ee8cc1Swenshuai.xi MS_U32 pool_handle_id; //out: generate pool id based on space specified by space_id 214*53ee8cc1Swenshuai.xi MS_U32 miu; //out: miu id this space belongs, index from 0. 215*53ee8cc1Swenshuai.xi enum IPA_SPACE_TYPE space_type;//out: return space type to application 216*53ee8cc1Swenshuai.xi MS_S32 error_code; // error code when pool init failed 217*53ee8cc1Swenshuai.xi 218*53ee8cc1Swenshuai.xi MS_U64 space_length; //out: space leagth 219*53ee8cc1Swenshuai.xi MS_U64 space_miu_start_offset; //out: space start offset in miu 220*53ee8cc1Swenshuai.xi }; 221*53ee8cc1Swenshuai.xi 222*53ee8cc1Swenshuai.xi 223*53ee8cc1Swenshuai.xi enum IPA_event_Param 224*53ee8cc1Swenshuai.xi { 225*53ee8cc1Swenshuai.xi IPA_EVENT_FREE_Param = 0, 226*53ee8cc1Swenshuai.xi IPA_EVENT_NO_WAIT_Param, 227*53ee8cc1Swenshuai.xi IPA_EVNET_NUM_Param 228*53ee8cc1Swenshuai.xi }; 229*53ee8cc1Swenshuai.xi 230*53ee8cc1Swenshuai.xi struct IPA_Pool_Event_Param 231*53ee8cc1Swenshuai.xi { 232*53ee8cc1Swenshuai.xi enum IPA_event_Param event; 233*53ee8cc1Swenshuai.xi MS_U32 pool_handle_id; 234*53ee8cc1Swenshuai.xi }; 235*53ee8cc1Swenshuai.xi 236*53ee8cc1Swenshuai.xi struct IPA_Pool_Polling_Param 237*53ee8cc1Swenshuai.xi { 238*53ee8cc1Swenshuai.xi MS_U32 pool_handle_id;//pool handle 239*53ee8cc1Swenshuai.xi void (*polling_callback)(MS_U32 pool_handle_id,MS_U64 start,MS_U64 length); 240*53ee8cc1Swenshuai.xi }; 241*53ee8cc1Swenshuai.xi 242*53ee8cc1Swenshuai.xi 243*53ee8cc1Swenshuai.xi ////////////////////////////////////// 244*53ee8cc1Swenshuai.xi // function for utopia2.0 //////////// 245*53ee8cc1Swenshuai.xi ////////////////////////////////////// 246*53ee8cc1Swenshuai.xi MS_BOOL __attribute__((weak)) MApi_IPA_Pool_Init(struct IPA_Pool_Init_Param * Init_Param); 247*53ee8cc1Swenshuai.xi MS_BOOL __attribute__((weak)) MApi_IPA_Pool_Release(MS_U32 pool_handle_id); 248*53ee8cc1Swenshuai.xi MS_BOOL __attribute__((weak)) MApi_IPA_Pool_GetMem(struct IPA_Pool_GetMem_Param * get_param); 249*53ee8cc1Swenshuai.xi MS_BOOL __attribute__((weak)) MApi_IPA_Pool_PutMem(struct IPA_Pool_PutMem_Param * put_param); 250*53ee8cc1Swenshuai.xi 251*53ee8cc1Swenshuai.xi MS_BOOL __attribute__((weak)) MApi_IPA_Pool_MapVA(struct IPA_Pool_Map_Param * map_param); 252*53ee8cc1Swenshuai.xi void __attribute__((weak)) MApi_IPA_Pool_UnmapVA(struct IPA_Pool_Unmap_Param * unmap_param); 253*53ee8cc1Swenshuai.xi MS_BOOL __attribute__((weak)) MApi_IPA_Pool_MapKerVA(struct IPA_Pool_Map_Param * map_param); 254*53ee8cc1Swenshuai.xi void __attribute__((weak)) MApi_IPA_Pool_UnmapKerVA(struct IPA_Pool_Unmap_Param * unmap_param); 255*53ee8cc1Swenshuai.xi 256*53ee8cc1Swenshuai.xi MS_BOOL __attribute__((weak)) MApi_IPA_Pool_DCacheFlush(struct IPA_Pool_DCacheFlush_Param* dcache_flush_param); 257*53ee8cc1Swenshuai.xi MS_BOOL __attribute__((weak)) MApi_IPA_Pool_HEAP_ATTR(struct IPA_Pool_Heap_Attr_Param* heap_attr_param); 258*53ee8cc1Swenshuai.xi MS_BOOL __attribute__((weak)) MApi_IPA_Pool_GETIPCHANDLE(struct IPA_Pool_GetIpcHandle_Param* getipchandle_param); 259*53ee8cc1Swenshuai.xi MS_BOOL __attribute__((weak)) MApi_IPA_Pool_InstallIpcHandle(struct IPA_Pool_InstallIpcHandle_Param* installipchandle_param); 260*53ee8cc1Swenshuai.xi MS_BOOL __attribute__((weak)) MApi_IPA_Pool_GetMem_Timeout(struct IPA_Pool_GetMem_Param* get_param,MS_U32 timeout); 261*53ee8cc1Swenshuai.xi MS_BOOL __attribute__((weak)) MApi_IPA_Pool_Notify(struct IPA_Pool_Polling_Param *polling_param); 262*53ee8cc1Swenshuai.xi #ifdef __cplusplus 263*53ee8cc1Swenshuai.xi } 264*53ee8cc1Swenshuai.xi #endif 265*53ee8cc1Swenshuai.xi #endif 266*53ee8cc1Swenshuai.xi #endif 267