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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 /////////////////////////////////////////////////////////////////////////////////////////////////// 96 /// 97 /// @file drvDMD_INTERN_DVBS.h 98 /// @brief DVBS Driver Interface 99 /// @author MStar Semiconductor Inc. 100 /////////////////////////////////////////////////////////////////////////////////////////////////// 101 102 #ifndef _DRV_DVBS_H_ 103 #define _DRV_DVBS_H_ 104 #include "UFO.h" 105 #include "MsTypes.h" 106 107 #include "MsCommon.h" 108 #include "drvDMD_common.h" 109 #ifdef __cplusplus 110 extern "C" 111 { 112 #endif 113 114 115 //------------------------------------------------------------------------------------------------- 116 // Driver Capability 117 //------------------------------------------------------------------------------------------------- 118 119 120 //------------------------------------------------------------------------------------------------- 121 // Macro and Define 122 //------------------------------------------------------------------------------------------------- 123 #define MSIF_DMD_DVBS_INTERN_LIB_CODE {'D','V', 'B','S'} //Lib code 124 #define MSIF_DMD_DVBS_INTERN_LIBVER {'0','1'} //LIB version 125 #define MSIF_DMD_DVBS_INTERN_BUILDNUM {'2','2' } //Build Number 126 #define MSIF_DMD_DVBS_INTERN_CHANGELIST {'0','0','0','0','0','0','0','0'} //P4 ChangeList Number 127 128 #define DMD_DVBS_INTERN_VER /* Character String for DRV/API version */ \ 129 MSIF_TAG, /* 'MSIF' */ \ 130 MSIF_CLASS, /* '00' */ \ 131 MSIF_CUS, /* 0x0000 */ \ 132 MSIF_MOD, /* 0x0000 */ \ 133 MSIF_CHIP, \ 134 MSIF_CPU, \ 135 MSIF_DMD_DVBS_INTERN_LIB_CODE, /* IP__ */ \ 136 MSIF_DMD_DVBS_INTERN_LIBVER, /* 0.0 ~ Z.Z */ \ 137 MSIF_DMD_DVBS_INTERN_BUILDNUM, /* 00 ~ 99 */ \ 138 MSIF_DMD_DVBS_INTERN_CHANGELIST, /* CL# */ \ 139 MSIF_OS 140 141 #define IS_BITS_SET(val, bits) (((val)&(bits)) == (bits)) 142 143 //------------------------------------------------------------------------------------------------- 144 // Type and Structure 145 //------------------------------------------------------------------------------------------------- 146 typedef enum 147 { 148 DMD_DVBS_DBGLV_NONE, // disable all the debug message 149 DMD_DVBS_DBGLV_INFO, // information 150 DMD_DVBS_DBGLV_NOTICE, // normal but significant condition 151 DMD_DVBS_DBGLV_WARNING, // warning conditions 152 DMD_DVBS_DBGLV_ERR, // error conditions 153 DMD_DVBS_DBGLV_CRIT, // critical conditions 154 DMD_DVBS_DBGLV_ALERT, // action must be taken immediately 155 DMD_DVBS_DBGLV_EMERG, // system is unusable 156 DMD_DVBS_DBGLV_DEBUG, // debug-level messages 157 } DMD_DVBS_DbgLv; 158 159 typedef enum 160 { 161 DMD_DVBS_LOCK, 162 DMD_DVBS_CHECKING, 163 DMD_DVBS_CHECKEND, 164 DMD_DVBS_UNLOCK, 165 DMD_DVBS_NULL, 166 } DMD_DVBS_LOCK_STATUS; 167 168 typedef enum 169 { 170 DMD_DVBS_GETLOCK, 171 DMD_DVBS_GETLOCK_TR_EVER_LOCK, 172 DMD_DVBS_GETLOCK_NO_CHANNEL, 173 } DMD_DVBS_GETLOCK_TYPE; 174 175 typedef enum 176 { 177 DMD_DVBS_QPSK = 0, 178 DMD_DVBS_8PSK = 1, 179 DMD_DVBS_16APSK = 2, 180 DMD_DVBS_32APSK = 3, 181 DMD_DVBS_8APSK = 4, 182 DMD_DVBS_8_8APSK = 5, 183 DMD_DVBS_4_8_4_16APSK = 6 184 } DMD_DVBS_MODULATION_TYPE; 185 186 typedef enum 187 { 188 DMD_SAT_DVBS = 0, 189 DMD_SAT_DVBS2 = 1, 190 } DMD_DVBS_DEMOD_TYPE; 191 192 typedef enum 193 { 194 /* 195 E_DMD_S2_ZIF_EN = 0x00, 196 E_DMD_S2_RF_AGC_EN, 197 E_DMD_S2_DCR_EN, 198 E_DMD_S2_IQB_EN, 199 E_DMD_S2_IIS_EN, 200 E_DMD_S2_CCI_EN, 201 E_DMD_S2_FORCE_ACI_SELECT, 202 E_DMD_S2_IQ_SWAP, //For DVBS2 203 E_DMD_S2_AGC_REF_EXT_0, 204 E_DMD_S2_AGC_REF_EXT_1, 205 E_DMD_S2_AGC_K, 206 E_DMD_S2_ADCI_GAIN, 207 E_DMD_S2_ADCQ_GAIN, 208 E_DMD_S2_SRD_SIG_SRCH_RNG, 209 E_DMD_S2_SRD_DC_EXC_RNG, 210 E_DMD_S2_FORCE_CFO_0, //0FH 211 E_DMD_S2_FORCE_CFO_1, 212 E_DMD_S2_DECIMATION_NUM, 213 E_DMD_S2_PSD_SMTH_TAP, 214 E_DMD_S2_CCI_FREQN_0_L, 215 E_DMD_S2_CCI_FREQN_0_H, 216 E_DMD_S2_CCI_FREQN_1_L, 217 E_DMD_S2_CCI_FREQN_1_H, 218 E_DMD_S2_CCI_FREQN_2_L, 219 E_DMD_S2_CCI_FREQN_2_H, 220 E_DMD_S2_TR_LOPF_KP, 221 E_DMD_S2_TR_LOPF_KI, 222 E_DMD_S2_FINEFE_KI_SWITCH_0, 223 E_DMD_S2_FINEFE_KI_SWITCH_1, 224 E_DMD_S2_FINEFE_KI_SWITCH_2, 225 E_DMD_S2_FINEFE_KI_SWITCH_3, 226 E_DMD_S2_FINEFE_KI_SWITCH_4, //1FH 227 E_DMD_S2_PR_KP_SWITCH_0, 228 E_DMD_S2_PR_KP_SWITCH_1, 229 E_DMD_S2_PR_KP_SWITCH_2, 230 E_DMD_S2_PR_KP_SWITCH_3, 231 E_DMD_S2_PR_KP_SWITCH_4, 232 E_DMD_S2_FS_GAMMA, 233 E_DMD_S2_FS_ALPHA0, 234 E_DMD_S2_FS_ALPHA1, 235 E_DMD_S2_FS_ALPHA2, 236 E_DMD_S2_FS_ALPHA3, 237 E_DMD_S2_FS_H_MODE_SEL, 238 E_DMD_S2_FS_OBSWIN, 239 E_DMD_S2_FS_PEAK_DET_TH_L, 240 E_DMD_S2_FS_PEAK_DET_TH_H, 241 E_DMD_S2_FS_CONFIRM_NUM, 242 E_DMD_S2_EQ_MU_FFE_DA, //2FH 243 E_DMD_S2_EQ_MU_FFE_DD, 244 E_DMD_S2_EQ_ALPHA_SNR_DA, 245 E_DMD_S2_EQ_ALPHA_SNR_DD, 246 E_DMD_S2_FEC_ALFA, //For DVBS2 247 E_DMD_S2_FEC_BETA, //For DVBS2 248 E_DMD_S2_FEC_SCALING_LLR, //For DVBS2 249 */ 250 E_DMD_S2_TS_SERIAL=0x00, 251 E_DMD_S2_TS_CLK_RATE, 252 E_DMD_S2_TS_OUT_INV, 253 E_DMD_S2_TS_DATA_SWAP, 254 //------------------------------------------ 255 E_DMD_S2_FW_VERSION_L, //0x3A 256 E_DMD_S2_FW_VERSION_H, //0x3B 257 E_DMD_S2_CHIP_VERSION, 258 E_DMD_S2_FS_L, //Frequency 259 E_DMD_S2_FS_H, //Frequency 260 E_DMD_S2_MANUAL_TUNE_SYMBOLRATE_L, //0x3F 261 E_DMD_S2_MANUAL_TUNE_SYMBOLRATE_H, // 262 E_DMD_S2_SYSTEM_TYPE, //DVBS/S2 263 E_DMD_S2_MODULATION_TYPE, //QPSK/8PSK 264 E_DMD_S2_BLINDSCAN_CHECK, 265 266 E_DMD_S2_UNCRT_PKT_NUM_7_0, 267 E_DMD_S2_UNCRT_PKT_NUM_8_15, 268 E_DMD_S2_STATE_FLAG, 269 E_DMD_S2_SUBSTATE_FLAG, 270 E_DMD_S2_HUM_DETECT_FLAG, 271 E_DMD_S2_CCI_DETECT_FLAG, 272 E_DMD_S2_IIS_DETECT_FLAG, 273 E_DMD_S2_OPEN_HUM_VLD_IRQ_FLAG, 274 E_DMD_S2_SRD_COARSE_DONE_FLAG, 275 E_DMD_S2_SRD_FINE_DONE_FLAG, 276 E_DMD_S2_FINEFE_DONE_FLAG, 277 E_DMD_S2_REV_FRAME_FLAG, //0x4F 278 E_DMD_S2_DUMMY_FRAME_FLAG, 279 E_DMD_S2_PLSC_DONE_FLAG, 280 E_DMD_S2_GET_INFO_FROM_FRAME_LENGTH_DONE_FLAG, 281 E_DMD_S2_IQ_SWAP_DETECT_FLAG, 282 E_DMD_S2_FRAME_ACQUISITION_DONE_FLAG, 283 E_DMD_S2_OLCFE_DONE_FLAG, 284 E_DMD_S2_FSYNC_FOUND_FLAG, 285 E_DMD_S2_FSYNC_FAIL_SEARCH_FLAG, 286 E_DMD_S2_FALSE_ALARM_FLAG, 287 E_DMD_S2_VITERBI_IN_SYNC_FLAG, 288 E_DMD_S2_INT_CODE_RATE_SEARCH_FAIL_FLAG, 289 E_DMD_S2_VITERBI_INT_PRE_FLAG, 290 E_DMD_S2_BER_WINDOW_END_FLAG, 291 E_DMD_S2_PASS_WRONG_INT_FLAG, 292 E_DMD_S2_CLK_CNT_OVER_FLAG, 293 E_DMD_S2_UNCRT_OVER_FLAG, //0x5F 294 E_DMD_S2_DISEQC_RX_LENGTH, 295 E_DMD_S2_DISEQC_INTERRUPT_FLAG, 296 E_DMD_S2_DISEQC_RX_FLAG, 297 E_DMD_S2_DISEQC_INTERRUPT_STATUS, 298 E_DMD_S2_DISEQC_STATUS_FLAG, 299 E_DMD_S2_ACI_FIR_SELECTED, //0x65 300 //LOCK 301 E_DMD_S2_AGC_LOCK_FLAG, 302 E_DMD_S2_DCR_LOCK_FLAG, 303 E_DMD_S2_DAGC0_LOCK_FLAG, 304 E_DMD_S2_DAGC1_LOCK_FLAG, 305 E_DMD_S2_DAGC2_LOCK_FLAG, 306 E_DMD_S2_DAGC3_LOCK_FLAG, 307 E_DMD_S2_TR_LOCK_FLAG, 308 E_DMD_S2_CLCFE_LOCK_FLAG, 309 E_DMD_S2_EQ_LOCK_FLAG, 310 E_DMD_S2_PR_LOCK_FLAG, //0x6F 311 E_DMD_S2_FSYNC_LOCK_FLAG, 312 E_DMD_S2_FSYNC_FAIL_LOCK_FLAG, 313 314 E_DMD_S2_MB_SWUSE12L, //0x72 315 E_DMD_S2_MB_SWUSE12H, 316 E_DMD_S2_MB_SWUSE13L, 317 E_DMD_S2_MB_SWUSE13H, 318 E_DMD_S2_MB_SWUSE14L, 319 E_DMD_S2_MB_SWUSE14H, 320 E_DMD_S2_MB_SWUSE15L, 321 E_DMD_S2_MB_SWUSE15H, 322 E_DMD_S2_MB_SWUSE16L, 323 E_DMD_S2_MB_SWUSE16H, 324 E_DMD_S2_MB_SWUSE17L, 325 E_DMD_S2_MB_SWUSE17H, 326 E_DMD_S2_MB_SWUSE18L, 327 E_DMD_S2_MB_SWUSE18H, //0x7F 328 E_DMD_S2_MB_SWUSE19L, 329 E_DMD_S2_MB_SWUSE19H, 330 E_DMD_S2_MB_SWUSE1AL, 331 E_DMD_S2_MB_SWUSE1AH, 332 E_DMD_S2_MB_SWUSE1BL, 333 E_DMD_S2_MB_SWUSE1BH, 334 E_DMD_S2_MB_SWUSE1CL, 335 E_DMD_S2_MB_SWUSE1CH, 336 E_DMD_S2_MB_SWUSE1DL, 337 E_DMD_S2_MB_SWUSE1DH, 338 E_DMD_S2_MB_SWUSE1EL, 339 E_DMD_S2_MB_SWUSE1EH, 340 E_DMD_S2_MB_SWUSE1FL, 341 E_DMD_S2_MB_SWUSE1FH, //0x8D 342 343 E_DMD_S2_MB_DMDTOP_DBG_0, 344 E_DMD_S2_MB_DMDTOP_DBG_1, //0x8F 345 E_DMD_S2_MB_DMDTOP_DBG_2, 346 E_DMD_S2_MB_DMDTOP_DBG_3, 347 E_DMD_S2_MB_DMDTOP_DBG_4, 348 E_DMD_S2_MB_DMDTOP_DBG_5, 349 E_DMD_S2_MB_DMDTOP_DBG_6, 350 E_DMD_S2_MB_DMDTOP_DBG_7, 351 E_DMD_S2_MB_DMDTOP_DBG_8, 352 E_DMD_S2_MB_DMDTOP_DBG_9, 353 E_DMD_S2_MB_DMDTOP_DBG_A, 354 E_DMD_S2_MB_DMDTOP_DBG_B, 355 356 E_DMD_S2_MB_DMDTOP_SWUSE00L, 357 E_DMD_S2_MB_DMDTOP_SWUSE00H, 358 E_DMD_S2_MB_DMDTOP_SWUSE01L, 359 E_DMD_S2_MB_DMDTOP_SWUSE01H, 360 E_DMD_S2_MB_DMDTOP_SWUSE02L, 361 E_DMD_S2_MB_DMDTOP_SWUSE02H, //0x9F 362 E_DMD_S2_MB_DMDTOP_SWUSE03L, 363 E_DMD_S2_MB_DMDTOP_SWUSE03H, 364 E_DMD_S2_MB_DMDTOP_SWUSE04L, 365 E_DMD_S2_MB_DMDTOP_SWUSE04H, 366 E_DMD_S2_MB_DMDTOP_SWUSE05L, 367 E_DMD_S2_MB_DMDTOP_SWUSE05H, 368 E_DMD_S2_MB_DMDTOP_SWUSE06L, 369 E_DMD_S2_MB_DMDTOP_SWUSE06H, 370 E_DMD_S2_MB_DMDTOP_SWUSE07L, 371 E_DMD_S2_MB_DMDTOP_SWUSE07H, 372 373 E_DMD_S2_MB_TOP_WR_DBG_90, 374 E_DMD_S2_MB_TOP_WR_DBG_91, 375 E_DMD_S2_MB_TOP_WR_DBG_92, 376 E_DMD_S2_MB_TOP_WR_DBG_93, 377 E_DMD_S2_MB_TOP_WR_DBG_94, 378 E_DMD_S2_MB_TOP_WR_DBG_95, //0xAF 379 E_DMD_S2_MB_TOP_WR_DBG_96, 380 E_DMD_S2_MB_TOP_WR_DBG_97, 381 E_DMD_S2_MB_TOP_WR_DBG_98, 382 E_DMD_S2_MB_TOP_WR_DBG_99, 383 384 E_DMD_S2_MB_DUMMY_REG_0, 385 E_DMD_S2_MB_DUMMY_REG_1, 386 E_DMD_S2_MB_DUMMY_REG_2, 387 E_DMD_S2_MB_DUMMY_REG_3, 388 E_DMD_S2_MB_DUMMY_REG_4, 389 E_DMD_S2_MB_DUMMY_REG_5, 390 E_DMD_S2_MB_DUMMY_REG_6, 391 E_DMD_S2_MB_DUMMY_REG_7, 392 E_DMD_S2_MB_DUMMY_REG_8, 393 E_DMD_S2_MB_DUMMY_REG_9, 394 E_DMD_S2_MB_DUMMY_REG_A, 395 E_DMD_S2_MB_DUMMY_REG_B, //0xBF 396 E_DMD_S2_MB_DUMMY_REG_C, 397 E_DMD_S2_MB_DUMMY_REG_D, 398 E_DMD_S2_MB_DUMMY_REG_E, 399 E_DMD_S2_MB_DUMMY_REG_F, 400 E_DMD_S2_MB_DUMMY_REG_10, 401 E_DMD_S2_MB_DUMMY_REG_11, 402 403 E_DMD_S2_MB_DMDTOP_INFO_01, 404 E_DMD_S2_MB_DMDTOP_INFO_02, 405 E_DMD_S2_MB_DMDTOP_INFO_03, 406 E_DMD_S2_MB_DMDTOP_INFO_04, 407 E_DMD_S2_MB_DMDTOP_INFO_05, 408 E_DMD_S2_MB_DMDTOP_INFO_06, 409 E_DMD_S2_MB_DMDTOP_INFO_07, 410 E_DMD_S2_MB_DMDTOP_INFO_08, 411 412 E_DMD_S2_IDLE_STATE_UPDATED, 413 E_DMD_S2_LOG_FLAG, //0xCF 414 E_DMD_S2_LOG_SKIP_INDEX, 415 E_DMD_S2_LOCK_COUNT, 416 E_DMD_S2_NARROW_STEP_FLAG, 417 E_DMD_S2_UNCORRECT_PKT_COUNT, 418 E_DMD_S2_DISEQC_INIT_MODE, 419 E_DMD_S2_DECIMATE_FORCED, 420 E_DMD_S2_SRD_MAX_SRG_FLAG, 421 E_DMD_S2_DVBS_OUTER_RETRY, 422 423 E_DMD_S2_FORCED_DECIMATE_FLAG, 424 E_DMD_S2_NO_SIGNAL_FLAG, 425 E_DMD_S2_SPECTRUM_TRACK_FLAG, 426 E_DMD_S2_SRD_LOCAL_SEARCH_FLAG, 427 E_DMD_S2_NO_SIGNAL_RATIO_CHECK_FLAG, 428 E_DMD_S2_LOW_SR_ACI_FLAG, 429 E_DMD_S2_SPECTRUM_TRACKER_TIMEOUT, 430 E_DMD_S2_TR_TIMEOUT, //0xDF 431 E_DMD_S2_BALANCE_TRACK, 432 E_DMD_S2_GAIN_TILT_FLAG, //0xE1 433 E_DMD_S2_SIS_EN, 434 E_DMD_S2_ISSY_ACTIVE, 435 E_DMD_S2_CODE_RATE,//174 436 E_DMD_S2_PILOT_FLAG, 437 E_DMD_S2_FEC_TYPE, 438 E_DMD_S2_MOD_TYPE,//177 439 E_DMD_S2_VCM_OPT, 440 E_DMD_S2_OPPRO_FLAG, 441 E_DMD_S2_IS_ID, 442 E_DMD_S2_CHECK_EVER_UNLOCK, //0xE2 443 E_DMD_S2_IS_ID_TABLE = 0x100, // use 32bytes length 444 DVBS2_PARAM_LEN = 120 445 } DVBS_Param_2; 446 447 448 449 //Interrupt callback 450 typedef void (*fpIntCallBack)(MS_U8 u8arg); 451 452 453 typedef struct 454 { 455 // tuner parameter 456 MS_U8 u8SarChannel; 457 DMD_RFAGC_SSI *pTuner_RfagcSsi; 458 MS_U16 u16Tuner_RfagcSsi_Size; 459 DMD_IFAGC_SSI *pTuner_IfagcSsi_LoRef; 460 MS_U16 u16Tuner_IfagcSsi_LoRef_Size; 461 DMD_IFAGC_SSI *pTuner_IfagcSsi_HiRef; 462 MS_U16 u16Tuner_IfagcSsi_HiRef_Size; 463 DMD_IFAGC_ERR *pTuner_IfagcErr_LoRef; 464 MS_U16 u16Tuner_IfagcErr_LoRef_Size; 465 DMD_IFAGC_ERR *pTuner_IfagcErr_HiRef; 466 MS_U16 u16Tuner_IfagcErr_HiRef_Size; 467 DMD_SQI_CN_NORDIGP1 *pSqiCnNordigP1; 468 MS_U16 u16SqiCnNordigP1_Size; 469 470 // register init 471 MS_U8 *u8DMD_DVBS_DSPRegInitExt; // TODO use system variable type 472 MS_U8 u8DMD_DVBS_DSPRegInitSize; 473 MS_U8 *u8DMD_DVBS_InitExt; // TODO use system variable type 474 475 //add for Kris: Since we have to borrow 3MByte DRAM for DJB 476 #ifdef UFO_PUBLIC_HEADER_212 477 MS_U32 u32DjbStartAddr; 478 #endif 479 480 } DMD_DVBS_InitData; 481 482 typedef enum 483 { 484 E_DMD_DVBS_FAIL=0, 485 E_DMD_DVBS_OK=1 486 } DMD_DVBS_Result; 487 488 489 typedef struct 490 { 491 MS_U16 u16Version; 492 MS_U32 u32SymbolRate; 493 DMD_DVBS_MODULATION_TYPE eQamMode; 494 MS_U32 u32IFFreq; 495 MS_BOOL bSpecInv; 496 MS_BOOL bSerialTS; 497 MS_U8 u8SarValue; 498 MS_U32 u32ChkScanTimeStart; 499 DMD_DVBS_LOCK_STATUS eLockStatus; 500 MS_U16 u16Strength; 501 MS_U16 u16Quality; 502 MS_U32 u32Intp; // 503 MS_U32 u32FcFs; // 504 MS_U8 u8Qam; // 505 MS_U16 u16SymbolRateHal; // 506 } DMD_DVBS_Info; 507 508 //-------------------------------------------------------------------------------------- 509 //-------------------------------------------------------------------------------------- 510 /// Define converlution code rate for DVB-T and DVB-S 511 typedef enum 512 { 513 HAL_DEMOD_CONV_CODE_RATE_1_2, ///< Code rate = 1/2 514 HAL_DEMOD_CONV_CODE_RATE_1_3, ///< Code rate = 1/3 515 HAL_DEMOD_CONV_CODE_RATE_2_3, ///< Code rate = 2/3 516 HAL_DEMOD_CONV_CODE_RATE_1_4, ///< Code rate = 1/4 517 HAL_DEMOD_CONV_CODE_RATE_3_4, ///< Code rate = 3/4 518 HAL_DEMOD_CONV_CODE_RATE_2_5, ///< Code rate = 2/5 519 HAL_DEMOD_CONV_CODE_RATE_3_5, ///< Code rate = 3/5 520 HAL_DEMOD_CONV_CODE_RATE_4_5, ///< Code rate = 4/5 521 HAL_DEMOD_CONV_CODE_RATE_5_6, ///< Code rate = 5/6 522 HAL_DEMOD_CONV_CODE_RATE_7_8, ///< Code rate = 7/8 523 HAL_DEMOD_CONV_CODE_RATE_8_9, ///< Code rate = 8/9 524 HAL_DEMOD_CONV_CODE_RATE_9_10, ///< Code rate = 9/10 525 526 HAL_DEMOD_DVBS2_CODE_RATE_2_9, 527 HAL_DEMOD_DVBS2_CODE_RATE_13_45, 528 HAL_DEMOD_DVBS2_CODE_RATE_9_20, 529 HAL_DEMOD_DVBS2_CODE_RATE_90_180, 530 HAL_DEMOD_DVBS2_CODE_RATE_96_180, 531 HAL_DEMOD_DVBS2_CODE_RATE_11_20, 532 HAL_DEMOD_DVBS2_CODE_RATE_100_180, 533 HAL_DEMOD_DVBS2_CODE_RATE_104_180, 534 HAL_DEMOD_DVBS2_CODE_RATE_26_45_L, 535 HAL_DEMOD_DVBS2_CODE_RATE_18_30, 536 HAL_DEMOD_DVBS2_CODE_RATE_28_45, 537 HAL_DEMOD_DVBS2_CODE_RATE_23_36, 538 HAL_DEMOD_DVBS2_CODE_RATE_116_180, 539 HAL_DEMOD_DVBS2_CODE_RATE_20_30, 540 HAL_DEMOD_DVBS2_CODE_RATE_124_180, 541 HAL_DEMOD_DVBS2_CODE_RATE_25_36, 542 HAL_DEMOD_DVBS2_CODE_RATE_128_180, 543 HAL_DEMOD_DVBS2_CODE_RATE_13_18, 544 HAL_DEMOD_DVBS2_CODE_RATE_132_180, 545 HAL_DEMOD_DVBS2_CODE_RATE_22_30, 546 HAL_DEMOD_DVBS2_CODE_RATE_135_180, 547 HAL_DEMOD_DVBS2_CODE_RATE_140_180, 548 HAL_DEMOD_DVBS2_CODE_RATE_7_9, 549 HAL_DEMOD_DVBS2_CODE_RATE_154_180, 550 HAL_DEMOD_DVBS2_CODE_RATE_11_45, 551 HAL_DEMOD_DVBS2_CODE_RATE_4_15, 552 HAL_DEMOD_DVBS2_CODE_RATE_14_45, 553 HAL_DEMOD_DVBS2_CODE_RATE_7_15, 554 HAL_DEMOD_DVBS2_CODE_RATE_8_15, 555 HAL_DEMOD_DVBS2_CODE_RATE_26_45_S, 556 HAL_DEMOD_DVBS2_CODE_RATE_32_45 557 } HAL_DEMOD_EN_CONV_CODE_RATE_TYPE; 558 559 /// Define terrestrial band width 560 typedef enum 561 { 562 HAL_DEMOD_BW_MODE_6MHZ = 0, ///< 6 MHz 563 HAL_DEMOD_BW_MODE_7MHZ, ///< 7 MHz 564 HAL_DEMOD_BW_MODE_8MHZ ///< 8 MHz 565 } HAL_DEMOD_EN_TER_BW_MODE; 566 567 568 /// Define terrestrial constellation type 569 typedef enum 570 { 571 HAL_DEMOD_TER_QPSK, ///< QPSK type 572 HAL_DEMOD_TER_QAM16, ///< QAM 16 type 573 HAL_DEMOD_TER_QAM64 ///< QAM 64 type 574 } HAL_DEMOD_EN_TER_CONSTEL_TYPE; 575 576 /// Define terrestrial hierarchy information 577 typedef enum 578 { 579 HAL_DEMOD_TER_HIE_NONE, ///< Non-hierarchy 580 HAL_DEMOD_TER_HIE_ALPHA_1, ///< Hierarchy alpha = 1 581 HAL_DEMOD_TER_HIE_ALPHA_2, ///< Hierarchy alpha = 2 582 HAL_DEMOD_TER_HIE_ALPHA_4 ///< Hierarchy alpha = 4 583 } HAL_DEMOD_EN_TER_HIE_TYPE; 584 585 /// Define terrestrial guard interval 586 typedef enum 587 { 588 HAL_DEMOD_TER_GI_1_32, ///< Guard interval value = 1/32 589 HAL_DEMOD_TER_GI_1_16, ///< Guard interval value = 1/16 590 HAL_DEMOD_TER_GI_1_8, ///< Guard interval value = 1/8 591 HAL_DEMOD_TER_GI_1_4 ///< Guard interval value = 1/4 592 } HAL_DEMOD_EN_TER_GI_TYPE; 593 594 /// Define terrestrial transmission mode 595 typedef enum 596 { 597 HAL_DEMOD_TER_FFT_2K, ///< 2k FFT mode 598 HAL_DEMOD_TER_FFT_8K ///< 8k FFT mode 599 } HAL_DEMOD_EN_TER_FFT_MODE; 600 601 /// Define terrestrial transmission mode 602 typedef enum 603 { 604 HAL_DEMOD_TER_HP_SEL, ///< High priority level selection 605 HAL_DEMOD_TER_LP_SEL ///< Low priority level selection 606 } HAL_DEMOD_EN_TER_LEVEL_SEL; 607 608 /// Define DVB-C modulation scheme 609 typedef enum 610 { 611 HAL_DEMOD_CAB_QAM16, ///< QAM 16 612 HAL_DEMOD_CAB_QAM32, ///< QAM 32 613 HAL_DEMOD_CAB_QAM64, ///< QAM 64 614 HAL_DEMOD_CAB_QAM128, ///< QAM 128 615 HAL_DEMOD_CAB_QAM256 616 } HAL_DEMOD_EN_CAB_CONSTEL_TYPE; 617 618 619 /// Define DVB-S IQ tuning mode 620 typedef enum 621 { 622 HAL_DEMOD_CAB_IQ_NORMAL, ///< Normal 623 HAL_DEMOD_CAB_IQ_INVERT ///< Inverse 624 } HAL_DEMOD_EN_CAB_IQ_MODE; 625 626 627 /// Define DVB-S modulatiopn scheme 628 typedef enum 629 { 630 HAL_DEMOD_SAT_DVBS, 631 HAL_DEMOD_SAT_DVBS2 ///< DVBS2 ///< DVBS 632 } HAL_DEMOD_EN_SAT_MOD_TYPE; 633 634 typedef enum 635 { 636 HAL_DEMOD_SAT_QPSK, ///< QPSK 637 HAL_DEMOD_SAT_8PSK, ///< 8PSK 638 HAL_DEMOD_SAT_QAM16, ///< QAM16 639 //HAL_DEMOD_SAT_16APSK, 640 HAL_DEMOD_SAT_32APSK, 641 HAL_DEMOD_SAT_8APSK, 642 HAL_DEMOD_SAT_8_8APSK, 643 HAL_DEMOD_SAT_4_8_4_16APSK 644 } HAL_DEMOD_EN_SAT_CONSTEL_TYPE; 645 646 /// Define DVB-S Roll-Off factor 647 typedef enum 648 { 649 HAL_DEMOD_SAT_RO_35, ///< roll-off factor = 0.35 650 HAL_DEMOD_SAT_RO_25, ///< roll-off factor = 0.25 651 HAL_DEMOD_SAT_RO_20 ///< roll-off factor = 0.20 652 } HAL_DEMOD_EN_SAT_ROLL_OFF_TYPE; 653 654 /// Define DVB-S IQ tuning mode 655 typedef enum 656 { 657 HAL_DEMOD_SAT_IQ_NORMAL, ///< Normal 658 HAL_DEMOD_SAT_IQ_INVERSE ///< Inverse 659 } HAL_DEMOD_EN_SAT_IQ_MODE; 660 661 /// Define Bit Error Rate range measure from signal 662 typedef enum 663 { 664 HAL_DEMOD_BIT_ERR_RATIO_LOW , ///< Low BER 665 HAL_DEMOD_BIT_ERR_RATIO_MEDIUM , ///< Medium BER 666 HAL_DEMOD_BIT_ERR_RATIO_HIGH ///< High BER 667 } HAL_DEMOD_EN_BIT_ERR_RATIO; 668 669 /// Define lock status of front end 670 typedef enum 671 { 672 HAL_DEMOD_FE_UNLOCKED = 0, ///< Frontend is unlocked 673 HAL_DEMOD_FE_LOCKED ///< Frontend is locked 674 } HAL_DEMOD_EN_FE_LOCK_STATUS; 675 676 677 /// Define tuning mode 678 /// NOTE: When this typedef is modified, the apiChScan should be rebuild. 679 typedef enum 680 { 681 HAL_DEMOD_FE_TUNE_MANUAL, ///< Manual tuning to carrier 682 HAL_DEMOD_FE_TUNE_AUTO, ///< Auto tuning to carrier 683 } HAL_DEMOD_EN_FE_TUNE_MODE; 684 685 /// Define output mode 686 /// NOTE: When this typedef is modified, the apiChScan should be rebuild. 687 typedef enum 688 { 689 HAL_DEMOD_INTERFACE_SERIAL = 0, ///< Serial interface 690 HAL_DEMOD_INTERFACE_PARALLEL ///< Parallel interface 691 } HAL_DEMOD_INTERFACE_MODE; 692 693 /// Define tuning paramter of DVB-T front-end 694 typedef struct 695 { 696 HAL_DEMOD_EN_TER_BW_MODE eBandWidth; ///< Band width 697 HAL_DEMOD_EN_TER_CONSTEL_TYPE eConstellation; ///< Constellation type 698 HAL_DEMOD_EN_TER_HIE_TYPE eHierarchy; ///< Hierarchy 699 HAL_DEMOD_EN_TER_GI_TYPE eGuardInterval; ///< Guard interval 700 HAL_DEMOD_EN_TER_FFT_MODE eFFT_Mode; ///< Transmission mode 701 HAL_DEMOD_EN_CONV_CODE_RATE_TYPE eHPCodeRate; ///< HP code rate 702 HAL_DEMOD_EN_CONV_CODE_RATE_TYPE eLPCodeRate; ///< LP code rate 703 HAL_DEMOD_EN_TER_LEVEL_SEL eLevelSel; ///< Select HP or LP level 704 } HAL_DEMOD_MS_TER_CARRIER_PARAM; 705 706 /// Define tuning paramter of DVB-C front-end 707 typedef struct 708 { 709 HAL_DEMOD_EN_CAB_CONSTEL_TYPE eConstellation; ///< Constellation type 710 MS_U16 u16SymbolRate; ///< Symbol rate (Ksym/sec) 711 712 HAL_DEMOD_EN_CAB_IQ_MODE eIQMode; ///< IQ Mode 713 MS_U8 u8TapAssign; ///< Tap assign 714 MS_U32 u32FreqOffset; ///< Carrier frequency offset 715 MS_U8 u8TuneFreqOffset; ///< Requeset tuner freq offset 716 } HAL_DEMOD_MS_CAB_CARRIER_PARAM; 717 718 /// Define tuning paramter of DVB-S front-end 719 typedef struct 720 { 721 //HAL_DEMOD_EN_SAT_MOD_TYPE eDemod_Type; ///< Mode type 722 HAL_DEMOD_EN_SAT_CONSTEL_TYPE eConstellation; ///< Constellation type 723 HAL_DEMOD_EN_SAT_ROLL_OFF_TYPE eRollOff; ///< Roll-Off factor 724 HAL_DEMOD_EN_SAT_IQ_MODE eIQ_Mode; ///< IQ mode 725 HAL_DEMOD_EN_CONV_CODE_RATE_TYPE eCodeRate; ///< Converlution code rate 726 MS_U32 u32SymbolRate; 727 728 #if defined(UFO_PUBLIC_HEADER_212) || defined(UFO_PUBLIC_HEADER_300) || defined(UFO_DEMOD_GetParam_NEW_FLOW) 729 HAL_DEMOD_EN_SAT_MOD_TYPE eDemodType; 730 float eFreqoff; 731 #endif 732 //MS_U8 u8Polarity; // 0: Horizon; > 0(default 1): Vertical; 733 //MS_S16 s16FreqOffset; 734 735 } HAL_DEMOD_MS_SAT_CARRIER_PARAM; 736 737 /// Define carrier paramter of digital tuner 738 /// NOTE: When this typedef is modified, the apiChScan should be rebuild. 739 typedef struct 740 { 741 MS_U32 u32Frequency; 742 union 743 { 744 HAL_DEMOD_MS_TER_CARRIER_PARAM TerParam; ///< Paramters for DVB-T front-end 745 HAL_DEMOD_MS_CAB_CARRIER_PARAM CabParam; ///< Paramters for DVB-C front-end 746 HAL_DEMOD_MS_SAT_CARRIER_PARAM SatParam; ///< Paramters for DVB-S front-end 747 }; 748 } HAL_DEMOD_MS_FE_CARRIER_PARAM; 749 750 //-------------------------------------------------------------------- 751 //-------------------------------------------------------------------- 752 #ifdef UFO_PUBLIC_HEADER_212 753 typedef struct 754 { 755 MS_U8 cmd_code; 756 MS_U8 param[80]; 757 } S_CMDPKTREG; 758 759 typedef enum 760 { 761 TS_MODUL_MODE, 762 TS_FFX_VALUE, 763 TS_GUARD_INTERVAL, 764 TS_CODE_RATE, 765 766 TS_PARAM_MAX_NUM 767 }E_SIGNAL_TYPE; 768 769 typedef enum 770 { 771 CMD_SYSTEM_INIT = 0, 772 CMD_DAC_CALI, 773 CMD_DVBT_CONFIG, 774 CMD_DVBC_CONFIG, 775 CMD_VIF_CTRL, 776 CMD_FSM_CTRL, 777 CMD_INDIR_RREG, 778 CMD_INDIR_WREG, 779 CMD_GET_INFO, 780 CMD_TS_CTRL, 781 CMD_TUNED_VALUE, 782 783 CMD_MAX_NUM 784 }E_CMD_CODE; 785 786 typedef enum 787 { 788 TS_PARALLEL = 0, 789 TS_SERIAL = 1, 790 791 TS_MODE_MAX_NUM 792 }E_TS_MODE; 793 794 typedef enum 795 { 796 E_SYS_UNKOWN = -1, 797 E_SYS_DVBT, 798 E_SYS_DVBC, 799 E_SYS_ATSC, 800 E_SYS_VIF, 801 E_SYS_DVBS, 802 803 E_SYS_NUM 804 }E_SYSTEM; 805 #endif 806 807 /// Define the quality report 808 typedef struct 809 { 810 HAL_DEMOD_EN_FE_LOCK_STATUS eLock; ///< Lock 811 HAL_DEMOD_EN_BIT_ERR_RATIO eBER; ///< Bit error rate 812 float fSNR; ///< SNR 813 float fSignalLevel; ///< Signal Level=1~100 814 MS_U16 u16SignalStrength; ///< Signal Strength[dBm],mick 815 MS_U8 u8SignalQuality; ///< Signal Quality,mick 816 float fPreBER; ///< xxE-xx,mick 817 float fPostBerTSBER; 818 MS_U32 u32LockTime; ///< LockTime 819 MS_U16 u16TSpacketError; ///< TS Packet Error 820 } HAL_DEMOD_MS_FE_CARRIER_STATUS; 821 822 typedef struct 823 { 824 MS_BOOL bLNBPowerOn; ///< Power On/Off 825 MS_BOOL b22kOn; ///< LNB 22k On/Off 826 MS_BOOL bLNBOutLow; ///< LNB 13/18V 827 828 } HAL_DEMOD_MS_FE_CARRIER_DISEQC; 829 830 /// Define the carrier information 831 typedef struct 832 { 833 HAL_DEMOD_MS_FE_CARRIER_PARAM Param; ///< Carrier parameter 834 HAL_DEMOD_MS_FE_CARRIER_STATUS Status; ///< Quality report 835 HAL_DEMOD_MS_FE_CARRIER_DISEQC DiSEqCp; ///< DiSEqC 836 } HAL_DEMOD_MS_FE_CARRIER_INFO; 837 838 typedef struct 839 { 840 // Demodulator option 841 MS_BOOL bX4CFE_en; ///< Carrier frequency estimation 842 MS_BOOL bPPD_en; ///< Tap assign estimation 843 MS_BOOL bIQAutoSwap_en; ///< IQ mode auto swap 844 MS_BOOL bQAMScan_en; ///< QAM type auto scan 845 MS_BOOL bFHO_en; ///< FHO 846 MS_BOOL (*fptTunerSet)(MS_U32); ///< Tuner set freq function pointer 847 } Hal_Demod_Mode; 848 849 //d0: 1/4, d1: 1/3, d2: 2/5, d3: 1/2, d4: 3/5, d5: 2/3, d6: 3/4, d7: 4/5, d8: 5/6, d9: 8/9, d10: 9/10, 850 //d11: 2/9, d12: 13/45, d13: 9/20, d14: 90/180, d15: 96/180, d16: 11/20, d17: 100/180, d18: 104/180, d19: 26/45 851 //d20: 18/30, d21: 28/45, d22: 23/36, d23: 116/180, d24: 20/30, d25: 124/180, d26: 25/36, d27: 128/180,, d28: 13/18 852 //d29: 132/180, d30: 22/30, d31: 135/180, d32: 140/180, d33: 7/9, d34: 154/180 853 //d35: 11/45, d36: 4/15, d37: 14/45, d38: 7/15, d39: 8/15, d40: 26/45, d41: 32/45 854 855 typedef enum 856 { 857 DMD_CONV_CODE_RATE_1_2, ///< Code rate = 1/2 858 DMD_CONV_CODE_RATE_1_3, ///< Code rate = 1/3 859 DMD_CONV_CODE_RATE_2_3, ///< Code rate = 2/3 860 DMD_CONV_CODE_RATE_1_4, ///< Code rate = 1/4 861 DMD_CONV_CODE_RATE_3_4, ///< Code rate = 3/4 862 DMD_CONV_CODE_RATE_2_5, ///< Code rate = 2/5 863 DMD_CONV_CODE_RATE_3_5, ///< Code rate = 3/5 864 DMD_CONV_CODE_RATE_4_5, ///< Code rate = 4/5 865 DMD_CONV_CODE_RATE_5_6, ///< Code rate = 5/6 866 DMD_CONV_CODE_RATE_7_8, ///< Code rate = 7/8 867 DMD_CONV_CODE_RATE_8_9, ///< Code rate = 8/9 868 DMD_CONV_CODE_RATE_9_10, ///< Code rate = 9/10 869 870 // DVBS2X 871 872 DMD_DVBS2_CODE_RATE_2_9, 873 DMD_DVBS2_CODE_RATE_13_45, 874 DMD_DVBS2_CODE_RATE_9_20, 875 DMD_DVBS2_CODE_RATE_90_180, 876 DMD_DVBS2_CODE_RATE_96_180, 877 DMD_DVBS2_CODE_RATE_11_20, 878 DMD_DVBS2_CODE_RATE_100_180, 879 DMD_DVBS2_CODE_RATE_104_180, 880 DMD_DVBS2_CODE_RATE_26_45_L, 881 DMD_DVBS2_CODE_RATE_18_30, 882 DMD_DVBS2_CODE_RATE_28_45, 883 DMD_DVBS2_CODE_RATE_23_36, 884 DMD_DVBS2_CODE_RATE_116_180, 885 DMD_DVBS2_CODE_RATE_20_30, 886 DMD_DVBS2_CODE_RATE_124_180, 887 DMD_DVBS2_CODE_RATE_25_36, 888 DMD_DVBS2_CODE_RATE_128_180, 889 DMD_DVBS2_CODE_RATE_13_18, 890 DMD_DVBS2_CODE_RATE_132_180, 891 DMD_DVBS2_CODE_RATE_22_30, 892 DMD_DVBS2_CODE_RATE_135_180, 893 DMD_DVBS2_CODE_RATE_140_180, 894 DMD_DVBS2_CODE_RATE_7_9, 895 DMD_DVBS2_CODE_RATE_154_180, 896 DMD_DVBS2_CODE_RATE_11_45, 897 DMD_DVBS2_CODE_RATE_4_15, 898 DMD_DVBS2_CODE_RATE_14_45, 899 DMD_DVBS2_CODE_RATE_7_15, 900 DMD_DVBS2_CODE_RATE_8_15, 901 DMD_DVBS2_CODE_RATE_26_45_S, 902 DMD_DVBS2_CODE_RATE_32_45 903 } DMD_DVBS_CODE_RATE_TYPE; 904 905 #ifdef UFO_SUPPORT_VCM 906 typedef enum 907 { 908 VCM_Disabled = 0, 909 VCM_MODE, 910 VCM_Forced_Mode 911 }DMD_DVBS_VCM_OPT; 912 #endif 913 914 #ifdef UFO_SUPPORT_KERNEL_FLOATING 915 typedef struct 916 { 917 MS_S32 DATA; // 2^31-1 ~ -2^31 918 MS_S8 EXP; // -128~127 919 }MS_FLOAT_ST; 920 //output = DATA*2^(EXP) 921 922 typedef enum 923 { 924 add = 0, 925 minus, 926 multiply, 927 divide 928 }OP_type; 929 #endif 930 931 //typedef void(*P_DMD_ISR_Proc)(MS_U8 u8DMDID); 932 //--------------------------------------------------------------- 933 934 935 //------------------------------------------------------------------------------------------------- 936 // Function and Variable 937 //------------------------------------------------------------------------------------------------- 938 //////////////////////////////////////////////////////////////////////////////// 939 /// MDrv_DMD_DVBT_Init 940 //////////////////////////////////////////////////////////////////////////////// 941 942 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_Init(DMD_DVBS_InitData *pDMD_DVBS_InitData, MS_U32 u32InitDataLen); 943 //////////////////////////////////////////////////////////////////////////////// 944 /// Should be called when exit VD input source 945 //////////////////////////////////////////////////////////////////////////////// 946 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_Exit(void); 947 //------------------------------------------------------------------------------ 948 /// Set detailed level of DVBT driver debug message 949 /// u8DbgLevel : debug level for Parallel Flash driver\n 950 /// AVD_DBGLV_NONE, ///< disable all the debug message\n 951 /// AVD_DBGLV_INFO, ///< information\n 952 /// AVD_DBGLV_NOTICE, ///< normal but significant condition\n 953 /// AVD_DBGLV_WARNING, ///< warning conditions\n 954 /// AVD_DBGLV_ERR, ///< error conditions\n 955 /// AVD_DBGLV_CRIT, ///< critical conditions\n 956 /// AVD_DBGLV_ALERT, ///< action must be taken immediately\n 957 /// AVD_DBGLV_EMERG, ///< system is unusable\n 958 /// AVD_DBGLV_DEBUG, ///< debug-level messages\n 959 /// @return TRUE : succeed 960 /// @return FALSE : failed to set the debug level 961 //------------------------------------------------------------------------------ 962 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_SetDbgLevel(DMD_DVBS_DbgLv u8DbgLevel); 963 //------------------------------------------------------------------------------------------------- 964 /// Get the information of DVBT driver\n 965 /// @return the pointer to the driver information 966 //------------------------------------------------------------------------------------------------- 967 extern DLL_PUBLIC const DMD_DVBS_Info* MDrv_DMD_DVBS_GetInfo(void); 968 //------------------------------------------------------------------------------------------------- 969 /// Get DVBT driver version 970 /// when get ok, return the pointer to the driver version 971 //------------------------------------------------------------------------------------------------- 972 973 /////////////////////////////////////////////////////////////////////////////////// 974 ///To get/set the DSP parameter table from demod MCU 975 //u16Addr :the address of the demod MCU DSP parameter table 976 ////////////////////////////////////////////////////////////////////////////////// 977 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_GetDSPReg(MS_U16 u16Addr, MS_U8 *pu8Data); 978 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_SetDSPReg(MS_U16 u16Addr, MS_U8 pu8Data); 979 980 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_GetLibVer(const MSIF_Version **ppVersion); 981 982 //////////////////////////////////////////////////////////////////////////////// 983 /// To get DVBT's register value, only for special purpose.\n 984 /// u16Addr : the address of DVBT's register\n 985 /// return the value of AFEC's register\n 986 //////////////////////////////////////////////////////////////////////////////// 987 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_GetReg(MS_U16 u16Addr, MS_U8 *pu8Data); 988 //////////////////////////////////////////////////////////////////////////////// 989 /// To set DVBT's register value, only for special purpose.\n 990 /// u16Addr : the address of DVBT's register\n 991 /// u8Value : the value to be set\n 992 //////////////////////////////////////////////////////////////////////////////// 993 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_GetFWVer(MS_U16 *ver); 994 //////////////////////////////////////////////////////////////////////////////// 995 /// Get DVBS FW version 996 /// u16Addr : the address of DVBS's register\n 997 //////////////////////////////////////////////////////////////////////////////// 998 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_SetReg(MS_U16 u16Addr, MS_U8 u8Data); 999 //////////////////////////////////////////////////////////////////////////////// 1000 /// MDrv_DMD_DVBT_SetSerialControl 1001 //////////////////////////////////////////////////////////////////////////////// 1002 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_SetSerialControl(MS_BOOL bEnable); 1003 //////////////////////////////////////////////////////////////////////////////// 1004 /// MDrv_DMD_DVBT_SetConfig 1005 //////////////////////////////////////////////////////////////////////////////// 1006 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_SetConfig(MS_U32 u32SymbolRate, DMD_DVBS_MODULATION_TYPE eQamMode, MS_U32 u32IFFreq, MS_BOOL bSpecInv, MS_BOOL bSerialTS); 1007 //////////////////////////////////////////////////////////////////////////////// 1008 /// MDrv_DMD_DVBT_SetConfig_symbol_rate_list 1009 //////////////////////////////////////////////////////////////////////////////// 1010 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_SetConfig_symbol_rate_list(MS_U32 u32SymbolRate, DMD_DVBS_MODULATION_TYPE eQamMode, MS_U32 u32IFFreq, MS_BOOL bSpecInv, MS_BOOL bSerialTS, MS_U16 *pu16_symbol_rate_list,MS_U8 u8_symbol_rate_list_num); 1011 //////////////////////////////////////////////////////////////////////////////// 1012 /// MDrv_DMD_DVBS_BlindScanConfig 1013 //////////////////////////////////////////////////////////////////////////////// 1014 #ifdef UFO_DEMOD_BLINDSCAN_NEW_FLOW 1015 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_BlindScan_Config(MS_U32 u32SymbolRate, DMD_DVBS_MODULATION_TYPE eQamMode, MS_U32 u32IFFreq, MS_BOOL bSpecInv, MS_BOOL bSerialTS); 1016 //////////////////////////////////////////////////////////////////////////////// 1017 /// MDrv_DMD_DVBS_BlindScanConfig_symbol_rate_list 1018 //////////////////////////////////////////////////////////////////////////////// 1019 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_BlindScan_Config_symbol_rate_list(MS_U32 u32SymbolRate, DMD_DVBS_MODULATION_TYPE eQamMode, MS_U32 u32IFFreq, MS_BOOL bSpecInv, MS_BOOL bSerialTS, MS_U16 *pu16_symbol_rate_list,MS_U8 u8_symbol_rate_list_num); 1020 #endif 1021 //////////////////////////////////////////////////////////////////////////////// 1022 /// MDrv_DMD_DVBT_SetActive 1023 //////////////////////////////////////////////////////////////////////////////// 1024 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_SetActive(MS_BOOL bEnable); 1025 //////////////////////////////////////////////////////////////////////////////// 1026 /// MDrv_DMD_DVBT_Get_Lock 1027 //////////////////////////////////////////////////////////////////////////////// 1028 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_GetLock(DMD_DVBS_GETLOCK_TYPE eType, DMD_DVBS_LOCK_STATUS *eLockStatus); 1029 //////////////////////////////////////////////////////////////////////////////// 1030 /// MDrv_DMD_DVBS_GetParam 1031 //////////////////////////////////////////////////////////////////////////////// 1032 //////////////////////////////////////////////////////////////////////////////// 1033 /// MDrv_DMD_DVBS_GetLockWithRFPower 1034 //////////////////////////////////////////////////////////////////////////////// 1035 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_GetLockWithRFPower(DMD_DVBS_GETLOCK_TYPE eType, DMD_DVBS_LOCK_STATUS *eLockStatus, float fCurrRFPowerDbm, float fNoChannelRFPowerDbm); 1036 //////////////////////////////////////////////////////////////////////////////// 1037 /// MDrv_DMD_DVBS_GetTunrSignalLevel_PWR 1038 //////////////////////////////////////////////////////////////////////////////// 1039 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_GetTunrSignalLevel_PWR(float *fPowerLevel); 1040 //////////////////////////////////////////////////////////////////////////////// 1041 /// MDrv_DMD_DVBT_GetSignalStrength 1042 //////////////////////////////////////////////////////////////////////////////// 1043 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_GetSignalStrength(MS_U16 *u16Strength); 1044 //////////////////////////////////////////////////////////////////////////////// 1045 /// MDrv_DMD_DVBS_GetSignalStrengthWithRFPower 1046 //////////////////////////////////////////////////////////////////////////////// 1047 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_GetSignalStrengthWithRFPower(MS_U16 *u16Strength, float fRFPowerDbm); 1048 //////////////////////////////////////////////////////////////////////////////// 1049 /// MDrv_DMD_DVBS_GetSignalQuality 1050 //////////////////////////////////////////////////////////////////////////////// 1051 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_GetSignalQuality(MS_U16 *u16Quality); 1052 //////////////////////////////////////////////////////////////////////////////// 1053 /// MDrv_DMD_DVBS_GetSignalQualityWithRFPower 1054 //////////////////////////////////////////////////////////////////////////////// 1055 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_GetSignalQualityWithRFPower(MS_U16 *u16Quality, float fRFPowerDbm); 1056 //////////////////////////////////////////////////////////////////////////////// 1057 /// MDrv_DMD_DVBS_GetSNR 1058 //////////////////////////////////////////////////////////////////////////////// 1059 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_GetSNR(float *fSNR); 1060 //////////////////////////////////////////////////////////////////////////////// 1061 /// MDrv_DMD_DVBS_GetPostViterbiBer 1062 //////////////////////////////////////////////////////////////////////////////// 1063 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_GetPostViterbiBer(float *ber); 1064 //////////////////////////////////////////////////////////////////////////////// 1065 /// MDrv_DMD_DVBS_GetPacketErr 1066 //////////////////////////////////////////////////////////////////////////////// 1067 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_GetPacketErr(MS_U16 *pktErr); 1068 //////////////////////////////////////////////////////////////////////////////// 1069 /// MDrv_DMD_DVBT_GetCellID 1070 //////////////////////////////////////////////////////////////////////////////// 1071 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_GetCellID(MS_U16 *u16CellID); 1072 1073 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_GetParam(HAL_DEMOD_MS_SAT_CARRIER_PARAM *pParam); 1074 1075 //////////////////////////////////////////////////////////////////////////////// 1076 /// MDrv_DMD_DVBS_GetAGCInfo 1077 //////////////////////////////////////////////////////////////////////////////// 1078 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_GetAGCInfo(MS_U8 u8dbg_mode, MS_U16 *pu16Data); 1079 //////////////////////////////////////////////////////////////////////////////// 1080 /// MDrv_DMD_DVBS_GetStatus 1081 //////////////////////////////////////////////////////////////////////////////// 1082 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_GetStatus(DMD_DVBS_MODULATION_TYPE *pQAMMode, MS_U32 *u32SymbolRate, float *pFreqOff); 1083 1084 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_ActiveDmdSwitch(MS_U8 demod_no); 1085 1086 extern DLL_PUBLIC MS_U32 MDrv_DMD_DVBS_SetPowerState(EN_POWER_MODE u16PowerState); 1087 1088 extern DLL_PUBLIC MS_U32 MDrv_DMD_DVBS_Demod_Restart(MS_U32 u32SymbolRate, MS_U32 u32Frequency); 1089 1090 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_Get_FreqOffset(float *pFreqOff, MS_U8 u8BW); 1091 //////////////////////////////////////////////////////////////////////////////// 1092 /// MDrv_DMD_DVBS_BlindScan Function 1093 //////////////////////////////////////////////////////////////////////////////// 1094 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_BlindScan_Start(MS_U16 u16StartFreq, MS_U16 u16EndFreq); 1095 1096 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_BlindScan_NextFreq(MS_BOOL* bBlindScanEnd); 1097 1098 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_BlindScan_Cancel(void); 1099 1100 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_BlindScan_End(void); 1101 1102 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_BlindScan_GetChannel(MS_U16 u16ReadStart, MS_U16* u16TPNum, HAL_DEMOD_MS_FE_CARRIER_PARAM *pTable); 1103 1104 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_BlindScan_GetCurrentFreq(MS_U32 *u32CurrentFeq); 1105 1106 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_BlindScan_WaitCurFreqFinished(MS_U8* u8Progress,MS_U8 *u8FindNum); 1107 1108 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_BlindScan_GetTunerFreq_EX(MS_U16 *u16TunerCenterFreq, MS_U16 *u16TunerCutOffFreq); 1109 #define Temp_func2(a,b,...) MDrv_DMD_DVBS_BlindScan_GetTunerFreq_EX(a,b) 1110 #define Temp_func1(...) Temp_func2(__VA_ARGS__) 1111 #define MDrv_DMD_DVBS_BlindScan_GetTunerFreq(...) Temp_func1(__VA_ARGS__,NULL) 1112 1113 1114 1115 1116 //////////////////////////////////////////////////////////////////////////////// 1117 /// MDrv_DMD_DVBS_DiSEqC Function 1118 //////////////////////////////////////////////////////////////////////////////// 1119 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_DiSEqC_Init(void); 1120 1121 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_DiSEqC_SetLNBOut(MS_BOOL bLow); 1122 1123 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_DiSEqC_GetLNBOut(MS_BOOL* bLNBOutLow); 1124 1125 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_DiSEqC_Set22kOnOff(MS_BOOL b22kOn); 1126 1127 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_DiSEqC_Get22kOnOff(MS_BOOL* b22kOn); 1128 1129 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_DiSEqC_SendCmd(MS_U8* pCmd,MS_U8 u8CmdSize); 1130 1131 1132 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_DiSEqC_ReceiveCmd(MS_U8* pCmd,MS_U8* u8CmdSize); 1133 1134 #ifdef UFO_DEMOD_DVBS_CUSTOMIZED_DISEQC_SEND_CMD 1135 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_Customized_DiSEqC_SendCmd(MS_U8* pCmd,MS_U8 u8CmdSize); 1136 #endif 1137 1138 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_DiSEqC_SetTxToneMode(MS_BOOL bTxTone22kOff); 1139 1140 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_DiSEqC_SetTone(MS_BOOL bTone1); 1141 1142 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_UnicableAGCCheckPower(MS_BOOL pbAGCCheckPower); 1143 1144 1145 MS_BOOL MDrv_DMD_DVBS_Reg_INT_CB(fpIntCallBack fpCBReg); 1146 1147 1148 //Terry add 1149 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS2_TS_DivNum_Calculation(void); 1150 1151 #ifdef UFO_SUPPORT_VCM 1152 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS2_Set_IS_ID(MS_U8 u8IS_ID); 1153 1154 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS2_Set_Default_IS_ID(MS_U8 *u8IS_ID_table); 1155 1156 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS2_Get_IS_ID_INFO(MS_U8 *u8IS_ID, MS_U8 *u8IS_ID_table); 1157 1158 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS2_VCM_Init(DMD_DVBS_VCM_OPT u8VCM_OPT, MS_U8 u8IS_ID, MS_U32 u32DVBS2_DJB_START_ADDR); 1159 1160 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS2_VCM_Check(void); 1161 1162 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS2_VCM_Enabled(MS_U8 u8VCM_ENABLED); 1163 1164 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS2_VCM_Change_Mode(DMD_DVBS_VCM_OPT u8VCM_OPT); 1165 #endif 1166 1167 #ifdef UFO_SUPPORT_KERNEL_FLOATING 1168 //////////////////////////////////////////////////////////////////////////////// 1169 /// MDrv_DMD_DVBS_Kernel function 1170 //////////////////////////////////////////////////////////////////////////////// 1171 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_GetSNR_Kernel(MS_FLOAT_ST *fSNR); 1172 1173 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_GetBER_Kernel(MS_FLOAT_ST *ber); 1174 1175 extern DLL_PUBLIC MS_BOOL MDrv_DMD_DVBS_TS_DivNum_Calculation_Kernel(void); 1176 #endif 1177 1178 #ifdef __cplusplus 1179 } 1180 #endif 1181 1182 1183 #endif // _DRV_DVBS_H_ 1184 1185