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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 /////////////////////////////////////////////////////////////////////////////////////////////////// 96 /// 97 /// @file drvDMD_EXTERN_MSB124x.h 98 /// @brief MSB124x Driver Interface 99 /// @author MStar Semiconductor Inc. 100 /////////////////////////////////////////////////////////////////////////////////////////////////// 101 102 #ifndef _DRV_DVBT_H_ 103 #define _DRV_DVBT_H_ 104 105 #include "MsCommon.h" 106 //#include "drvDMD_common.h" 107 #ifdef __cplusplus 108 extern "C" 109 { 110 #endif 111 112 113 //------------------------------------------------------------------------------------------------- 114 // Driver Capability 115 //------------------------------------------------------------------------------------------------- 116 #define SUPPORT_MULTI_DEMOD 1 //0 117 118 //------------------------------------------------------------------------------------------------- 119 // Macro and Define 120 //------------------------------------------------------------------------------------------------- 121 #define MSIF_DMD_MSB124X_INTERN_LIB_CODE {'1','2', '4','x'} //Lib code 122 #define MSIF_DMD_MSB124X_INTERN_LIBVER {'0','1'} //LIB version 123 #define MSIF_DMD_MSB124X_INTERN_BUILDNUM {'0','0' } //Build Number 124 #define MSIF_DMD_MSB124X_INTERN_CHANGELIST {'0','0','0','0','0','0','0','0'} //P4 ChangeList Number 125 126 #define DMD_MSB124X_EXTERN_VER /* Character String for DRV/API version */ \ 127 MSIF_TAG, /* 'MSIF' */ \ 128 MSIF_CLASS, /* '00' */ \ 129 MSIF_CUS, /* 0x0000 */ \ 130 MSIF_MOD, /* 0x0000 */ \ 131 MSIF_CHIP, \ 132 MSIF_CPU, \ 133 MSIF_DMD_MSB124X_INTERN_LIB_CODE, /* IP__ */ \ 134 MSIF_DMD_MSB124X_INTERN_LIBVER, /* 0.0 ~ Z.Z */ \ 135 MSIF_DMD_MSB124X_INTERN_BUILDNUM, /* 00 ~ 99 */ \ 136 MSIF_DMD_MSB124X_INTERN_CHANGELIST, /* CL# */ \ 137 MSIF_OS 138 139 #define IS_BITS_SET(val, bits) (((val)&(bits)) == (bits)) 140 141 //------------------------------------------------------------------------------------------------- 142 // Type and Structure 143 //------------------------------------------------------------------------------------------------- 144 typedef enum 145 { 146 E_DMD_MSB124X_DBGLV_NONE, // disable all the debug message 147 E_DMD_MSB124X_DBGLV_INFO, // information 148 E_DMD_MSB124X_DBGLV_NOTICE, // normal but significant condition 149 E_DMD_MSB124X_DBGLV_WARNING, // warning conditions 150 E_DMD_MSB124X_DBGLV_ERR, // error conditions 151 E_DMD_MSB124X_DBGLV_CRIT, // critical conditions 152 E_DMD_MSB124X_DBGLV_ALERT, // action must be taken immediately 153 E_DMD_MSB124X_DBGLV_EMERG, // system is unusable 154 E_DMD_MSB124X_DBGLV_DEBUG, // debug-level messages 155 } eDMD_MSB124X_DbgLv; 156 157 typedef enum 158 { 159 // fw version, check sum,Address Start at 0x00 160 C_CHECK_SUM_L = 0x00, 161 C_CHECK_SUM_H, 162 C_FW_VER_0, 163 C_FW_VER_1, 164 C_FW_VER_2, 165 166 // Operation Mode Settings,Address Start at 0x20 167 C_opmode_auto_scan_sym_rate= 0x20, 168 C_opmode_auto_scan_qam, 169 C_if_inv_pwm_out_en, 170 171 // Config Params 172 C_config_zif= 0x23, 173 C_config_fc_l, 174 C_config_fc_h, 175 C_config_fs_l, 176 C_config_fs_h, 177 C_config_bw_l, // 0x28 178 C_config_bw_h, 179 C_config_bw1_l, 180 C_config_bw1_h, 181 C_config_bw2_l, 182 C_config_bw2_h, 183 C_config_bw3_l, 184 C_config_bw3_h, 185 C_config_qam, // 0x30 186 C_config_cci, 187 C_config_ts_serial, 188 C_config_ts_clk_rate, 189 C_config_ts_out_inv, 190 C_config_ts_data_swap, 191 C_config_iq_swap, 192 193 //not always changed 194 C_opmode_rfagc_en, 195 C_opmode_humdet_en, // 0x38 196 C_opmode_dcr_en, 197 C_opmode_iqb_en, 198 C_opmode_auto_iq, 199 C_opmode_auto_rfmax, 200 201 C_opmode_atv_detector_en, 202 203 C_config_rssi, 204 C_config_rfmax, 205 206 C_lock_indicator, //0x40, [0] = TR lock HIS , [7] = FEC lock 207 208 C_CFO10_L, 209 C_CFO10_H, 210 211 C_SNR100_L, 212 C_SNR100_H, 213 C_config_spread_span, 214 C_config_spread_step, 215 216 DVBC_PARAM_LEN, 217 } DVBC_Param; 218 219 typedef enum 220 { 221 #if 1 222 // operation mode settings 223 T_OPMODE_RFAGC_EN = 0x20, // 0x20 224 T_OPMODE_HUMDET_EN, 225 T_OPMODE_DCR_EN, 226 T_OPMODE_IIS_EN, 227 T_OPMODE_CCI_EN, 228 T_OPMODE_ACI_EN, 229 T_OPMODE_IQB_EN, 230 T_OPMODE_AUTO_IQ, 231 T_OPMODE_AUTO_RFMAX, // 0x28 232 T_OPMODE_AUTO_ACI, 233 T_OPMODE_FIX_MODE_CP, 234 T_OPMODE_FIX_TPS, 235 T_OPMODE_AUTO_SCAN, 236 T_OPMODE_RSV_0X2D, 237 T_OPMODE_RSV_0X2E, 238 T_OPMODE_RSV_0X2F, 239 240 // channel config param 241 T_CONFIG_RSSI, // 0x30 242 T_CONFIG_ZIF, 243 T_CONFIG_FREQ, 244 T_CONFIG_FC_L, 245 T_CONFIG_FC_H, 246 T_CONFIG_FS_L, 247 T_CONFIG_FS_H, 248 T_CONFIG_BW, 249 T_CONFIG_MODE, // 0x38 250 T_CONFIG_CP, 251 T_CONFIG_LP_SEL, 252 T_CONFIG_CSTL, 253 T_CONFIG_HIER, 254 T_CONFIG_HPCR, 255 T_CONFIG_LPCR, 256 T_CONFIG_IQ_SWAP, 257 T_CONFIG_RFMAX, // 0x40 258 T_CONFIG_CCI, 259 T_CONFIG_ICFO_RANGE, 260 T_CONFIG_RFAGC_REF, 261 T_CONFIG_IFAGC_REF_2K, 262 T_CONFIG_IFAGC_REF_8K, 263 T_CONFIG_IFAGC_REF_ACI, 264 T_CONFIG_IFAGC_REF_IIS_2K, 265 T_CONFIG_IFAGC_REF_IIS_8K, // 0x48 266 T_CONFIG_ACI_DET_TH_L, 267 T_CONFIG_ACI_DET_TH_H, 268 T_CONFIG_TS_SERIAL, 269 T_CONFIG_TS_CLK_RATE, 270 T_CONFIG_TS_OUT_INV, 271 T_CONFIG_TS_DATA_SWAP, 272 T_CONFIG_2K_SFO_H, 273 T_CONFIG_2K_SFO_L, // 0x50 274 T_CONFIG_8K_SFO_H, 275 T_CONFIG_8K_SFO_L, 276 T_CONFIG_CHECK_CHANNEL, 277 T_CONFIG_SLICER_SNR_POS, 278 T_CONFIG_TDP_CCI_KP, 279 T_CONFIG_CCI_FSWEEP, 280 T_CONFIG_TS_CLK_RATE_AUTO, 281 T_CONFIG_IF_INV_PWM_OUT_EN, 282 283 /********************** 284 * crc = 285 * ~(T_OPMODE_RFAGC_EN^T_OPMODE_HUMDET_EN^....^T_CONFIG_TS_CLK_RATE_AUTO) 286 ************************/ 287 T_PARAM_CHECK_SUM, 288 289 T_DVBT_LOCK_HIS = 0xF0, 290 T_DVBT2_NOCHAN_Flag = 0xF1, 291 T_DVBT_NOCHAN_Flag = 0xF2, 292 T_DETECT_DONE_Flag = 0xF3, 293 294 T_CONFIG_SPREAD_SPAN=0xF7, //0xF7 295 T_CONFIG_SPREAD_STEP=0xF8, //0xF8 296 DVBT_PARAM_LEN, 297 #else 298 T_OPMODE_RFAGC_EN = 0x20, 299 T_OPMODE_AUTO_IQ, 300 T_CONFIG_ZIF, 301 T_CONFIG_FC_L, 302 T_CONFIG_FC_H, 303 T_CONFIG_FS_L, 304 T_CONFIG_FS_H, 305 T_CONFIG_BW, 306 T_CONFIG_IQ_SWAP, 307 T_CONFIG_TS_SERIAL, 308 T_CONFIG_TS_CLK_RATE, 309 T_CONFIG_TS_OUT_INV, 310 T_CONFIG_TS_DATA_SWAP, 311 T_CONFIG_TS_CLK_RATE_AUTO, 312 T_PARAM_CHECK_SUM, 313 DVBT_PARAM_LEN, 314 315 #endif 316 } DVBT_Param; 317 318 typedef enum 319 { 320 // fw version, check sum 321 E_T2_CHECK_SUM_L = 0x00, 322 E_T2_CHECK_SUM_H, 323 E_T2_FW_VER_0, 324 E_T2_FW_VER_1, 325 E_T2_FW_VER_2, 326 327 // operation mode 328 E_T2_ZIF_EN = 0x20, 329 E_T2_RF_AGC_EN, 330 E_T2_HUM_DET_EN, 331 E_T2_DCR_EN, 332 E_T2_IQB_EN, 333 E_T2_IIS_EN, 334 E_T2_CCI_EN, 335 E_T2_LOW_PWR_DET_EN, 336 E_T2_ACI_DET_EN, 337 E_T2_TD_MOTION_EN, 338 E_T2_FD_MOTION_EN, 339 340 // channel tuning param 341 E_T2_BW = 0x40, 342 E_T2_FC_L = 0x41, 343 E_T2_FC_H = 0x42, 344 E_T2_FS_L, 345 E_T2_FS_H, 346 E_T2_ZIF, 347 E_T2_GI, 348 E_T2_ACI_DET_TYPE, 349 E_T2_AGC_REF, //0x48 350 E_T2_RSSI_REF, 351 E_T2_SNR_TIME_L, 352 E_T2_SNR_TIME_H, 353 E_T2_BER_CMP_TIME_L, 354 E_T2_BER_CMP_TIME_H, 355 E_T2_SFO_CFO_NUM, 356 E_T2_CCI, 357 E_T2_ACI_DET_TH_L, //0x50 358 E_T2_ACI_DET_TH_H, 359 E_T2_TS_SERIAL = 0x52, 360 E_T2_TS_CLK_RATE = 0x53, 361 E_T2_TS_OUT_INV = 0x54, 362 E_T2_TS_DATA_SWAP = 0x55, 363 E_T2_TDP_CCI_KP, 364 E_T2_CCI_FSWEEP, //0x57 365 E_T2_TS_ERR_POL, //0x58 366 E_T2_IF_AGC_INV_PWM_EN, //0x59 367 E_T2_CCI_TYPE, //0x5A 368 E_T2_LITE, //0x5B 369 370 // dvbt2 lock history 371 E_T2_DVBT2_LOCK_HIS = 0xF0, 372 E_T2_FEF_DET_IND, 373 E_T2_MPLP_NO_COMMON_IND, 374 375 E_T2_SNR_L, // 0xf3 376 E_T2_SNR_H, // 0xf4 377 E_T2_DOPPLER_DET_FLAG, // 0xf5 378 E_T2_DOPPLER_DET_TH_L, // 0xf6 379 E_T2_DOPPLER_DET_TH_H, // 0xf7 380 E_T2_SPREAD_SPAN, //0xf8 381 E_T2_SPREAD_STEP, //0xf9 382 383 // splp, mplp releted 384 E_T2_PLP_ID_ARR = 0x100, 385 E_T2_L1_FLAG = 0x120, 386 E_T2_PLP_ID, 387 E_T2_GROUP_ID, 388 E_T2_PARAM_NUM, 389 } E_DVBT2_PARAM; 390 391 typedef enum 392 { 393 E_DMD_MSB124X_DEMOD_I2C_DYNAMIC_SLAVE_ID_1, 394 E_DMD_MSB124X_DEMOD_I2C_DYNAMIC_SLAVE_ID_2, 395 E_DMD_MSB124X_DEMOD_I2C_DYNAMIC_SLAVE_ID_3, 396 E_DMD_MSB124X_DEMOD_I2C_DYNAMIC_SLAVE_ID_4 397 } eDMD_MSB124X_DemodI2CSlaveID; 398 399 typedef enum 400 { 401 E_DMD_MSB124X_DEMOD_I2C_READ_BYTES, 402 E_DMD_MSB124X_DEMOD_I2C_WRITE_BYTES 403 } eDMD_MSB124X_DemodI2CMethod; 404 405 /// For demod init 406 typedef struct 407 { 408 MS_U8 u8WO_SPI_Flash; 409 MS_BOOL bPreloadDSPCodeFromMainCHIPI2C; 410 MS_BOOL bFlashWPEnable; 411 void (*fpGPIOReset)(MS_BOOL bOnOff); 412 MS_BOOL (*fpMSB124X_I2C_Access)(eDMD_MSB124X_DemodI2CSlaveID eSlaveID, eDMD_MSB124X_DemodI2CMethod eMethod, MS_U8 u8AddrSize, MS_U8 *pu8Addr, MS_U16 u16Size, MS_U8 *pu8Data); 413 MS_U8* pDVBC_DSP_REG; 414 MS_U8* pDVBT_DSP_REG; 415 MS_U8* pDVBT2_DSP_REG; 416 MS_BOOL bEnableSPILoadCode; 417 void (*fpMSB124x_SPIPAD_En)(MS_BOOL bOnOff); 418 MS_U8 u8WO_Sdram;// 1 means no sdram on board 419 } sDMD_MSB124X_InitData; 420 421 typedef enum 422 { 423 E_DMD_MSB124X_DEMOD_NONE, 424 E_DMD_MSB124X_DEMOD_DVBT2, 425 E_DMD_MSB124X_DEMOD_DVBT, 426 E_DMD_MSB124X_DEMOD_DVBC, 427 E_DMD_MSB124X_DEMOD_DVBS2, 428 } eDMD_MSB124X_DemodulatorType; 429 430 typedef enum 431 { 432 E_DMD_MSB124X_FAIL=0, 433 E_DMD_MSB124X_OK=1 434 } DMD_MSB124X_Result; 435 436 437 typedef struct 438 { 439 MS_U16 u16Version; 440 } DMD_MSB124X_Info; 441 442 //------------------------------------------------------------------------------------------------- 443 // Function and Variable 444 //------------------------------------------------------------------------------------------------- 445 //////////////////////////////////////////////////////////////////////////////// 446 /// MDrv_DMD_DVBT_Init 447 //////////////////////////////////////////////////////////////////////////////// 448 extern MS_BOOL MDrv_DMD_MSB124X_Init(sDMD_MSB124X_InitData *pDMD_MSB124X_InitData, MS_U32 u32InitDataLen); 449 //////////////////////////////////////////////////////////////////////////////// 450 /// Should be called when exit VD input source 451 //////////////////////////////////////////////////////////////////////////////// 452 extern MS_BOOL MDrv_DMD_MSB124X_Exit(void); 453 //------------------------------------------------------------------------------ 454 /// Set detailed level of DVBT driver debug message 455 /// u8DbgLevel : debug level for Parallel Flash driver\n 456 /// AVD_DBGLV_NONE, ///< disable all the debug message\n 457 /// AVD_DBGLV_INFO, ///< information\n 458 /// AVD_DBGLV_NOTICE, ///< normal but significant condition\n 459 /// AVD_DBGLV_WARNING, ///< warning conditions\n 460 /// AVD_DBGLV_ERR, ///< error conditions\n 461 /// AVD_DBGLV_CRIT, ///< critical conditions\n 462 /// AVD_DBGLV_ALERT, ///< action must be taken immediately\n 463 /// AVD_DBGLV_EMERG, ///< system is unusable\n 464 /// AVD_DBGLV_DEBUG, ///< debug-level messages\n 465 /// @return TRUE : succeed 466 /// @return FALSE : failed to set the debug level 467 //------------------------------------------------------------------------------ 468 extern MS_BOOL MDrv_DMD_MSB124X_SetDbgLevel(eDMD_MSB124X_DbgLv u8DbgLevel); 469 //------------------------------------------------------------------------------------------------- 470 /// Get the information of DVBT driver\n 471 /// @return the pointer to the driver information 472 //------------------------------------------------------------------------------------------------- 473 //extern DMD_DVBT_Info* MDrv_DMD_DVBT_GetInfo(DMD_DVBT_INFO_TYPE eInfoType); 474 //------------------------------------------------------------------------------------------------- 475 /// Get DVBT driver version 476 /// when get ok, return the pointer to the driver version 477 //------------------------------------------------------------------------------------------------- 478 extern MS_BOOL MDrv_DMD_MSB124X_GetLibVer(const MSIF_Version **ppVersion); 479 //////////////////////////////////////////////////////////////////////////////// 480 /// Get DVBT FW version 481 /// u16Addr : the address of DVBT's register\n 482 //////////////////////////////////////////////////////////////////////////////// 483 extern MS_BOOL MDrv_DMD_MSB124X_GetFWVer(MS_U16 *ver); 484 //////////////////////////////////////////////////////////////////////////////// 485 /// To get DVBT's register value, only for special purpose.\n 486 /// u16Addr : the address of DVBT's register\n 487 /// return the value of AFEC's register\n 488 //////////////////////////////////////////////////////////////////////////////// 489 extern MS_BOOL MDrv_DMD_MSB124X_GetReg(MS_U16 u16Addr, MS_U8 *pu8Data); 490 //////////////////////////////////////////////////////////////////////////////// 491 /// To set DVBT's register value, only for special purpose.\n 492 /// u16Addr : the address of DVBT's register\n 493 /// u8Value : the value to be set\n 494 //////////////////////////////////////////////////////////////////////////////// 495 extern MS_BOOL MDrv_DMD_MSB124X_SetReg(MS_U16 u16Addr, MS_U8 u8Data); 496 //////////////////////////////////////////////////////////////////////////////// 497 /// To set DVBT's register value, only for special purpose.\n 498 /// u16Addr : the address of DVBT's register\n 499 /// u8Value : the value to be set\n 500 //////////////////////////////////////////////////////////////////////////////// 501 extern MS_BOOL MDrv_DMD_MSB124X_SetRegs(MS_U16 u16Addr, MS_U8* u8pData, MS_U16 data_size); 502 //////////////////////////////////////////////////////////////////////////////// 503 /// To set DVBT's register value, only for special purpose.\n 504 /// u16Addr : the address of DVBT's register\n 505 /// u8Value : the value to be set\n 506 //////////////////////////////////////////////////////////////////////////////// 507 extern MS_BOOL MDrv_DMD_MSB124X_SetReg2Bytes(MS_U16 u16Addr, MS_U16 u16Data); 508 //////////////////////////////////////////////////////////////////////////////// 509 /// To get DVBT's register value, only for special purpose.\n 510 /// u16Addr : the address of DVBT's register\n 511 /// return the value of AFEC's register\n 512 //////////////////////////////////////////////////////////////////////////////// 513 extern MS_BOOL MDrv_DMD_MSB124X_GetDSPReg(MS_U16 u16Addr, MS_U8 *pu8Data); 514 //////////////////////////////////////////////////////////////////////////////// 515 /// To set DVBT's register value, only for special purpose.\n 516 /// u16Addr : the address of DVBT's register\n 517 /// u8Value : the value to be set\n 518 //////////////////////////////////////////////////////////////////////////////// 519 extern MS_BOOL MDrv_DMD_MSB124X_SetDSPReg(MS_U16 u16Addr, MS_U8 u8Data); 520 //////////////////////////////////////////////////////////////////////////////// 521 /// MDrv_DMD_MSB124X_SetCurrentDemodulatorType 522 //////////////////////////////////////////////////////////////////////////////// 523 extern void MDrv_DMD_MSB124X_SetCurrentDemodulatorType(eDMD_MSB124X_DemodulatorType eCurrentDemodulatorType); 524 //////////////////////////////////////////////////////////////////////////////// 525 /// MDrv_DMD_MSB124X_LoadDSPCode 526 //////////////////////////////////////////////////////////////////////////////// 527 extern MS_BOOL MDrv_DMD_MSB124X_LoadDSPCode(void); 528 //////////////////////////////////////////////////////////////////////////////// 529 /// MDrv_DMD_MSB124X__DTV_DVBT_DSPReg_CRC 530 //////////////////////////////////////////////////////////////////////////////// 531 extern MS_BOOL MDrv_DMD_MSB124X_DTV_DVBT_DSPReg_CRC(void); 532 //////////////////////////////////////////////////////////////////////////////// 533 /// power on init 534 //////////////////////////////////////////////////////////////////////////////// 535 extern MS_BOOL MDrv_DMD_MSB124X_Power_On_Initialization(void); 536 //////////////////////////////////////////////////////////////////////////////// 537 /// load dsp code 538 //////////////////////////////////////////////////////////////////////////////// 539 extern MS_BOOL MDrv_DMD_MSB1245_LoadDSPCodeToSram(void); 540 //EXT API 541 #if (SUPPORT_MULTI_DEMOD) 542 extern MS_BOOL MDrv_DMD_MSB124X_SwitchHandle(MS_S32 s32Handle); 543 extern MS_S32 MDrv_DMD_MSB124X_GetCurrentHandle(void); 544 extern MS_BOOL MDrv_MDM_MSB124X_CreateNode(MS_S32 *s32Handle); 545 extern MS_BOOL MDrv_MDM_MSB124X_DeleteNode(MS_S32 s32Handle); 546 extern MS_BOOL MDrv_DMD_MSB124X_Init_EX(MS_S32 s32Handle, sDMD_MSB124X_InitData *pDMD_MSB124X_InitData, MS_U32 u32InitDataLen); 547 extern MS_BOOL MDrv_DMD_MSB124X_Exit_EX(MS_S32 s32Handle); 548 ////////////////////////////////////////////////////// 549 extern MS_BOOL MDrv_DMD_MSB124X_GetReg_EX(MS_S32 s32Handle, MS_U16 u16Addr, MS_U8 *pu8Data); 550 extern MS_BOOL MDrv_DMD_MSB124X_SetReg_EX(MS_S32 s32Handle, MS_U16 u16Addr, MS_U8 u8Data); 551 extern MS_BOOL MDrv_DMD_MSB124X_SetRegs_EX(MS_S32 s32Handle,MS_U16 u16Addr, MS_U8* u8pData, MS_U16 data_size); 552 extern MS_BOOL MDrv_DMD_MSB124X_SetReg2Bytes_EX(MS_S32 s32Handle, MS_U16 u16Addr, MS_U16 u16Data); 553 554 extern MS_BOOL MDrv_DMD_MSB124X_GetDSPReg_EX(MS_S32 s32Handle, MS_U16 u16Addr, MS_U8 *pu8Data); 555 extern MS_BOOL MDrv_DMD_MSB124X_SetDSPReg_EX(MS_S32 s32Handle, MS_U16 u16Addr, MS_U8 u8Data); 556 extern void MDrv_DMD_MSB124X_SetCurrentDemodulatorType_EX(MS_S32 s32Handle, eDMD_MSB124X_DemodulatorType eCurrentDemodulatorType); 557 extern MS_BOOL MDrv_DMD_MSB124X_LoadDSPCode_EX(MS_S32 s32Handle); 558 extern MS_BOOL MDrv_DMD_MSB124X_DTV_DVBT_DSPReg_CRC_EX(MS_S32 s32Handle); 559 extern MS_BOOL MDrv_DMD_MSB124X_Power_On_Initialization_EX(MS_S32 s32Handle); 560 extern MS_BOOL MDrv_DMD_MSB1245_LoadDSPCodeToSram_EX(MS_S32 s32Handle); 561 #endif 562 #ifdef __cplusplus 563 } 564 #endif 565 566 567 #endif // _DRV_DVBT_H_ 568 569