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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 /////////////////////////////////////////////////////////////////////////////////////////////////// 96 /// 97 /// @file drvDMD_DTMB_v2.h 98 /// @brief DMD DTMB Driver Interface 99 /// @author MStar Semiconductor Inc. 100 /////////////////////////////////////////////////////////////////////////////////////////////////// 101 102 #ifndef _DRV_DTMB_V2_H_ 103 #define _DRV_DTMB_V2_H_ 104 105 #include "drvDMD_DTMB.h" 106 107 #ifdef __cplusplus 108 extern "C" 109 { 110 #endif 111 112 //------------------------------------------------------------------------------------------------- 113 // Driver Capability 114 //------------------------------------------------------------------------------------------------- 115 116 117 //------------------------------------------------------------------------------------------------- 118 // Macro and Define 119 //------------------------------------------------------------------------------------------------- 120 121 #ifndef DLL_PUBLIC 122 #define DLL_PUBLIC 123 #endif 124 125 //------------------------------------------------------------------------------------------------- 126 // Type and Structure 127 //------------------------------------------------------------------------------------------------- 128 129 typedef enum { 130 DMD_DTMB_DRV_CMD_SetDbgLevel, 131 DMD_DTMB_DRV_CMD_GetInfo, 132 DMD_DTMB_DRV_CMD_GetLibVer, 133 DMD_DTMB_DRV_CMD_Init, 134 DMD_DTMB_DRV_CMD_Exit, 135 DMD_DTMB_DRV_CMD_GetConfig, 136 DMD_DTMB_DRV_CMD_SetConfig, 137 DMD_DTMB_DRV_CMD_SetReset, 138 DMD_DTMB_DRV_CMD_Set_QAM_SR, 139 DMD_DTMB_DRV_CMD_SetActive, 140 DMD_DTMB_DRV_CMD_SetPowerState, 141 DMD_DTMB_DRV_CMD_GetLock, 142 DMD_DTMB_DRV_CMD_GetModulationMode, 143 DMD_DTMB_DRV_CMD_GetSignalStrength, 144 DMD_DTMB_DRV_CMD_ReadFrequencyOffset, 145 DMD_DTMB_DRV_CMD_GetSignalQuality, 146 DMD_DTMB_DRV_CMD_GetPreLdpcBer, 147 DMD_DTMB_DRV_CMD_GetPreViterbiBer, 148 DMD_DTMB_DRV_CMD_GetPostViterbiBer, 149 DMD_DTMB_DRV_CMD_GetSNR, 150 DMD_DTMB_DRV_CMD_SetSerialControl, 151 DMD_DTMB_DRV_CMD_IIC_BYPASS_MODE, 152 DMD_DTMB_DRV_CMD_SWITCH_SSPI_GPIO, 153 DMD_DTMB_DRV_CMD_GPIO_GET_LEVEL, 154 DMD_DTMB_DRV_CMD_GPIO_SET_LEVEL, 155 DMD_DTMB_DRV_CMD_GPIO_OUT_ENABLE, 156 DMD_DTMB_DRV_CMD_DoIQSwap, 157 DMD_DTMB_DRV_CMD_GetReg, 158 DMD_DTMB_DRV_CMD_SetReg, 159 DMD_DTMB_DRV_CMD_MD_Init, 160 DMD_DTMB_DRV_CMD_MD_Exit, 161 DMD_DTMB_DRV_CMD_MD_GetConfig, 162 DMD_DTMB_DRV_CMD_MD_SetConfig, 163 DMD_DTMB_DRV_CMD_MD_SetReset, 164 DMD_DTMB_DRV_CMD_MD_Set_QAM_SR, 165 DMD_DTMB_DRV_CMD_MD_SetActive, 166 DMD_DTMB_DRV_CMD_MD_SetPowerState, 167 DMD_DTMB_DRV_CMD_MD_GetLock, 168 DMD_DTMB_DRV_CMD_MD_GetModulationMode, 169 DMD_DTMB_DRV_CMD_MD_GetSignalStrength, 170 DMD_DTMB_DRV_CMD_MD_ReadFrequencyOffset, 171 DMD_DTMB_DRV_CMD_MD_GetSignalQuality, 172 DMD_DTMB_DRV_CMD_MD_GetPreLdpcBer, 173 DMD_DTMB_DRV_CMD_MD_GetPreViterbiBer, 174 DMD_DTMB_DRV_CMD_MD_GetPostViterbiBer, 175 DMD_DTMB_DRV_CMD_MD_GetSNR, 176 DMD_DTMB_DRV_CMD_MD_SetSerialControl, 177 DMD_DTMB_DRV_CMD_MD_IIC_BYPASS_MODE, 178 DMD_DTMB_DRV_CMD_MD_SWITCH_SSPI_GPIO, 179 DMD_DTMB_DRV_CMD_MD_GPIO_GET_LEVEL, 180 DMD_DTMB_DRV_CMD_MD_GPIO_SET_LEVEL, 181 DMD_DTMB_DRV_CMD_MD_GPIO_OUT_ENABLE, 182 DMD_DTMB_DRV_CMD_MD_DoIQSwap, 183 DMD_DTMB_DRV_CMD_MD_GetReg, 184 DMD_DTMB_DRV_CMD_MD_SetReg 185 } DMD_DTMB_DRV_COMMAND; 186 187 typedef struct DLL_PACKED _DTMB_DBG_LEVEL_PARAM 188 { 189 DMD_DTMB_DbgLv u8DbgLevel; 190 } DTMB_DBG_LEVEL_PARAM, *PDTMB_DBG_LEVEL_PARAM; 191 192 typedef struct DLL_PACKED _DTMB_GET_INFO_PARAM 193 { 194 DMD_DTMB_Info* pInfo; 195 } DTMB_GET_INFO_PARAM, *PDTMB_GET_INFO_PARAM; 196 197 typedef struct DLL_PACKED _DTMB_GET_LIB_VER_PARAM 198 { 199 const MSIF_Version **ppVersion; 200 } DTMB_GET_LIB_VER_PARAM, *PDTMB_GET_LIB_VER_PARAM; 201 202 typedef struct DLL_PACKED _DTMB_INIT_PARAM 203 { 204 MS_U8 id; 205 DMD_DTMB_InitData *pDMD_DTMB_InitData; 206 MS_U32 u32InitDataLen; 207 } DTMB_INIT_PARAM, *PDTMB_INIT_PARAM; 208 209 typedef struct DLL_PACKED _DTMB_ID_PARAM 210 { 211 MS_U8 id; 212 } DTMB_ID_PARAM, *PDTMB_ID_PARAM; 213 214 typedef struct DLL_PACKED _DTMB_SET_CONFIG_PARAM 215 { 216 MS_U8 id; 217 DMD_DTMB_DEMOD_TYPE eType; 218 MS_BOOL bEnable; 219 } DTMB_SET_CONFIG_PARAM, *PDTMB_SET_CONFIG_PARAM; 220 221 typedef struct DLL_PACKED _DTMB_SET_QAM_SR_PARAM 222 { 223 MS_U8 id; 224 DMD_DTMB_DEMOD_TYPE eType; 225 MS_U16 symbol_rate; 226 } DTMB_SET_QAM_SR_PARAM, *PDTMB_SET_QAM_SR_PARAM; 227 228 typedef struct DLL_PACKED _DTMB_SET_ACTIVE_PARAM 229 { 230 MS_U8 id; 231 MS_BOOL bEnable; 232 } DTMB_SET_ACTIVE_PARAM, *PDTMB_SET_ACTIVE_PARAM; 233 234 typedef struct DLL_PACKED _DTMB_SET_POWER_STATE_PARAM 235 { 236 MS_U8 id; 237 EN_POWER_MODE u16PowerState; 238 } DTMB_SET_POWER_STATE_PARAM, *PDTMB_SET_POWER_STATE_PARAM; 239 240 typedef struct DLL_PACKED _DTMB_GET_LOCK_PARAM 241 { 242 MS_U8 id; 243 DMD_DTMB_GETLOCK_TYPE eType; 244 DMD_DTMB_LOCK_STATUS status; 245 } DTMB_GET_LOCK_PARAM, *PDTMB_GET_LOCK_PARAM; 246 247 typedef struct DLL_PACKED _DTMB_GET_MODULATION_MODE_PARAM 248 { 249 MS_U8 id; 250 DMD_DTMB_MODULATION_INFO info; 251 } DTMB_GET_MODULATION_MODE_PARAM, *PDTMB_GET_MODULATION_MODE_PARAM; 252 253 typedef struct DLL_PACKED _DTMB_GET_SIGNAL_STRENGTH_PARAM 254 { 255 MS_U8 id; 256 MS_U16 u16Strength; 257 } DTMB_GET_SIGNAL_STRENGTH_PARAM, *PDTMB_GET_SIGNAL_STRENGTH_PARAM; 258 259 typedef struct DLL_PACKED _DTMB_READ_FREQ_OFFSET_PARAM 260 { 261 MS_U8 id; 262 #ifdef UTPA2 263 DMD_DTMB_CFO_DATA cfo; 264 #else 265 MS_S16 cfo; 266 #endif 267 } DTMB_READ_FREQ_OFFSET_PARAM, *PDTMB_READ_FREQ_OFFSET_PARAM; 268 269 typedef struct DLL_PACKED _DTMB_GET_SIGNAL_QUALITY_PARAM 270 { 271 MS_U8 id; 272 MS_U8 u8Percentage; 273 } DTMB_GET_SIGNAL_QUALITY_PARAM, *PDTMB_GET_SIGNAL_QUALITY_PARAM; 274 275 typedef struct DLL_PACKED _DTMB_GET_BER_PARAM 276 { 277 MS_U8 id; 278 #ifdef UTPA2 279 DMD_DTMB_BER_DATA ber; 280 #else 281 float ber; 282 #endif 283 } DTMB_GET_BER_PARAM, *PDTMB_GET_BER_PARAM; 284 285 typedef struct DLL_PACKED _DTMB_GET_SNR_PARAM 286 { 287 MS_U8 id; 288 #ifdef UTPA2 289 DMD_DTMB_SNR_DATA snr; 290 #else 291 float snr; 292 #endif 293 } DTMB_GET_SNR_PARAM, *PDTMB_GET_SNR_PARAM; 294 295 typedef struct DLL_PACKED _DTMB_SET_SERIAL_CONTROL_PARAM 296 { 297 MS_U8 id; 298 MS_U8 u8TsConfigData; 299 } DTMB_SET_SERIAL_CONTROL_PARAM, *PDTMB_SET_SERIAL_CONTROL_PARAM; 300 301 typedef struct DLL_PACKED _DTMB_IIC_BYPASS_MODE_PARAM 302 { 303 MS_U8 id; 304 MS_BOOL bEnable; 305 } DTMB_IIC_BYPASS_MODE_PARAM, *PDTMB_IIC_BYPASS_MODE_PARAM; 306 307 typedef struct DLL_PACKED _DTMB_SWITCH_SSPI_GPIO_PARAM 308 { 309 MS_U8 id; 310 MS_BOOL bEnable; 311 } DTMB_SWITCH_SSPI_GPIO_PARAM, *PDTMB_SWITCH_SSPI_GPIO_PARAM; 312 313 typedef struct DLL_PACKED _DTMB_GPIO_LEVEL_PARAM 314 { 315 MS_U8 id; 316 MS_U8 u8Pin; 317 MS_BOOL bLevel; 318 } DTMB_GPIO_LEVEL_PARAM, *PDTMB_GPIO_LEVEL_PARAM; 319 320 typedef struct DLL_PACKED _DTMB_DO_IQ_SWAP_PARAM 321 { 322 MS_U8 id; 323 MS_BOOL bIsQPad; 324 } DTMB_DO_IQ_SWAP_PARAM, *PDTMB_DO_IQ_SWAP_PARAM; 325 326 typedef struct DLL_PACKED _DTMB_GPIO_OUT_ENABLE_PARAM 327 { 328 MS_U8 id; 329 MS_U8 u8Pin; 330 MS_BOOL bEnableOut; 331 } DTMB_GPIO_OUT_ENABLE_PARAM, *PDTMB_GPIO_OUT_ENABLE_PARAM; 332 333 typedef struct DLL_PACKED _DTMB_DO_IQSWAP_PARAM 334 { 335 MS_U8 id; 336 MS_BOOL bIsQPad; 337 } DTMB_DO_IQSWAP_PARAM, *PDTMB_DO_IQSWAP_PARAM; 338 339 typedef struct DLL_PACKED _DTMB_REG_PARAM 340 { 341 MS_U8 id; 342 MS_U16 u16Addr; 343 MS_U8 u8Data; 344 } DTMB_REG_PARAM, *PDTMB_REG_PARAM; 345 346 //------------------------------------------------------------------------------------------------- 347 // Function and Variable 348 //------------------------------------------------------------------------------------------------- 349 350 DLL_PUBLIC extern void DTMBRegisterToUtopia(FUtopiaOpen ModuleType); 351 DLL_PUBLIC extern MS_U32 DTMBOpen(void** ppInstance, MS_U32 u32ModuleVersion, void* pAttribute); 352 DLL_PUBLIC extern MS_U32 DTMBClose(void* pInstance); 353 DLL_PUBLIC extern MS_U32 DTMBIoctl(void* pInstance, MS_U32 u32Cmd, void* pArgs); 354 355 #ifdef __cplusplus 356 } 357 #endif 358 359 #endif // _DRV_ATSC_V2_H_ 360 361