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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 //////////////////////////////////////////////////////////////////////////////// 93 94 #ifndef _DRVCLKM_H_ 95 #define _DRVCLKM_H_ 96 97 //////////////////////////////////////////////////////////////////////////////// 98 /// @file drvCLKM.h 99 /// @author MStar Semiconductor Inc. 100 /// @brief Byte CLK control driver 101 //////////////////////////////////////////////////////////////////////////////// 102 103 //////////////////////////////////////////////////////////////////////////////// 104 // Header Files 105 //////////////////////////////////////////////////////////////////////////////// 106 #ifdef __cplusplus 107 extern "C" 108 { 109 #endif 110 111 #include "MsTypes.h" 112 113 114 //------------------------------------------------------------------------------------------------- 115 // Macro and Define 116 //------------------------------------------------------------------------------------------------- 117 118 // #define UART_TYPE_DEF 119 /// Version string. 120 #define CLKM_DRV_VERSION /* Character String for DRV/API version */ \ 121 MSIF_TAG, /* 'MSIF' */ \ 122 MSIF_CLASS, /* '00' */ \ 123 MSIF_CUS, /* 0x0000 */ \ 124 MSIF_MOD, /* 0x0000 */ \ 125 MSIF_CHIP, \ 126 MSIF_CPU, \ 127 {'C','L','K','M'}, /* IP__ */ \ 128 {'0','1'}, /* 0.0 ~ Z.Z */ \ 129 {'0','6'}, /* 00 ~ 99 */ \ 130 {'0','0','3','1','0','0','5','0'}, /* CL# */ \ 131 MSIF_OS 132 133 134 135 typedef enum _CLKM_DbgLvl 136 { 137 E_CLKM_DBGLVL_NONE = 0, /// no debug message 138 E_CLKM_DBGLVL_WARNING, /// show warning only 139 E_CLKM_DBGLVL_ERROR, /// show error only 140 E_CLKM_DBGLVL_INFO, /// show error & informaiton 141 E_CLKM_DBGLVL_ALL, /// show error, information & funciton name 142 }CLKM_DbgLvl; 143 144 145 typedef struct _CLKM_Info 146 { 147 MS_BOOL bInit; 148 MS_S32 s32fd; 149 MS_S32 s32Mutex; 150 151 }CLKM_Info; 152 153 154 155 typedef enum { 156 157 E_MDRV_CMD_CLKM_Init, 158 E_MDRV_CMD_CLKM_GET_HANDLE, 159 E_MDRV_CMD_CLKM_CLK_GATE_DIABLE, 160 E_MDRV_CMD_CLKM_SET_CLK_SOURCE, 161 E_MDRV_CMD_CLKM_GET_SRAM_SD_INFO, 162 163 164 } eClkmIoctlOpt; 165 166 typedef enum _CLKM_Result 167 { 168 E_CLKM_NOT_SUPPORT = -1 169 ,E_CLKM_FAIL = 0 170 ,E_CLKM_OK = 1 171 ,E_CLKM_TIMEOUT 172 ,E_CLKM_BUSY 173 }CLKM_Result; 174 175 176 typedef struct _CLKM_GetHandle_PARAM 177 { 178 char *s8_Handle_Name; 179 MS_S32 s32_Handle; 180 181 }CLKM_GetHandle_PARAM,*PCLKM_GetHandle_PARAM; 182 183 184 typedef struct _CLKM_CLK_GATE_DISABLE_PARAM 185 { 186 187 MS_S32 s32_Handle; 188 189 }CLKM_CLK_GATE_DISABLE_PARAM,*PCLKM_CLK_GATE_DISABLE_PARAM; 190 191 192 typedef struct _CLKM_SET_CLK_SRC_PARAM 193 { 194 MS_S32 s32_Handle; 195 char *clk_src_name; 196 197 }CLKM_SET_CLK_SRC_PARAM,*PCLKM_SET_CLK_SRC_PARAM; 198 199 200 typedef struct _CLKM_GET_SRAM_SD_INFO_PARAM 201 { 202 char *sram_sd_name; 203 MS_U16 sram_sd_value; 204 205 }CLKM_GET_SRAM_SD_INFO_PARAM,*PCLKM_GET_SRAM_SD_INFO_PARAM; 206 207 208 209 210 MS_BOOL Drv_CLKM_Init(void); 211 212 void Drv_Clkm_Clk_Gate_Disable(MS_S32 s32Handle); 213 214 void Drv_Clkm_Set_Clk_Source(MS_S32 s32Handle,char *clk_src_name); 215 216 MS_S32 Drv_Clkm_Get_Handle(char *name); 217 218 MS_U16 Drv_Get_Sram_Sd_Info(char *name); 219 220 #ifdef __cplusplus 221 } 222 #endif 223 #endif // _DRVCLKM_H_ 224