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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 //////////////////////////////////////////////////////////////////////////////// 93 94 /*! \defgroup G_BDMA BDMA interface 95 \ingroup G_PERIPHERAL 96 97 \brief 98 99 BDMA is Byte-aligned data transfer DMA engine. It can execute data transmission between MIU to MIU, 100 flash to MIU, SRAM to MIU?�etc. 101 102 <b>Features</b> 103 104 - Byte-aligned data transfer DMA engine 105 - Address increase or decrease while DMA 106 - Two command channels (optional). Note that when 2 command channels exist, they are processed as FIFO (First trigger, first service) 107 - Several data width for device (1/2/4/8/16 bytes) 108 - Bundled source device: MIU/Flash 109 - Bundled destination device: MIU/VDMCU/DSP/TSP/HK51 1K SRAM 110 111 <b> Address decreasing mode:</b> \n 112 Avoid data overlapped on the same storage. Ex: Copy data A to B. 113 \image html drvBDMA_pic.png 114 115 <b> BDMA Block Diagram: </b> \n 116 \image html drvBDMA_pic2.png 117 118 <b> Operation Code Flow: </b> \n 119 -# Prepare BDMA setting for each operation 120 -# Set and start BDMA in command handle 121 -# Get BDMA free channel 122 -# Set setting 123 -# Trigger BDMA 124 -# BDMA done by polling 125 \image html drvBDMA_pic3.png 126 127 128 \defgroup G_BDMA_INIT Initialization Task relative 129 \ingroup G_BDMA 130 \defgroup G_BDMA_COMMON Common Task relative 131 \ingroup G_BDMA 132 \defgroup G_BDMA_PS Pattern search relative 133 \ingroup G_BDMA 134 \defgroup G_BDMA_MOBF MOBF relative 135 \ingroup G_BDMA 136 \defgroup G_BDMA_ToBeModified BDMA api to be modified 137 \ingroup G_BDMA 138 \defgroup G_BDMA_ToBeRemove BDMA api to be removed 139 \ingroup G_BDMA 140 */ 141 142 #ifndef _DRVBDMA_H_ 143 #define _DRVBDMA_H_ 144 145 //////////////////////////////////////////////////////////////////////////////// 146 /// @file drvBDMA.h 147 /// @author MStar Semiconductor Inc. 148 /// @brief Byte DMA control driver 149 //////////////////////////////////////////////////////////////////////////////// 150 151 //////////////////////////////////////////////////////////////////////////////// 152 // Header Files 153 //////////////////////////////////////////////////////////////////////////////// 154 #ifdef __cplusplus 155 extern "C" 156 { 157 #endif 158 159 #include "MsTypes.h" 160 #include "MsDevice.h" 161 #include "UFO.h" 162 163 #define BDMA_UTOPIA20 (1) 164 165 //////////////////////////////////////////////////////////////////////////////// 166 // Define & data type 167 //////////////////////////////////////////////////////////////////////////////// 168 #define MSIF_BDMA_LIB_CODE {'B','D','M','A'} //Lib code 169 #define MSIF_BDMA_LIBVER {'0','3'} //LIB version 170 #define MSIF_BDMA_BUILDNUM {'0','1'} //Build Number 171 #define MSIF_BDMA_CHANGELIST {'0','0','3','4','8','0','3','3'} //P4 ChangeList Number 172 173 #define BDMA_DRV_VERSION /* Character String for DRV/API version */ \ 174 MSIF_TAG, /* 'MSIF' */ \ 175 MSIF_CLASS, /* '00' */ \ 176 MSIF_CUS, /* 0x0000 */ \ 177 MSIF_MOD, /* 0x0000 */ \ 178 MSIF_CHIP, \ 179 MSIF_CPU, \ 180 MSIF_BDMA_LIB_CODE, /* IP__ */ \ 181 MSIF_BDMA_LIBVER, /* 0.0 ~ Z.Z */ \ 182 MSIF_BDMA_BUILDNUM, /* 00 ~ 99 */ \ 183 MSIF_BDMA_CHANGELIST, /* CL# */ \ 184 MSIF_OS 185 186 //v: value n: shift n bits 187 #define _LShift(v, n) ((v) << (n)) 188 #define _RShift(v, n) ((v) >> (n)) 189 190 #define BDMA_SEARCH_ALL_MATCHED (0) 191 #define BDMA_CRC32_POLY (0x04C11DB7) 192 #define BDMA_CRC16_POLY (0x8005) 193 #define BDMA_CRC_SEED_0 (0) 194 #define BDMA_CRC_SEED_F (0xFFFFFFFF) 195 196 /// Operation cfg 197 #define BDMA_OPCFG_DEF (0) 198 #define BDMA_OPCFG_INV_COPY (0x01) 199 #define BDMA_OPCFG_CRC_REFLECT (0x02) //bit reflection of each input byte 200 #define BDMA_OPCFG_CRC_COPY (0x04) //copy then crc check 201 #define BDMA_OPCFG_NOWAIT_COPY (0x08) //copy then quit 202 #define BDMA_OPCFG_MOBF_PS (0x10) //copy then quit 203 204 typedef enum _BDMA_DbgLv 205 { 206 E_BDMA_DBGLV_NONE //no debug message 207 ,E_BDMA_DBGLV_PERFORMANCE //show performance only 208 ,E_BDMA_DBGLV_ERR_ONLY //show error only 209 ,E_BDMA_DBGLV_REG_DUMP //show error & reg dump 210 ,E_BDMA_DBGLV_INFO //show error & informaiton 211 ,E_BDMA_DBGLV_ALL //show error, information & funciton name 212 }BDMA_DbgLv; 213 214 typedef enum _BDMA_Dev 215 { 216 E_BDMA_DEV_MIU0 217 ,E_BDMA_DEV_MIU1 218 ,E_BDMA_DEV_SEARCH 219 ,E_BDMA_DEV_CRC32 220 ,E_BDMA_DEV_MEM_FILL 221 ,E_BDMA_DEV_FLASH 222 ,E_BDMA_DEV_DMDMCU 223 ,E_BDMA_DEV_VDMCU 224 ,E_BDMA_DEV_DSP 225 ,E_BDMA_DEV_TSP 226 ,E_BDMA_DEV_1KSRAM_HK51 227 ,E_BDMA_DEV_MIU2 228 ,E_BDMA_DEV_MIU3 229 ,E_BDMA_DEV_NOT_SUPPORT 230 }BDMA_Dev; 231 232 typedef enum _BDMA_SrcDev 233 { 234 E_BDMA_SRCDEV_MIU0 = E_BDMA_DEV_MIU0 235 ,E_BDMA_SRCDEV_MIU1 = E_BDMA_DEV_MIU1 236 ,E_BDMA_SRCDEV_MEM_FILL = E_BDMA_DEV_MEM_FILL 237 ,E_BDMA_SRCDEV_FLASH = E_BDMA_DEV_FLASH 238 ,E_BDMA_SRCDEV_MIU2 = E_BDMA_DEV_MIU2 239 ,E_BDMA_SRCDEV_MIU3 = E_BDMA_DEV_MIU3 240 ,E_BDMA_SRCDEV_NOT_SUPPORT = E_BDMA_DEV_NOT_SUPPORT 241 }BDMA_SrcDev; 242 243 typedef enum _BDMA_DstDev 244 { 245 E_BDMA_DSTDEV_MIU0 = E_BDMA_DEV_MIU0 246 ,E_BDMA_DSTDEV_MIU1 = E_BDMA_DEV_MIU1 247 ,E_BDMA_DSTDEV_SEARCH = E_BDMA_DEV_SEARCH 248 ,E_BDMA_DSTDEV_CRC32 = E_BDMA_DEV_CRC32 249 ,E_BDMA_DSTDEV_DMDMCU = E_BDMA_DEV_DMDMCU //Demod 250 ,E_BDMA_DSTDEV_VDMCU = E_BDMA_DEV_VDMCU //VD 251 ,E_BDMA_DSTDEV_DSP = E_BDMA_DEV_DSP 252 ,E_BDMA_DSTDEV_TSP = E_BDMA_DEV_TSP 253 ,E_BDMA_DSTDEV_HK51_1KSRAM = E_BDMA_DEV_1KSRAM_HK51 254 ,E_BDMA_DSTDEV_MIU2 = E_BDMA_DEV_MIU2 255 ,E_BDMA_DSTDEV_MIU3 = E_BDMA_DEV_MIU3 256 ,E_BDMA_DSTDEV_NOT_SUPPORT = E_BDMA_DEV_NOT_SUPPORT 257 }BDMA_DstDev; 258 259 #define BDMA_SET_CPYTYPE(src, dst) ((src & 0x0F) | _LShift((dst &0x0F), 8)) 260 261 typedef enum _BDMA_CpyType 262 { 263 E_BDMA_SDRAM2SDRAM = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU0, E_BDMA_DEV_MIU0) 264 ,E_BDMA_SDRAM2SDRAM1 = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU0, E_BDMA_DEV_MIU1) 265 ,E_BDMA_SDRAM2SDRAM2 = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU0, E_BDMA_DEV_MIU2) 266 ,E_BDMA_SDRAM2SDRAM3 = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU0, E_BDMA_DEV_MIU3) 267 ,E_BDMA_SDRAM2DMDMCU = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU0, E_BDMA_DEV_DMDMCU) 268 ,E_BDMA_SDRAM2VDMCU = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU0, E_BDMA_DEV_VDMCU) 269 ,E_BDMA_SDRAM2DSP = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU0, E_BDMA_DEV_DSP) 270 ,E_BDMA_SDRAM2TSP = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU0, E_BDMA_DEV_TSP) 271 ,E_BDMA_SDRAM2SRAM1K_HK51 = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU0, E_BDMA_DEV_1KSRAM_HK51) 272 ,E_BDMA_SDRAM12SDRAM = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU1, E_BDMA_DEV_MIU0) 273 ,E_BDMA_SDRAM12SDRAM1 = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU1, E_BDMA_DEV_MIU1) 274 ,E_BDMA_SDRAM12SDRAM2 = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU1, E_BDMA_DEV_MIU2) 275 ,E_BDMA_SDRAM12SDRAM3 = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU1, E_BDMA_DEV_MIU3) 276 ,E_BDMA_SDRAM12DMDMCU = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU1, E_BDMA_DEV_DMDMCU) 277 ,E_BDMA_SDRAM12VDMCU = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU1, E_BDMA_DEV_VDMCU) 278 ,E_BDMA_SDRAM12DSP = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU1, E_BDMA_DEV_DSP) 279 ,E_BDMA_SDRAM12TSP = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU1, E_BDMA_DEV_TSP) 280 ,E_BDMA_SDRAM12SRAM1K_HK51 = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU1, E_BDMA_DEV_1KSRAM_HK51) 281 ,E_BDMA_SDRAM22SDRAM = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU2, E_BDMA_DEV_MIU0) 282 ,E_BDMA_SDRAM22SDRAM1 = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU2, E_BDMA_DEV_MIU1) 283 ,E_BDMA_SDRAM22SDRAM2 = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU2, E_BDMA_DEV_MIU2) 284 ,E_BDMA_SDRAM22SDRAM3 = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU2, E_BDMA_DEV_MIU3) 285 ,E_BDMA_SDRAM22DMDMCU = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU2, E_BDMA_DEV_DMDMCU) 286 ,E_BDMA_SDRAM22VDMCU = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU2, E_BDMA_DEV_VDMCU) 287 ,E_BDMA_SDRAM22DSP = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU2, E_BDMA_DEV_DSP) 288 ,E_BDMA_SDRAM22TSP = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU2, E_BDMA_DEV_TSP) 289 ,E_BDMA_SDRAM22SRAM1K_HK51 = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU2, E_BDMA_DEV_1KSRAM_HK51) 290 ,E_BDMA_SDRAM32SDRAM = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU3, E_BDMA_DEV_MIU0) 291 ,E_BDMA_SDRAM32SDRAM1 = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU3, E_BDMA_DEV_MIU1) 292 ,E_BDMA_SDRAM32SDRAM2 = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU3, E_BDMA_DEV_MIU2) 293 ,E_BDMA_SDRAM32SDRAM3 = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU3, E_BDMA_DEV_MIU3) 294 ,E_BDMA_SDRAM32DMDMCU = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU3, E_BDMA_DEV_DMDMCU) 295 ,E_BDMA_SDRAM32VDMCU = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU3, E_BDMA_DEV_VDMCU) 296 ,E_BDMA_SDRAM32DSP = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU3, E_BDMA_DEV_DSP) 297 ,E_BDMA_SDRAM32TSP = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU3, E_BDMA_DEV_TSP) 298 ,E_BDMA_SDRAM32SRAM1K_HK51 = BDMA_SET_CPYTYPE(E_BDMA_DEV_MIU3, E_BDMA_DEV_1KSRAM_HK51) 299 ,E_BDMA_FLASH2SDRAM = BDMA_SET_CPYTYPE(E_BDMA_DEV_FLASH, E_BDMA_DEV_MIU0) 300 ,E_BDMA_FLASH2SDRAM1 = BDMA_SET_CPYTYPE(E_BDMA_DEV_FLASH, E_BDMA_DEV_MIU1) 301 ,E_BDMA_FLASH2DMDMCU = BDMA_SET_CPYTYPE(E_BDMA_DEV_FLASH, E_BDMA_DEV_DMDMCU) 302 ,E_BDMA_FLASH2VDMCU = BDMA_SET_CPYTYPE(E_BDMA_DEV_FLASH, E_BDMA_DEV_VDMCU) 303 ,E_BDMA_FLASH2DSP = BDMA_SET_CPYTYPE(E_BDMA_DEV_FLASH, E_BDMA_DEV_DSP) 304 ,E_BDMA_FLASH2TSP = BDMA_SET_CPYTYPE(E_BDMA_DEV_FLASH, E_BDMA_DEV_TSP) 305 ,E_BDMA_FLASH2SRAMHK51 = BDMA_SET_CPYTYPE(E_BDMA_DEV_FLASH, E_BDMA_DEV_1KSRAM_HK51) 306 ,E_BDMA_CPYTYPE_MAX 307 }BDMA_CpyType; 308 309 typedef enum _BDMA_Result 310 { 311 E_BDMA_NOT_SUPPORT = -1 312 ,E_BDMA_FAIL = 0 313 ,E_BDMA_OK = 1 314 ,E_BDMA_TIMEOUT 315 ,E_BDMA_QUEUE_FULL 316 ,E_BDMA_BUSY 317 }BDMA_Result; 318 319 typedef struct _BDMA_HwInfo 320 { 321 MS_BOOL bEnMIU1; //MIU1 322 MS_BOOL bEnHost; //bdma host 323 MS_BOOL bEnMemFill; //memory fill 324 MS_BOOL bEnFlsCpy; //flash copy 325 MS_BOOL bEnDevDw; //bdma device data width 326 MS_BOOL bEnDmyWrCnt; //bdma dummy wr count 327 MS_BOOL bEnDMDMCU; //bdma to DeMod MCU 328 MS_BOOL bEnTSP; //bdma to TSP 329 MS_BOOL bEnDSP; //bdma to DSP 330 MS_BOOL bEnHK51_1KSRAM; //bdma to HK51_1KSRAM 331 }BDMA_HwInfo; 332 333 typedef struct _BDMA_Info 334 { 335 MS_U8 u8ChNum; 336 MS_U16 u16ChipVer; 337 #if defined(UFO_PUBLIC_HEADER_300) || defined(UFO_PUBLIC_HEADER_212) 338 MS_U32 u32IOMap; 339 MS_U32 u32MIU1Base; 340 #else 341 MS_VIRT u32IOMap; 342 MS_PHY phy64MIU1Base; 343 #endif 344 MS_S32 s32Mutex; 345 MS_BOOL bInit; 346 BDMA_DbgLv eDbgLv; 347 BDMA_HwInfo sHwCap; 348 }BDMA_Info; 349 350 typedef struct _BDMA_ChStatus 351 { 352 MS_BOOL bIsBusy; 353 MS_BOOL bIsInt; 354 MS_BOOL bIsFound; 355 }BDMA_ChStatus; 356 357 typedef struct DLL_PACKED _BDMA_Status 358 { 359 MS_BOOL bInit; 360 BDMA_DbgLv eDbgLv; 361 BDMA_ChStatus sChSta[2]; 362 }BDMA_Status; 363 364 #ifdef MOBF_ENABLE 365 366 typedef struct DLL_PACKED _BDMA_MOBF_PS 367 { 368 MS_U32 u32Pattern; 369 MS_U32 u32ExcluBit; 370 MS_U32 u32MobfKey; 371 }BDMA_MOBF_PS; 372 373 #endif 374 375 typedef void (*BDMA_ISR_CBF)(BDMA_Result eRet); 376 //////////////////////////////////////////////////////////////////////////////// 377 // Extern Function 378 //////////////////////////////////////////////////////////////////////////////// 379 380 //////////////////////////////////////////////////////////////////////////////// 381 // include utopia v2 header files here 382 //////////////////////////////////////////////////////////////////////////////// 383 #include "drvBDMA_v2.h" 384 385 386 // status check & dbg level 387 //------------------------------------------------------------------------------------------------- 388 /// MOBF Encrypt 389 /// @ingroup G_BDMA_COMMON 390 /// @param u32Key \b IN: Key 391 /// @param bEnable \b IN: TRUE/FLASE 392 /// @return DRVAESDMA_OK : Success 393 /// @return Others : Fail 394 //------------------------------------------------------------------------------------------------- 395 BDMA_Result MDrv_BDMA_GetLibVer(const MSIF_Version **ppVersion); 396 //------------------------------------------------------------------------------------------------- 397 /// MOBF Encrypt 398 /// @ingroup G_BDMA_COMMON 399 /// @param u32Key \b IN: Key 400 /// @param bEnable \b IN: TRUE/FLASE 401 /// @return DRVAESDMA_OK : Success 402 /// @return Others : Fail 403 //------------------------------------------------------------------------------------------------- 404 void MDrv_BDMA_GetStatus(BDMA_Status *pStatus); 405 //------------------------------------------------------------------------------------------------- 406 /// MOBF Encrypt 407 /// @ingroup G_BDMA_COMMON 408 /// @param u32Key \b IN: Key 409 /// @param bEnable \b IN: TRUE/FLASE 410 /// @return DRVAESDMA_OK : Success 411 /// @return Others : Fail 412 //------------------------------------------------------------------------------------------------- 413 const BDMA_Info* MDrv_BDMA_GetInfo(void); 414 //------------------------------------------------------------------------------------------------- 415 /// MOBF Encrypt 416 /// @ingroup G_BDMA_COMMON 417 /// @param u32Key \b IN: Key 418 /// @param bEnable \b IN: TRUE/FLASE 419 /// @return DRVAESDMA_OK : Success 420 /// @return Others : Fail 421 //------------------------------------------------------------------------------------------------- 422 MS_U32 MDrv_BDMA_GetMinSize(void); 423 //------------------------------------------------------------------------------------------------- 424 /// MOBF Encrypt 425 /// @ingroup G_BDMA_COMMON 426 /// @param u32Key \b IN: Key 427 /// @param bEnable \b IN: TRUE/FLASE 428 /// @return DRVAESDMA_OK : Success 429 /// @return Others : Fail 430 //------------------------------------------------------------------------------------------------- 431 BDMA_Result MDrv_BDMA_SetDbgLevel(BDMA_DbgLv eLevel); 432 //------------------------------------------------------------------------------------------------- 433 /// MOBF Encrypt 434 /// @ingroup G_BDMA_INIT 435 /// @param u32Key \b IN: Key 436 /// @param bEnable \b IN: TRUE/FLASE 437 /// @return DRVAESDMA_OK : Success 438 /// @return Others : Fail 439 //------------------------------------------------------------------------------------------------- 440 #if defined(UFO_PUBLIC_HEADER_300) || defined(UFO_PUBLIC_HEADER_212) 441 BDMA_Result MDrv_BDMA_Init(MS_U32 u32Miu1Base); 442 #else 443 BDMA_Result MDrv_BDMA_Init(MS_PHY phy64Miu1Base); 444 #endif 445 //------------------------------------------------------------------------------------------------- 446 /// MOBF Encrypt 447 /// @ingroup G_BDMA_INIT 448 /// @param u32Key \b IN: Key 449 /// @param bEnable \b IN: TRUE/FLASE 450 /// @return DRVAESDMA_OK : Success 451 /// @return Others : Fail 452 //------------------------------------------------------------------------------------------------- 453 #if defined(UFO_PUBLIC_HEADER_300) || defined(UFO_PUBLIC_HEADER_212) 454 MS_U32 MDrv_BDMA_Search(MS_PHYADDR u32Addr, MS_U32 u32Len, MS_U32 u32Pattern, MS_U32 u32ExcluBit, BDMA_SrcDev eDev); 455 #else 456 MS_U32 MDrv_BDMA_Search(MS_PHY phy64Addr, MS_U32 u32Len, MS_U32 u32Pattern, MS_U32 u32ExcluBit, BDMA_SrcDev eDev); 457 #endif 458 #ifdef MOBF_ENABLE 459 //------------------------------------------------------------------------------------------------- 460 /// MOBF Encrypt 461 /// @ingroup G_BDMA_PS 462 /// @param u32Key \b IN: Key 463 /// @param bEnable \b IN: TRUE/FLASE 464 /// @return DRVAESDMA_OK : Success 465 /// @return Others : Fail 466 //------------------------------------------------------------------------------------------------- 467 #if defined(UFO_PUBLIC_HEADER_300) || defined(UFO_PUBLIC_HEADER_212) 468 MS_U32 MDrv_BDMA_MOBFSearch(MS_PHYADDR u32Addr, MS_U32 u32Len, BDMA_MOBF_PS *pMobfPsCfg, BDMA_SrcDev eDev); 469 #else 470 MS_PHY MDrv_BDMA_MOBFSearch(MS_PHY phy64Addr, MS_U32 u32Len, BDMA_MOBF_PS *pMobfPsCfg, BDMA_SrcDev eDev); 471 #endif 472 #endif 473 //------------------------------------------------------------------------------------------------- 474 /// MOBF Encrypt 475 /// @ingroup G_BDMA_MOBF 476 /// @param u32Key \b IN: Key 477 /// @param bEnable \b IN: TRUE/FLASE 478 /// @return DRVAESDMA_OK : Success 479 /// @return Others : Fail 480 //------------------------------------------------------------------------------------------------- 481 #if defined(UFO_PUBLIC_HEADER_300) || defined(UFO_PUBLIC_HEADER_212) 482 MS_U32 MDrv_BDMA_CRC32(MS_PHYADDR u32Addr, MS_U32 u32Len, MS_U32 u32Poly, MS_U32 u32Seed, BDMA_SrcDev eDev, MS_BOOL bReflect); 483 #else 484 MS_U32 MDrv_BDMA_CRC32(MS_PHY phy64Addr, MS_U32 u32Len, MS_U32 u32Poly, MS_U32 u32Seed, BDMA_SrcDev eDev, MS_BOOL bReflect); 485 #endif 486 //------------------------------------------------------------------------------------------------- 487 /// MOBF Encrypt 488 /// @ingroup G_BDMA_COMMON 489 /// @param u32Key \b IN: Key 490 /// @param bEnable \b IN: TRUE/FLASE 491 /// @return DRVAESDMA_OK : Success 492 /// @return Others : Fail 493 //------------------------------------------------------------------------------------------------- 494 #if defined(UFO_PUBLIC_HEADER_300) || defined(UFO_PUBLIC_HEADER_212) 495 BDMA_Result MDrv_BDMA_PatternFill(MS_PHYADDR u32Addr, MS_U32 u32Len, MS_U32 u32Pattern, BDMA_DstDev eDev); 496 #else 497 BDMA_Result MDrv_BDMA_PatternFill(MS_PHY u32Addr, MS_U32 u32Len, MS_U32 u32Pattern, BDMA_DstDev eDev); 498 #endif 499 //------------------------------------------------------------------------------------------------- 500 /// MOBF Encrypt 501 /// @ingroup G_BDMA_PS 502 /// @param u32Key \b IN: Key 503 /// @param bEnable \b IN: TRUE/FLASE 504 /// @return DRVAESDMA_OK : Success 505 /// @return Others : Fail 506 //------------------------------------------------------------------------------------------------- 507 #if defined(UFO_PUBLIC_HEADER_300) || defined(UFO_PUBLIC_HEADER_212) 508 BDMA_Result MDrv_BDMA_MemCopy(MS_PHYADDR u32SrcAddr, MS_PHYADDR u32DstAddr, MS_U32 u32Len); 509 #else 510 BDMA_Result MDrv_BDMA_MemCopy(MS_PHY phy64SrcAddr, MS_PHY phy64DstAddr, MS_U32 u32Len); 511 #endif 512 //------------------------------------------------------------------------------------------------- 513 /// MOBF Encrypt 514 /// @ingroup G_BDMA_COMMON 515 /// @param u32Key \b IN: Key 516 /// @param bEnable \b IN: TRUE/FLASE 517 /// @return DRVAESDMA_OK : Success 518 /// @return Others : Fail 519 //------------------------------------------------------------------------------------------------- 520 #if defined(UFO_PUBLIC_HEADER_300) || defined(UFO_PUBLIC_HEADER_212) 521 BDMA_Result MDrv_BDMA_FlashCopy2Dram(MS_PHYADDR u32FlashAddr, MS_PHYADDR u32DramAddr, MS_U32 u32Len); 522 #else 523 BDMA_Result MDrv_BDMA_FlashCopy2Dram(MS_PHY phy64FlashAddr, MS_PHY phy64DramAddr, MS_U32 u32Len); 524 #endif 525 //------------------------------------------------------------------------------------------------- 526 /// MOBF Encrypt 527 /// @ingroup G_BDMA_COMMON 528 /// @param u32Key \b IN: Key 529 /// @param bEnable \b IN: TRUE/FLASE 530 /// @return DRVAESDMA_OK : Success 531 /// @return Others : Fail 532 //------------------------------------------------------------------------------------------------- 533 #if defined(UFO_PUBLIC_HEADER_300) || defined(UFO_PUBLIC_HEADER_212) 534 BDMA_Result MDrv_BDMA_CopyHnd(MS_PHYADDR u32SrcAddr, MS_PHYADDR u32DstAddr, MS_U32 u32Len, BDMA_CpyType eCpyType, MS_U8 u8OpCfg); 535 #else 536 BDMA_Result MDrv_BDMA_CopyHnd(MS_PHY phy64SrcAddr, MS_PHY phy64DstAddr, MS_U32 u32Len, BDMA_CpyType eCpyType, MS_U8 u8OpCfg); 537 #endif 538 //------------------------------------------------------------------------------------------------- 539 /// MOBF Encrypt 540 /// @ingroup G_BDMA_COMMON 541 /// @param u32Key \b IN: Key 542 /// @param bEnable \b IN: TRUE/FLASE 543 /// @return DRVAESDMA_OK : Success 544 /// @return Others : Fail 545 //------------------------------------------------------------------------------------------------- 546 MS_U32 MDrv_BDMA_SetPowerState(EN_POWER_MODE u16PowerState); 547 //------------------------------------------------------------------------------------------------- 548 /// MOBF Encrypt 549 /// @ingroup G_BDMA_COMMON 550 /// @param u32Key \b IN: Key 551 /// @param bEnable \b IN: TRUE/FLASE 552 /// @return DRVAESDMA_OK : Success 553 /// @return Others : Fail 554 //------------------------------------------------------------------------------------------------- 555 BDMA_Result MDrv_BDMA_WaitFlashDone(void); 556 //------------------------------------------------------------------------------------------------- 557 /// MOBF Encrypt 558 /// @ingroup G_BDMA_ToBeModified 559 /// @param u32Key \b IN: Key 560 /// @param bEnable \b IN: TRUE/FLASE 561 /// @return DRVAESDMA_OK : Success 562 /// @return Others : Fail 563 //------------------------------------------------------------------------------------------------- 564 void MDrv_BDMA_SetSPIOffsetForMCU(void); 565 566 // status 567 //------------------------------------------------------------------------------------------------- 568 /// MOBF Encrypt 569 /// @ingroup G_BDMA_COMMON 570 /// @param u32Key \b IN: Key 571 /// @param bEnable \b IN: TRUE/FLASE 572 /// @return DRVAESDMA_OK : Success 573 /// @return Others : Fail 574 //------------------------------------------------------------------------------------------------- 575 void MDrv_BDMA_DumpCB(void *pvOpCB); 576 //------------------------------------------------------------------------------------------------- 577 /// MOBF Encrypt 578 /// @ingroup G_BDMA_ToBeModified 579 /// @param u32Key \b IN: Key 580 /// @param bEnable \b IN: TRUE/FLASE 581 /// @return DRVAESDMA_OK : Success 582 /// @return Others : Fail 583 //------------------------------------------------------------------------------------------------- 584 BDMA_Result MDrv_BDMA_Stop_All(void); 585 //------------------------------------------------------------------------------------------------- 586 /// MOBF Encrypt 587 /// @ingroup G_BDMA_ToBeModified 588 /// @param u32Key \b IN: Key 589 /// @param bEnable \b IN: TRUE/FLASE 590 /// @return DRVAESDMA_OK : Success 591 /// @return Others : Fail 592 //------------------------------------------------------------------------------------------------- 593 BDMA_Result MDrv_BDMA_Stop(MS_U8 u8Ch); 594 //------------------------------------------------------------------------------------------------- 595 /// MOBF Encrypt 596 /// @ingroup G_BDMA_INIT 597 /// @param u32Key \b IN: Key 598 /// @param bEnable \b IN: TRUE/FLASE 599 /// @return DRVAESDMA_OK : Success 600 /// @return Others : Fail 601 //------------------------------------------------------------------------------------------------- 602 BDMA_Result MDrv_BDMA_Exit(void); 603 604 605 #ifdef __cplusplus 606 } 607 #endif 608 #endif 609