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MStar hereby reserves the 91*53ee8cc1Swenshuai.xi // rights to any and all damages, losses, costs and expenses resulting therefrom. 92*53ee8cc1Swenshuai.xi // 93*53ee8cc1Swenshuai.xi //////////////////////////////////////////////////////////////////////////////// 94*53ee8cc1Swenshuai.xi 95*53ee8cc1Swenshuai.xi /////////////////////////////////////////////////////////////////////////////////////////////////// 96*53ee8cc1Swenshuai.xi /// 97*53ee8cc1Swenshuai.xi /// @file apiPNL.h 98*53ee8cc1Swenshuai.xi /// @brief Panel Interface 99*53ee8cc1Swenshuai.xi /// @author MStar Semiconductor Inc. 100*53ee8cc1Swenshuai.xi /////////////////////////////////////////////////////////////////////////////////////////////////// 101*53ee8cc1Swenshuai.xi 102*53ee8cc1Swenshuai.xi /*! \defgroup PNL_MODULE Panel Module 103*53ee8cc1Swenshuai.xi 104*53ee8cc1Swenshuai.xi PNL is used for: 105*53ee8cc1Swenshuai.xi 106*53ee8cc1Swenshuai.xi - 1.Set panel parameters base on different panel type,include VOP, MOD setting 107*53ee8cc1Swenshuai.xi - 2.change panel types . 108*53ee8cc1Swenshuai.xi - Ex:VBY1 switch from 2,4,8 lanes. 109*53ee8cc1Swenshuai.xi 110*53ee8cc1Swenshuai.xi <b> Operation Code Flow: </b> \n 111*53ee8cc1Swenshuai.xi check flow chart directly. 112*53ee8cc1Swenshuai.xi \image html apiPNL.png 113*53ee8cc1Swenshuai.xi 114*53ee8cc1Swenshuai.xi *! \defgroup PNL_INTERFACE_INIT Panel Init Control Interface 115*53ee8cc1Swenshuai.xi * \ingroup PNL_MODULE 116*53ee8cc1Swenshuai.xi 117*53ee8cc1Swenshuai.xi *! \defgroup PNL_INTERFACE_FEATURE Panel Feature Operations Interface 118*53ee8cc1Swenshuai.xi * \ingroup PNL_MODULE 119*53ee8cc1Swenshuai.xi 120*53ee8cc1Swenshuai.xi *! \defgroup PNL_INTERFACE_INFO Panel Infomation Pool Interface 121*53ee8cc1Swenshuai.xi * \ingroup PNL_MODULE 122*53ee8cc1Swenshuai.xi 123*53ee8cc1Swenshuai.xi *! \defgroup PNL_INTERFACE_ToBeModified Panel APIs-to-be-modified Interface 124*53ee8cc1Swenshuai.xi * \ingroup PNL_MODULE 125*53ee8cc1Swenshuai.xi 126*53ee8cc1Swenshuai.xi *! \defgroup PNL_INTERFACE_ToBeRemove Panel APIs-to-be-removed Interface 127*53ee8cc1Swenshuai.xi * \ingroup PNL_MODULE 128*53ee8cc1Swenshuai.xi */ 129*53ee8cc1Swenshuai.xi 130*53ee8cc1Swenshuai.xi 131*53ee8cc1Swenshuai.xi #ifndef _API_XC_PANEL_H_ 132*53ee8cc1Swenshuai.xi #define _API_XC_PANEL_H_ 133*53ee8cc1Swenshuai.xi 134*53ee8cc1Swenshuai.xi #include "MsDevice.h" 135*53ee8cc1Swenshuai.xi #include "MsVersion.h" 136*53ee8cc1Swenshuai.xi #include "UFO.h" 137*53ee8cc1Swenshuai.xi 138*53ee8cc1Swenshuai.xi #ifdef __cplusplus 139*53ee8cc1Swenshuai.xi extern "C" { 140*53ee8cc1Swenshuai.xi #endif 141*53ee8cc1Swenshuai.xi 142*53ee8cc1Swenshuai.xi #ifdef _API_XC_PANEL_C_ 143*53ee8cc1Swenshuai.xi #define INTERFACE 144*53ee8cc1Swenshuai.xi #else 145*53ee8cc1Swenshuai.xi #define INTERFACE extern 146*53ee8cc1Swenshuai.xi #endif 147*53ee8cc1Swenshuai.xi 148*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 149*53ee8cc1Swenshuai.xi // Macro and Define 150*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 151*53ee8cc1Swenshuai.xi 152*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 153*53ee8cc1Swenshuai.xi // This macro defined in mscommon.h originally, here just for avoid SN compile error 154*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 155*53ee8cc1Swenshuai.xi #ifdef MSOS_TYPE_LINUX_KERNEL 156*53ee8cc1Swenshuai.xi #define SYMBOL_WEAK 157*53ee8cc1Swenshuai.xi #else 158*53ee8cc1Swenshuai.xi #define SYMBOL_WEAK __attribute__((weak)) 159*53ee8cc1Swenshuai.xi #endif 160*53ee8cc1Swenshuai.xi 161*53ee8cc1Swenshuai.xi #ifndef _MS_VERSION_H_ 162*53ee8cc1Swenshuai.xi #define MSIF_TAG {'M','S','I','F'} // MSIF 163*53ee8cc1Swenshuai.xi #define MSIF_CLASS {'0','0'} // DRV/API (DDI) 164*53ee8cc1Swenshuai.xi #define MSIF_CUS 0x0000 // MStar Common library 165*53ee8cc1Swenshuai.xi #define MSIF_MOD 0x0000 // MStar Common library 166*53ee8cc1Swenshuai.xi #define MSIF_CHIP 0x000B 167*53ee8cc1Swenshuai.xi #define MSIF_CPU '0' 168*53ee8cc1Swenshuai.xi #define MSIF_OS '2' 169*53ee8cc1Swenshuai.xi #endif 170*53ee8cc1Swenshuai.xi 171*53ee8cc1Swenshuai.xi // library information 172*53ee8cc1Swenshuai.xi #define MSIF_PNL_LIB_CODE {'P','N','L','_'} 173*53ee8cc1Swenshuai.xi #define MSIF_PNL_LIBVER {'0','3'} 174*53ee8cc1Swenshuai.xi #define MSIF_PNL_BUILDNUM {'5','2'} 175*53ee8cc1Swenshuai.xi #define MSIF_PNL_CHANGELIST {'0','0','6','1','4','4','7','7'} 176*53ee8cc1Swenshuai.xi 177*53ee8cc1Swenshuai.xi #define PNL_API_VERSION /* Character String for DRV/API version */ \ 178*53ee8cc1Swenshuai.xi MSIF_TAG, /* 'MSIF' */ \ 179*53ee8cc1Swenshuai.xi MSIF_CLASS, /* '00' */ \ 180*53ee8cc1Swenshuai.xi MSIF_CUS, /* 0x0000 */ \ 181*53ee8cc1Swenshuai.xi MSIF_MOD, /* 0x0000 */ \ 182*53ee8cc1Swenshuai.xi MSIF_CHIP, \ 183*53ee8cc1Swenshuai.xi MSIF_CPU, \ 184*53ee8cc1Swenshuai.xi MSIF_PNL_LIB_CODE , /* IP__ */ \ 185*53ee8cc1Swenshuai.xi MSIF_PNL_LIBVER , /* 0.0 ~ Z.Z */ \ 186*53ee8cc1Swenshuai.xi MSIF_PNL_BUILDNUM , /* 00 ~ 99 */ \ 187*53ee8cc1Swenshuai.xi MSIF_PNL_CHANGELIST, /* CL# */ \ 188*53ee8cc1Swenshuai.xi MSIF_OS 189*53ee8cc1Swenshuai.xi 190*53ee8cc1Swenshuai.xi /// ApiStatusEX version of current XC lib 191*53ee8cc1Swenshuai.xi #define API_PNLSTATUS_EX_VERSION 1 192*53ee8cc1Swenshuai.xi 193*53ee8cc1Swenshuai.xi //---------------------------- 194*53ee8cc1Swenshuai.xi // Debug Switch 195*53ee8cc1Swenshuai.xi //---------------------------- 196*53ee8cc1Swenshuai.xi #define PNL_DBGLEVEL_OFF (0x0000) ///< turn off debug message, this is default setting 197*53ee8cc1Swenshuai.xi #define PNL_DBGLEVEL_INIT (0x0001) ///< Initial function 198*53ee8cc1Swenshuai.xi #define PNL_DBGLEVEL_PANEL_EN (0x0002) ///< panel enable function 199*53ee8cc1Swenshuai.xi #define PNL_DBGLEVEL_SSC (0x0004) ///< panel SSC setting 200*53ee8cc1Swenshuai.xi #define PNL_DBGLEVEL_GAMMA (0x0008) ///< gamma table setting 201*53ee8cc1Swenshuai.xi #define PNL_DBGLEVEL_CALIBRATION (0x0010) ///< mod calibration 202*53ee8cc1Swenshuai.xi 203*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 204*53ee8cc1Swenshuai.xi // Type and Structure 205*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 206*53ee8cc1Swenshuai.xi /// Define return value of MApi_PNL 207*53ee8cc1Swenshuai.xi typedef enum 208*53ee8cc1Swenshuai.xi { 209*53ee8cc1Swenshuai.xi E_APIPNL_FAIL = 0, 210*53ee8cc1Swenshuai.xi E_APIPNL_OK = 1, 211*53ee8cc1Swenshuai.xi E_APIPNL_GET_BASEADDR_FAIL, ///< get base address failed when initialize panel driver 212*53ee8cc1Swenshuai.xi E_APIPNL_OBTAIN_MUTEX_FAIL, ///< obtain mutex timeout when calling this function 213*53ee8cc1Swenshuai.xi } APIPNL_Result; 214*53ee8cc1Swenshuai.xi 215*53ee8cc1Swenshuai.xi /// Define aspect ratio 216*53ee8cc1Swenshuai.xi typedef enum 217*53ee8cc1Swenshuai.xi { 218*53ee8cc1Swenshuai.xi E_PNL_ASPECT_RATIO_4_3 = 0, ///< set aspect ratio to 4 : 3 219*53ee8cc1Swenshuai.xi E_PNL_ASPECT_RATIO_WIDE, ///< set aspect ratio to 16 : 9 220*53ee8cc1Swenshuai.xi E_PNL_ASPECT_RATIO_OTHER, ///< resvered for other aspect ratio other than 4:3/ 16:9 221*53ee8cc1Swenshuai.xi }E_PNL_ASPECT_RATIO; 222*53ee8cc1Swenshuai.xi 223*53ee8cc1Swenshuai.xi /// Define the panel gamma precision type 224*53ee8cc1Swenshuai.xi typedef enum 225*53ee8cc1Swenshuai.xi { 226*53ee8cc1Swenshuai.xi E_APIPNL_GAMMA_10BIT = 0, ///< Gamma Type of 10bit 227*53ee8cc1Swenshuai.xi E_APIPNL_GAMMA_12BIT, ///< Gamma Type of 12bit 228*53ee8cc1Swenshuai.xi E_APIPNL_GAMMA_ALL ///< The library can support all mapping mode 229*53ee8cc1Swenshuai.xi } APIPNL_GAMMA_TYPE; 230*53ee8cc1Swenshuai.xi 231*53ee8cc1Swenshuai.xi /// Define Gamma type 232*53ee8cc1Swenshuai.xi typedef enum 233*53ee8cc1Swenshuai.xi { 234*53ee8cc1Swenshuai.xi E_APIPNL_GAMMA_8BIT_MAPPING = 0, ///< mapping 1024 to 256 gamma entries 235*53ee8cc1Swenshuai.xi E_APIPNL_GAMMA_10BIT_MAPPING, ///< mapping 1024 to 1024 gamma entries 236*53ee8cc1Swenshuai.xi E_APIPNL_GAMMA_ALL_MAPPING ///< the library can map to any entries 237*53ee8cc1Swenshuai.xi } APIPNL_GAMMA_MAPPEING_MODE; ///< samping mode for GAMMA correction 238*53ee8cc1Swenshuai.xi 239*53ee8cc1Swenshuai.xi /// Define The dimming control flag. when use with setter/getter, it will set/get MIN/MAX/Current value 240*53ee8cc1Swenshuai.xi typedef enum 241*53ee8cc1Swenshuai.xi { 242*53ee8cc1Swenshuai.xi E_APIPNL_DIMMING_MIN = 0, ///< Indicate to Get/Set Min Dimming value. 243*53ee8cc1Swenshuai.xi E_APIPNL_DIMMING_CURRENT , ///< Indicate to Get/Set Current Dimming value. 244*53ee8cc1Swenshuai.xi E_APIPNL_DIMMING_MAX , ///< Indicate to Get/Set Max Dimming value. 245*53ee8cc1Swenshuai.xi } APIPNL_DIMMING_CTRL; 246*53ee8cc1Swenshuai.xi 247*53ee8cc1Swenshuai.xi /// Define PANEL Signaling Type 248*53ee8cc1Swenshuai.xi typedef enum 249*53ee8cc1Swenshuai.xi { 250*53ee8cc1Swenshuai.xi LINK_TTL, ///< TTL type 251*53ee8cc1Swenshuai.xi LINK_LVDS, ///< LVDS type 252*53ee8cc1Swenshuai.xi LINK_RSDS, ///< RSDS type 253*53ee8cc1Swenshuai.xi LINK_MINILVDS, ///< TCON 254*53ee8cc1Swenshuai.xi LINK_ANALOG_MINILVDS, ///< Analog TCON 255*53ee8cc1Swenshuai.xi LINK_DIGITAL_MINILVDS, ///< Digital TCON 256*53ee8cc1Swenshuai.xi LINK_MFC, ///< Ursa (TTL output to Ursa) 257*53ee8cc1Swenshuai.xi LINK_DAC_I, ///< DAC output 258*53ee8cc1Swenshuai.xi LINK_DAC_P, ///< DAC output 259*53ee8cc1Swenshuai.xi LINK_PDPLVDS, ///< For PDP(Vsync use Manually MODE) 260*53ee8cc1Swenshuai.xi LINK_EXT, /// EXT LPLL TYPE 261*53ee8cc1Swenshuai.xi }APIPNL_LINK_TYPE; 262*53ee8cc1Swenshuai.xi 263*53ee8cc1Swenshuai.xi /// Define PANEL Signaling Type 264*53ee8cc1Swenshuai.xi typedef enum 265*53ee8cc1Swenshuai.xi { 266*53ee8cc1Swenshuai.xi // M10 New Panel Type 267*53ee8cc1Swenshuai.xi LINK_EPI34_8P = LINK_EXT, /// 10 268*53ee8cc1Swenshuai.xi LINK_EPI28_8P, /// 11 269*53ee8cc1Swenshuai.xi LINK_EPI34_6P, /// 12 270*53ee8cc1Swenshuai.xi LINK_EPI28_6P, /// 13 271*53ee8cc1Swenshuai.xi 272*53ee8cc1Swenshuai.xi ///LINK_MINILVDS_6P_2L, /// replace this with LINK_MINILVDS 273*53ee8cc1Swenshuai.xi LINK_MINILVDS_5P_2L, /// 14 274*53ee8cc1Swenshuai.xi LINK_MINILVDS_4P_2L, /// 15 275*53ee8cc1Swenshuai.xi LINK_MINILVDS_3P_2L, /// 16 276*53ee8cc1Swenshuai.xi LINK_MINILVDS_6P_1L, /// 17 277*53ee8cc1Swenshuai.xi LINK_MINILVDS_5P_1L, /// 18 278*53ee8cc1Swenshuai.xi LINK_MINILVDS_4P_1L, /// 19 279*53ee8cc1Swenshuai.xi LINK_MINILVDS_3P_1L, /// 20 280*53ee8cc1Swenshuai.xi 281*53ee8cc1Swenshuai.xi LINK_HS_LVDS, /// 21 282*53ee8cc1Swenshuai.xi LINK_HF_LVDS, /// 22 283*53ee8cc1Swenshuai.xi 284*53ee8cc1Swenshuai.xi LINK_TTL_TCON, /// 23 285*53ee8cc1Swenshuai.xi LINK_MINILVDS_2CH_3P_8BIT, // 2 channel, 3 pair, 8 bits ///24 286*53ee8cc1Swenshuai.xi LINK_MINILVDS_2CH_4P_8BIT, // 2 channel, 4 pair, 8 bits ///25 287*53ee8cc1Swenshuai.xi LINK_MINILVDS_2CH_5P_8BIT, // 2 channel, 5 pair, 8 bits ///26 288*53ee8cc1Swenshuai.xi LINK_MINILVDS_2CH_6P_8BIT, // 2 channel, 6 pair, 8 bits ///27 289*53ee8cc1Swenshuai.xi 290*53ee8cc1Swenshuai.xi LINK_MINILVDS_1CH_3P_8BIT, // 1 channel, 3 pair, 8 bits ///28 291*53ee8cc1Swenshuai.xi LINK_MINILVDS_1CH_4P_8BIT, // 1 channel, 4 pair, 8 bits ///29 292*53ee8cc1Swenshuai.xi LINK_MINILVDS_1CH_5P_8BIT, // 1 channel, 5 pair, 8 bits ///30 293*53ee8cc1Swenshuai.xi LINK_MINILVDS_1CH_6P_8BIT, // 1 channel, 6 pair, 8 bits ///31 294*53ee8cc1Swenshuai.xi 295*53ee8cc1Swenshuai.xi LINK_MINILVDS_2CH_3P_6BIT, // 2 channel, 3 pari, 6 bits ///32 296*53ee8cc1Swenshuai.xi LINK_MINILVDS_2CH_4P_6BIT, // 2 channel, 4 pari, 6 bits ///33 297*53ee8cc1Swenshuai.xi LINK_MINILVDS_2CH_5P_6BIT, // 2 channel, 5 pari, 6 bits ///34 298*53ee8cc1Swenshuai.xi LINK_MINILVDS_2CH_6P_6BIT, // 2 channel, 6 pari, 6 bits ///35 299*53ee8cc1Swenshuai.xi 300*53ee8cc1Swenshuai.xi LINK_MINILVDS_1CH_3P_6BIT, // 1 channel, 3 pair, 6 bits ///36 301*53ee8cc1Swenshuai.xi LINK_MINILVDS_1CH_4P_6BIT, // 1 channel, 4 pair, 6 bits ///37 302*53ee8cc1Swenshuai.xi LINK_MINILVDS_1CH_5P_6BIT, // 1 channel, 5 pair, 6 bits ///38 303*53ee8cc1Swenshuai.xi LINK_MINILVDS_1CH_6P_6BIT, // 1 channel, 6 pair, 6 bits ///39 304*53ee8cc1Swenshuai.xi LINK_HDMI_BYPASS_MODE, // HDMI Bypass Mode///40 305*53ee8cc1Swenshuai.xi 306*53ee8cc1Swenshuai.xi LINK_EPI34_2P, /// 41 307*53ee8cc1Swenshuai.xi LINK_EPI34_4P, /// 42 308*53ee8cc1Swenshuai.xi LINK_EPI28_2P, /// 43 309*53ee8cc1Swenshuai.xi LINK_EPI28_4P, /// 44 310*53ee8cc1Swenshuai.xi 311*53ee8cc1Swenshuai.xi LINK_VBY1_10BIT_4LANE, ///45 312*53ee8cc1Swenshuai.xi LINK_VBY1_10BIT_2LANE, ///46 313*53ee8cc1Swenshuai.xi LINK_VBY1_10BIT_1LANE, ///47 314*53ee8cc1Swenshuai.xi LINK_VBY1_8BIT_4LANE, ///48 315*53ee8cc1Swenshuai.xi LINK_VBY1_8BIT_2LANE, ///49 316*53ee8cc1Swenshuai.xi LINK_VBY1_8BIT_1LANE, ///50 317*53ee8cc1Swenshuai.xi 318*53ee8cc1Swenshuai.xi LINK_VBY1_10BIT_8LANE, ///51 319*53ee8cc1Swenshuai.xi LINK_VBY1_8BIT_8LANE, ///52 320*53ee8cc1Swenshuai.xi 321*53ee8cc1Swenshuai.xi LINK_EPI28_12P, ///53 322*53ee8cc1Swenshuai.xi 323*53ee8cc1Swenshuai.xi LINK_HS_LVDS_2CH_BYPASS_MODE, //54 324*53ee8cc1Swenshuai.xi LINK_VBY1_8BIT_4LANE_BYPASS_MODE, //55 325*53ee8cc1Swenshuai.xi LINK_VBY1_10BIT_4LANE_BYPASS_MODE, //56 326*53ee8cc1Swenshuai.xi LINK_EPI24_12P, ///57 327*53ee8cc1Swenshuai.xi LINK_VBY1_10BIT_16LANE, ///58 328*53ee8cc1Swenshuai.xi LINK_VBY1_8BIT_16LANE, ///59 329*53ee8cc1Swenshuai.xi LINK_USI_T_8BIT_12P, ///60 330*53ee8cc1Swenshuai.xi LINK_USI_T_10BIT_12P, ///61 331*53ee8cc1Swenshuai.xi LINK_ISP_8BIT_12P, ///62 332*53ee8cc1Swenshuai.xi LINK_ISP_8BIT_6P_D, ///63 333*53ee8cc1Swenshuai.xi 334*53ee8cc1Swenshuai.xi #if defined(UFO_PUBLIC_HEADER_500) 335*53ee8cc1Swenshuai.xi LINK_ISP_8BIT_8P, ///64 336*53ee8cc1Swenshuai.xi LINK_ISP_10BIT_12P, ///65 337*53ee8cc1Swenshuai.xi LINK_ISP_10BIT_6P_D, ///66 338*53ee8cc1Swenshuai.xi LINK_ISP_10BIT_8P, ///67 339*53ee8cc1Swenshuai.xi LINK_EPI24_16P, ///68 340*53ee8cc1Swenshuai.xi LINK_EPI28_16P, ///69 341*53ee8cc1Swenshuai.xi LINK_EPI28_6P_EPI3G, ///70 342*53ee8cc1Swenshuai.xi LINK_EPI28_8P_EPI3G, ///71 343*53ee8cc1Swenshuai.xi #endif 344*53ee8cc1Swenshuai.xi LINK_CMPI24_10BIT_12P, ///72 345*53ee8cc1Swenshuai.xi LINK_CMPI27_8BIT_12P, ///73 346*53ee8cc1Swenshuai.xi }APIPNL_LINK_EXT_TYPE; 347*53ee8cc1Swenshuai.xi 348*53ee8cc1Swenshuai.xi /// Define power on and off timing order. 349*53ee8cc1Swenshuai.xi typedef enum 350*53ee8cc1Swenshuai.xi { 351*53ee8cc1Swenshuai.xi E_APIPNL_POWER_TIMING_1 , ///< Timing order 1 352*53ee8cc1Swenshuai.xi E_APIPNL_POWER_TIMING_2 , ///< Timing order 2 353*53ee8cc1Swenshuai.xi E_APIPNL_POWER_TIMING_NA = 0xFFFF, ///< Reserved Timing order 354*53ee8cc1Swenshuai.xi } APIPNL_POWER_TIMING_SEQ; 355*53ee8cc1Swenshuai.xi 356*53ee8cc1Swenshuai.xi /// Define TI bit mode 357*53ee8cc1Swenshuai.xi typedef enum 358*53ee8cc1Swenshuai.xi { 359*53ee8cc1Swenshuai.xi TI_10BIT_MODE = 0, 360*53ee8cc1Swenshuai.xi TI_8BIT_MODE = 2, 361*53ee8cc1Swenshuai.xi TI_6BIT_MODE = 3, 362*53ee8cc1Swenshuai.xi } APIPNL_TIBITMODE; 363*53ee8cc1Swenshuai.xi 364*53ee8cc1Swenshuai.xi /// Define which panel output timing change mode is used to change VFreq for same panel 365*53ee8cc1Swenshuai.xi typedef enum 366*53ee8cc1Swenshuai.xi { 367*53ee8cc1Swenshuai.xi E_PNL_CHG_DCLK = 0, ///<change output DClk to change Vfreq. 368*53ee8cc1Swenshuai.xi E_PNL_CHG_HTOTAL = 1, ///<change H total to change Vfreq. 369*53ee8cc1Swenshuai.xi E_PNL_CHG_VTOTAL = 2, ///<change V total to change Vfreq. 370*53ee8cc1Swenshuai.xi } APIPNL_OUT_TIMING_MODE; 371*53ee8cc1Swenshuai.xi 372*53ee8cc1Swenshuai.xi /// Define panel output format bit mode 373*53ee8cc1Swenshuai.xi typedef enum 374*53ee8cc1Swenshuai.xi { 375*53ee8cc1Swenshuai.xi OUTPUT_10BIT_MODE = 0,//default is 10bit, becasue 8bit panel can use 10bit config and 8bit config. 376*53ee8cc1Swenshuai.xi OUTPUT_6BIT_MODE = 1, //but 10bit panel(like PDP panel) can only use 10bit config. 377*53ee8cc1Swenshuai.xi OUTPUT_8BIT_MODE = 2, //and some PDA panel is 6bit. 378*53ee8cc1Swenshuai.xi } APIPNL_OUTPUTFORMAT_BITMODE; 379*53ee8cc1Swenshuai.xi 380*53ee8cc1Swenshuai.xi /// Panel Api information 381*53ee8cc1Swenshuai.xi typedef struct __attribute__((packed)) 382*53ee8cc1Swenshuai.xi { 383*53ee8cc1Swenshuai.xi APIPNL_GAMMA_TYPE eSupportGammaType; ///< Gamma type supported by apiPNL 384*53ee8cc1Swenshuai.xi } PNL_ApiInfo; 385*53ee8cc1Swenshuai.xi 386*53ee8cc1Swenshuai.xi /// Panel status 387*53ee8cc1Swenshuai.xi typedef struct __attribute__((packed)) 388*53ee8cc1Swenshuai.xi { 389*53ee8cc1Swenshuai.xi MS_BOOL bPanel_Initialized; ///< panel initialized or not 390*53ee8cc1Swenshuai.xi MS_BOOL bPanel_Enabled; ///< panel enabled or not, if enabled, you can see OSD/Video 391*53ee8cc1Swenshuai.xi } PNL_ApiStatus; 392*53ee8cc1Swenshuai.xi 393*53ee8cc1Swenshuai.xi /// Panel status 394*53ee8cc1Swenshuai.xi typedef struct DLL_PACKED 395*53ee8cc1Swenshuai.xi { 396*53ee8cc1Swenshuai.xi MS_U32 u32ApiStatusEx_Version;///<Version of current structure. Please always set to "API_PNLSTATUS_EX_VERSION" as input 397*53ee8cc1Swenshuai.xi MS_U16 u16ApiStatusEX_Length; ///<Length of this structure, u16PanelInfoEX_Length=sizeof(XC_PANEL_INFO_EX) 398*53ee8cc1Swenshuai.xi 399*53ee8cc1Swenshuai.xi MS_BOOL bPNLInitialize; ///< panel initialized or not 400*53ee8cc1Swenshuai.xi MS_BOOL bPNLEnable; ///< panel enabled or not, if enabled, you can see OSD/Video 401*53ee8cc1Swenshuai.xi MS_U16 u16VTotal; ///< Output vertical total 402*53ee8cc1Swenshuai.xi MS_U16 u16DEVStart; ///< Output DE vertical start 403*53ee8cc1Swenshuai.xi MS_U16 u16DEVEnd; ///< Output DE Vertical end 404*53ee8cc1Swenshuai.xi MS_U16 u16VSyncStart; ///< Output VSync start 405*53ee8cc1Swenshuai.xi MS_U16 u16VSyncEnd; ///< Output VSync end 406*53ee8cc1Swenshuai.xi MS_U16 u16HTotal; ///< Output horizontal total 407*53ee8cc1Swenshuai.xi MS_U16 u16DEHStart; ///< Output DE horizontal start 408*53ee8cc1Swenshuai.xi MS_U16 u16DEHEnd; ///< Output DE horizontal end 409*53ee8cc1Swenshuai.xi MS_U16 u16HSyncWidth; ///< Output HSync width 410*53ee8cc1Swenshuai.xi MS_BOOL bIsPanelManualVysncMode; ///< enable manuel V sync control 411*53ee8cc1Swenshuai.xi MS_BOOL bInterlaceOutput; ///< enable Scaler Interlace output 412*53ee8cc1Swenshuai.xi MS_BOOL bYUVOutput; ///< enable Scaler YUV output 413*53ee8cc1Swenshuai.xi } PNL_ApiExtStatus; 414*53ee8cc1Swenshuai.xi 415*53ee8cc1Swenshuai.xi /// Panel output control, must be called before g_IPanel.Enable(), otherwise will output after called g_IPanel.Enable() 416*53ee8cc1Swenshuai.xi typedef enum 417*53ee8cc1Swenshuai.xi { 418*53ee8cc1Swenshuai.xi E_APIPNL_OUTPUT_NO_OUTPUT = 0, ///< even called g_IPanel.Enable(TRUE), still no physical output 419*53ee8cc1Swenshuai.xi E_APIPNL_OUTPUT_CLK_ONLY, ///< after called g_IPanel.Enable(TRUE), will output clock only 420*53ee8cc1Swenshuai.xi E_APIPNL_OUTPUT_DATA_ONLY, ///< after called g_IPanel.Enable(TRUE), will output data only 421*53ee8cc1Swenshuai.xi E_APIPNL_OUTPUT_CLK_DATA, ///< after called g_IPanel.Enable(TRUE), will output clock and data 422*53ee8cc1Swenshuai.xi } APIPNL_OUTPUT_MODE; 423*53ee8cc1Swenshuai.xi 424*53ee8cc1Swenshuai.xi /// Define Panel MISC control index 425*53ee8cc1Swenshuai.xi /// please enum use BIT0 = 0x01, BIT1 = 0x02, BIT2 = 0x04, BIT3 = 0x08, BIT4 = 0x10, 426*53ee8cc1Swenshuai.xi typedef enum 427*53ee8cc1Swenshuai.xi { 428*53ee8cc1Swenshuai.xi E_APIPNL_MISC_CTRL_OFF = 0x0000, 429*53ee8cc1Swenshuai.xi E_APIPNL_MISC_MFC_ENABLE = 0x0001, 430*53ee8cc1Swenshuai.xi E_APIPNL_MISC_SKIP_CALIBRATION = 0x0002, 431*53ee8cc1Swenshuai.xi E_APIPNL_MISC_GET_OUTPUT_CONFIG = 0x0004, 432*53ee8cc1Swenshuai.xi E_APIPNL_MISC_SKIP_ICONVALUE = 0x0008, 433*53ee8cc1Swenshuai.xi 434*53ee8cc1Swenshuai.xi E_APIPNL_MISC_MFC_MCP = 0x0010, // bit 4 435*53ee8cc1Swenshuai.xi E_APIPNL_MISC_MFC_ABChannel = 0x0020, // bit5 436*53ee8cc1Swenshuai.xi E_APIPNL_MISC_MFC_ACChannel = 0x0040, // bit 6 437*53ee8cc1Swenshuai.xi E_APIPNL_MISC_MFC_ENABLE_60HZ = 0x0080, // bit 7, for 60Hz Panel 438*53ee8cc1Swenshuai.xi E_APIPNL_MISC_MFC_ENABLE_240HZ = 0x0100, // bit 8, for 240Hz Panel 439*53ee8cc1Swenshuai.xi E_APIPNL_MISC_4K2K_ENABLE_60HZ = 0x0200, // bit 9, for 4k2K 60Hz Panel 440*53ee8cc1Swenshuai.xi E_APIPNL_MISC_SKIP_T3D_CONTROL = 0x0400, // bit 10, for T3D control 441*53ee8cc1Swenshuai.xi E_APIPNL_MISC_PIXELSHIFT_ENABLE = 0x0800,// bit 11, enable pixel shift 442*53ee8cc1Swenshuai.xi E_APIPNL_MISC_ENABLE_MANUAL_VSYNC_CTRL = 0x8000, // enable manual V sync control 443*53ee8cc1Swenshuai.xi } APIPNL_MISC; 444*53ee8cc1Swenshuai.xi 445*53ee8cc1Swenshuai.xi typedef enum 446*53ee8cc1Swenshuai.xi { 447*53ee8cc1Swenshuai.xi E_APIPNL_TCON_TAB_TYPE_GENERAL, 448*53ee8cc1Swenshuai.xi E_APIPNL_TCON_TAB_TYPE_GPIO, 449*53ee8cc1Swenshuai.xi E_APIPNL_TCON_TAB_TYPE_SCALER, 450*53ee8cc1Swenshuai.xi E_APIPNL_TCON_TAB_TYPE_MOD, 451*53ee8cc1Swenshuai.xi E_APIPNL_TCON_TAB_TYPE_GAMMA, 452*53ee8cc1Swenshuai.xi E_APIPNL_TCON_TAB_TYPE_POWER_SEQUENCE_ON, 453*53ee8cc1Swenshuai.xi E_APIPNL_TCON_TAB_TYPE_POWER_SEQUENCE_OFF, 454*53ee8cc1Swenshuai.xi E_APIPNL_TCON_TAB_TYPE_PANEL_INFO, 455*53ee8cc1Swenshuai.xi }APIPNL_TCON_TAB_TYPE; 456*53ee8cc1Swenshuai.xi 457*53ee8cc1Swenshuai.xi typedef struct 458*53ee8cc1Swenshuai.xi { 459*53ee8cc1Swenshuai.xi #if !defined(CONFIG_MBOOT) 460*53ee8cc1Swenshuai.xi MS_U8 u8SubTableType; 461*53ee8cc1Swenshuai.xi MS_U16 u16RegCount; 462*53ee8cc1Swenshuai.xi MS_U8 u8RegType; 463*53ee8cc1Swenshuai.xi MS_U16 u16RegListOffset; 464*53ee8cc1Swenshuai.xi #endif 465*53ee8cc1Swenshuai.xi MS_U8* pData; 466*53ee8cc1Swenshuai.xi }ST_PNL_TCON_PANEL; 467*53ee8cc1Swenshuai.xi 468*53ee8cc1Swenshuai.xi typedef enum 469*53ee8cc1Swenshuai.xi { 470*53ee8cc1Swenshuai.xi APIPNL_OUTPUT_CHANNEL_ORDER_DEFAULT, 471*53ee8cc1Swenshuai.xi APIPNL_OUTPUT_CHANNEL_ORDER_USER, 472*53ee8cc1Swenshuai.xi }APIPNL_OUTPUT_CHANNEL_ORDER; 473*53ee8cc1Swenshuai.xi 474*53ee8cc1Swenshuai.xi /// Define PNL local dimming type 475*53ee8cc1Swenshuai.xi typedef enum 476*53ee8cc1Swenshuai.xi { 477*53ee8cc1Swenshuai.xi E_STATUS_SUCCESS = 0, 478*53ee8cc1Swenshuai.xi E_STATUS_FAIL = 1, 479*53ee8cc1Swenshuai.xi E_STATUS_NOT_SUPPORTED, 480*53ee8cc1Swenshuai.xi E_STATUS_PARAMETER_ERROR, 481*53ee8cc1Swenshuai.xi } E_PNL_LOCALDIMMING_RETURN_TYPE; 482*53ee8cc1Swenshuai.xi 483*53ee8cc1Swenshuai.xi typedef enum 484*53ee8cc1Swenshuai.xi { 485*53ee8cc1Swenshuai.xi E_LED_DEVICE_SEC_75INCH_DIRECT_180 = 0, 486*53ee8cc1Swenshuai.xi E_LED_DEVICE_SEC_85INCH_DIRECT_240 = 1, 487*53ee8cc1Swenshuai.xi E_LED_DEVICE_AMT_65INCH_DIRECT_120, 488*53ee8cc1Swenshuai.xi E_PNL_LOCALDIMMING_TYPE_NUM, 489*53ee8cc1Swenshuai.xi E_PNL_LOCALDIMMING_TYPE_MAX = E_PNL_LOCALDIMMING_TYPE_NUM, 490*53ee8cc1Swenshuai.xi } E_PNL_LOCALDIMMING_TYPE; 491*53ee8cc1Swenshuai.xi 492*53ee8cc1Swenshuai.xi typedef struct _stPNL_Init_LocalDimming_Parameters 493*53ee8cc1Swenshuai.xi { 494*53ee8cc1Swenshuai.xi E_PNL_LOCALDIMMING_RETURN_TYPE ePnlLDType; 495*53ee8cc1Swenshuai.xi MS_U32 u32Adrress; 496*53ee8cc1Swenshuai.xi MS_U16 u16Size; 497*53ee8cc1Swenshuai.xi MS_U16 u16PnlWidth; 498*53ee8cc1Swenshuai.xi MS_U16 u16PnlHeight; 499*53ee8cc1Swenshuai.xi } stPNL_Init_LocalDimming_Parameters, *pstPNL_Init_LocalDimming_Parameters; 500*53ee8cc1Swenshuai.xi 501*53ee8cc1Swenshuai.xi /** 502*53ee8cc1Swenshuai.xi * Represent a panel interface. 503*53ee8cc1Swenshuai.xi * 504*53ee8cc1Swenshuai.xi * Provide panel attributes, and some panel basic functions 505*53ee8cc1Swenshuai.xi */ 506*53ee8cc1Swenshuai.xi typedef struct 507*53ee8cc1Swenshuai.xi { 508*53ee8cc1Swenshuai.xi // 509*53ee8cc1Swenshuai.xi // Data 510*53ee8cc1Swenshuai.xi // 511*53ee8cc1Swenshuai.xi const char* ( * const Name ) ( void ); // /< Panel name 512*53ee8cc1Swenshuai.xi MS_U16 ( * const HStart ) ( void ); // /< DE H start 513*53ee8cc1Swenshuai.xi MS_U16 ( * const VStart ) ( void ); // /< DE V start 514*53ee8cc1Swenshuai.xi MS_U16 ( * const Width ) ( void ); // /< DE H width 515*53ee8cc1Swenshuai.xi MS_U16 ( * const Height ) ( void ); // /< DE V height 516*53ee8cc1Swenshuai.xi MS_U16 ( * const HTotal ) ( void ); // /< Htotal 517*53ee8cc1Swenshuai.xi MS_U16 ( * const VTotal ) ( void ); // /< Vtotal 518*53ee8cc1Swenshuai.xi MS_U8 ( * const HSynWidth ) ( void ); // /< H sync width 519*53ee8cc1Swenshuai.xi MS_U8 ( * const HSynBackPorch ) ( void ); // /< H sync back porch 520*53ee8cc1Swenshuai.xi MS_U8 ( * const VSynBackPorch ) ( void ); // /< V sync back porch 521*53ee8cc1Swenshuai.xi MS_U16 ( * const DefaultVFreq ) ( void ); // /< deault V Freq 522*53ee8cc1Swenshuai.xi MS_U8 ( * const LPLL_Mode ) ( void ); // /< 0: single, 1: dual mode 523*53ee8cc1Swenshuai.xi MS_U8 ( * const LPLL_Type ) ( void ); // /< 0: LVDS, 1: RSDS 524*53ee8cc1Swenshuai.xi E_PNL_ASPECT_RATIO ( * const AspectRatio ) ( void ); // /< please refer to E_PNL_ASPECT_RATIO 525*53ee8cc1Swenshuai.xi MS_U32 ( * const MinSET ) ( void ); // / < MinSET 526*53ee8cc1Swenshuai.xi MS_U32 ( * const MaxSET ) ( void ); // / < MaxSET 527*53ee8cc1Swenshuai.xi 528*53ee8cc1Swenshuai.xi // 529*53ee8cc1Swenshuai.xi // Manipulation 530*53ee8cc1Swenshuai.xi // 531*53ee8cc1Swenshuai.xi /// @brief Set Span-Spectrum-Control 532*53ee8cc1Swenshuai.xi /// @param u16Fmodulation IN:SSC_SPAN_PERIOD 533*53ee8cc1Swenshuai.xi /// @param u16Rdeviation IN:SSC_STEP_PERCENT 534*53ee8cc1Swenshuai.xi /// @param bEnable IN:Enable / Disable 535*53ee8cc1Swenshuai.xi /// 536*53ee8cc1Swenshuai.xi void ( * const SetSSC ) ( MS_U16 u16Fmodulation, MS_U16 u16Rdeviation, MS_BOOL bEnable ) ; 537*53ee8cc1Swenshuai.xi void ( * const SetOSDSSC ) ( MS_U16 u16Fmodulation, MS_U16 u16Rdeviation, MS_BOOL bEnable ) ; 538*53ee8cc1Swenshuai.xi 539*53ee8cc1Swenshuai.xi /// @brief Enable panel's output, but "not include the function to turn VCC on". 540*53ee8cc1Swenshuai.xi /// @param bEnable IN:Enable / Disable 541*53ee8cc1Swenshuai.xi MS_BOOL ( * const Enable ) ( MS_BOOL bEnable ) ; 542*53ee8cc1Swenshuai.xi 543*53ee8cc1Swenshuai.xi /// @brief Set Gamma correction table. 544*53ee8cc1Swenshuai.xi /// @param eGammaType Resolution of gamma table 545*53ee8cc1Swenshuai.xi /// @param pu8GammaTab gamma table 546*53ee8cc1Swenshuai.xi /// @param u16NumOfLevel T2: 256, T3: can be 256 / 1024 levels 547*53ee8cc1Swenshuai.xi MS_BOOL ( * const SetGammaTbl ) ( APIPNL_GAMMA_TYPE eGammaType, 548*53ee8cc1Swenshuai.xi MS_U8* pu8GammaTab[3], 549*53ee8cc1Swenshuai.xi APIPNL_GAMMA_MAPPEING_MODE Gamma_Map_Mode ) ; 550*53ee8cc1Swenshuai.xi 551*53ee8cc1Swenshuai.xi /// @brief Get Gamma correction table. 552*53ee8cc1Swenshuai.xi /// @return A Gamma table used currently. 553*53ee8cc1Swenshuai.xi MS_U8** ( * const GammaTab ) ( void ) ; 554*53ee8cc1Swenshuai.xi 555*53ee8cc1Swenshuai.xi /// @brief printout panel data, width, height, htt, vtt etc. 556*53ee8cc1Swenshuai.xi void ( * const Dump ) ( void ) ; 557*53ee8cc1Swenshuai.xi 558*53ee8cc1Swenshuai.xi /// @brief Get Min/Max/Current Dimming Value according to the given flag. 559*53ee8cc1Swenshuai.xi /// @param max_min_setting Flag of Min / Max / Current Dimming Value.s 560*53ee8cc1Swenshuai.xi MS_U8 ( * const DimCtrl ) ( APIPNL_DIMMING_CTRL max_min_setting ) ; 561*53ee8cc1Swenshuai.xi 562*53ee8cc1Swenshuai.xi /// @brief Query Power On Timing with given power on timing order.\n 563*53ee8cc1Swenshuai.xi /// @param power_on_sequence_timing order 564*53ee8cc1Swenshuai.xi MS_U16 ( * const OnTiming ) ( APIPNL_POWER_TIMING_SEQ power_on_sequence_timing ) ; 565*53ee8cc1Swenshuai.xi 566*53ee8cc1Swenshuai.xi /// @brief Query Power Off Timing with given power on timing order.\n 567*53ee8cc1Swenshuai.xi /// @param power_off_sequence_timing order 568*53ee8cc1Swenshuai.xi MS_U16 ( * const OffTiming ) ( APIPNL_POWER_TIMING_SEQ power_off_sequence_timing ) ; 569*53ee8cc1Swenshuai.xi 570*53ee8cc1Swenshuai.xi // 571*53ee8cc1Swenshuai.xi // Custimized methods, can be provided by clinets. 572*53ee8cc1Swenshuai.xi // 573*53ee8cc1Swenshuai.xi void ( *TurnBackLightOn ) ( MS_BOOL bEnable ) ; 574*53ee8cc1Swenshuai.xi APIPNL_OUT_TIMING_MODE 575*53ee8cc1Swenshuai.xi ( * const OutTimingMode )( void ); ///<output timing mode 576*53ee8cc1Swenshuai.xi 577*53ee8cc1Swenshuai.xi ///@brief Set Gamma value 578*53ee8cc1Swenshuai.xi ///@param u8Channel R/G/B channel, 0->R, 1->G, 2->B 579*53ee8cc1Swenshuai.xi ///@param u16Offset The address of Gamma value 580*53ee8cc1Swenshuai.xi ///@param u16GammaValue Gamma value 581*53ee8cc1Swenshuai.xi MS_BOOL (* const SetGammaValue)(MS_U8 u8Channel, MS_U16 u16Offset, MS_U16 u16GammaValue); 582*53ee8cc1Swenshuai.xi 583*53ee8cc1Swenshuai.xi /// @brief Get Gamma correction table. 584*53ee8cc1Swenshuai.xi /// @param eGammaType Resolution of gamma table 585*53ee8cc1Swenshuai.xi /// @param pu8GammaTab gamma table 586*53ee8cc1Swenshuai.xi /// @param Gamma_Map_Mode 8Bit mapping or 10Bit mapping 587*53ee8cc1Swenshuai.xi MS_BOOL ( * const GetGammaTbl ) ( APIPNL_GAMMA_TYPE eGammaType, 588*53ee8cc1Swenshuai.xi MS_U8* pu8GammaTab[3], 589*53ee8cc1Swenshuai.xi APIPNL_GAMMA_MAPPEING_MODE Gamma_Map_Mode ) ; 590*53ee8cc1Swenshuai.xi }XC_PNL_OBJ; 591*53ee8cc1Swenshuai.xi 592*53ee8cc1Swenshuai.xi /// A panel struct type used to specify the panel attributes, and settings from Board layout 593*53ee8cc1Swenshuai.xi typedef struct __attribute__((packed)) 594*53ee8cc1Swenshuai.xi { 595*53ee8cc1Swenshuai.xi const char *m_pPanelName; ///< PanelName 596*53ee8cc1Swenshuai.xi #if !(defined(UFO_PUBLIC_HEADER_212) || defined(UFO_PUBLIC_HEADER_300)) 597*53ee8cc1Swenshuai.xi #if !defined (__aarch64__) 598*53ee8cc1Swenshuai.xi MS_U32 u32AlignmentDummy0; 599*53ee8cc1Swenshuai.xi #endif 600*53ee8cc1Swenshuai.xi #endif 601*53ee8cc1Swenshuai.xi // 602*53ee8cc1Swenshuai.xi // Panel output 603*53ee8cc1Swenshuai.xi // 604*53ee8cc1Swenshuai.xi MS_U8 m_bPanelDither :1; ///< PANEL_DITHER, keep the setting 605*53ee8cc1Swenshuai.xi APIPNL_LINK_TYPE m_ePanelLinkType :4; ///< PANEL_LINK 606*53ee8cc1Swenshuai.xi 607*53ee8cc1Swenshuai.xi /////////////////////////////////////////////// 608*53ee8cc1Swenshuai.xi // Board related setting 609*53ee8cc1Swenshuai.xi /////////////////////////////////////////////// 610*53ee8cc1Swenshuai.xi MS_U8 m_bPanelDualPort :1; ///< VOP_21[8], MOD_4A[1], PANEL_DUAL_PORT, refer to m_bPanelDoubleClk 611*53ee8cc1Swenshuai.xi MS_U8 m_bPanelSwapPort :1; ///< MOD_4A[0], PANEL_SWAP_PORT, refer to "LVDS output app note" A/B channel swap 612*53ee8cc1Swenshuai.xi MS_U8 m_bPanelSwapOdd_ML :1; ///< PANEL_SWAP_ODD_ML 613*53ee8cc1Swenshuai.xi MS_U8 m_bPanelSwapEven_ML :1; ///< PANEL_SWAP_EVEN_ML 614*53ee8cc1Swenshuai.xi MS_U8 m_bPanelSwapOdd_RB :1; ///< PANEL_SWAP_ODD_RB 615*53ee8cc1Swenshuai.xi MS_U8 m_bPanelSwapEven_RB :1; ///< PANEL_SWAP_EVEN_RB 616*53ee8cc1Swenshuai.xi 617*53ee8cc1Swenshuai.xi MS_U8 m_bPanelSwapLVDS_POL :1; ///< MOD_40[5], PANEL_SWAP_LVDS_POL, for differential P/N swap 618*53ee8cc1Swenshuai.xi MS_U8 m_bPanelSwapLVDS_CH :1; ///< MOD_40[6], PANEL_SWAP_LVDS_CH, for pair swap 619*53ee8cc1Swenshuai.xi MS_U8 m_bPanelPDP10BIT :1; ///< MOD_40[3], PANEL_PDP_10BIT ,for pair swap 620*53ee8cc1Swenshuai.xi MS_U8 m_bPanelLVDS_TI_MODE :1; ///< MOD_40[2], PANEL_LVDS_TI_MODE, refer to "LVDS output app note" 621*53ee8cc1Swenshuai.xi 622*53ee8cc1Swenshuai.xi /////////////////////////////////////////////// 623*53ee8cc1Swenshuai.xi // For TTL Only 624*53ee8cc1Swenshuai.xi /////////////////////////////////////////////// 625*53ee8cc1Swenshuai.xi MS_U8 m_ucPanelDCLKDelay; ///< PANEL_DCLK_DELAY 626*53ee8cc1Swenshuai.xi MS_U8 m_bPanelInvDCLK :1; ///< MOD_4A[4], PANEL_INV_DCLK 627*53ee8cc1Swenshuai.xi MS_U8 m_bPanelInvDE :1; ///< MOD_4A[2], PANEL_INV_DE 628*53ee8cc1Swenshuai.xi MS_U8 m_bPanelInvHSync :1; ///< MOD_4A[12], PANEL_INV_HSYNC 629*53ee8cc1Swenshuai.xi MS_U8 m_bPanelInvVSync :1; ///< MOD_4A[3], PANEL_INV_VSYNC 630*53ee8cc1Swenshuai.xi 631*53ee8cc1Swenshuai.xi /////////////////////////////////////////////// 632*53ee8cc1Swenshuai.xi // Output driving current setting 633*53ee8cc1Swenshuai.xi /////////////////////////////////////////////// 634*53ee8cc1Swenshuai.xi // driving current setting (0x00=4mA, 0x01=6mA, 0x02=8mA, 0x03=12mA) 635*53ee8cc1Swenshuai.xi MS_U8 m_ucPanelDCKLCurrent; ///< define PANEL_DCLK_CURRENT 636*53ee8cc1Swenshuai.xi MS_U8 m_ucPanelDECurrent; ///< define PANEL_DE_CURRENT 637*53ee8cc1Swenshuai.xi MS_U8 m_ucPanelODDDataCurrent; ///< define PANEL_ODD_DATA_CURRENT 638*53ee8cc1Swenshuai.xi MS_U8 m_ucPanelEvenDataCurrent; ///< define PANEL_EVEN_DATA_CURRENT 639*53ee8cc1Swenshuai.xi 640*53ee8cc1Swenshuai.xi /////////////////////////////////////////////// 641*53ee8cc1Swenshuai.xi // panel on/off timing 642*53ee8cc1Swenshuai.xi /////////////////////////////////////////////// 643*53ee8cc1Swenshuai.xi MS_U16 m_wPanelOnTiming1; ///< time between panel & data while turn on power 644*53ee8cc1Swenshuai.xi MS_U16 m_wPanelOnTiming2; ///< time between data & back light while turn on power 645*53ee8cc1Swenshuai.xi MS_U16 m_wPanelOffTiming1; ///< time between back light & data while turn off power 646*53ee8cc1Swenshuai.xi MS_U16 m_wPanelOffTiming2; ///< time between data & panel while turn off power 647*53ee8cc1Swenshuai.xi 648*53ee8cc1Swenshuai.xi /////////////////////////////////////////////// 649*53ee8cc1Swenshuai.xi // panel timing spec. 650*53ee8cc1Swenshuai.xi /////////////////////////////////////////////// 651*53ee8cc1Swenshuai.xi // sync related 652*53ee8cc1Swenshuai.xi MS_U8 m_ucPanelHSyncWidth; ///< VOP_01[7:0], PANEL_HSYNC_WIDTH 653*53ee8cc1Swenshuai.xi MS_U8 m_ucPanelHSyncBackPorch; ///< PANEL_HSYNC_BACK_PORCH, no register setting, provide value for query only 654*53ee8cc1Swenshuai.xi 655*53ee8cc1Swenshuai.xi ///< not support Manuel VSync Start/End now 656*53ee8cc1Swenshuai.xi ///< VOP_02[10:0] VSync start = Vtt - VBackPorch - VSyncWidth 657*53ee8cc1Swenshuai.xi ///< VOP_03[10:0] VSync end = Vtt - VBackPorch 658*53ee8cc1Swenshuai.xi MS_U8 m_ucPanelVSyncWidth; ///< define PANEL_VSYNC_WIDTH 659*53ee8cc1Swenshuai.xi MS_U8 m_ucPanelVBackPorch; ///< define PANEL_VSYNC_BACK_PORCH 660*53ee8cc1Swenshuai.xi 661*53ee8cc1Swenshuai.xi // DE related 662*53ee8cc1Swenshuai.xi MS_U16 m_wPanelHStart; ///< VOP_04[11:0], PANEL_HSTART, DE H Start (PANEL_HSYNC_WIDTH + PANEL_HSYNC_BACK_PORCH) 663*53ee8cc1Swenshuai.xi MS_U16 m_wPanelVStart; ///< VOP_06[11:0], PANEL_VSTART, DE V Start 664*53ee8cc1Swenshuai.xi MS_U16 m_wPanelWidth; ///< PANEL_WIDTH, DE width (VOP_05[11:0] = HEnd = HStart + Width - 1) 665*53ee8cc1Swenshuai.xi MS_U16 m_wPanelHeight; ///< PANEL_HEIGHT, DE height (VOP_07[11:0], = Vend = VStart + Height - 1) 666*53ee8cc1Swenshuai.xi 667*53ee8cc1Swenshuai.xi // DClk related 668*53ee8cc1Swenshuai.xi MS_U16 m_wPanelMaxHTotal; ///< PANEL_MAX_HTOTAL. Reserved for future using. 669*53ee8cc1Swenshuai.xi MS_U16 m_wPanelHTotal; ///< VOP_0C[11:0], PANEL_HTOTAL 670*53ee8cc1Swenshuai.xi MS_U16 m_wPanelMinHTotal; ///< PANEL_MIN_HTOTAL. Reserved for future using. 671*53ee8cc1Swenshuai.xi 672*53ee8cc1Swenshuai.xi MS_U16 m_wPanelMaxVTotal; ///< PANEL_MAX_VTOTAL. Reserved for future using. 673*53ee8cc1Swenshuai.xi MS_U16 m_wPanelVTotal; ///< VOP_0D[11:0], PANEL_VTOTAL 674*53ee8cc1Swenshuai.xi MS_U16 m_wPanelMinVTotal; ///< PANEL_MIN_VTOTAL. Reserved for future using. 675*53ee8cc1Swenshuai.xi 676*53ee8cc1Swenshuai.xi MS_U8 m_dwPanelMaxDCLK; ///< PANEL_MAX_DCLK. Reserved for future using. 677*53ee8cc1Swenshuai.xi MS_U8 m_dwPanelDCLK; ///< LPLL_0F[23:0], PANEL_DCLK ,{0x3100_10[7:0], 0x3100_0F[15:0]} 678*53ee8cc1Swenshuai.xi MS_U8 m_dwPanelMinDCLK; ///< PANEL_MIN_DCLK. Reserved for future using. 679*53ee8cc1Swenshuai.xi 680*53ee8cc1Swenshuai.xi ///< spread spectrum 681*53ee8cc1Swenshuai.xi MS_U16 m_wSpreadSpectrumStep; ///< move to board define, no use now. 682*53ee8cc1Swenshuai.xi MS_U16 m_wSpreadSpectrumSpan; ///< move to board define, no use now. 683*53ee8cc1Swenshuai.xi 684*53ee8cc1Swenshuai.xi MS_U8 m_ucDimmingCtl; ///< Initial Dimming Value 685*53ee8cc1Swenshuai.xi MS_U8 m_ucMaxPWMVal; ///< Max Dimming Value 686*53ee8cc1Swenshuai.xi MS_U8 m_ucMinPWMVal; ///< Min Dimming Value 687*53ee8cc1Swenshuai.xi 688*53ee8cc1Swenshuai.xi MS_U8 m_bPanelDeinterMode :1; ///< define PANEL_DEINTER_MODE, no use now 689*53ee8cc1Swenshuai.xi E_PNL_ASPECT_RATIO m_ucPanelAspectRatio; ///< Panel Aspect Ratio, provide information to upper layer application for aspect ratio setting. 690*53ee8cc1Swenshuai.xi /* 691*53ee8cc1Swenshuai.xi * 692*53ee8cc1Swenshuai.xi * Board related params 693*53ee8cc1Swenshuai.xi * 694*53ee8cc1Swenshuai.xi * If a board ( like BD_MST064C_D01A_S ) swap LVDS TX polarity 695*53ee8cc1Swenshuai.xi * : This polarity swap value = 696*53ee8cc1Swenshuai.xi * (LVDS_PN_SWAP_H<<8) | LVDS_PN_SWAP_L from board define, 697*53ee8cc1Swenshuai.xi * Otherwise 698*53ee8cc1Swenshuai.xi * : The value shall set to 0. 699*53ee8cc1Swenshuai.xi */ 700*53ee8cc1Swenshuai.xi MS_U16 m_u16LVDSTxSwapValue; 701*53ee8cc1Swenshuai.xi APIPNL_TIBITMODE m_ucTiBitMode; ///< MOD_4B[1:0], refer to "LVDS output app note" 702*53ee8cc1Swenshuai.xi APIPNL_OUTPUTFORMAT_BITMODE m_ucOutputFormatBitMode; 703*53ee8cc1Swenshuai.xi 704*53ee8cc1Swenshuai.xi MS_U8 m_bPanelSwapOdd_RG :1; ///< define PANEL_SWAP_ODD_RG 705*53ee8cc1Swenshuai.xi MS_U8 m_bPanelSwapEven_RG :1; ///< define PANEL_SWAP_EVEN_RG 706*53ee8cc1Swenshuai.xi MS_U8 m_bPanelSwapOdd_GB :1; ///< define PANEL_SWAP_ODD_GB 707*53ee8cc1Swenshuai.xi MS_U8 m_bPanelSwapEven_GB :1; ///< define PANEL_SWAP_EVEN_GB 708*53ee8cc1Swenshuai.xi 709*53ee8cc1Swenshuai.xi /** 710*53ee8cc1Swenshuai.xi * Others 711*53ee8cc1Swenshuai.xi */ 712*53ee8cc1Swenshuai.xi MS_U8 m_bPanelDoubleClk :1; ///< LPLL_03[7], define Double Clock ,LVDS dual mode 713*53ee8cc1Swenshuai.xi MS_U32 m_dwPanelMaxSET; ///< define PANEL_MAX_SET 714*53ee8cc1Swenshuai.xi MS_U32 m_dwPanelMinSET; ///< define PANEL_MIN_SET 715*53ee8cc1Swenshuai.xi APIPNL_OUT_TIMING_MODE m_ucOutTimingMode; ///<Define which panel output timing change mode is used to change VFreq for same panel 716*53ee8cc1Swenshuai.xi MS_U8 m_bPanelNoiseDith :1; ///< PAFRC mixed with noise dither disable 717*53ee8cc1Swenshuai.xi } PanelType; 718*53ee8cc1Swenshuai.xi 719*53ee8cc1Swenshuai.xi //Display information 720*53ee8cc1Swenshuai.xi typedef struct DLL_PACKED 721*53ee8cc1Swenshuai.xi { 722*53ee8cc1Swenshuai.xi MS_U32 VDTOT; //Output vertical total 723*53ee8cc1Swenshuai.xi MS_U32 DEVST; //Output DE vertical start 724*53ee8cc1Swenshuai.xi MS_U32 DEVEND;//Output DE Vertical end 725*53ee8cc1Swenshuai.xi MS_U32 HDTOT;// Output horizontal total 726*53ee8cc1Swenshuai.xi MS_U32 DEHST; //Output DE horizontal start 727*53ee8cc1Swenshuai.xi MS_U32 DEHEND;// Output DE horizontal end 728*53ee8cc1Swenshuai.xi MS_BOOL bInterlaceMode; 729*53ee8cc1Swenshuai.xi MS_BOOL bYUVOutput; 730*53ee8cc1Swenshuai.xi } MS_PNL_DST_DispInfo; 731*53ee8cc1Swenshuai.xi 732*53ee8cc1Swenshuai.xi //HW LVDS Reserved Bit to L/R flag Info 733*53ee8cc1Swenshuai.xi typedef struct 734*53ee8cc1Swenshuai.xi { 735*53ee8cc1Swenshuai.xi MS_U32 u32pair; // pair 0: BIT0, pair 1: BIT1, pair 2: BIT2, pair 3: BIT3, pair 4: BIT4, etc ... 736*53ee8cc1Swenshuai.xi MS_U16 u16channel; // channel A: BIT0, channel B: BIT1, 737*53ee8cc1Swenshuai.xi MS_BOOL bEnable; 738*53ee8cc1Swenshuai.xi } MS_PNL_HW_LVDSResInfo; 739*53ee8cc1Swenshuai.xi 740*53ee8cc1Swenshuai.xi /// Define the initial OverDrive for XC 741*53ee8cc1Swenshuai.xi typedef struct DLL_PACKED 742*53ee8cc1Swenshuai.xi { 743*53ee8cc1Swenshuai.xi MS_U8 u8ODTbl[1056]; 744*53ee8cc1Swenshuai.xi MS_U32 u32PNL_version; ///<Version of current structure. 745*53ee8cc1Swenshuai.xi // OD frame buffer related 746*53ee8cc1Swenshuai.xi #if defined(UFO_PUBLIC_HEADER_700) 747*53ee8cc1Swenshuai.xi MS_PHY u32OD_MSB_Addr; ///<OverDrive MSB frame buffer start address, absolute without any alignment 748*53ee8cc1Swenshuai.xi #else 749*53ee8cc1Swenshuai.xi MS_PHYADDR u32OD_MSB_Addr; ///<OverDrive MSB frame buffer start address, absolute without any alignment 750*53ee8cc1Swenshuai.xi #endif 751*53ee8cc1Swenshuai.xi MS_U32 u32OD_MSB_Size; ///<OverDrive MSB frame buffer size, the unit is BYTES 752*53ee8cc1Swenshuai.xi #if defined(UFO_PUBLIC_HEADER_700) 753*53ee8cc1Swenshuai.xi MS_PHY u32OD_LSB_Addr; ///<OverDrive LSB frame buffer start address, absolute without any alignment 754*53ee8cc1Swenshuai.xi #else 755*53ee8cc1Swenshuai.xi MS_PHYADDR u32OD_LSB_Addr; ///<OverDrive LSB frame buffer start address, absolute without any alignment 756*53ee8cc1Swenshuai.xi #endif 757*53ee8cc1Swenshuai.xi MS_U32 u32OD_LSB_Size; ///<OverDrive MSB frame buffer size, the unit is BYTES 758*53ee8cc1Swenshuai.xi } MS_PNL_OD_INITDATA; 759*53ee8cc1Swenshuai.xi 760*53ee8cc1Swenshuai.xi typedef struct DLL_PACKED 761*53ee8cc1Swenshuai.xi { 762*53ee8cc1Swenshuai.xi MS_U16* pu16ODTbl; 763*53ee8cc1Swenshuai.xi MS_U32 u32PNL_version; ///<Version of current structure. 764*53ee8cc1Swenshuai.xi // OD frame buffer related 765*53ee8cc1Swenshuai.xi MS_PHY u32OD_MSB_Addr; ///<OverDrive MSB frame buffer start address, absolute without any alignment 766*53ee8cc1Swenshuai.xi MS_U32 u32OD_MSB_Size; ///<OverDrive MSB frame buffer size, the unit is BYTES 767*53ee8cc1Swenshuai.xi MS_PHY u32OD_LSB_Addr; ///<OverDrive LSB frame buffer start address, absolute without any alignment 768*53ee8cc1Swenshuai.xi MS_U32 u32OD_LSB_Size; ///<OverDrive MSB frame buffer size, the unit is BYTES 769*53ee8cc1Swenshuai.xi MS_U32 u32ODTbl_Size; ///<OverDrive Table buffer size> 770*53ee8cc1Swenshuai.xi } MS_PNL_OD_SETTING; 771*53ee8cc1Swenshuai.xi 772*53ee8cc1Swenshuai.xi 773*53ee8cc1Swenshuai.xi typedef struct DLL_PACKED 774*53ee8cc1Swenshuai.xi { 775*53ee8cc1Swenshuai.xi MS_U16 m_u16ExpectSwingLevel; 776*53ee8cc1Swenshuai.xi MS_U8 m_u8ModCaliPairSel; 777*53ee8cc1Swenshuai.xi MS_U8 m_u8ModCaliTarget; 778*53ee8cc1Swenshuai.xi MS_S8 m_s8ModCaliOffset; 779*53ee8cc1Swenshuai.xi MS_BOOL m_bPVDD_2V5; 780*53ee8cc1Swenshuai.xi }MS_PNL_ModCaliInfo; 781*53ee8cc1Swenshuai.xi 782*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 783*53ee8cc1Swenshuai.xi //MApi_PNL_Setting enum of cmd 784*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 785*53ee8cc1Swenshuai.xi typedef enum 786*53ee8cc1Swenshuai.xi { 787*53ee8cc1Swenshuai.xi E_PNL_MOD_PECURRENT_SETTING, 788*53ee8cc1Swenshuai.xi E_PNL_CONTROL_OUT_SWING, 789*53ee8cc1Swenshuai.xi }E_PNL_SETTING; 790*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 791*53ee8cc1Swenshuai.xi //MApi_PNL_Setting struct of cmd 792*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 793*53ee8cc1Swenshuai.xi typedef struct 794*53ee8cc1Swenshuai.xi { 795*53ee8cc1Swenshuai.xi MS_U16 u16Current_Level; 796*53ee8cc1Swenshuai.xi MS_U16 u16Channel_Select; 797*53ee8cc1Swenshuai.xi }ST_PNL_MOD_PECURRENT_SETTING; 798*53ee8cc1Swenshuai.xi 799*53ee8cc1Swenshuai.xi typedef struct 800*53ee8cc1Swenshuai.xi { 801*53ee8cc1Swenshuai.xi MS_U16 u16Swing_Level; 802*53ee8cc1Swenshuai.xi }ST_PNL_CONTROL_OUT_SWING; 803*53ee8cc1Swenshuai.xi 804*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 805*53ee8cc1Swenshuai.xi 806*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 807*53ee8cc1Swenshuai.xi // Function and Variable 808*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 809*53ee8cc1Swenshuai.xi 810*53ee8cc1Swenshuai.xi /******************************************************************************/ 811*53ee8cc1Swenshuai.xi /* Variable */ 812*53ee8cc1Swenshuai.xi /* ****************************************************************************/ 813*53ee8cc1Swenshuai.xi /** 814*53ee8cc1Swenshuai.xi * 815*53ee8cc1Swenshuai.xi * The global interface for panel manipulation. 816*53ee8cc1Swenshuai.xi * 817*53ee8cc1Swenshuai.xi * @attention <b>Call "MApi_PNL_Init()" first before using this obj</b> 818*53ee8cc1Swenshuai.xi */ 819*53ee8cc1Swenshuai.xi extern XC_PNL_OBJ g_IPanel; 820*53ee8cc1Swenshuai.xi INTERFACE void* pu32PNLInst; 821*53ee8cc1Swenshuai.xi typedef enum 822*53ee8cc1Swenshuai.xi { 823*53ee8cc1Swenshuai.xi E_PNL_NO_OUTPUT, 824*53ee8cc1Swenshuai.xi E_PNL_CLK_ONLY, 825*53ee8cc1Swenshuai.xi E_PNL_CLK_DATA, 826*53ee8cc1Swenshuai.xi E_PNL_MAX, 827*53ee8cc1Swenshuai.xi } E_PNL_PREINIT_OPTIONS; 828*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 829*53ee8cc1Swenshuai.xi /// Description : Show the PNL driver version 830*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_INFO 831*53ee8cc1Swenshuai.xi /// @param ppVersion \b OUT: output PNL driver version 832*53ee8cc1Swenshuai.xi /// @return @ref APIPNL_Result 833*53ee8cc1Swenshuai.xi /// @return E_APIPNL_OK : succeed 834*53ee8cc1Swenshuai.xi /// @return E_APIPNL_FAIL : fail before timeout or illegal parameters 835*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 836*53ee8cc1Swenshuai.xi APIPNL_Result MApi_PNL_GetLibVer(const MSIF_Version **ppVersion); 837*53ee8cc1Swenshuai.xi 838*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 839*53ee8cc1Swenshuai.xi /// Description : Show the PNL info 840*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_INFO 841*53ee8cc1Swenshuai.xi /// @return @ref APIPNL_Result 842*53ee8cc1Swenshuai.xi /// @return E_APIPNL_OK : succeed 843*53ee8cc1Swenshuai.xi /// @return E_APIPNL_FAIL : fail before timeout or illegal parameters 844*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 845*53ee8cc1Swenshuai.xi const PNL_ApiInfo * MApi_PNL_GetInfo(void); 846*53ee8cc1Swenshuai.xi 847*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 848*53ee8cc1Swenshuai.xi /// Description : Show the PNL Status 849*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_ToBeModified 850*53ee8cc1Swenshuai.xi /// @param pPnlStatus \b IN: point of panel status 851*53ee8cc1Swenshuai.xi /// @return @ref MS_BOOL 852*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 853*53ee8cc1Swenshuai.xi MS_BOOL MApi_PNL_GetStatus(PNL_ApiStatus *pPnlStatus); 854*53ee8cc1Swenshuai.xi 855*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 856*53ee8cc1Swenshuai.xi /// Description : Show the PNL Status EX 857*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_ToBeModified 858*53ee8cc1Swenshuai.xi /// @param pPnlExtStatus \b IN: point of panel status 859*53ee8cc1Swenshuai.xi /// @return @ref MS_BOOL 860*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 861*53ee8cc1Swenshuai.xi MS_BOOL MApi_PNL_GetStatusEx(PNL_ApiExtStatus *pPnlExtStatus); 862*53ee8cc1Swenshuai.xi 863*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 864*53ee8cc1Swenshuai.xi /// Description : Set the PNL debug level 865*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_INFO 866*53ee8cc1Swenshuai.xi /// @param u16DbgSwitch \b IN: debug level switch 867*53ee8cc1Swenshuai.xi /// @return @ref MS_BOOL 868*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 869*53ee8cc1Swenshuai.xi MS_BOOL MApi_PNL_SetDbgLevel(MS_U16 u16DbgSwitch); 870*53ee8cc1Swenshuai.xi 871*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 872*53ee8cc1Swenshuai.xi /// Description : Init the PNL IOMAP base 873*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_INIT 874*53ee8cc1Swenshuai.xi /// @return @ref MS_BOOL 875*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 876*53ee8cc1Swenshuai.xi MS_BOOL MApi_PNL_IOMapBaseInit(void); 877*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 878*53ee8cc1Swenshuai.xi /// Description : Pre Init the PNL 879*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_INIT 880*53ee8cc1Swenshuai.xi /// @param eInitParam \b IN: Init Parameter 881*53ee8cc1Swenshuai.xi /// @return @ref MS_BOOL 882*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 883*53ee8cc1Swenshuai.xi MS_BOOL MApi_PNL_PreInit(E_PNL_PREINIT_OPTIONS eInitParam); 884*53ee8cc1Swenshuai.xi 885*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 886*53ee8cc1Swenshuai.xi /// Description : 887*53ee8cc1Swenshuai.xi /// This is a wrapper for \link MApi_PNL_Init_Ex \endlink. 888*53ee8cc1Swenshuai.xi /// For more information, please check MApi_PNL_Init_Ex( ). 889*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_INIT 890*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 891*53ee8cc1Swenshuai.xi #ifndef _API_XC_PANEL_C_ 892*53ee8cc1Swenshuai.xi #define MApi_PNL_Init(x) MApi_PNL_Init_Ex(x, (MSIF_Version){{ PNL_API_VERSION },}); 893*53ee8cc1Swenshuai.xi #endif 894*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 895*53ee8cc1Swenshuai.xi /// \b Description : \n 896*53ee8cc1Swenshuai.xi /// In order to make panel inited and working properly according to panel spec, such as Htotal, Vtotal..etc \n 897*53ee8cc1Swenshuai.xi /// We have to pass these specific panel specs to Utopia panel module by this API. 898*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_INIT 899*53ee8cc1Swenshuai.xi /// @param[in] pSelPanelType A panel struct type used to specify the panel attributes, and settings from PCB board layout 900*53ee8cc1Swenshuai.xi /// @param[in] LIBVER lib version 901*53ee8cc1Swenshuai.xi /// @return @ref MS_BOOL returns @ref TRUE for success, @ref FALSE for failure. 902*53ee8cc1Swenshuai.xi /// @par Example Code 903*53ee8cc1Swenshuai.xi /// \code 904*53ee8cc1Swenshuai.xi /// // MApi_PNL_Init_Ex example : how to pass initial panel data to panel driver. 905*53ee8cc1Swenshuai.xi /// #include <apiPNL.h> 906*53ee8cc1Swenshuai.xi /// 907*53ee8cc1Swenshuai.xi /// void main() 908*53ee8cc1Swenshuai.xi /// { 909*53ee8cc1Swenshuai.xi /// MS_BOOL bSuccess = FALSE; 910*53ee8cc1Swenshuai.xi /// 911*53ee8cc1Swenshuai.xi /// // This setting is purely virtual 912*53ee8cc1Swenshuai.xi /// // it should be adopted from panel vendors 913*53ee8cc1Swenshuai.xi /// PanelType panelSetting = { 914*53ee8cc1Swenshuai.xi /// .m_pPanelName = "MStar_Panel, 915*53ee8cc1Swenshuai.xi /// .m_bPanelDither = 1, 916*53ee8cc1Swenshuai.xi /// .m_ePanelLinkType = LINK_LVDS, 917*53ee8cc1Swenshuai.xi /// ... 918*53ee8cc1Swenshuai.xi /// ... 919*53ee8cc1Swenshuai.xi /// }; 920*53ee8cc1Swenshuai.xi /// 921*53ee8cc1Swenshuai.xi /// bSuccess = MApi_PNL_Init_Ex( &panelSetting, 922*53ee8cc1Swenshuai.xi /// (MSIF_Version){{ PNL_API_VERSION },} 923*53ee8cc1Swenshuai.xi /// ); 924*53ee8cc1Swenshuai.xi /// } 925*53ee8cc1Swenshuai.xi /// \endcode 926*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 927*53ee8cc1Swenshuai.xi MS_BOOL MApi_PNL_Init_Ex(PanelType *pSelPanelType, MSIF_Version LIBVER); 928*53ee8cc1Swenshuai.xi 929*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 930*53ee8cc1Swenshuai.xi /// Description : Panel Get Config 931*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_FEATURE 932*53ee8cc1Swenshuai.xi /// @param[in] pSelPanelType A panel struct type used to specify the panel attributes, and settings from PCB board layout 933*53ee8cc1Swenshuai.xi /// @return @ref APIPNL_Result 934*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 935*53ee8cc1Swenshuai.xi APIPNL_Result MApi_PNL_GetConfig(PanelType *pSelPanelType); 936*53ee8cc1Swenshuai.xi 937*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 938*53ee8cc1Swenshuai.xi /// Description : Setup the PNL output type 939*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_FEATURE 940*53ee8cc1Swenshuai.xi /// @param eOutputMode \b IN: setup output mode 941*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 942*53ee8cc1Swenshuai.xi void MApi_PNL_SetOutput(APIPNL_OUTPUT_MODE eOutputMode); 943*53ee8cc1Swenshuai.xi 944*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 945*53ee8cc1Swenshuai.xi /// Description : Change the PNL type 946*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_FEATURE 947*53ee8cc1Swenshuai.xi /// @param pSelPanelType \b IN: change panel type 948*53ee8cc1Swenshuai.xi /// @return @ref MS_BOOL 949*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 950*53ee8cc1Swenshuai.xi MS_BOOL MApi_PNL_ChangePanelType(PanelType *pSelPanelType); 951*53ee8cc1Swenshuai.xi 952*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 953*53ee8cc1Swenshuai.xi /// Description : Dump TCON Table 954*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_INIT 955*53ee8cc1Swenshuai.xi /// @param pTCONTable \b IN: Table 956*53ee8cc1Swenshuai.xi /// @param u8Tcontype \b IN: use APIPNL_TCON_TAB_TYPE ad input 957*53ee8cc1Swenshuai.xi /// @return @ref MS_BOOL 958*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 959*53ee8cc1Swenshuai.xi MS_BOOL MApi_PNL_TCONMAP_DumpTable(MS_U8 *pTCONTable, MS_U8 u8Tcontype); 960*53ee8cc1Swenshuai.xi 961*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 962*53ee8cc1Swenshuai.xi /// Description : Control the TCON power sequence 963*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_INIT 964*53ee8cc1Swenshuai.xi /// @param pTCONTable \b IN: Table 965*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: Enable Power sequence 966*53ee8cc1Swenshuai.xi /// @return @ref MS_BOOL 967*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 968*53ee8cc1Swenshuai.xi MS_BOOL MApi_PNL_TCONMAP_Power_Sequence(MS_U8 *pTCONTable, MS_BOOL bEnable); 969*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 970*53ee8cc1Swenshuai.xi /// Description : Reset the TCON counter 971*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_INIT 972*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: Enable Power sequence 973*53ee8cc1Swenshuai.xi /// @return @ref MS_BOOL 974*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 975*53ee8cc1Swenshuai.xi void MApi_PNL_TCON_Count_Reset ( MS_BOOL bEnable ); 976*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 977*53ee8cc1Swenshuai.xi /// Description : Init the TCON 978*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_INIT 979*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 980*53ee8cc1Swenshuai.xi 981*53ee8cc1Swenshuai.xi void MApi_PNL_TCON_Init( void ); 982*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 983*53ee8cc1Swenshuai.xi /// Description : Show the PNL Destnation info 984*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_INFO 985*53ee8cc1Swenshuai.xi /// @param pDstInfo \b IN: get destanation onfo 986*53ee8cc1Swenshuai.xi /// @param u32SizeofDstInfo \b IN: size of stucture 987*53ee8cc1Swenshuai.xi /// @return @ref MS_BOOL 988*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 989*53ee8cc1Swenshuai.xi MS_BOOL MApi_PNL_GetDstInfo(MS_PNL_DST_DispInfo *pDstInfo, MS_U32 u32SizeofDstInfo); 990*53ee8cc1Swenshuai.xi 991*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 992*53ee8cc1Swenshuai.xi /// Description : Setup the PNL output swing 993*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_FEATURE 994*53ee8cc1Swenshuai.xi /// @param u16Swing_Level \b IN: setup swing value 995*53ee8cc1Swenshuai.xi /// @return @ref MS_BOOL 996*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 997*53ee8cc1Swenshuai.xi MS_BOOL MApi_PNL_Control_Out_Swing(MS_U16 u16Swing_Level); 998*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 999*53ee8cc1Swenshuai.xi /// Description : Setup the PNL output DCLK 1000*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_ToBeModified 1001*53ee8cc1Swenshuai.xi /// @param u16PanelDCLK \b IN: setup DCLK 1002*53ee8cc1Swenshuai.xi /// @param bSetDCLKEnable \b IN: enable this setting 1003*53ee8cc1Swenshuai.xi /// @return @ref MS_BOOL 1004*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1005*53ee8cc1Swenshuai.xi MS_BOOL MApi_PNL_ForceSetPanelDCLK(MS_U16 u16PanelDCLK ,MS_BOOL bSetDCLKEnable ); 1006*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1007*53ee8cc1Swenshuai.xi /// Description : Setup the PNL Horizontal start 1008*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_INIT 1009*53ee8cc1Swenshuai.xi /// @param u16PanelHStart \b IN: setup H start 1010*53ee8cc1Swenshuai.xi /// @param bSetHStartEnable \b IN: enable this setting 1011*53ee8cc1Swenshuai.xi /// @return @ref MS_BOOL 1012*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1013*53ee8cc1Swenshuai.xi MS_BOOL MApi_PNL_ForceSetPanelHStart(MS_U16 u16PanelHStart ,MS_BOOL bSetHStartEnable); 1014*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1015*53ee8cc1Swenshuai.xi /// Description : Setup the PNL Output pattern 1016*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_FEATURE 1017*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: Enable output pattern 1018*53ee8cc1Swenshuai.xi /// @param u16Red \b IN: Red color 1019*53ee8cc1Swenshuai.xi /// @param u16Green \b IN: Green color 1020*53ee8cc1Swenshuai.xi /// @param u16Blue \b IN: Blue color 1021*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1022*53ee8cc1Swenshuai.xi void MApi_PNL_SetOutputPattern(MS_BOOL bEnable, MS_U16 u16Red , MS_U16 u16Green, MS_U16 u16Blue); 1023*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1024*53ee8cc1Swenshuai.xi /// Description : Init the MOD calibration parameter 1025*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_INIT 1026*53ee8cc1Swenshuai.xi /// @param pstModCaliInfo \b IN: setup mod calibration parameter 1027*53ee8cc1Swenshuai.xi /// @return @ref MS_BOOL 1028*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1029*53ee8cc1Swenshuai.xi MS_BOOL MApi_Mod_Calibration_Setting(MS_PNL_ModCaliInfo *pstModCaliInfo); 1030*53ee8cc1Swenshuai.xi 1031*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1032*53ee8cc1Swenshuai.xi /// Description : Start the MOD calibration 1033*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_FEATURE 1034*53ee8cc1Swenshuai.xi /// @return @ref MS_BOOL 1035*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1036*53ee8cc1Swenshuai.xi MS_BOOL MApi_Mod_Do_Calibration(void); 1037*53ee8cc1Swenshuai.xi 1038*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1039*53ee8cc1Swenshuai.xi /// Description : Type: This type means package. Different package maybe have different type id. 1040*53ee8cc1Swenshuai.xi /// Check board define or system configure for type id. 1041*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_INIT 1042*53ee8cc1Swenshuai.xi /// @param Type \b IN: setup LVDS output type for different board layout 1043*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1044*53ee8cc1Swenshuai.xi void MApi_BD_LVDS_Output_Type(MS_U16 Type); 1045*53ee8cc1Swenshuai.xi 1046*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1047*53ee8cc1Swenshuai.xi /// Description : Setup the LPLL type EX 1048*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_ToBeModified 1049*53ee8cc1Swenshuai.xi /// @param eLPLL_TypeExt \b IN: setup LPLL Ext type 1050*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1051*53ee8cc1Swenshuai.xi void MApi_PNL_SetLPLLTypeExt(APIPNL_LINK_EXT_TYPE eLPLL_TypeExt); 1052*53ee8cc1Swenshuai.xi 1053*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1054*53ee8cc1Swenshuai.xi /// Description : Init the PNL MISC config 1055*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_INIT 1056*53ee8cc1Swenshuai.xi /// @param ePNL_MISC \b IN: setup MISC control 1057*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1058*53ee8cc1Swenshuai.xi void MApi_PNL_Init_MISC(APIPNL_MISC ePNL_MISC); 1059*53ee8cc1Swenshuai.xi 1060*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1061*53ee8cc1Swenshuai.xi /// Description : Show the PNL MISC config 1062*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_INIT 1063*53ee8cc1Swenshuai.xi /// @return @ref MS_U32 1064*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1065*53ee8cc1Swenshuai.xi MS_U32 MApi_PNL_GetMiscStatus(void); 1066*53ee8cc1Swenshuai.xi 1067*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1068*53ee8cc1Swenshuai.xi /// Description : Setup the PNL output config by user 1069*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_INIT 1070*53ee8cc1Swenshuai.xi /// @param u32OutputCFG0_7 \b IN: setup output config channel 00~07 1071*53ee8cc1Swenshuai.xi /// @param u32OutputCFG8_15 \b IN: setup output config channel 08~15 1072*53ee8cc1Swenshuai.xi /// @param u32OutputCFG16_21 \b IN: setup output config channel 16~23 1073*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1074*53ee8cc1Swenshuai.xi void MApi_PNL_MOD_OutputConfig_User(MS_U32 u32OutputCFG0_7, MS_U32 u32OutputCFG8_15, MS_U32 u32OutputCFG16_21); 1075*53ee8cc1Swenshuai.xi 1076*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1077*53ee8cc1Swenshuai.xi /// Description : Set channel output order 1078*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_FEATURE 1079*53ee8cc1Swenshuai.xi /// @param u8OutputOrderType \b IN: use enum of APIPNL_OUTPUT_CHANNEL_ORDER 1080*53ee8cc1Swenshuai.xi /// @param u16OutputOrder0_3 \b IN: output order of channel 0 to 3 1081*53ee8cc1Swenshuai.xi /// @param u16OutputOrder4_7 \b IN: output order of channel 4 to 7 1082*53ee8cc1Swenshuai.xi /// @param u16OutputOrder8_11 \b IN: output order of channel 8 to 11 1083*53ee8cc1Swenshuai.xi /// @param u16OutputOrder12_13 \b IN: output order of channel 12 to 13 1084*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1085*53ee8cc1Swenshuai.xi void MApi_PNL_MOD_OutputChannelOrder(MS_U8 u8OutputOrderType, 1086*53ee8cc1Swenshuai.xi MS_U16 u16OutputOrder0_3, 1087*53ee8cc1Swenshuai.xi MS_U16 u16OutputOrder4_7, 1088*53ee8cc1Swenshuai.xi MS_U16 u16OutputOrder8_11, 1089*53ee8cc1Swenshuai.xi MS_U16 u16OutputOrder12_13); 1090*53ee8cc1Swenshuai.xi 1091*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1092*53ee8cc1Swenshuai.xi /// Description : Setup the PNL 3D LR falg 1093*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_INIT 1094*53ee8cc1Swenshuai.xi /// @param lvdsresinfo \b IN: setup LVDS reserved bit to be LR flag pin 1095*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1096*53ee8cc1Swenshuai.xi void MApi_PNL_HWLVDSReservedtoLRFlag(MS_PNL_HW_LVDSResInfo lvdsresinfo); 1097*53ee8cc1Swenshuai.xi 1098*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1099*53ee8cc1Swenshuai.xi /// Description : Setup the PNL PVDD level 1100*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_INIT 1101*53ee8cc1Swenshuai.xi /// @param bIs2p5 \b IN: setup PVDD voltage is 2.5V or 3.3V 1102*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1103*53ee8cc1Swenshuai.xi void MApi_MOD_PVDD_Power_Setting(MS_BOOL bIs2p5); 1104*53ee8cc1Swenshuai.xi 1105*53ee8cc1Swenshuai.xi 1106*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1107*53ee8cc1Swenshuai.xi /// Description : Enable the PNL Video path SSC 1108*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_FEATURE 1109*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: Enable SSC 1110*53ee8cc1Swenshuai.xi /// @return @ref APIPNL_Result 1111*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1112*53ee8cc1Swenshuai.xi APIPNL_Result MApi_PNL_SetSSC_En(MS_BOOL bEnable); 1113*53ee8cc1Swenshuai.xi 1114*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1115*53ee8cc1Swenshuai.xi /// Description : Set panel SSC Fmodulation 1116*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_FEATURE 1117*53ee8cc1Swenshuai.xi /// @param u16Fmodulation \b IN:Fmodulation, Unit:0.1Khz 1118*53ee8cc1Swenshuai.xi /// @return @ref APIPNL_Result 1119*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1120*53ee8cc1Swenshuai.xi APIPNL_Result MApi_PNL_SetSSC_Fmodulation(MS_U16 u16Fmodulation); 1121*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1122*53ee8cc1Swenshuai.xi /// Description : Set panel SSC Rdeviation 1123*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_FEATURE 1124*53ee8cc1Swenshuai.xi /// @param u16Rdeviation \b IN: u16Rdeviation, Unit:1%%(1/10000) 1125*53ee8cc1Swenshuai.xi /// @return @ref APIPNL_Result 1126*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1127*53ee8cc1Swenshuai.xi APIPNL_Result MApi_PNL_SetSSC_Rdeviation(MS_U16 u16Rdeviation); 1128*53ee8cc1Swenshuai.xi 1129*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1130*53ee8cc1Swenshuai.xi /// Description : Enable the PNL OSD path SSC 1131*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_FEATURE 1132*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: Enable OSD SSC 1133*53ee8cc1Swenshuai.xi /// @return @ref APIPNL_Result 1134*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1135*53ee8cc1Swenshuai.xi APIPNL_Result MApi_PNL_SetOSDSSC_En(MS_BOOL bEnable); 1136*53ee8cc1Swenshuai.xi 1137*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1138*53ee8cc1Swenshuai.xi /// Description : Set panel OSD SSC Fmodulation 1139*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_FEATURE 1140*53ee8cc1Swenshuai.xi /// @param u16Fmodulation \b IN:Fmodulation, Unit:0.1Khz 1141*53ee8cc1Swenshuai.xi /// @return @ref APIPNL_Result 1142*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1143*53ee8cc1Swenshuai.xi APIPNL_Result MApi_PNL_SetOSDSSC_Fmodulation(MS_U16 u16Fmodulation); 1144*53ee8cc1Swenshuai.xi 1145*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1146*53ee8cc1Swenshuai.xi /// Description : Set panel OSD SSC Rdeviation 1147*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_FEATURE 1148*53ee8cc1Swenshuai.xi /// @param u16Rdeviation \b IN: u16Rdeviation, Unit:1%%(1/10000) 1149*53ee8cc1Swenshuai.xi /// @return TRUE --OK FALSE 1150*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 1151*53ee8cc1Swenshuai.xi APIPNL_Result MApi_PNL_SetOSDSSC_Rdeviation(MS_U16 u16Rdeviation); 1152*53ee8cc1Swenshuai.xi 1153*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1154*53ee8cc1Swenshuai.xi /// Description : skip the timing change 1155*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_INIT 1156*53ee8cc1Swenshuai.xi /// @param bSetModeOn \b IN: TRUE: when set mode on t; FALSE: when set mode off 1157*53ee8cc1Swenshuai.xi /// @return E_APIPNL_OK or E_APIPNL_FAIL 1158*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1159*53ee8cc1Swenshuai.xi 1160*53ee8cc1Swenshuai.xi APIPNL_Result MApi_PNL_SkipTimingChange(MS_BOOL bFlag); 1161*53ee8cc1Swenshuai.xi 1162*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1163*53ee8cc1Swenshuai.xi /// Description : Set Pre Set Mode On 1164*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_INIT 1165*53ee8cc1Swenshuai.xi /// @param bSetModeOn \b IN: TRUE: when set mode on t; FALSE: when set mode off 1166*53ee8cc1Swenshuai.xi /// @return E_APIPNL_OK or E_APIPNL_FAIL 1167*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1168*53ee8cc1Swenshuai.xi APIPNL_Result MApi_PNL_PreSetModeOn(MS_BOOL bSetModeOn); 1169*53ee8cc1Swenshuai.xi 1170*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1171*53ee8cc1Swenshuai.xi /// Description : Initialize OverDrive 1172*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_INIT 1173*53ee8cc1Swenshuai.xi /// @param pPNL_ODInitData \b IN: the Initialized Data 1174*53ee8cc1Swenshuai.xi /// @param u32ODInitDataLen \b IN: the length of the initialized data 1175*53ee8cc1Swenshuai.xi /// @return E_APIPNL_OK or E_APIPNL_FAIL 1176*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1177*53ee8cc1Swenshuai.xi APIPNL_Result MApi_PNL_OverDriver_Init(MS_PNL_OD_INITDATA *pPNL_ODInitData, MS_U32 u32ODInitDataLen); 1178*53ee8cc1Swenshuai.xi 1179*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1180*53ee8cc1Swenshuai.xi /// Description : Initialize OverDrive 1181*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_INIT 1182*53ee8cc1Swenshuai.xi /// @param pPNL_ODSetting \b IN: the Initialized Data 1183*53ee8cc1Swenshuai.xi /// @param u32ODInitDataLen \b IN: the length of the initialized data 1184*53ee8cc1Swenshuai.xi /// @return E_APIPNL_OK or E_APIPNL_FAIL 1185*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1186*53ee8cc1Swenshuai.xi APIPNL_Result SYMBOL_WEAK MApi_PNL_OverDriver_Setting(MS_PNL_OD_SETTING *pPNL_ODSetting, MS_U32 u32ODInitDataLen); 1187*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1188*53ee8cc1Swenshuai.xi /// Description : OverDrive Enable 1189*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_FEATURE 1190*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: TRUE: Enable OverDrive; FALSE: Disable OverDrive 1191*53ee8cc1Swenshuai.xi /// @return E_APIPNL_OK or E_APIPNL_FAIL 1192*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1193*53ee8cc1Swenshuai.xi APIPNL_Result MApi_PNL_OverDriver_Enable(MS_BOOL bEnable); 1194*53ee8cc1Swenshuai.xi 1195*53ee8cc1Swenshuai.xi 1196*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1197*53ee8cc1Swenshuai.xi /// Description : Get TCON capability 1198*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_INFO 1199*53ee8cc1Swenshuai.xi /// @return MS_BOOL 1200*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1201*53ee8cc1Swenshuai.xi MS_BOOL MApi_PNL_Get_TCON_Capability(void); 1202*53ee8cc1Swenshuai.xi 1203*53ee8cc1Swenshuai.xi 1204*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1205*53ee8cc1Swenshuai.xi /// Description : Set FRC MOD pair swap 1206*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_FEATURE 1207*53ee8cc1Swenshuai.xi /// @param u32Polarity \b IN: u32Polarity, (d:c:b:a)=([15:14],[13:12],[11:10],[9:8]) => (10,00,11,01), => (2,0,3,1) 1208*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1209*53ee8cc1Swenshuai.xi void MApi_PNL_SetPairSwap(MS_U32 u32Polarity); 1210*53ee8cc1Swenshuai.xi 1211*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1212*53ee8cc1Swenshuai.xi /// Description : Set Ext LPLL type 1213*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_ToBeModified 1214*53ee8cc1Swenshuai.xi /// @param u16Ext_lpll_type \b IN: ldHz = Htt*Vtt*Vfreq 1215*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1216*53ee8cc1Swenshuai.xi void MApi_PNL_SetExt_LPLL_Type(MS_U16 u16Ext_lpll_type); 1217*53ee8cc1Swenshuai.xi 1218*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1219*53ee8cc1Swenshuai.xi /// Description : Cal Ext LPLL Set by DCLK 1220*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_FEATURE 1221*53ee8cc1Swenshuai.xi /// @param ldHz \b IN: ldHz = Htt*Vtt*Vfreq 1222*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1223*53ee8cc1Swenshuai.xi void MApi_PNL_CalExtLPLLSETbyDClk(MS_U32 ldHz); 1224*53ee8cc1Swenshuai.xi 1225*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1226*53ee8cc1Swenshuai.xi /// Description : Enable Internal Termination for Urania, disable it for others case 1227*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_FEATURE 1228*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: Enable or Disable 1229*53ee8cc1Swenshuai.xi /// @return TRUE or FALSE 1230*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1231*53ee8cc1Swenshuai.xi MS_BOOL MApi_PNL_EnableInternalTermination(MS_BOOL bEnable); 1232*53ee8cc1Swenshuai.xi 1233*53ee8cc1Swenshuai.xi 1234*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1235*53ee8cc1Swenshuai.xi /// Description : Set power state 1236*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_FEATURE 1237*53ee8cc1Swenshuai.xi /// @param ePowerState \b IN: power state 1238*53ee8cc1Swenshuai.xi /// @return MS_U32 1239*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1240*53ee8cc1Swenshuai.xi MS_U32 MApi_PNL_SetPowerState(EN_POWER_MODE ePowerState); 1241*53ee8cc1Swenshuai.xi 1242*53ee8cc1Swenshuai.xi 1243*53ee8cc1Swenshuai.xi ////////////////////////////////////////////// 1244*53ee8cc1Swenshuai.xi // Below functions are obosolted ! Please do not use them if you do not use them yet. 1245*53ee8cc1Swenshuai.xi ////////////////////////////////////////////// 1246*53ee8cc1Swenshuai.xi 1247*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1248*53ee8cc1Swenshuai.xi /// Description : Set power state 1249*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_ToBeRemove 1250*53ee8cc1Swenshuai.xi /// @param ePowerState \b IN: power state 1251*53ee8cc1Swenshuai.xi /// @return MS_U32 1252*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1253*53ee8cc1Swenshuai.xi MS_BOOL MApi_PNL_SetDiffSwingLevel(MS_U8 u8Swing_Level); 1254*53ee8cc1Swenshuai.xi 1255*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1256*53ee8cc1Swenshuai.xi /// Do handshake for special output device, ex. VB1 1257*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_FEATURE 1258*53ee8cc1Swenshuai.xi /// @return TRUE or FALSE 1259*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1260*53ee8cc1Swenshuai.xi MS_BOOL MApi_PNL_OutputDeviceHandshake(void); 1261*53ee8cc1Swenshuai.xi 1262*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1263*53ee8cc1Swenshuai.xi /// Do OC handshake for special output device, ex. VB1 1264*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_FEATURE 1265*53ee8cc1Swenshuai.xi /// @return TRUE or FALSE 1266*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1267*53ee8cc1Swenshuai.xi MS_BOOL MApi_PNL_OutputDeviceOCHandshake(void); 1268*53ee8cc1Swenshuai.xi 1269*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1270*53ee8cc1Swenshuai.xi /// set necessary setting for outputing interlace timing to rear 1271*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_FEATURE 1272*53ee8cc1Swenshuai.xi /// @return APIPNL_Result 1273*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1274*53ee8cc1Swenshuai.xi APIPNL_Result MApi_PNL_SetOutputInterlaceTiming(MS_BOOL bEnable); 1275*53ee8cc1Swenshuai.xi 1276*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1277*53ee8cc1Swenshuai.xi /// Get Support Max output Dclk 1278*53ee8cc1Swenshuai.xi /// @ingroup PNL_INTERFACE_FEATURE 1279*53ee8cc1Swenshuai.xi /// @return MS_U16 1280*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1281*53ee8cc1Swenshuai.xi MS_U16 SYMBOL_WEAK MApi_PNL_GetSupportMaxDclk(void); 1282*53ee8cc1Swenshuai.xi 1283*53ee8cc1Swenshuai.xi void MApi_PNL_GetPanelData(PanelType* pstPNLData); 1284*53ee8cc1Swenshuai.xi void MApi_PNL_DumpPanelData(void); 1285*53ee8cc1Swenshuai.xi void MApi_PNL_SetSSC(MS_U16 u16Fmodulation, MS_U16 u16Rdeviation, MS_BOOL bEnable); 1286*53ee8cc1Swenshuai.xi MS_U16 MApi_PNL_GetPanelOnTiming(APIPNL_POWER_TIMING_SEQ seq); 1287*53ee8cc1Swenshuai.xi MS_U16 MApi_PNL_GetPanelOffTiming(APIPNL_POWER_TIMING_SEQ seq); 1288*53ee8cc1Swenshuai.xi MS_U8 MApi_PNL_GetPanelDimCtrl(APIPNL_DIMMING_CTRL dim_type); 1289*53ee8cc1Swenshuai.xi MS_U8** MApi_PNL_GetAllGammaTbl(void); 1290*53ee8cc1Swenshuai.xi MS_BOOL MApi_PNL_EnablePanel(MS_BOOL bPanelOn); 1291*53ee8cc1Swenshuai.xi MS_BOOL MApi_PNL_SetPanelGamma(MS_U8* pu8GammaTab, MS_U8 u8Index); 1292*53ee8cc1Swenshuai.xi MS_BOOL MApi_PNL_SetGammaTbl(APIPNL_GAMMA_TYPE eGammaType, MS_U8* pu8GammaTab[3], APIPNL_GAMMA_MAPPEING_MODE Gamma_Map_Mode); 1293*53ee8cc1Swenshuai.xi MS_BOOL MApi_PNL_GetGammaTbl(APIPNL_GAMMA_TYPE eGammaType, MS_U8* pu8GammaTab[3], APIPNL_GAMMA_MAPPEING_MODE Gamma_Map_Mode); 1294*53ee8cc1Swenshuai.xi MS_BOOL MApi_PNL_SetGammaValue(MS_U8 u8Channel, MS_U16 u16Offset, MS_U16 u16GammaValue); 1295*53ee8cc1Swenshuai.xi MS_U16 MApi_PNL_InitLocalDimming(pstPNL_Init_LocalDimming_Parameters pstPnlLDArgs, MS_U16 u16DataLen); 1296*53ee8cc1Swenshuai.xi MS_BOOL MApi_PNL_Check_VBY1_Handshake_Status(void); 1297*53ee8cc1Swenshuai.xi void MApi_PNL_SetVideoHWTraining(MS_BOOL bEnable); 1298*53ee8cc1Swenshuai.xi void MApi_PNL_SetOSDHWTraining(MS_BOOL bEnable); 1299*53ee8cc1Swenshuai.xi MS_BOOL MApi_PNL_GetVideoHWTraining_Status(void); 1300*53ee8cc1Swenshuai.xi MS_BOOL MApi_PNL_GetOSDHWTraining_Status(void); 1301*53ee8cc1Swenshuai.xi MS_BOOL SYMBOL_WEAK MApi_PNL_GetOutputInterlaceTiming(void); 1302*53ee8cc1Swenshuai.xi APIPNL_Result MApi_PNL_Setting(MS_U32 u32Cmd,void *pCmdArgs,MS_U32 u32CmdArgsSize); 1303*53ee8cc1Swenshuai.xi 1304*53ee8cc1Swenshuai.xi #undef INTERFACE 1305*53ee8cc1Swenshuai.xi 1306*53ee8cc1Swenshuai.xi #ifdef __cplusplus 1307*53ee8cc1Swenshuai.xi } 1308*53ee8cc1Swenshuai.xi #endif 1309*53ee8cc1Swenshuai.xi 1310*53ee8cc1Swenshuai.xi #endif 1311