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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 /////////////////////////////////////////////////////////////////////////////////////////////////// 96 /// 97 /// @file apiPNL.h 98 /// @brief Panel Interface 99 /// @author MStar Semiconductor Inc. 100 /////////////////////////////////////////////////////////////////////////////////////////////////// 101 102 /*! \defgroup PNL_MODULE Panel Module 103 104 PNL is used for: 105 106 - 1.Set panel parameters base on different panel type,include VOP, MOD setting 107 - 2.change panel types . 108 - Ex:VBY1 switch from 2,4,8 lanes. 109 110 <b> Operation Code Flow: </b> \n 111 check flow chart directly. 112 \image html apiPNL.png 113 114 *! \defgroup PNL_INTERFACE_INIT Panel Init Control Interface 115 * \ingroup PNL_MODULE 116 117 *! \defgroup PNL_INTERFACE_FEATURE Panel Feature Operations Interface 118 * \ingroup PNL_MODULE 119 120 *! \defgroup PNL_INTERFACE_INFO Panel Infomation Pool Interface 121 * \ingroup PNL_MODULE 122 123 *! \defgroup PNL_INTERFACE_ToBeModified Panel APIs-to-be-modified Interface 124 * \ingroup PNL_MODULE 125 126 *! \defgroup PNL_INTERFACE_ToBeRemove Panel APIs-to-be-removed Interface 127 * \ingroup PNL_MODULE 128 */ 129 130 131 #ifndef _API_XC_PANEL_H_ 132 #define _API_XC_PANEL_H_ 133 134 #include "MsDevice.h" 135 #include "MsVersion.h" 136 #include "UFO.h" 137 138 #ifdef __cplusplus 139 extern "C" { 140 #endif 141 142 #ifdef _API_XC_PANEL_C_ 143 #define INTERFACE 144 #else 145 #define INTERFACE extern 146 #endif 147 148 //------------------------------------------------------------------------------------------------- 149 // Macro and Define 150 //------------------------------------------------------------------------------------------------- 151 152 //------------------------------------------------------------------------------------------------- 153 // This macro defined in mscommon.h originally, here just for avoid SN compile error 154 //------------------------------------------------------------------------------------------------- 155 #ifdef MSOS_TYPE_LINUX_KERNEL 156 #define SYMBOL_WEAK 157 #else 158 #define SYMBOL_WEAK __attribute__((weak)) 159 #endif 160 161 #ifndef _MS_VERSION_H_ 162 #define MSIF_TAG {'M','S','I','F'} // MSIF 163 #define MSIF_CLASS {'0','0'} // DRV/API (DDI) 164 #define MSIF_CUS 0x0000 // MStar Common library 165 #define MSIF_MOD 0x0000 // MStar Common library 166 #define MSIF_CHIP 0x000B 167 #define MSIF_CPU '0' 168 #define MSIF_OS '2' 169 #endif 170 171 // library information 172 #define MSIF_PNL_LIB_CODE {'P','N','L','_'} 173 #define MSIF_PNL_LIBVER {'0','3'} 174 #define MSIF_PNL_BUILDNUM {'5','2'} 175 #define MSIF_PNL_CHANGELIST {'0','0','6','1','4','4','7','7'} 176 177 #define PNL_API_VERSION /* Character String for DRV/API version */ \ 178 MSIF_TAG, /* 'MSIF' */ \ 179 MSIF_CLASS, /* '00' */ \ 180 MSIF_CUS, /* 0x0000 */ \ 181 MSIF_MOD, /* 0x0000 */ \ 182 MSIF_CHIP, \ 183 MSIF_CPU, \ 184 MSIF_PNL_LIB_CODE , /* IP__ */ \ 185 MSIF_PNL_LIBVER , /* 0.0 ~ Z.Z */ \ 186 MSIF_PNL_BUILDNUM , /* 00 ~ 99 */ \ 187 MSIF_PNL_CHANGELIST, /* CL# */ \ 188 MSIF_OS 189 190 /// ApiStatusEX version of current XC lib 191 #define API_PNLSTATUS_EX_VERSION 1 192 193 //---------------------------- 194 // Debug Switch 195 //---------------------------- 196 #define PNL_DBGLEVEL_OFF (0x0000) ///< turn off debug message, this is default setting 197 #define PNL_DBGLEVEL_INIT (0x0001) ///< Initial function 198 #define PNL_DBGLEVEL_PANEL_EN (0x0002) ///< panel enable function 199 #define PNL_DBGLEVEL_SSC (0x0004) ///< panel SSC setting 200 #define PNL_DBGLEVEL_GAMMA (0x0008) ///< gamma table setting 201 #define PNL_DBGLEVEL_CALIBRATION (0x0010) ///< mod calibration 202 203 //------------------------------------------------------------------------------------------------- 204 // Type and Structure 205 //------------------------------------------------------------------------------------------------- 206 /// Define return value of MApi_PNL 207 typedef enum 208 { 209 E_APIPNL_FAIL = 0, 210 E_APIPNL_OK = 1, 211 E_APIPNL_GET_BASEADDR_FAIL, ///< get base address failed when initialize panel driver 212 E_APIPNL_OBTAIN_MUTEX_FAIL, ///< obtain mutex timeout when calling this function 213 } APIPNL_Result; 214 215 /// Define aspect ratio 216 typedef enum 217 { 218 E_PNL_ASPECT_RATIO_4_3 = 0, ///< set aspect ratio to 4 : 3 219 E_PNL_ASPECT_RATIO_WIDE, ///< set aspect ratio to 16 : 9 220 E_PNL_ASPECT_RATIO_OTHER, ///< resvered for other aspect ratio other than 4:3/ 16:9 221 }E_PNL_ASPECT_RATIO; 222 223 /// Define the panel gamma precision type 224 typedef enum 225 { 226 E_APIPNL_GAMMA_10BIT = 0, ///< Gamma Type of 10bit 227 E_APIPNL_GAMMA_12BIT, ///< Gamma Type of 12bit 228 E_APIPNL_GAMMA_ALL ///< The library can support all mapping mode 229 } APIPNL_GAMMA_TYPE; 230 231 /// Define Gamma type 232 typedef enum 233 { 234 E_APIPNL_GAMMA_8BIT_MAPPING = 0, ///< mapping 1024 to 256 gamma entries 235 E_APIPNL_GAMMA_10BIT_MAPPING, ///< mapping 1024 to 1024 gamma entries 236 E_APIPNL_GAMMA_ALL_MAPPING ///< the library can map to any entries 237 } APIPNL_GAMMA_MAPPEING_MODE; ///< samping mode for GAMMA correction 238 239 /// Define The dimming control flag. when use with setter/getter, it will set/get MIN/MAX/Current value 240 typedef enum 241 { 242 E_APIPNL_DIMMING_MIN = 0, ///< Indicate to Get/Set Min Dimming value. 243 E_APIPNL_DIMMING_CURRENT , ///< Indicate to Get/Set Current Dimming value. 244 E_APIPNL_DIMMING_MAX , ///< Indicate to Get/Set Max Dimming value. 245 } APIPNL_DIMMING_CTRL; 246 247 /// Define PANEL Signaling Type 248 typedef enum 249 { 250 LINK_TTL, ///< TTL type 251 LINK_LVDS, ///< LVDS type 252 LINK_RSDS, ///< RSDS type 253 LINK_MINILVDS, ///< TCON 254 LINK_ANALOG_MINILVDS, ///< Analog TCON 255 LINK_DIGITAL_MINILVDS, ///< Digital TCON 256 LINK_MFC, ///< Ursa (TTL output to Ursa) 257 LINK_DAC_I, ///< DAC output 258 LINK_DAC_P, ///< DAC output 259 LINK_PDPLVDS, ///< For PDP(Vsync use Manually MODE) 260 LINK_EXT, /// EXT LPLL TYPE 261 }APIPNL_LINK_TYPE; 262 263 /// Define PANEL Signaling Type 264 typedef enum 265 { 266 // M10 New Panel Type 267 LINK_EPI34_8P = LINK_EXT, /// 10 268 LINK_EPI28_8P, /// 11 269 LINK_EPI34_6P, /// 12 270 LINK_EPI28_6P, /// 13 271 272 ///LINK_MINILVDS_6P_2L, /// replace this with LINK_MINILVDS 273 LINK_MINILVDS_5P_2L, /// 14 274 LINK_MINILVDS_4P_2L, /// 15 275 LINK_MINILVDS_3P_2L, /// 16 276 LINK_MINILVDS_6P_1L, /// 17 277 LINK_MINILVDS_5P_1L, /// 18 278 LINK_MINILVDS_4P_1L, /// 19 279 LINK_MINILVDS_3P_1L, /// 20 280 281 LINK_HS_LVDS, /// 21 282 LINK_HF_LVDS, /// 22 283 284 LINK_TTL_TCON, /// 23 285 LINK_MINILVDS_2CH_3P_8BIT, // 2 channel, 3 pair, 8 bits ///24 286 LINK_MINILVDS_2CH_4P_8BIT, // 2 channel, 4 pair, 8 bits ///25 287 LINK_MINILVDS_2CH_5P_8BIT, // 2 channel, 5 pair, 8 bits ///26 288 LINK_MINILVDS_2CH_6P_8BIT, // 2 channel, 6 pair, 8 bits ///27 289 290 LINK_MINILVDS_1CH_3P_8BIT, // 1 channel, 3 pair, 8 bits ///28 291 LINK_MINILVDS_1CH_4P_8BIT, // 1 channel, 4 pair, 8 bits ///29 292 LINK_MINILVDS_1CH_5P_8BIT, // 1 channel, 5 pair, 8 bits ///30 293 LINK_MINILVDS_1CH_6P_8BIT, // 1 channel, 6 pair, 8 bits ///31 294 295 LINK_MINILVDS_2CH_3P_6BIT, // 2 channel, 3 pari, 6 bits ///32 296 LINK_MINILVDS_2CH_4P_6BIT, // 2 channel, 4 pari, 6 bits ///33 297 LINK_MINILVDS_2CH_5P_6BIT, // 2 channel, 5 pari, 6 bits ///34 298 LINK_MINILVDS_2CH_6P_6BIT, // 2 channel, 6 pari, 6 bits ///35 299 300 LINK_MINILVDS_1CH_3P_6BIT, // 1 channel, 3 pair, 6 bits ///36 301 LINK_MINILVDS_1CH_4P_6BIT, // 1 channel, 4 pair, 6 bits ///37 302 LINK_MINILVDS_1CH_5P_6BIT, // 1 channel, 5 pair, 6 bits ///38 303 LINK_MINILVDS_1CH_6P_6BIT, // 1 channel, 6 pair, 6 bits ///39 304 LINK_HDMI_BYPASS_MODE, // HDMI Bypass Mode///40 305 306 LINK_EPI34_2P, /// 41 307 LINK_EPI34_4P, /// 42 308 LINK_EPI28_2P, /// 43 309 LINK_EPI28_4P, /// 44 310 311 LINK_VBY1_10BIT_4LANE, ///45 312 LINK_VBY1_10BIT_2LANE, ///46 313 LINK_VBY1_10BIT_1LANE, ///47 314 LINK_VBY1_8BIT_4LANE, ///48 315 LINK_VBY1_8BIT_2LANE, ///49 316 LINK_VBY1_8BIT_1LANE, ///50 317 318 LINK_VBY1_10BIT_8LANE, ///51 319 LINK_VBY1_8BIT_8LANE, ///52 320 321 LINK_EPI28_12P, ///53 322 323 LINK_HS_LVDS_2CH_BYPASS_MODE, //54 324 LINK_VBY1_8BIT_4LANE_BYPASS_MODE, //55 325 LINK_VBY1_10BIT_4LANE_BYPASS_MODE, //56 326 LINK_EPI24_12P, ///57 327 LINK_VBY1_10BIT_16LANE, ///58 328 LINK_VBY1_8BIT_16LANE, ///59 329 LINK_USI_T_8BIT_12P, ///60 330 LINK_USI_T_10BIT_12P, ///61 331 LINK_ISP_8BIT_12P, ///62 332 LINK_ISP_8BIT_6P_D, ///63 333 334 #if defined(UFO_PUBLIC_HEADER_500) 335 LINK_ISP_8BIT_8P, ///64 336 LINK_ISP_10BIT_12P, ///65 337 LINK_ISP_10BIT_6P_D, ///66 338 LINK_ISP_10BIT_8P, ///67 339 LINK_EPI24_16P, ///68 340 LINK_EPI28_16P, ///69 341 LINK_EPI28_6P_EPI3G, ///70 342 LINK_EPI28_8P_EPI3G, ///71 343 #endif 344 LINK_CMPI24_10BIT_12P, ///72 345 LINK_CMPI27_8BIT_12P, ///73 346 }APIPNL_LINK_EXT_TYPE; 347 348 /// Define power on and off timing order. 349 typedef enum 350 { 351 E_APIPNL_POWER_TIMING_1 , ///< Timing order 1 352 E_APIPNL_POWER_TIMING_2 , ///< Timing order 2 353 E_APIPNL_POWER_TIMING_NA = 0xFFFF, ///< Reserved Timing order 354 } APIPNL_POWER_TIMING_SEQ; 355 356 /// Define TI bit mode 357 typedef enum 358 { 359 TI_10BIT_MODE = 0, 360 TI_8BIT_MODE = 2, 361 TI_6BIT_MODE = 3, 362 } APIPNL_TIBITMODE; 363 364 /// Define which panel output timing change mode is used to change VFreq for same panel 365 typedef enum 366 { 367 E_PNL_CHG_DCLK = 0, ///<change output DClk to change Vfreq. 368 E_PNL_CHG_HTOTAL = 1, ///<change H total to change Vfreq. 369 E_PNL_CHG_VTOTAL = 2, ///<change V total to change Vfreq. 370 } APIPNL_OUT_TIMING_MODE; 371 372 /// Define panel output format bit mode 373 typedef enum 374 { 375 OUTPUT_10BIT_MODE = 0,//default is 10bit, becasue 8bit panel can use 10bit config and 8bit config. 376 OUTPUT_6BIT_MODE = 1, //but 10bit panel(like PDP panel) can only use 10bit config. 377 OUTPUT_8BIT_MODE = 2, //and some PDA panel is 6bit. 378 } APIPNL_OUTPUTFORMAT_BITMODE; 379 380 /// Panel Api information 381 typedef struct __attribute__((packed)) 382 { 383 APIPNL_GAMMA_TYPE eSupportGammaType; ///< Gamma type supported by apiPNL 384 } PNL_ApiInfo; 385 386 /// Panel status 387 typedef struct __attribute__((packed)) 388 { 389 MS_BOOL bPanel_Initialized; ///< panel initialized or not 390 MS_BOOL bPanel_Enabled; ///< panel enabled or not, if enabled, you can see OSD/Video 391 } PNL_ApiStatus; 392 393 /// Panel status 394 typedef struct DLL_PACKED 395 { 396 MS_U32 u32ApiStatusEx_Version;///<Version of current structure. Please always set to "API_PNLSTATUS_EX_VERSION" as input 397 MS_U16 u16ApiStatusEX_Length; ///<Length of this structure, u16PanelInfoEX_Length=sizeof(XC_PANEL_INFO_EX) 398 399 MS_BOOL bPNLInitialize; ///< panel initialized or not 400 MS_BOOL bPNLEnable; ///< panel enabled or not, if enabled, you can see OSD/Video 401 MS_U16 u16VTotal; ///< Output vertical total 402 MS_U16 u16DEVStart; ///< Output DE vertical start 403 MS_U16 u16DEVEnd; ///< Output DE Vertical end 404 MS_U16 u16VSyncStart; ///< Output VSync start 405 MS_U16 u16VSyncEnd; ///< Output VSync end 406 MS_U16 u16HTotal; ///< Output horizontal total 407 MS_U16 u16DEHStart; ///< Output DE horizontal start 408 MS_U16 u16DEHEnd; ///< Output DE horizontal end 409 MS_U16 u16HSyncWidth; ///< Output HSync width 410 MS_BOOL bIsPanelManualVysncMode; ///< enable manuel V sync control 411 MS_BOOL bInterlaceOutput; ///< enable Scaler Interlace output 412 MS_BOOL bYUVOutput; ///< enable Scaler YUV output 413 } PNL_ApiExtStatus; 414 415 /// Panel output control, must be called before g_IPanel.Enable(), otherwise will output after called g_IPanel.Enable() 416 typedef enum 417 { 418 E_APIPNL_OUTPUT_NO_OUTPUT = 0, ///< even called g_IPanel.Enable(TRUE), still no physical output 419 E_APIPNL_OUTPUT_CLK_ONLY, ///< after called g_IPanel.Enable(TRUE), will output clock only 420 E_APIPNL_OUTPUT_DATA_ONLY, ///< after called g_IPanel.Enable(TRUE), will output data only 421 E_APIPNL_OUTPUT_CLK_DATA, ///< after called g_IPanel.Enable(TRUE), will output clock and data 422 } APIPNL_OUTPUT_MODE; 423 424 /// Define Panel MISC control index 425 /// please enum use BIT0 = 0x01, BIT1 = 0x02, BIT2 = 0x04, BIT3 = 0x08, BIT4 = 0x10, 426 typedef enum 427 { 428 E_APIPNL_MISC_CTRL_OFF = 0x0000, 429 E_APIPNL_MISC_MFC_ENABLE = 0x0001, 430 E_APIPNL_MISC_SKIP_CALIBRATION = 0x0002, 431 E_APIPNL_MISC_GET_OUTPUT_CONFIG = 0x0004, 432 E_APIPNL_MISC_SKIP_ICONVALUE = 0x0008, 433 434 E_APIPNL_MISC_MFC_MCP = 0x0010, // bit 4 435 E_APIPNL_MISC_MFC_ABChannel = 0x0020, // bit5 436 E_APIPNL_MISC_MFC_ACChannel = 0x0040, // bit 6 437 E_APIPNL_MISC_MFC_ENABLE_60HZ = 0x0080, // bit 7, for 60Hz Panel 438 E_APIPNL_MISC_MFC_ENABLE_240HZ = 0x0100, // bit 8, for 240Hz Panel 439 E_APIPNL_MISC_4K2K_ENABLE_60HZ = 0x0200, // bit 9, for 4k2K 60Hz Panel 440 E_APIPNL_MISC_SKIP_T3D_CONTROL = 0x0400, // bit 10, for T3D control 441 E_APIPNL_MISC_PIXELSHIFT_ENABLE = 0x0800,// bit 11, enable pixel shift 442 E_APIPNL_MISC_ENABLE_MANUAL_VSYNC_CTRL = 0x8000, // enable manual V sync control 443 } APIPNL_MISC; 444 445 typedef enum 446 { 447 E_APIPNL_TCON_TAB_TYPE_GENERAL, 448 E_APIPNL_TCON_TAB_TYPE_GPIO, 449 E_APIPNL_TCON_TAB_TYPE_SCALER, 450 E_APIPNL_TCON_TAB_TYPE_MOD, 451 E_APIPNL_TCON_TAB_TYPE_GAMMA, 452 E_APIPNL_TCON_TAB_TYPE_POWER_SEQUENCE_ON, 453 E_APIPNL_TCON_TAB_TYPE_POWER_SEQUENCE_OFF, 454 E_APIPNL_TCON_TAB_TYPE_PANEL_INFO, 455 }APIPNL_TCON_TAB_TYPE; 456 457 typedef struct 458 { 459 #if !defined(CONFIG_MBOOT) 460 MS_U8 u8SubTableType; 461 MS_U16 u16RegCount; 462 MS_U8 u8RegType; 463 MS_U16 u16RegListOffset; 464 #endif 465 MS_U8* pData; 466 }ST_PNL_TCON_PANEL; 467 468 typedef enum 469 { 470 APIPNL_OUTPUT_CHANNEL_ORDER_DEFAULT, 471 APIPNL_OUTPUT_CHANNEL_ORDER_USER, 472 }APIPNL_OUTPUT_CHANNEL_ORDER; 473 474 /// Define PNL local dimming type 475 typedef enum 476 { 477 E_STATUS_SUCCESS = 0, 478 E_STATUS_FAIL = 1, 479 E_STATUS_NOT_SUPPORTED, 480 E_STATUS_PARAMETER_ERROR, 481 } E_PNL_LOCALDIMMING_RETURN_TYPE; 482 483 typedef enum 484 { 485 E_LED_DEVICE_SEC_75INCH_DIRECT_180 = 0, 486 E_LED_DEVICE_SEC_85INCH_DIRECT_240 = 1, 487 E_LED_DEVICE_AMT_65INCH_DIRECT_120, 488 E_PNL_LOCALDIMMING_TYPE_NUM, 489 E_PNL_LOCALDIMMING_TYPE_MAX = E_PNL_LOCALDIMMING_TYPE_NUM, 490 } E_PNL_LOCALDIMMING_TYPE; 491 492 typedef struct _stPNL_Init_LocalDimming_Parameters 493 { 494 E_PNL_LOCALDIMMING_RETURN_TYPE ePnlLDType; 495 MS_U32 u32Adrress; 496 MS_U16 u16Size; 497 MS_U16 u16PnlWidth; 498 MS_U16 u16PnlHeight; 499 } stPNL_Init_LocalDimming_Parameters, *pstPNL_Init_LocalDimming_Parameters; 500 501 /** 502 * Represent a panel interface. 503 * 504 * Provide panel attributes, and some panel basic functions 505 */ 506 typedef struct 507 { 508 // 509 // Data 510 // 511 const char* ( * const Name ) ( void ); // /< Panel name 512 MS_U16 ( * const HStart ) ( void ); // /< DE H start 513 MS_U16 ( * const VStart ) ( void ); // /< DE V start 514 MS_U16 ( * const Width ) ( void ); // /< DE H width 515 MS_U16 ( * const Height ) ( void ); // /< DE V height 516 MS_U16 ( * const HTotal ) ( void ); // /< Htotal 517 MS_U16 ( * const VTotal ) ( void ); // /< Vtotal 518 MS_U8 ( * const HSynWidth ) ( void ); // /< H sync width 519 MS_U8 ( * const HSynBackPorch ) ( void ); // /< H sync back porch 520 MS_U8 ( * const VSynBackPorch ) ( void ); // /< V sync back porch 521 MS_U16 ( * const DefaultVFreq ) ( void ); // /< deault V Freq 522 MS_U8 ( * const LPLL_Mode ) ( void ); // /< 0: single, 1: dual mode 523 MS_U8 ( * const LPLL_Type ) ( void ); // /< 0: LVDS, 1: RSDS 524 E_PNL_ASPECT_RATIO ( * const AspectRatio ) ( void ); // /< please refer to E_PNL_ASPECT_RATIO 525 MS_U32 ( * const MinSET ) ( void ); // / < MinSET 526 MS_U32 ( * const MaxSET ) ( void ); // / < MaxSET 527 528 // 529 // Manipulation 530 // 531 /// @brief Set Span-Spectrum-Control 532 /// @param u16Fmodulation IN:SSC_SPAN_PERIOD 533 /// @param u16Rdeviation IN:SSC_STEP_PERCENT 534 /// @param bEnable IN:Enable / Disable 535 /// 536 void ( * const SetSSC ) ( MS_U16 u16Fmodulation, MS_U16 u16Rdeviation, MS_BOOL bEnable ) ; 537 void ( * const SetOSDSSC ) ( MS_U16 u16Fmodulation, MS_U16 u16Rdeviation, MS_BOOL bEnable ) ; 538 539 /// @brief Enable panel's output, but "not include the function to turn VCC on". 540 /// @param bEnable IN:Enable / Disable 541 MS_BOOL ( * const Enable ) ( MS_BOOL bEnable ) ; 542 543 /// @brief Set Gamma correction table. 544 /// @param eGammaType Resolution of gamma table 545 /// @param pu8GammaTab gamma table 546 /// @param u16NumOfLevel T2: 256, T3: can be 256 / 1024 levels 547 MS_BOOL ( * const SetGammaTbl ) ( APIPNL_GAMMA_TYPE eGammaType, 548 MS_U8* pu8GammaTab[3], 549 APIPNL_GAMMA_MAPPEING_MODE Gamma_Map_Mode ) ; 550 551 /// @brief Get Gamma correction table. 552 /// @return A Gamma table used currently. 553 MS_U8** ( * const GammaTab ) ( void ) ; 554 555 /// @brief printout panel data, width, height, htt, vtt etc. 556 void ( * const Dump ) ( void ) ; 557 558 /// @brief Get Min/Max/Current Dimming Value according to the given flag. 559 /// @param max_min_setting Flag of Min / Max / Current Dimming Value.s 560 MS_U8 ( * const DimCtrl ) ( APIPNL_DIMMING_CTRL max_min_setting ) ; 561 562 /// @brief Query Power On Timing with given power on timing order.\n 563 /// @param power_on_sequence_timing order 564 MS_U16 ( * const OnTiming ) ( APIPNL_POWER_TIMING_SEQ power_on_sequence_timing ) ; 565 566 /// @brief Query Power Off Timing with given power on timing order.\n 567 /// @param power_off_sequence_timing order 568 MS_U16 ( * const OffTiming ) ( APIPNL_POWER_TIMING_SEQ power_off_sequence_timing ) ; 569 570 // 571 // Custimized methods, can be provided by clinets. 572 // 573 void ( *TurnBackLightOn ) ( MS_BOOL bEnable ) ; 574 APIPNL_OUT_TIMING_MODE 575 ( * const OutTimingMode )( void ); ///<output timing mode 576 577 ///@brief Set Gamma value 578 ///@param u8Channel R/G/B channel, 0->R, 1->G, 2->B 579 ///@param u16Offset The address of Gamma value 580 ///@param u16GammaValue Gamma value 581 MS_BOOL (* const SetGammaValue)(MS_U8 u8Channel, MS_U16 u16Offset, MS_U16 u16GammaValue); 582 583 /// @brief Get Gamma correction table. 584 /// @param eGammaType Resolution of gamma table 585 /// @param pu8GammaTab gamma table 586 /// @param Gamma_Map_Mode 8Bit mapping or 10Bit mapping 587 MS_BOOL ( * const GetGammaTbl ) ( APIPNL_GAMMA_TYPE eGammaType, 588 MS_U8* pu8GammaTab[3], 589 APIPNL_GAMMA_MAPPEING_MODE Gamma_Map_Mode ) ; 590 }XC_PNL_OBJ; 591 592 /// A panel struct type used to specify the panel attributes, and settings from Board layout 593 typedef struct __attribute__((packed)) 594 { 595 const char *m_pPanelName; ///< PanelName 596 #if !(defined(UFO_PUBLIC_HEADER_212) || defined(UFO_PUBLIC_HEADER_300)) 597 #if !defined (__aarch64__) 598 MS_U32 u32AlignmentDummy0; 599 #endif 600 #endif 601 // 602 // Panel output 603 // 604 MS_U8 m_bPanelDither :1; ///< PANEL_DITHER, keep the setting 605 APIPNL_LINK_TYPE m_ePanelLinkType :4; ///< PANEL_LINK 606 607 /////////////////////////////////////////////// 608 // Board related setting 609 /////////////////////////////////////////////// 610 MS_U8 m_bPanelDualPort :1; ///< VOP_21[8], MOD_4A[1], PANEL_DUAL_PORT, refer to m_bPanelDoubleClk 611 MS_U8 m_bPanelSwapPort :1; ///< MOD_4A[0], PANEL_SWAP_PORT, refer to "LVDS output app note" A/B channel swap 612 MS_U8 m_bPanelSwapOdd_ML :1; ///< PANEL_SWAP_ODD_ML 613 MS_U8 m_bPanelSwapEven_ML :1; ///< PANEL_SWAP_EVEN_ML 614 MS_U8 m_bPanelSwapOdd_RB :1; ///< PANEL_SWAP_ODD_RB 615 MS_U8 m_bPanelSwapEven_RB :1; ///< PANEL_SWAP_EVEN_RB 616 617 MS_U8 m_bPanelSwapLVDS_POL :1; ///< MOD_40[5], PANEL_SWAP_LVDS_POL, for differential P/N swap 618 MS_U8 m_bPanelSwapLVDS_CH :1; ///< MOD_40[6], PANEL_SWAP_LVDS_CH, for pair swap 619 MS_U8 m_bPanelPDP10BIT :1; ///< MOD_40[3], PANEL_PDP_10BIT ,for pair swap 620 MS_U8 m_bPanelLVDS_TI_MODE :1; ///< MOD_40[2], PANEL_LVDS_TI_MODE, refer to "LVDS output app note" 621 622 /////////////////////////////////////////////// 623 // For TTL Only 624 /////////////////////////////////////////////// 625 MS_U8 m_ucPanelDCLKDelay; ///< PANEL_DCLK_DELAY 626 MS_U8 m_bPanelInvDCLK :1; ///< MOD_4A[4], PANEL_INV_DCLK 627 MS_U8 m_bPanelInvDE :1; ///< MOD_4A[2], PANEL_INV_DE 628 MS_U8 m_bPanelInvHSync :1; ///< MOD_4A[12], PANEL_INV_HSYNC 629 MS_U8 m_bPanelInvVSync :1; ///< MOD_4A[3], PANEL_INV_VSYNC 630 631 /////////////////////////////////////////////// 632 // Output driving current setting 633 /////////////////////////////////////////////// 634 // driving current setting (0x00=4mA, 0x01=6mA, 0x02=8mA, 0x03=12mA) 635 MS_U8 m_ucPanelDCKLCurrent; ///< define PANEL_DCLK_CURRENT 636 MS_U8 m_ucPanelDECurrent; ///< define PANEL_DE_CURRENT 637 MS_U8 m_ucPanelODDDataCurrent; ///< define PANEL_ODD_DATA_CURRENT 638 MS_U8 m_ucPanelEvenDataCurrent; ///< define PANEL_EVEN_DATA_CURRENT 639 640 /////////////////////////////////////////////// 641 // panel on/off timing 642 /////////////////////////////////////////////// 643 MS_U16 m_wPanelOnTiming1; ///< time between panel & data while turn on power 644 MS_U16 m_wPanelOnTiming2; ///< time between data & back light while turn on power 645 MS_U16 m_wPanelOffTiming1; ///< time between back light & data while turn off power 646 MS_U16 m_wPanelOffTiming2; ///< time between data & panel while turn off power 647 648 /////////////////////////////////////////////// 649 // panel timing spec. 650 /////////////////////////////////////////////// 651 // sync related 652 MS_U8 m_ucPanelHSyncWidth; ///< VOP_01[7:0], PANEL_HSYNC_WIDTH 653 MS_U8 m_ucPanelHSyncBackPorch; ///< PANEL_HSYNC_BACK_PORCH, no register setting, provide value for query only 654 655 ///< not support Manuel VSync Start/End now 656 ///< VOP_02[10:0] VSync start = Vtt - VBackPorch - VSyncWidth 657 ///< VOP_03[10:0] VSync end = Vtt - VBackPorch 658 MS_U8 m_ucPanelVSyncWidth; ///< define PANEL_VSYNC_WIDTH 659 MS_U8 m_ucPanelVBackPorch; ///< define PANEL_VSYNC_BACK_PORCH 660 661 // DE related 662 MS_U16 m_wPanelHStart; ///< VOP_04[11:0], PANEL_HSTART, DE H Start (PANEL_HSYNC_WIDTH + PANEL_HSYNC_BACK_PORCH) 663 MS_U16 m_wPanelVStart; ///< VOP_06[11:0], PANEL_VSTART, DE V Start 664 MS_U16 m_wPanelWidth; ///< PANEL_WIDTH, DE width (VOP_05[11:0] = HEnd = HStart + Width - 1) 665 MS_U16 m_wPanelHeight; ///< PANEL_HEIGHT, DE height (VOP_07[11:0], = Vend = VStart + Height - 1) 666 667 // DClk related 668 MS_U16 m_wPanelMaxHTotal; ///< PANEL_MAX_HTOTAL. Reserved for future using. 669 MS_U16 m_wPanelHTotal; ///< VOP_0C[11:0], PANEL_HTOTAL 670 MS_U16 m_wPanelMinHTotal; ///< PANEL_MIN_HTOTAL. Reserved for future using. 671 672 MS_U16 m_wPanelMaxVTotal; ///< PANEL_MAX_VTOTAL. Reserved for future using. 673 MS_U16 m_wPanelVTotal; ///< VOP_0D[11:0], PANEL_VTOTAL 674 MS_U16 m_wPanelMinVTotal; ///< PANEL_MIN_VTOTAL. Reserved for future using. 675 676 MS_U8 m_dwPanelMaxDCLK; ///< PANEL_MAX_DCLK. Reserved for future using. 677 MS_U8 m_dwPanelDCLK; ///< LPLL_0F[23:0], PANEL_DCLK ,{0x3100_10[7:0], 0x3100_0F[15:0]} 678 MS_U8 m_dwPanelMinDCLK; ///< PANEL_MIN_DCLK. Reserved for future using. 679 680 ///< spread spectrum 681 MS_U16 m_wSpreadSpectrumStep; ///< move to board define, no use now. 682 MS_U16 m_wSpreadSpectrumSpan; ///< move to board define, no use now. 683 684 MS_U8 m_ucDimmingCtl; ///< Initial Dimming Value 685 MS_U8 m_ucMaxPWMVal; ///< Max Dimming Value 686 MS_U8 m_ucMinPWMVal; ///< Min Dimming Value 687 688 MS_U8 m_bPanelDeinterMode :1; ///< define PANEL_DEINTER_MODE, no use now 689 E_PNL_ASPECT_RATIO m_ucPanelAspectRatio; ///< Panel Aspect Ratio, provide information to upper layer application for aspect ratio setting. 690 /* 691 * 692 * Board related params 693 * 694 * If a board ( like BD_MST064C_D01A_S ) swap LVDS TX polarity 695 * : This polarity swap value = 696 * (LVDS_PN_SWAP_H<<8) | LVDS_PN_SWAP_L from board define, 697 * Otherwise 698 * : The value shall set to 0. 699 */ 700 MS_U16 m_u16LVDSTxSwapValue; 701 APIPNL_TIBITMODE m_ucTiBitMode; ///< MOD_4B[1:0], refer to "LVDS output app note" 702 APIPNL_OUTPUTFORMAT_BITMODE m_ucOutputFormatBitMode; 703 704 MS_U8 m_bPanelSwapOdd_RG :1; ///< define PANEL_SWAP_ODD_RG 705 MS_U8 m_bPanelSwapEven_RG :1; ///< define PANEL_SWAP_EVEN_RG 706 MS_U8 m_bPanelSwapOdd_GB :1; ///< define PANEL_SWAP_ODD_GB 707 MS_U8 m_bPanelSwapEven_GB :1; ///< define PANEL_SWAP_EVEN_GB 708 709 /** 710 * Others 711 */ 712 MS_U8 m_bPanelDoubleClk :1; ///< LPLL_03[7], define Double Clock ,LVDS dual mode 713 MS_U32 m_dwPanelMaxSET; ///< define PANEL_MAX_SET 714 MS_U32 m_dwPanelMinSET; ///< define PANEL_MIN_SET 715 APIPNL_OUT_TIMING_MODE m_ucOutTimingMode; ///<Define which panel output timing change mode is used to change VFreq for same panel 716 MS_U8 m_bPanelNoiseDith :1; ///< PAFRC mixed with noise dither disable 717 } PanelType; 718 719 //Display information 720 typedef struct DLL_PACKED 721 { 722 MS_U32 VDTOT; //Output vertical total 723 MS_U32 DEVST; //Output DE vertical start 724 MS_U32 DEVEND;//Output DE Vertical end 725 MS_U32 HDTOT;// Output horizontal total 726 MS_U32 DEHST; //Output DE horizontal start 727 MS_U32 DEHEND;// Output DE horizontal end 728 MS_BOOL bInterlaceMode; 729 MS_BOOL bYUVOutput; 730 } MS_PNL_DST_DispInfo; 731 732 //HW LVDS Reserved Bit to L/R flag Info 733 typedef struct 734 { 735 MS_U32 u32pair; // pair 0: BIT0, pair 1: BIT1, pair 2: BIT2, pair 3: BIT3, pair 4: BIT4, etc ... 736 MS_U16 u16channel; // channel A: BIT0, channel B: BIT1, 737 MS_BOOL bEnable; 738 } MS_PNL_HW_LVDSResInfo; 739 740 /// Define the initial OverDrive for XC 741 typedef struct DLL_PACKED 742 { 743 MS_U8 u8ODTbl[1056]; 744 MS_U32 u32PNL_version; ///<Version of current structure. 745 // OD frame buffer related 746 #if defined(UFO_PUBLIC_HEADER_700) 747 MS_PHY u32OD_MSB_Addr; ///<OverDrive MSB frame buffer start address, absolute without any alignment 748 #else 749 MS_PHYADDR u32OD_MSB_Addr; ///<OverDrive MSB frame buffer start address, absolute without any alignment 750 #endif 751 MS_U32 u32OD_MSB_Size; ///<OverDrive MSB frame buffer size, the unit is BYTES 752 #if defined(UFO_PUBLIC_HEADER_700) 753 MS_PHY u32OD_LSB_Addr; ///<OverDrive LSB frame buffer start address, absolute without any alignment 754 #else 755 MS_PHYADDR u32OD_LSB_Addr; ///<OverDrive LSB frame buffer start address, absolute without any alignment 756 #endif 757 MS_U32 u32OD_LSB_Size; ///<OverDrive MSB frame buffer size, the unit is BYTES 758 } MS_PNL_OD_INITDATA; 759 760 typedef struct DLL_PACKED 761 { 762 MS_U16* pu16ODTbl; 763 MS_U32 u32PNL_version; ///<Version of current structure. 764 // OD frame buffer related 765 MS_PHY u32OD_MSB_Addr; ///<OverDrive MSB frame buffer start address, absolute without any alignment 766 MS_U32 u32OD_MSB_Size; ///<OverDrive MSB frame buffer size, the unit is BYTES 767 MS_PHY u32OD_LSB_Addr; ///<OverDrive LSB frame buffer start address, absolute without any alignment 768 MS_U32 u32OD_LSB_Size; ///<OverDrive MSB frame buffer size, the unit is BYTES 769 MS_U32 u32ODTbl_Size; ///<OverDrive Table buffer size> 770 } MS_PNL_OD_SETTING; 771 772 773 typedef struct DLL_PACKED 774 { 775 MS_U16 m_u16ExpectSwingLevel; 776 MS_U8 m_u8ModCaliPairSel; 777 MS_U8 m_u8ModCaliTarget; 778 MS_S8 m_s8ModCaliOffset; 779 MS_BOOL m_bPVDD_2V5; 780 }MS_PNL_ModCaliInfo; 781 782 //------------------------------------------------------------------------------------------------- 783 //MApi_PNL_Setting enum of cmd 784 //------------------------------------------------------------------------------------------------- 785 typedef enum 786 { 787 E_PNL_MOD_PECURRENT_SETTING, 788 E_PNL_CONTROL_OUT_SWING, 789 }E_PNL_SETTING; 790 //------------------------------------------------------------------------------------------------- 791 //MApi_PNL_Setting struct of cmd 792 //------------------------------------------------------------------------------------------------- 793 typedef struct 794 { 795 MS_U16 u16Current_Level; 796 MS_U16 u16Channel_Select; 797 }ST_PNL_MOD_PECURRENT_SETTING; 798 799 typedef struct 800 { 801 MS_U16 u16Swing_Level; 802 }ST_PNL_CONTROL_OUT_SWING; 803 804 //------------------------------------------------------------------------------------------------- 805 806 //------------------------------------------------------------------------------------------------- 807 // Function and Variable 808 //------------------------------------------------------------------------------------------------- 809 810 /******************************************************************************/ 811 /* Variable */ 812 /* ****************************************************************************/ 813 /** 814 * 815 * The global interface for panel manipulation. 816 * 817 * @attention <b>Call "MApi_PNL_Init()" first before using this obj</b> 818 */ 819 extern XC_PNL_OBJ g_IPanel; 820 INTERFACE void* pu32PNLInst; 821 typedef enum 822 { 823 E_PNL_NO_OUTPUT, 824 E_PNL_CLK_ONLY, 825 E_PNL_CLK_DATA, 826 E_PNL_MAX, 827 } E_PNL_PREINIT_OPTIONS; 828 //------------------------------------------------------------------------------ 829 /// Description : Show the PNL driver version 830 /// @ingroup PNL_INTERFACE_INFO 831 /// @param ppVersion \b OUT: output PNL driver version 832 /// @return @ref APIPNL_Result 833 /// @return E_APIPNL_OK : succeed 834 /// @return E_APIPNL_FAIL : fail before timeout or illegal parameters 835 //------------------------------------------------------------------------------ 836 APIPNL_Result MApi_PNL_GetLibVer(const MSIF_Version **ppVersion); 837 838 //------------------------------------------------------------------------------ 839 /// Description : Show the PNL info 840 /// @ingroup PNL_INTERFACE_INFO 841 /// @return @ref APIPNL_Result 842 /// @return E_APIPNL_OK : succeed 843 /// @return E_APIPNL_FAIL : fail before timeout or illegal parameters 844 //------------------------------------------------------------------------------ 845 const PNL_ApiInfo * MApi_PNL_GetInfo(void); 846 847 //------------------------------------------------------------------------------ 848 /// Description : Show the PNL Status 849 /// @ingroup PNL_INTERFACE_ToBeModified 850 /// @param pPnlStatus \b IN: point of panel status 851 /// @return @ref MS_BOOL 852 //------------------------------------------------------------------------------ 853 MS_BOOL MApi_PNL_GetStatus(PNL_ApiStatus *pPnlStatus); 854 855 //------------------------------------------------------------------------------ 856 /// Description : Show the PNL Status EX 857 /// @ingroup PNL_INTERFACE_ToBeModified 858 /// @param pPnlExtStatus \b IN: point of panel status 859 /// @return @ref MS_BOOL 860 //------------------------------------------------------------------------------ 861 MS_BOOL MApi_PNL_GetStatusEx(PNL_ApiExtStatus *pPnlExtStatus); 862 863 //------------------------------------------------------------------------------ 864 /// Description : Set the PNL debug level 865 /// @ingroup PNL_INTERFACE_INFO 866 /// @param u16DbgSwitch \b IN: debug level switch 867 /// @return @ref MS_BOOL 868 //------------------------------------------------------------------------------ 869 MS_BOOL MApi_PNL_SetDbgLevel(MS_U16 u16DbgSwitch); 870 871 //------------------------------------------------------------------------------ 872 /// Description : Init the PNL IOMAP base 873 /// @ingroup PNL_INTERFACE_INIT 874 /// @return @ref MS_BOOL 875 //------------------------------------------------------------------------------ 876 MS_BOOL MApi_PNL_IOMapBaseInit(void); 877 //------------------------------------------------------------------------------ 878 /// Description : Pre Init the PNL 879 /// @ingroup PNL_INTERFACE_INIT 880 /// @param eInitParam \b IN: Init Parameter 881 /// @return @ref MS_BOOL 882 //------------------------------------------------------------------------------ 883 MS_BOOL MApi_PNL_PreInit(E_PNL_PREINIT_OPTIONS eInitParam); 884 885 //------------------------------------------------------------------------------ 886 /// Description : 887 /// This is a wrapper for \link MApi_PNL_Init_Ex \endlink. 888 /// For more information, please check MApi_PNL_Init_Ex( ). 889 /// @ingroup PNL_INTERFACE_INIT 890 //------------------------------------------------------------------------------ 891 #ifndef _API_XC_PANEL_C_ 892 #define MApi_PNL_Init(x) MApi_PNL_Init_Ex(x, (MSIF_Version){{ PNL_API_VERSION },}); 893 #endif 894 //------------------------------------------------------------------------------ 895 /// \b Description : \n 896 /// In order to make panel inited and working properly according to panel spec, such as Htotal, Vtotal..etc \n 897 /// We have to pass these specific panel specs to Utopia panel module by this API. 898 /// @ingroup PNL_INTERFACE_INIT 899 /// @param[in] pSelPanelType A panel struct type used to specify the panel attributes, and settings from PCB board layout 900 /// @param[in] LIBVER lib version 901 /// @return @ref MS_BOOL returns @ref TRUE for success, @ref FALSE for failure. 902 /// @par Example Code 903 /// \code 904 /// // MApi_PNL_Init_Ex example : how to pass initial panel data to panel driver. 905 /// #include <apiPNL.h> 906 /// 907 /// void main() 908 /// { 909 /// MS_BOOL bSuccess = FALSE; 910 /// 911 /// // This setting is purely virtual 912 /// // it should be adopted from panel vendors 913 /// PanelType panelSetting = { 914 /// .m_pPanelName = "MStar_Panel, 915 /// .m_bPanelDither = 1, 916 /// .m_ePanelLinkType = LINK_LVDS, 917 /// ... 918 /// ... 919 /// }; 920 /// 921 /// bSuccess = MApi_PNL_Init_Ex( &panelSetting, 922 /// (MSIF_Version){{ PNL_API_VERSION },} 923 /// ); 924 /// } 925 /// \endcode 926 //------------------------------------------------------------------------------ 927 MS_BOOL MApi_PNL_Init_Ex(PanelType *pSelPanelType, MSIF_Version LIBVER); 928 929 //------------------------------------------------------------------------------ 930 /// Description : Panel Get Config 931 /// @ingroup PNL_INTERFACE_FEATURE 932 /// @param[in] pSelPanelType A panel struct type used to specify the panel attributes, and settings from PCB board layout 933 /// @return @ref APIPNL_Result 934 //------------------------------------------------------------------------------ 935 APIPNL_Result MApi_PNL_GetConfig(PanelType *pSelPanelType); 936 937 //------------------------------------------------------------------------------ 938 /// Description : Setup the PNL output type 939 /// @ingroup PNL_INTERFACE_FEATURE 940 /// @param eOutputMode \b IN: setup output mode 941 //------------------------------------------------------------------------------ 942 void MApi_PNL_SetOutput(APIPNL_OUTPUT_MODE eOutputMode); 943 944 //------------------------------------------------------------------------------ 945 /// Description : Change the PNL type 946 /// @ingroup PNL_INTERFACE_FEATURE 947 /// @param pSelPanelType \b IN: change panel type 948 /// @return @ref MS_BOOL 949 //------------------------------------------------------------------------------ 950 MS_BOOL MApi_PNL_ChangePanelType(PanelType *pSelPanelType); 951 952 //------------------------------------------------------------------------------ 953 /// Description : Dump TCON Table 954 /// @ingroup PNL_INTERFACE_INIT 955 /// @param pTCONTable \b IN: Table 956 /// @param u8Tcontype \b IN: use APIPNL_TCON_TAB_TYPE ad input 957 /// @return @ref MS_BOOL 958 //------------------------------------------------------------------------------ 959 MS_BOOL MApi_PNL_TCONMAP_DumpTable(MS_U8 *pTCONTable, MS_U8 u8Tcontype); 960 961 //------------------------------------------------------------------------------ 962 /// Description : Control the TCON power sequence 963 /// @ingroup PNL_INTERFACE_INIT 964 /// @param pTCONTable \b IN: Table 965 /// @param bEnable \b IN: Enable Power sequence 966 /// @return @ref MS_BOOL 967 //------------------------------------------------------------------------------ 968 MS_BOOL MApi_PNL_TCONMAP_Power_Sequence(MS_U8 *pTCONTable, MS_BOOL bEnable); 969 //------------------------------------------------------------------------------ 970 /// Description : Reset the TCON counter 971 /// @ingroup PNL_INTERFACE_INIT 972 /// @param bEnable \b IN: Enable Power sequence 973 /// @return @ref MS_BOOL 974 //------------------------------------------------------------------------------ 975 void MApi_PNL_TCON_Count_Reset ( MS_BOOL bEnable ); 976 //------------------------------------------------------------------------------ 977 /// Description : Init the TCON 978 /// @ingroup PNL_INTERFACE_INIT 979 //------------------------------------------------------------------------------ 980 981 void MApi_PNL_TCON_Init( void ); 982 //------------------------------------------------------------------------------ 983 /// Description : Show the PNL Destnation info 984 /// @ingroup PNL_INTERFACE_INFO 985 /// @param pDstInfo \b IN: get destanation onfo 986 /// @param u32SizeofDstInfo \b IN: size of stucture 987 /// @return @ref MS_BOOL 988 //------------------------------------------------------------------------------ 989 MS_BOOL MApi_PNL_GetDstInfo(MS_PNL_DST_DispInfo *pDstInfo, MS_U32 u32SizeofDstInfo); 990 991 //------------------------------------------------------------------------------ 992 /// Description : Setup the PNL output swing 993 /// @ingroup PNL_INTERFACE_FEATURE 994 /// @param u16Swing_Level \b IN: setup swing value 995 /// @return @ref MS_BOOL 996 //------------------------------------------------------------------------------ 997 MS_BOOL MApi_PNL_Control_Out_Swing(MS_U16 u16Swing_Level); 998 //------------------------------------------------------------------------------ 999 /// Description : Setup the PNL output DCLK 1000 /// @ingroup PNL_INTERFACE_ToBeModified 1001 /// @param u16PanelDCLK \b IN: setup DCLK 1002 /// @param bSetDCLKEnable \b IN: enable this setting 1003 /// @return @ref MS_BOOL 1004 //------------------------------------------------------------------------------ 1005 MS_BOOL MApi_PNL_ForceSetPanelDCLK(MS_U16 u16PanelDCLK ,MS_BOOL bSetDCLKEnable ); 1006 //------------------------------------------------------------------------------ 1007 /// Description : Setup the PNL Horizontal start 1008 /// @ingroup PNL_INTERFACE_INIT 1009 /// @param u16PanelHStart \b IN: setup H start 1010 /// @param bSetHStartEnable \b IN: enable this setting 1011 /// @return @ref MS_BOOL 1012 //------------------------------------------------------------------------------ 1013 MS_BOOL MApi_PNL_ForceSetPanelHStart(MS_U16 u16PanelHStart ,MS_BOOL bSetHStartEnable); 1014 //------------------------------------------------------------------------------ 1015 /// Description : Setup the PNL Output pattern 1016 /// @ingroup PNL_INTERFACE_FEATURE 1017 /// @param bEnable \b IN: Enable output pattern 1018 /// @param u16Red \b IN: Red color 1019 /// @param u16Green \b IN: Green color 1020 /// @param u16Blue \b IN: Blue color 1021 //------------------------------------------------------------------------------ 1022 void MApi_PNL_SetOutputPattern(MS_BOOL bEnable, MS_U16 u16Red , MS_U16 u16Green, MS_U16 u16Blue); 1023 //------------------------------------------------------------------------------ 1024 /// Description : Init the MOD calibration parameter 1025 /// @ingroup PNL_INTERFACE_INIT 1026 /// @param pstModCaliInfo \b IN: setup mod calibration parameter 1027 /// @return @ref MS_BOOL 1028 //------------------------------------------------------------------------------ 1029 MS_BOOL MApi_Mod_Calibration_Setting(MS_PNL_ModCaliInfo *pstModCaliInfo); 1030 1031 //------------------------------------------------------------------------------ 1032 /// Description : Start the MOD calibration 1033 /// @ingroup PNL_INTERFACE_FEATURE 1034 /// @return @ref MS_BOOL 1035 //------------------------------------------------------------------------------ 1036 MS_BOOL MApi_Mod_Do_Calibration(void); 1037 1038 //------------------------------------------------------------------------------ 1039 /// Description : Type: This type means package. Different package maybe have different type id. 1040 /// Check board define or system configure for type id. 1041 /// @ingroup PNL_INTERFACE_INIT 1042 /// @param Type \b IN: setup LVDS output type for different board layout 1043 //------------------------------------------------------------------------------ 1044 void MApi_BD_LVDS_Output_Type(MS_U16 Type); 1045 1046 //------------------------------------------------------------------------------ 1047 /// Description : Setup the LPLL type EX 1048 /// @ingroup PNL_INTERFACE_ToBeModified 1049 /// @param eLPLL_TypeExt \b IN: setup LPLL Ext type 1050 //------------------------------------------------------------------------------ 1051 void MApi_PNL_SetLPLLTypeExt(APIPNL_LINK_EXT_TYPE eLPLL_TypeExt); 1052 1053 //------------------------------------------------------------------------------ 1054 /// Description : Init the PNL MISC config 1055 /// @ingroup PNL_INTERFACE_INIT 1056 /// @param ePNL_MISC \b IN: setup MISC control 1057 //------------------------------------------------------------------------------ 1058 void MApi_PNL_Init_MISC(APIPNL_MISC ePNL_MISC); 1059 1060 //------------------------------------------------------------------------------ 1061 /// Description : Show the PNL MISC config 1062 /// @ingroup PNL_INTERFACE_INIT 1063 /// @return @ref MS_U32 1064 //------------------------------------------------------------------------------ 1065 MS_U32 MApi_PNL_GetMiscStatus(void); 1066 1067 //------------------------------------------------------------------------------ 1068 /// Description : Setup the PNL output config by user 1069 /// @ingroup PNL_INTERFACE_INIT 1070 /// @param u32OutputCFG0_7 \b IN: setup output config channel 00~07 1071 /// @param u32OutputCFG8_15 \b IN: setup output config channel 08~15 1072 /// @param u32OutputCFG16_21 \b IN: setup output config channel 16~23 1073 //------------------------------------------------------------------------------ 1074 void MApi_PNL_MOD_OutputConfig_User(MS_U32 u32OutputCFG0_7, MS_U32 u32OutputCFG8_15, MS_U32 u32OutputCFG16_21); 1075 1076 //------------------------------------------------------------------------------ 1077 /// Description : Set channel output order 1078 /// @ingroup PNL_INTERFACE_FEATURE 1079 /// @param u8OutputOrderType \b IN: use enum of APIPNL_OUTPUT_CHANNEL_ORDER 1080 /// @param u16OutputOrder0_3 \b IN: output order of channel 0 to 3 1081 /// @param u16OutputOrder4_7 \b IN: output order of channel 4 to 7 1082 /// @param u16OutputOrder8_11 \b IN: output order of channel 8 to 11 1083 /// @param u16OutputOrder12_13 \b IN: output order of channel 12 to 13 1084 //------------------------------------------------------------------------------ 1085 void MApi_PNL_MOD_OutputChannelOrder(MS_U8 u8OutputOrderType, 1086 MS_U16 u16OutputOrder0_3, 1087 MS_U16 u16OutputOrder4_7, 1088 MS_U16 u16OutputOrder8_11, 1089 MS_U16 u16OutputOrder12_13); 1090 1091 //------------------------------------------------------------------------------ 1092 /// Description : Setup the PNL 3D LR falg 1093 /// @ingroup PNL_INTERFACE_INIT 1094 /// @param lvdsresinfo \b IN: setup LVDS reserved bit to be LR flag pin 1095 //------------------------------------------------------------------------------ 1096 void MApi_PNL_HWLVDSReservedtoLRFlag(MS_PNL_HW_LVDSResInfo lvdsresinfo); 1097 1098 //------------------------------------------------------------------------------ 1099 /// Description : Setup the PNL PVDD level 1100 /// @ingroup PNL_INTERFACE_INIT 1101 /// @param bIs2p5 \b IN: setup PVDD voltage is 2.5V or 3.3V 1102 //------------------------------------------------------------------------------ 1103 void MApi_MOD_PVDD_Power_Setting(MS_BOOL bIs2p5); 1104 1105 1106 //------------------------------------------------------------------------------ 1107 /// Description : Enable the PNL Video path SSC 1108 /// @ingroup PNL_INTERFACE_FEATURE 1109 /// @param bEnable \b IN: Enable SSC 1110 /// @return @ref APIPNL_Result 1111 //------------------------------------------------------------------------------ 1112 APIPNL_Result MApi_PNL_SetSSC_En(MS_BOOL bEnable); 1113 1114 //------------------------------------------------------------------------------ 1115 /// Description : Set panel SSC Fmodulation 1116 /// @ingroup PNL_INTERFACE_FEATURE 1117 /// @param u16Fmodulation \b IN:Fmodulation, Unit:0.1Khz 1118 /// @return @ref APIPNL_Result 1119 //------------------------------------------------------------------------------ 1120 APIPNL_Result MApi_PNL_SetSSC_Fmodulation(MS_U16 u16Fmodulation); 1121 //------------------------------------------------------------------------------ 1122 /// Description : Set panel SSC Rdeviation 1123 /// @ingroup PNL_INTERFACE_FEATURE 1124 /// @param u16Rdeviation \b IN: u16Rdeviation, Unit:1%%(1/10000) 1125 /// @return @ref APIPNL_Result 1126 //------------------------------------------------------------------------------ 1127 APIPNL_Result MApi_PNL_SetSSC_Rdeviation(MS_U16 u16Rdeviation); 1128 1129 //------------------------------------------------------------------------------ 1130 /// Description : Enable the PNL OSD path SSC 1131 /// @ingroup PNL_INTERFACE_FEATURE 1132 /// @param bEnable \b IN: Enable OSD SSC 1133 /// @return @ref APIPNL_Result 1134 //------------------------------------------------------------------------------ 1135 APIPNL_Result MApi_PNL_SetOSDSSC_En(MS_BOOL bEnable); 1136 1137 //------------------------------------------------------------------------------ 1138 /// Description : Set panel OSD SSC Fmodulation 1139 /// @ingroup PNL_INTERFACE_FEATURE 1140 /// @param u16Fmodulation \b IN:Fmodulation, Unit:0.1Khz 1141 /// @return @ref APIPNL_Result 1142 //------------------------------------------------------------------------------ 1143 APIPNL_Result MApi_PNL_SetOSDSSC_Fmodulation(MS_U16 u16Fmodulation); 1144 1145 //------------------------------------------------------------------------------ 1146 /// Description : Set panel OSD SSC Rdeviation 1147 /// @ingroup PNL_INTERFACE_FEATURE 1148 /// @param u16Rdeviation \b IN: u16Rdeviation, Unit:1%%(1/10000) 1149 /// @return TRUE --OK FALSE 1150 //------------------------------------------------------------------------------ 1151 APIPNL_Result MApi_PNL_SetOSDSSC_Rdeviation(MS_U16 u16Rdeviation); 1152 1153 //------------------------------------------------------------------------------------------------- 1154 /// Description : skip the timing change 1155 /// @ingroup PNL_INTERFACE_INIT 1156 /// @param bSetModeOn \b IN: TRUE: when set mode on t; FALSE: when set mode off 1157 /// @return E_APIPNL_OK or E_APIPNL_FAIL 1158 //------------------------------------------------------------------------------------------------- 1159 1160 APIPNL_Result MApi_PNL_SkipTimingChange(MS_BOOL bFlag); 1161 1162 //------------------------------------------------------------------------------------------------- 1163 /// Description : Set Pre Set Mode On 1164 /// @ingroup PNL_INTERFACE_INIT 1165 /// @param bSetModeOn \b IN: TRUE: when set mode on t; FALSE: when set mode off 1166 /// @return E_APIPNL_OK or E_APIPNL_FAIL 1167 //------------------------------------------------------------------------------------------------- 1168 APIPNL_Result MApi_PNL_PreSetModeOn(MS_BOOL bSetModeOn); 1169 1170 //------------------------------------------------------------------------------------------------- 1171 /// Description : Initialize OverDrive 1172 /// @ingroup PNL_INTERFACE_INIT 1173 /// @param pPNL_ODInitData \b IN: the Initialized Data 1174 /// @param u32ODInitDataLen \b IN: the length of the initialized data 1175 /// @return E_APIPNL_OK or E_APIPNL_FAIL 1176 //------------------------------------------------------------------------------------------------- 1177 APIPNL_Result MApi_PNL_OverDriver_Init(MS_PNL_OD_INITDATA *pPNL_ODInitData, MS_U32 u32ODInitDataLen); 1178 1179 //------------------------------------------------------------------------------------------------- 1180 /// Description : Initialize OverDrive 1181 /// @ingroup PNL_INTERFACE_INIT 1182 /// @param pPNL_ODSetting \b IN: the Initialized Data 1183 /// @param u32ODInitDataLen \b IN: the length of the initialized data 1184 /// @return E_APIPNL_OK or E_APIPNL_FAIL 1185 //------------------------------------------------------------------------------------------------- 1186 APIPNL_Result SYMBOL_WEAK MApi_PNL_OverDriver_Setting(MS_PNL_OD_SETTING *pPNL_ODSetting, MS_U32 u32ODInitDataLen); 1187 //------------------------------------------------------------------------------------------------- 1188 /// Description : OverDrive Enable 1189 /// @ingroup PNL_INTERFACE_FEATURE 1190 /// @param bEnable \b IN: TRUE: Enable OverDrive; FALSE: Disable OverDrive 1191 /// @return E_APIPNL_OK or E_APIPNL_FAIL 1192 //------------------------------------------------------------------------------------------------- 1193 APIPNL_Result MApi_PNL_OverDriver_Enable(MS_BOOL bEnable); 1194 1195 1196 //------------------------------------------------------------------------------------------------- 1197 /// Description : Get TCON capability 1198 /// @ingroup PNL_INTERFACE_INFO 1199 /// @return MS_BOOL 1200 //------------------------------------------------------------------------------------------------- 1201 MS_BOOL MApi_PNL_Get_TCON_Capability(void); 1202 1203 1204 //------------------------------------------------------------------------------------------------- 1205 /// Description : Set FRC MOD pair swap 1206 /// @ingroup PNL_INTERFACE_FEATURE 1207 /// @param u32Polarity \b IN: u32Polarity, (d:c:b:a)=([15:14],[13:12],[11:10],[9:8]) => (10,00,11,01), => (2,0,3,1) 1208 //------------------------------------------------------------------------------------------------- 1209 void MApi_PNL_SetPairSwap(MS_U32 u32Polarity); 1210 1211 //------------------------------------------------------------------------------------------------- 1212 /// Description : Set Ext LPLL type 1213 /// @ingroup PNL_INTERFACE_ToBeModified 1214 /// @param u16Ext_lpll_type \b IN: ldHz = Htt*Vtt*Vfreq 1215 //------------------------------------------------------------------------------------------------- 1216 void MApi_PNL_SetExt_LPLL_Type(MS_U16 u16Ext_lpll_type); 1217 1218 //------------------------------------------------------------------------------------------------- 1219 /// Description : Cal Ext LPLL Set by DCLK 1220 /// @ingroup PNL_INTERFACE_FEATURE 1221 /// @param ldHz \b IN: ldHz = Htt*Vtt*Vfreq 1222 //------------------------------------------------------------------------------------------------- 1223 void MApi_PNL_CalExtLPLLSETbyDClk(MS_U32 ldHz); 1224 1225 //------------------------------------------------------------------------------------------------- 1226 /// Description : Enable Internal Termination for Urania, disable it for others case 1227 /// @ingroup PNL_INTERFACE_FEATURE 1228 /// @param bEnable \b IN: Enable or Disable 1229 /// @return TRUE or FALSE 1230 //------------------------------------------------------------------------------------------------- 1231 MS_BOOL MApi_PNL_EnableInternalTermination(MS_BOOL bEnable); 1232 1233 1234 //------------------------------------------------------------------------------------------------- 1235 /// Description : Set power state 1236 /// @ingroup PNL_INTERFACE_FEATURE 1237 /// @param ePowerState \b IN: power state 1238 /// @return MS_U32 1239 //------------------------------------------------------------------------------------------------- 1240 MS_U32 MApi_PNL_SetPowerState(EN_POWER_MODE ePowerState); 1241 1242 1243 ////////////////////////////////////////////// 1244 // Below functions are obosolted ! Please do not use them if you do not use them yet. 1245 ////////////////////////////////////////////// 1246 1247 //------------------------------------------------------------------------------------------------- 1248 /// Description : Set power state 1249 /// @ingroup PNL_INTERFACE_ToBeRemove 1250 /// @param ePowerState \b IN: power state 1251 /// @return MS_U32 1252 //------------------------------------------------------------------------------------------------- 1253 MS_BOOL MApi_PNL_SetDiffSwingLevel(MS_U8 u8Swing_Level); 1254 1255 //------------------------------------------------------------------------------------------------- 1256 /// Do handshake for special output device, ex. VB1 1257 /// @ingroup PNL_INTERFACE_FEATURE 1258 /// @return TRUE or FALSE 1259 //------------------------------------------------------------------------------------------------- 1260 MS_BOOL MApi_PNL_OutputDeviceHandshake(void); 1261 1262 //------------------------------------------------------------------------------------------------- 1263 /// Do OC handshake for special output device, ex. VB1 1264 /// @ingroup PNL_INTERFACE_FEATURE 1265 /// @return TRUE or FALSE 1266 //------------------------------------------------------------------------------------------------- 1267 MS_BOOL MApi_PNL_OutputDeviceOCHandshake(void); 1268 1269 //------------------------------------------------------------------------------------------------- 1270 /// set necessary setting for outputing interlace timing to rear 1271 /// @ingroup PNL_INTERFACE_FEATURE 1272 /// @return APIPNL_Result 1273 //------------------------------------------------------------------------------------------------- 1274 APIPNL_Result MApi_PNL_SetOutputInterlaceTiming(MS_BOOL bEnable); 1275 1276 //------------------------------------------------------------------------------------------------- 1277 /// Get Support Max output Dclk 1278 /// @ingroup PNL_INTERFACE_FEATURE 1279 /// @return MS_U16 1280 //------------------------------------------------------------------------------------------------- 1281 MS_U16 SYMBOL_WEAK MApi_PNL_GetSupportMaxDclk(void); 1282 1283 void MApi_PNL_GetPanelData(PanelType* pstPNLData); 1284 void MApi_PNL_DumpPanelData(void); 1285 void MApi_PNL_SetSSC(MS_U16 u16Fmodulation, MS_U16 u16Rdeviation, MS_BOOL bEnable); 1286 MS_U16 MApi_PNL_GetPanelOnTiming(APIPNL_POWER_TIMING_SEQ seq); 1287 MS_U16 MApi_PNL_GetPanelOffTiming(APIPNL_POWER_TIMING_SEQ seq); 1288 MS_U8 MApi_PNL_GetPanelDimCtrl(APIPNL_DIMMING_CTRL dim_type); 1289 MS_U8** MApi_PNL_GetAllGammaTbl(void); 1290 MS_BOOL MApi_PNL_EnablePanel(MS_BOOL bPanelOn); 1291 MS_BOOL MApi_PNL_SetPanelGamma(MS_U8* pu8GammaTab, MS_U8 u8Index); 1292 MS_BOOL MApi_PNL_SetGammaTbl(APIPNL_GAMMA_TYPE eGammaType, MS_U8* pu8GammaTab[3], APIPNL_GAMMA_MAPPEING_MODE Gamma_Map_Mode); 1293 MS_BOOL MApi_PNL_GetGammaTbl(APIPNL_GAMMA_TYPE eGammaType, MS_U8* pu8GammaTab[3], APIPNL_GAMMA_MAPPEING_MODE Gamma_Map_Mode); 1294 MS_BOOL MApi_PNL_SetGammaValue(MS_U8 u8Channel, MS_U16 u16Offset, MS_U16 u16GammaValue); 1295 MS_U16 MApi_PNL_InitLocalDimming(pstPNL_Init_LocalDimming_Parameters pstPnlLDArgs, MS_U16 u16DataLen); 1296 MS_BOOL MApi_PNL_Check_VBY1_Handshake_Status(void); 1297 void MApi_PNL_SetVideoHWTraining(MS_BOOL bEnable); 1298 void MApi_PNL_SetOSDHWTraining(MS_BOOL bEnable); 1299 MS_BOOL MApi_PNL_GetVideoHWTraining_Status(void); 1300 MS_BOOL MApi_PNL_GetOSDHWTraining_Status(void); 1301 MS_BOOL SYMBOL_WEAK MApi_PNL_GetOutputInterlaceTiming(void); 1302 APIPNL_Result MApi_PNL_Setting(MS_U32 u32Cmd,void *pCmdArgs,MS_U32 u32CmdArgsSize); 1303 1304 #undef INTERFACE 1305 1306 #ifdef __cplusplus 1307 } 1308 #endif 1309 1310 #endif 1311