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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 96 97 //============================================================================== 98 /// [MsAce_LIB_Group_DTV1.h] 99 /// Date: 20090414 100 /// Descriptions: 101 //============================================================================== 102 103 104 #ifndef MSACE_LIB_GROUP_DTV1_H 105 #define MSACE_LIB_GROUP_DTV1_H 106 107 #include "ace_hwreg_utility2.h" 108 #include "hwreg_ace.h" 109 110 /////////////// Chakra2 define start 111 112 #define BOOL MS_BOOL 113 #define BYTE MS_U8 114 #define WORD MS_U16 115 #define DWORD MS_U32 116 #define U8 MS_U8 117 #define code 118 119 120 #define BK_SELECT_00 BK_SCALER_BASE 121 #define REG_BANK_VOP 0x10 122 #define REG_BANK_S_VOP 0x0F 123 #define REG_BANK_ACE 0x18 124 125 #define BK_REG_L( x, y ) ((x) | (((y) << 1))) 126 #define L_BK_VOP(x) BK_REG_L(BK_SCALER_BASE,x) 127 #define L_BK_ACE(x) BK_REG_L(BK_SCALER_BASE,x) 128 129 //////////////// Chakra2 define end 130 131 132 #define XDATA 133 134 #define UNAVAILABLE 0xFF 135 136 #define REG_ADDR_SC_BANK_SEL BK_SELECT_00 137 #define BANK_CM_MAIN REG_BANK_VOP 138 #define BANK_CM_SUB REG_BANK_S_VOP 139 #define BANK_ACE REG_BANK_ACE 140 #define REG_ADDR_CM_MAIN L_BK_VOP(0x26) 141 #define REG_ADDR_CM_SUB L_BK_VOP(0x1D) 142 #define REG_ADDR_CM_CTL_MAIN L_BK_VOP(0x2F) 143 #define REG_ADDR_CM_CTL_SUB L_BK_VOP(0x26) 144 #define REG_ADDR_ACE_R2Y_EQ_SEL L_BK_ACE(0x6F) 145 #define ENABLE_CM_CTL1 (0x35) 146 #define ENABLE_CM_CTL2 (0x30) 147 #define MASK_CM_CTL (0x37) 148 #define MASK_CM_CTL_EN (0x10) 149 #define MASK_CM_CTL_RB_RANGE (0x05) 150 151 #define DECLARA_CMCTL_VARIABLE U8 CTLVal; 152 #if SCALER_REGISTER_SPREAD 153 #define DECLARA_BANK_VARIABLE MS_U32 u32Bank = 0; 154 #define BACKUP_SC_BANK u32Bank = u32Bank; 155 #define RECOVER_SC_BANK 156 #define ACE_WRITE_CM(id, addr, data) SC_W2BYTE(id, ((DWORD)addr | (u32Bank << 8)),data) 157 #define ACE_WRITE_CM_CTL(id, addr, data, mask) SC_W2BYTEMSK(id, ((DWORD)addr | (u32Bank << 8)),data,mask) 158 #define ACE_READ_CTL(id, addr, mask) SC_R2BYTEMSK(id, ((DWORD)addr | (u32Bank << 8)),mask) 159 #else 160 #define DECLARA_BANK_VARIABLE U8 u8Bank; 161 #define BACKUP_SC_BANK {u8Bank = GET_SC_BANK();} 162 #define RECOVER_SC_BANK {SET_SC_BANK(u8Bank);} 163 #define ACE_WRITE_CM(id, addr, data) MDrv_Write2Byte(L_BK_VOP((addr)/2), (data)) 164 #define ACE_WRITE_CM_CTL(id, addr, data, mask) MDrv_WriteByteMask(addr, data, mask) 165 #define ACE_READ_CTL(id, addr, mask) MDrv_ReadRegBit(addr, mask) 166 #endif 167 168 // For scaler bank switch 169 #if SCALER_REGISTER_SPREAD 170 #define GET_SC_BANK() 171 #define SET_SC_BANK(bank) u32Bank = bank; 172 #else 173 #define GET_SC_BANK() MDrv_ReadByte(REG_ADDR_SC_BANK_SEL) 174 #define SET_SC_BANK(bank) MDrv_WriteByte(REG_ADDR_SC_BANK_SEL, bank) 175 #endif 176 // Control sin&cos function 177 #define USE_ACE_INTERNAL_SIN_COS 0 178 #define sin clampsin 179 #define cos clampcos 180 181 #endif 182