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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 96 97 //============================================================================== 98 /// [MsAce_LIB_Group_DTV1.h] 99 /// Date: 20090414 100 /// Descriptions: 101 //============================================================================== 102 103 104 #ifndef MSACE_LIB_GROUP_DTV1_H 105 #define MSACE_LIB_GROUP_DTV1_H 106 107 #include "ace_hwreg_utility2.h" 108 #include "hwreg_ace.h" 109 110 /////////////// Chakra2 define start 111 112 #define BOOL MS_BOOL 113 #define BYTE MS_U8 114 #define WORD MS_U16 115 #define DWORD MS_U32 116 #define U8 MS_U8 117 #define U16 MS_U16 118 #define code 119 120 121 #define BK_SELECT_00 BK_SCALER_BASE 122 #define REG_BANK_VOP 0x10 123 #define REG_BANK_S_VOP 0x0F 124 #define REG_BANK_VTRACK 0x2F 125 #define REG_BANK_VIP 0x63 126 #define REG_BANK_ACE 0x18 127 128 #define BK_REG_L( x, y ) ((x) | (((y) << 1))) 129 #define L_BK_VOP(x) BK_REG_L(BK_SCALER_BASE,x) 130 #define L_BK_ACE(x) BK_REG_L(BK_SCALER_BASE,x) 131 #define L_BK_VIP(x) BK_REG_L(BK_SCALER_BASE,x) 132 133 //////////////// Chakra2 define end 134 135 136 #define XDATA 137 138 #define UNAVAILABLE 0xFF 139 140 #define REG_ADDR_SC_BANK_SEL BK_SELECT_00 141 #define BANK_CM_MAIN REG_BANK_VTRACK 142 #define BANK_CM_SUB REG_BANK_VIP 143 #define BANK_ACE REG_BANK_ACE 144 #define REG_ADDR_CM_MAIN L_BK_VOP(0x71) 145 #define REG_ADDR_CM_SUB L_BK_VIP(0x51) 146 #define REG_ADDR_CM_CTL_MAIN L_BK_VOP(0x70) 147 #define REG_ADDR_CM_CTL_SUB L_BK_VIP(0x50) 148 #define REG_ADDR_ACE_R2Y_EQ_SEL L_BK_ACE(0x6F) 149 #define ENABLE_CM_CTL1 (BIT(0)|BIT(1)|BIT(4)|BIT(5)| BIT(6)|BIT(7)|BIT(8)|BIT(9)) 150 #define ENABLE_CM_CTL2 (BIT(0)|BIT(1)|BIT(4)|BIT(5)| BIT(6)|BIT(7)|BIT(8)|BIT(9)) 151 #define MASK_CM_CTL (BIT(0)|BIT(1)|BIT(4)|BIT(5)| BIT(6)|BIT(7)|BIT(8)|BIT(9)) 152 #define MASK_CM_CTL_EN (BIT(0)) 153 #define MASK_CM_CTL_RB_RANGE (BIT(4) | BIT(5) | BIT(6) | BIT(7) | BIT(8) | BIT(9)) 154 155 #define DECLARA_CMCTL_VARIABLE U16 CTLVal; 156 157 #if SCALER_REGISTER_SPREAD 158 #define DECLARA_BANK_VARIABLE MS_U32 u32Bank = 0; 159 #define BACKUP_SC_BANK u32Bank = 0; //SCALER_REGISTER_SPREAD do not need backup bank 160 #define RECOVER_SC_BANK 161 //Because of u32Bank already set device 1 bank offset, do not set bank offset in SC_W2BYTE again, SC_W2BYTE(id) must equal to 0 162 #define ACE_WRITE_CM(id, addr, data) SC_W2BYTE(id, ((DWORD)(addr) | (u32Bank << 8)),data) 163 #define ACE_WRITE_CM_CTL(id, addr, data, mask) SC_W2BYTEMSK(id, ((DWORD)(addr) | (u32Bank << 8)),data,mask) 164 #define ACE_READ_CTL(id, addr, mask) SC_R2BYTEMSK(id, ((DWORD)(addr) | (u32Bank << 8)),mask) 165 #else 166 #define DECLARA_BANK_VARIABLE U8 u8Bank; 167 #define BACKUP_SC_BANK {u8Bank = GET_SC_BANK();} 168 #define RECOVER_SC_BANK {SET_SC_BANK(u8Bank);} 169 #define ACE_WRITE_CM(id, addr, data) MDrv_Write2Byte(L_BK_VOP((addr)/2), (data)) 170 #define ACE_WRITE_CM_CTL(id, addr, data, mask) MDrv_Write2ByteMask(addr, data, mask) 171 #define ACE_READ_CTL(id, addr, mask) MDrv_ReadRegBit(addr, mask) 172 #endif 173 174 // For scaler bank switch 175 #if SCALER_REGISTER_SPREAD 176 #define GET_SC_BANK() 177 #define SET_SC_BANK(bank) u32Bank = bank; 178 #else 179 #define GET_SC_BANK() MDrv_ReadByte(REG_ADDR_SC_BANK_SEL) 180 #define SET_SC_BANK(bank) \ 181 ACE_INSTANCE_PRIVATE* psAECInstPri = NULL; \ 182 MS_U32 u32MsACEID = 0; \ 183 if(UtopiaInstanceGetPrivate(pInstance, (void*)&psAECInstPri)==UTOPIA_STATUS_SUCCESS) \ 184 { \ 185 u32MsACEID = psAECInstPri->u32DeviceID; \ 186 } \ 187 MDrv_WriteByte(REG_ADDR_SC_BANK_SEL, bank + u32XCDeviceBankOffset[u32MsACEID]) 188 #endif 189 190 // Control sin&cos function 191 #define USE_ACE_INTERNAL_SIN_COS 0 192 #define sin clampsin 193 #define cos clampcos 194 195 #endif 196