1 //<MStar Software> 2 //****************************************************************************** 3 // MStar Software 4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved. 5 // All software, firmware and related documentation herein ("MStar Software") are 6 // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by 7 // law, including, but not limited to, copyright law and international treaties. 8 // Any use, modification, reproduction, retransmission, or republication of all 9 // or part of MStar Software is expressly prohibited, unless prior written 10 // permission has been granted by MStar. 11 // 12 // By accessing, browsing and/or using MStar Software, you acknowledge that you 13 // have read, understood, and agree, to be bound by below terms ("Terms") and to 14 // comply with all applicable laws and regulations: 15 // 16 // 1. MStar shall retain any and all right, ownership and interest to MStar 17 // Software and any modification/derivatives thereof. 18 // No right, ownership, or interest to MStar Software and any 19 // modification/derivatives thereof is transferred to you under Terms. 20 // 21 // 2. You understand that MStar Software might include, incorporate or be 22 // supplied together with third party`s software and the use of MStar 23 // Software may require additional licenses from third parties. 24 // Therefore, you hereby agree it is your sole responsibility to separately 25 // obtain any and all third party right and license necessary for your use of 26 // such third party`s software. 27 // 28 // 3. MStar Software and any modification/derivatives thereof shall be deemed as 29 // MStar`s confidential information and you agree to keep MStar`s 30 // confidential information in strictest confidence and not disclose to any 31 // third party. 32 // 33 // 4. MStar Software is provided on an "AS IS" basis without warranties of any 34 // kind. Any warranties are hereby expressly disclaimed by MStar, including 35 // without limitation, any warranties of merchantability, non-infringement of 36 // intellectual property rights, fitness for a particular purpose, error free 37 // and in conformity with any international standard. You agree to waive any 38 // claim against MStar for any loss, damage, cost or expense that you may 39 // incur related to your use of MStar Software. 40 // In no event shall MStar be liable for any direct, indirect, incidental or 41 // consequential damages, including without limitation, lost of profit or 42 // revenues, lost or damage of data, and unauthorized system use. 43 // You agree that this Section 4 shall still apply without being affected 44 // even if MStar Software has been modified by MStar in accordance with your 45 // request or instruction for your use, except otherwise agreed by both 46 // parties in writing. 47 // 48 // 5. If requested, MStar may from time to time provide technical supports or 49 // services in relation with MStar Software to you for your use of 50 // MStar Software in conjunction with your or your customer`s product 51 // ("Services"). 52 // You understand and agree that, except otherwise agreed by both parties in 53 // writing, Services are provided on an "AS IS" basis and the warranty 54 // disclaimer set forth in Section 4 above shall apply. 55 // 56 // 6. Nothing contained herein shall be construed as by implication, estoppels 57 // or otherwise: 58 // (a) conferring any license or right to use MStar name, trademark, service 59 // mark, symbol or any other identification; 60 // (b) obligating MStar or any of its affiliates to furnish any person, 61 // including without limitation, you and your customers, any assistance 62 // of any kind whatsoever, or any information; or 63 // (c) conferring any license or right under any intellectual property right. 64 // 65 // 7. These terms shall be governed by and construed in accordance with the laws 66 // of Taiwan, R.O.C., excluding its conflict of law rules. 67 // Any and all dispute arising out hereof or related hereto shall be finally 68 // settled by arbitration referred to the Chinese Arbitration Association, 69 // Taipei in accordance with the ROC Arbitration Law and the Arbitration 70 // Rules of the Association by three (3) arbitrators appointed in accordance 71 // with the said Rules. 72 // The place of arbitration shall be in Taipei, Taiwan and the language shall 73 // be English. 74 // The arbitration award shall be final and binding to both parties. 75 // 76 //****************************************************************************** 77 //<MStar Software> 78 #ifndef __M4VD_MSG_QUE_H__ 79 #define __M4VD_MSG_QUE_H__ 80 81 #include "controller.h" 82 83 84 85 #define DISPQ_SIZE 12 86 87 #if defined(SUPPORT_NEW_MEM_LAYOUT) 88 #if defined(SUPPORT_EVD) && (1==SUPPORT_EVD) 89 #define OFFSET_BASE 0x000b0000 90 #else 91 #define OFFSET_BASE 0x000a0000 92 #endif 93 #else 94 #define OFFSET_BASE 0x000e0000 95 #endif 96 #define VSYNC_BRIGE_SHM_OFFSET 0x1FA00 97 #define VSYNC_BRIGE_EXT_SHM_OFFSET 0x20000 98 #define FW_SHM_OFFSET 0x100000 99 #define FW_VOL_INFO_START (0x000+OFFSET_BASE) 100 #define DEBUG_BUF_START (0x500+OFFSET_BASE) 101 #define FW_FRAME_INFO_START (0x1000+OFFSET_BASE) 102 #define FW_DIVX_INFO_START (0x2000+OFFSET_BASE) 103 #define DEC_FRMAE_INFO_START (0x14300+OFFSET_BASE) 104 #define VBBU_TABLE_START (0x15400+OFFSET_BASE) 105 #define VSYNC_BRIGE_SHM_START (VSYNC_BRIGE_SHM_OFFSET+OFFSET_BASE) 106 #define VSYNC_BRIGE_EXT_SHM_START (VSYNC_BRIGE_EXT_SHM_OFFSET+OFFSET_BASE) 107 #define DISP_QUEUE (0xf0000) 108 109 110 #define MVD_DRAM_SIZE 0x40000 // MVD DRAM heap size, 256k 111 112 /* 113 Share Memory layout 114 | FW_VOL_INFO | DEBUG_BUF | FW_FRAME_INFO | FW_DIVX_INFO | USERDATABUF | SLQBUF | PTSTBL | DSADDR | SCALER_INFO | DEC_FRMAE_INFO | VBBU_TABLE | VSYNC_BRIDGE 115 0 500 1000 2000 3000 B000 B200 13200 14200 14300 14400 1FA00 116 */ 117 118 // VC1_SEQ_INFO put on 65K 119 #define FW_VERSION 0x08043655 120 #define INTERFACE_VERSION 0x00000365 //add information for RealFrameRate.Profile.Level.DispWH 121 #define EN_SECTION_START 0x20000000 122 123 typedef struct _FW_VOL_INFO 124 { 125 //VOL infomation 126 unsigned short vol_info; //0 127 // D[5] short_video_header; //1 128 // D[4] vol_interlaced; 129 // D[3] vol_qpel; 130 // D[2] vol_rsync_marker_disable; 131 // D[1] vol_dp_enable; 132 // D[0] vol_rvlc_enable; 133 unsigned short sprite_usage; //2 134 135 unsigned int width; //4 136 unsigned int height; //8 137 138 unsigned short pts_incr; //12 139 unsigned short reserved0; //14 140 141 unsigned char aspect_ratio; //16 142 unsigned char progressive_sequence; //17 143 unsigned char mpeg1; //18 144 unsigned char play_mode; //19 145 146 unsigned char mpeg_frc_mode; //20 147 unsigned char first_display; //21 148 unsigned char low_delay; //22 149 unsigned char video_range; //23 150 151 unsigned int bit_rate; //24 152 153 unsigned short vol_time_incr_res; //28 154 unsigned short fixed_vop_time_incr; //30 // 0: not fixed_vop_rate others : vop_time_incr 155 156 unsigned char par_width; //32 157 unsigned char par_height; //33 158 unsigned char u8AFD; //34 159 unsigned char original_progressive; //35 160 161 unsigned int vc1_frame_rate; //36 162 unsigned int frame_rate; //40 163 164 unsigned char key_gen[32]; //44 165 166 unsigned char ds_enable; //76 167 unsigned char stereo_type; //77 168 unsigned short CropBottom; //78 // For HDMI 3D Output mode. 169 170 unsigned int DSbufsize; //80 171 172 unsigned char suspend_ds; //84 173 unsigned char reserved4[2]; //85,86 174 unsigned char CMA_AllocDone; //87 175 176 unsigned int CMA_FB_Address; //88 177 unsigned int CMA_FB_Size; //92 178 unsigned int slq_end; //96 179 unsigned int slq_start; //100 180 unsigned int slq_end2; //104 181 unsigned int slq_start2; //108 182 183 volatile unsigned char u32VirtualCommandArg0; //112 184 volatile unsigned char u32VirtualCommandArg1; //113 185 volatile unsigned char u32VirtualCommandArg2; //114 186 volatile unsigned char u32VirtualCommandArg3; //115 187 188 volatile unsigned char u32VirtualCommandArg4; //116 189 volatile unsigned char u32VCHandshake; //117 190 unsigned short u16Profile; //118 191 192 unsigned int DS_Depth; //120 193 194 unsigned int u32RealFrameRate; //124 195 196 unsigned int u32DispWidth; //128 197 unsigned int u32DispHeight; //132 198 199 unsigned short u16Level; //132 200 unsigned char reserved[2]; //134 201 }FW_VOL_INFO,*pFW_VOL_INFO;//16 byte 202 203 #define OFFSET_VOL_INFO 0 204 #define OFFSET_SPRITE_USAGE 2 205 #define OFFSET_WIDTH 4 206 #define OFFSET_HEIGHT 8 207 #define OFFSET_PTS_INCR 12 208 #define OFFSET_RESERVED0 14 209 #define OFFSET_ASPECT_RATIO 16 210 #define OFFSET_PROGRESSIVE_SEQUENCE 17 211 #define OFFSET_MPEG1 18 212 #define OFFSET_PLAY_MODE 19 213 #define OFFSET_MPEG_FRC_MODE 20 214 #define OFFSET_FIRST_DISPLAY 21 215 #define OFFSET_LOW_DELAY 22 216 #define OFFSET_VIDEO_RANGE 23 217 #define OFFSET_BIT_RATE 24 218 #define OFFSET_VOL_TIME_INCR_RES 28 219 #define OFFSET_FIXED_VOP_TIME_INCR 30 220 #define OFFSET_PAR_WIDTH 32 221 #define OFFSET_PAR_HEIGHT 33 222 #define OFFSET_AFD 34 223 #define OFFSET_ORIGINAL_PROGRESSIVE 35 224 #define OFFSET_VC1_FRAME_RATE 36 225 #define OFFSET_FRAME_RATE 40 226 #define OFFSET_KEY_GEN 44 227 #define OFFSET_DS_ENABLE 76 228 #define OFFSET_STEREO_TYPE 77 229 #define OFFSET_CROPBOTTOM 78 230 #define OFFSET_DSBUFSIZE 80 231 #define OFFSET_SUSPEND_DS 84 232 #define OFFSET_CMA_ALLOCDONE 87 233 #define OFFSET_CMA_FB_ADDRESS 88 234 #define OFFSET_CMA_FB_SIZE 92 235 #define OFFSET_SLQ_END 96 236 #define OFFSET_SLQ_START 100 237 #define OFFSET_SLQ_END1 104 238 #define OFFSET_SLQ_START1 108 239 #define OFFSET_VIRTUAL_COMMANDARG0 112 240 #define OFFSET_VIRTUAL_COMMANDARG1 113 241 #define OFFSET_VIRTUAL_COMMANDARG2 114 242 #define OFFSET_VIRTUAL_COMMANDARG3 115 243 #define OFFSET_VIRTUAL_COMMANDARG4 116 244 #define OFFSET_VCHANDSHAKE 117 245 #define OFFSET_PROFILE 118 246 #define OFFSET_DS_DEPTH 120 247 #define OFFSET_REALFRAMERATE 124 248 #define OFFSET_DISPWIDTH 128 249 #define OFFSET_DISPHEIGHT 132 250 #define OFFSET_LEVEL 136 251 252 typedef struct 253 { 254 union 255 { 256 struct 257 { 258 unsigned int mvdcmd_handshake_pause : 1; // 1 for handshake ready with CMD_PAUSE, 259 unsigned int mvdcmd_handshake_slq_reset : 1; // 1 for handshake ready with CMD_VC1_HW_SLQ_RESET 260 unsigned int mvdcmd_handshake_stop : 1; // 1 for handshake ready with CMD_STOP 261 unsigned int mvdcmd_handshake_skip_data : 1; // 1 for handshake ready with CMD_SKIP_DATA 262 unsigned int mvdcmd_handshake_skip_to_pts : 1; // 1 for handshake ready with CMD_SKIP_TO_PTS 263 unsigned int mvdcmd_handshake_single_step : 1; // 1 for handshake ready with CMD_SINGLE_STEP 264 unsigned int mvdcmd_handshake_scaler_data_ready : 1; 265 unsigned int mvdcmd_handshake_get_nextdispfrm_ready : 1; // for Mstreamer mode 266 unsigned int mvdcmd_handshake_parser_rst : 1; // 1 for handshake done with CMD_PTS_TBL_RESET 267 unsigned int mvdcmd_handshake_cc608_rst : 1; // "0" for handshake done with mstar cc608 268 unsigned int mvdcmd_handshake_cc708_rst : 1; // "0" for handshake done with mstar cc708 269 unsigned int mvdcmd_handshake_fast_rst : 1; // 1 for handshake done with CMD_FAST_RST, 1 for fast_rst_done... 270 unsigned int mvdcmd_handshake_detatch : 1; // 1 for handshake ready with exit main loop 271 unsigned int mvdcmd_handshake_pvr_seamless_mode : 1; // 1 for handshake ready 272 unsigned int mvdcmd_handshake_virtualCommand : 1; // 1 for handshake ready with virtual command get status done 273 unsigned int mvdcmd_handshake_flush : 1; // 1 for handshake ready with flush disp queue command 274 unsigned int mvdcmd_handshake_vsync_control : 1; // 1 for handshake ready with flush disp queue command 275 unsigned int mvdcmd_handshake_reserved : 15; // reserved for extend 276 }; 277 unsigned int value; 278 }; 279 }MVD_CMD_HANDSHADE_INDEX; 280 281 typedef struct 282 { 283 union 284 { 285 struct 286 { 287 unsigned int mvd_xc_disable_black_screen : 1; // 1 for XC disable the black screen, defaule is "0"... 288 unsigned int mvd_xc_release_force_rbank : 1; // 1 for XC release force read bank, defaule is "0"... 289 unsigned int mvd_xc_release_bob_mode : 1; // 1 for XC release BOB mode, defaule is "0"... 290 unsigned int mvd_xc_release_UCNR : 1; // 1 for XC release UCNR, defaule is "0"... 291 unsigned int mvd_xc_reserved : 28; // reserved for extend 292 }; 293 unsigned int value; 294 }; 295 }MVD_XC_LOW_DELAY_INT_STATE; 296 297 typedef struct _FW_FRAME_INFO 298 { 299 unsigned int frame_count; //0 300 unsigned int slq_tbl_rptr; //4 // ==>ms 301 unsigned int vol_update; //8 302 unsigned int error_code; //12 303 304 unsigned int error_status; //16 305 unsigned int skip_frame_count; //20 306 unsigned int picture_type; //24 // 0:I frame 1:P frame 2:B frame 307 unsigned int slq_sw_index; //28 308 309 unsigned char fb_index; //32 310 unsigned char top_ff; //33 311 unsigned char repeat_ff; //34 312 unsigned char invalidstream; //35 313 unsigned int vld_err_count; //36 314 unsigned short tmp_ref; //40 315 unsigned char first_frame; //42 316 unsigned char first_I_found; //43 317 unsigned int gop_i_fcnt; //44 318 319 unsigned int gop_p_fcnt; //48 320 unsigned int gop_b_fcnt; //52 321 unsigned int overflow_count; //56 322 unsigned int time_incr; //60 323 324 unsigned int self_rst_count; //64 325 unsigned int sw_vd_count; //68 326 unsigned int step_disp_done; //72 327 unsigned int step_to_pts_done; //76 328 329 MVD_CMD_HANDSHADE_INDEX cmd_handshake_index; //80 330 unsigned int last_frame_show_done; //84 331 unsigned int meet_file_end_sc; //88 332 unsigned int rcv_payload_lenth; //92 333 334 unsigned int firmware_version; //96 335 unsigned int ic_version; //100 336 unsigned int interface_version; //104 337 unsigned char color_primaries; //108 338 unsigned char transfer_char; //109 339 unsigned char matrix_coef; //110 340 unsigned char video_format; //111 341 342 unsigned short disp_h_size; //112 343 unsigned short disp_v_size; //114 344 unsigned char time_code_hours; //116 345 unsigned char time_code_minutes; //117 346 unsigned char time_code_seconds; //118 347 unsigned char time_code_pictures; //119 348 unsigned char drop_frame_flag; //120 349 unsigned char time_code_hours_disp; //121 350 unsigned char time_code_minutes_disp; //122 351 unsigned char time_code_seconds_disp; //123 352 unsigned char time_code_pictures_disp; //124 353 unsigned char drop_frame_flag_disp; //125 354 unsigned char PicStruct; //126 355 unsigned char chroma_format; //127 356 357 int pts_stc; //128 358 unsigned int displayed_cnt; //132 359 unsigned int next_pts; //136 360 unsigned short centre_h_offset; //140 361 unsigned short centre_v_offset; //142 362 363 unsigned int int_cnt; //144 364 unsigned int disp_pts; //148 // pts of current displayed frame 365 unsigned int high32_pts; //152 // msb of 33-bit pts 366 unsigned char dispQnum; //156 367 unsigned char CurrentESBufferStatus; //157 // init:0x00,underflow:0x01,overflow:0x02,normal:0x03 368 unsigned char framebufferresource; //158 // default: 0, ok: 1, fail : 2 369 unsigned char framebuffer_status; //159 370 371 unsigned int divx_ver_5x; //160 // report divx version... 372 unsigned int frame_buf_size; //164 // report real frame buffer size(unit in bytes)... 373 MVD_XC_LOW_DELAY_INT_STATE xc_low_delay_int_state; //168 // for xc low delay interrupt status... 374 unsigned int xc_low_delay_cnt; //172 375 376 unsigned int xc_diff_field_no; //176 // for get XC diff field number... 377 unsigned int xc_low_delay_cnt_latched; //180 // for dbg xc_low_delay timing only... 378 unsigned int drop_count; //184 // for counting that decoded frame who doesn't display 379 380 unsigned int rdptr_pts_low; //188 // for TM14 pts flow control, pts based on pts table read pointer 381 unsigned int rdptr_pts_high; //192 // for TM14 pts flow control, pts based on pts table read pointer 382 unsigned int wrptr_pts_low; //196 // for TM14 pts flow control, pts based on pts table write pointer 383 unsigned int wrptr_pts_high; //200 // for TM14 pts flow control, pts based on pts table write pointer 384 385 unsigned int wait_decode_done_cnt; //204 386 unsigned int wait_seach_buffer_cnt; //208 387 unsigned int wait_search_code_cnt; //212 388 unsigned int wait_pre_buf_cnt; //216 389 unsigned int wait_vfifo_buf_cnt; //220 390 unsigned int wait_search_header_cnt; //224 391 unsigned int wait_flash_pattern_cnt; //228 392 unsigned int pb_chunk_count; //232 393 unsigned int pb_buffer_count; //236 394 unsigned int pb_chunk_flag; //240 395 unsigned int divx311_flag; //244 396 unsigned int pvr_seamless_status; //248 397 unsigned int int_stat; //252 398 unsigned int drop_frame_count; //256 399 unsigned int disp_stc; //260 400 unsigned int repeat_frame_count; //264 401 unsigned char seq_found; //268 402 unsigned char reserve_3[3]; //269 403 unsigned int idle_count; //272 404 unsigned int u32PVRSeamlessTargetPTS; //276 405 unsigned char u8PVRSeamlessTargetPTSHigh; //280 406 unsigned char u8PVRSeamlessTargetFrameType; //284 407 }FW_FRAME_INFO, *pFW_FRAME_INFO; 408 409 #define OFFSET_FRAME_COUNT 0 410 #define OFFSET_SLQ_TBL_RPTR 4 411 #define OFFSET_VOL_UPDATE 8 412 #define OFFSET_ERROR_CODE 12 413 #define OFFSET_ERROR_STATUS 16 414 #define OFFSET_SKIP_FRAME_COUNT 20 415 #define OFFSET_PICTURE_TYPE 24 416 #define OFFSET_SLQ_SW_INDEX 28 417 #define OFFSET_FB_INDEX 32 418 #define OFFSET_TOP_FF 33 419 #define OFFSET_REPEAT_FF 34 420 #define OFFSET_INVALIDSTREAM 35 421 #define OFFSET_VLD_ERR_COUNT 36 422 #define OFFSET_TMP_REF 40 423 #define OFFSET_FIRST_FRAME 42 424 #define OFFSET_FIRST_I_FOUND 43 425 #define OFFSET_GOP_I_FCNT 44 426 #define OFFSET_GOP_P_FCNT 48 427 #define OFFSET_GOP_B_FCNT 52 428 #define OFFSET_OVERFLOW_COUNT 56 429 #define OFFSET_TIME_INCR 60 430 #define OFFSET_SELF_RST_COUNT 64 431 #define OFFSET_SW_VD_COUNT 68 432 #define OFFSET_STEP_DISP_DONE 72 433 #define OFFSET_STEP_TO_PTS_DONE 76 434 #define OFFSET_CMD_HANDSHAKE_INDEX 80 435 #define OFFSET_CMD_LAST_FRAME_SHOW 84 436 #define OFFSET_MEET_FILE_END_SC 88 437 #define OFFSET_RCV_PAYLOAD_LENGTH 92 438 #define OFFSET_FIRMWARE_VERSION 96 439 #define OFFSET_IC_VERSION 100 440 #define OFFSET_INTERFACE_VERSION 104 441 #define OFFSET_COLOR_PRIMARIES 108 442 #define OFFSET_TRANSFER_CHAR 109 443 #define OFFSET_MATRIX_COEF 110 444 #define OFFSET_VIDEO_FORMAT 111 445 #define OFFSET_DISP_H_SIZE 112 446 #define OFFSET_DISP_V_SIZE 114 447 #define OFFSET_TIME_CODE_HOURS 116 // for decoding frame 448 #define OFFSET_TIME_CODE_MINUTES 117 // for decoding frame 449 #define OFFSET_TIME_CODE_SECONDS 118 // for decoding frame 450 #define OFFSET_TIME_CODE_PICTURES 119 // for decoding frame 451 #define OFFSET_DROP_FRAME_FLAG 120 // for decoding frame 452 #define OFFSET_TIME_CODE_HOURS_DISP 121 // for displaying frame 453 #define OFFSET_TIME_CODE_MINUTES_DISP 122 // for displaying frame 454 #define OFFSET_TIME_CODE_SECONDS_DISP 123 // for displaying frame 455 #define OFFSET_TIME_CODE_PICTURES_DISP 124 // for displaying frame 456 #define OFFSET_DROP_FRAME_FLAG_DISP 125 // for displaying frame 457 #define OFFSET_PICTURE_STRUCTURE 126 458 #define OFFSET_CHROMA_FORMAT 127 459 #define OFFSET_PTS_STC 128 // integer, pts_stc(n)=pts(n)-stc(n) 460 #define OFFSET_DISPLAYED_CNT 132 461 #define OFFSET_NEXT_PTS 136 462 #define OFFSET_CENTRE_H_OFFSET 140 463 #define OFFSET_CENTRE_V_OFFSET 142 464 #define OFFSET_INT_CNT 144 465 #define OFFSET_DISP_PTS 148 466 #define OFFSET_DISP_PTS_MSB 152 467 #define OFFSET_DISPQ_NUM 156 468 #define OFFSET_CURRENT_ES_BUFFER_STATUS 157 469 #define OFFSET_FRAME_BUFFER_RESOURCE 158 470 #define OFFSET_FRAME_BUFFER_STATUS 159 471 #define OFFSET_DIVX_VER_5X 160 472 #define OFFSET_FRAME_BUF_SIZE 164 // report real frame buffer size(unit in bytes)... 473 #define OFFSET_XC_LOW_DELAY_INT_STATE 168 // for xc low delay interrupt status... 474 #define OFFSET_XC_LOW_DELAY_CNT 172 // for xc low delay interrupt status... 475 #define OFFSET_XC_DIFF_FIELD_NO 176 // for get XC diff field number... 476 #define OFFSET_XC_LOW_DELAY_CNT_LATCH 180 // for dbg xc_low_delay timing only... 477 #define OFFSET_DROP_COUNT 184 // for counting that decoded frame who doesn't display 478 #define OFFSET_RDPTR_PTS_LOW 188 479 #define OFFSET_RDPTR_PTS_HIGH 192 480 #define OFFSET_WRPTR_PTS_LOW 196 481 #define OFFSET_WRPTR_PTS_HIGH 200 482 #define OFFSET_DECODEDONE_COUNT 204 483 #define OFFSET_SEARCHBUF_COUNT 208 484 #define OFFSET_SEARCHCODE_COUNT 212 485 #define OFFSET_PREBUF_COUNT 216 486 #define OFFSET_VFIFOBUF_COUNT 220 487 #define OFFSET_SEARCHHEADER_COUNT 224 488 #define OFFSET_FLASHPATTERN_COUNT 228 489 #define OFFSET_PB_CHUNK_COUNT 232 490 #define OFFSET_PB_BUFFER_COUNT 236 491 #define OFFSET_PB_CHUNK_FLAG 240 492 #define OFFSET_DIVX311_FLAG 244 493 #define OFFSET_PVR_SEAMLESS_STATUS 248 494 #define OFFSET_INT_STAT 252 495 #define OFFSET_DROP_FRAME_COUNT 256 496 #define OFFSET_DISP_STC 260 497 #define OFFSET_REPEAT_FRAME_COUNT 264 498 #define OFFSET_SEQ_FOUND 268 499 #define OFFSET_IDLE_COUNT 272 500 #define OFFSET_PVRSEAMLESSTARGETPTS 276 501 #define OFFSET_PVRSEAMLESSTARGETPTSHIGH 280 502 #define OFFSET_PVRSEAMLESSTARGETFRAMETYPE 284 503 504 505 typedef struct _FW_DIVX_INFO 506 { 507 unsigned int vol_handle_done; //0 508 509 unsigned int width; //4 510 unsigned int height; //8 511 unsigned int frame_count; //12 512 unsigned int frame_time; //16 513 514 unsigned short pts_incr; //20 515 unsigned short reserve0; 516 517 unsigned char aspect_ratio; //24 518 unsigned char progressive_sequence; //25 519 unsigned char mpeg1; //26 520 unsigned char play_mode; //27 521 522 unsigned char mpeg_frc_mode; //28 523 unsigned char invalidstream; //29 524 unsigned char reserve[2]; //30 525 unsigned int frame_rate; //32 526 }FW_DIVX_INFO, *pFW_DIVX_INFO; 527 528 #define OFFSET_DIVX_VOL_HANDLE_DONE 0 529 #define OFFSET_DIVX_WIDTH 4 530 #define OFFSET_DIVX_HEIGHT 8 531 #define OFFSET_DIVX_FRAME_COUNT 12 532 #define OFFSET_DIVX_FRAME_TIME 16 533 #define OFFSET_DIVX_PTS_INCR 20 534 #define OFFSET_DIVX_RESERVE0 22 535 #define OFFSET_DIVX_ASPECT_RATIO 24 536 #define OFFSET_DIVX_PROGRESSIVE_SEQUENCE 25 537 #define OFFSET_DIVX_MPEG1 26 538 #define OFFSET_DIVX_PLAY_MODE 27 539 #define OFFSET_DIVX_MPEG_FRC_MODE 28 540 #define OFFSET_DIVX_INVALIDSTREAM 29 541 #define OFFSET_DIVX_RESERVED 30 542 #define OFFSET_DIVX_FRAME_RATE 32 543 544 #define STATUS_VIDEO_SYNC (1<<0) 545 #define STATUS_VIDEO_FREERUN (1<<1) 546 #define STATUS_VIDEO_SKIP (1<<2) 547 #define STATUS_VIDEO_REPEAT (1<<3) 548 549 typedef struct _FW_USER_DATA_BUF 550 { 551 unsigned char picType; /* picture type: 1->I picture, 2->P,3->B */ 552 unsigned char top_ff; /* Top field first: 1 if top field first*/ 553 unsigned char rpt_ff; /* Repeat first field: 1 if repeat field first*/ 554 unsigned char userdatabytecnt; 555 556 unsigned short tmpRef; /* Temporal reference of the picture*/ 557 558 unsigned char userdata[250]; 559 }FW_USER_DATA_BUF,*pFW_USER_DATA_BUF; 560 561 #define FW_USER_DATA_BUF_EXT_PACK_LEN 240 562 typedef struct _FW_USER_DATA_BUF_EXT 563 { 564 unsigned char picType; /* picture type: 1->I picture, 2->P,3->B */ 565 unsigned char top_ff; /* Top field first: 1 if top field first*/ 566 unsigned char rpt_ff; /* Repeat first field: 1 if repeat field first*/ 567 unsigned char userdatabytecnt; 568 569 unsigned short tmpRef; /* Temporal reference of the picture*/ 570 unsigned char PicStruct; /* picture struct with this cc pack*/ 571 unsigned char reserved; 572 573 unsigned int pts; /* pts with this cc pack*/ 574 unsigned int reserved2; 575 576 unsigned char userdata[FW_USER_DATA_BUF_EXT_PACK_LEN]; 577 }FW_USER_DATA_BUF_EXT,*pFW_USER_DATA_BUF_EXT; 578 579 typedef struct _DecFrameInfo 580 { 581 unsigned int u32DecLumaAddr; //0 582 unsigned int u32DecChromaAddr; //4 583 unsigned int u32DecTimeStamp; //8 584 unsigned int u32DecID_L; //12 585 unsigned int u32DecID_H; //16 586 unsigned short u16DecPitch; //20 587 unsigned short u16DecWidth; //22 588 unsigned short u16DecHeight; //24 589 unsigned short u16DeceFrameType; //26 590 unsigned int u32DispLumaAddr; //28 591 unsigned int u32DispChromaAddr; //32 592 unsigned int u32DispTimeStamp; //36 593 unsigned int u32DispID_L; //40 594 unsigned int u32DispID_H; //44 595 unsigned short u16DispPitch; //48 596 unsigned short u16DispWidth; //50 597 unsigned short u16DispHeight; //52 598 unsigned short u16DispeFrameType; //54 599 // for Mstreamer mode 600 unsigned int u32NextDispLumaAddr; //56 601 unsigned int u32NextDispChromaAddr; //60 602 unsigned int u32NextDispTimeStamp; //64 603 unsigned int u32NextDispID_L; //68 604 unsigned int u32NextDispID_H; //72 605 unsigned short u16NextDispPitch; //76 606 unsigned short u16NextDispWidth; //78 607 unsigned short u16NextDispHeight; //80 608 unsigned short u16NextDispeFrameType; //82 609 unsigned short u16NextDispFrameIdx; //84 610 // for vc1/rcv range reduction 611 unsigned char u8NextDispRangeRed_Y; //86 //[7]: on/off [6:0]: scale 612 unsigned char u8NextDispRangeRed_UV; //87 //[7]: on/off [6:0]: scale 613 // for MCU mode, which support interlace 614 unsigned short u16ExtData; //88 615 unsigned char u8Progressive; //90 616 unsigned char u8reserved; //91 617 }DecFrameInfo, *pDecFrameInfo; 618 619 #define OFFSET_DECFRAMEINFO_DEC_LUMAADDR 0 620 #define OFFSET_DECFRAMEINFO_DEC_CHROMAADDR 4 621 #define OFFSET_DECFRAMEINFO_DEC_TIMESTAMP 8 622 #define OFFSET_DECFRAMEINFO_DEC_ID_L 12 623 #define OFFSET_DECFRAMEINFO_DEC_ID_H 16 624 #define OFFSET_DECFRAMEINFO_DEC_PITCH 20 625 #define OFFSET_DECFRAMEINFO_DEC_WIDTH 22 626 #define OFFSET_DECFRAMEINFO_DEC_HEIGHT 24 627 #define OFFSET_DECFRAMEINFO_DEC_FRAMETYPE 26 628 #define OFFSET_DECFRAMEINFO_DISP_LUMAADDR 28 629 #define OFFSET_DECFRAMEINFO_DISP_CHROMAADDR 32 630 #define OFFSET_DECFRAMEINFO_DISP_TIMESTAMP 36 631 #define OFFSET_DECFRAMEINFO_DISP_ID_L 40 632 #define OFFSET_DECFRAMEINFO_DISP_ID_H 44 633 #define OFFSET_DECFRAMEINFO_DISP_PITCH 48 634 #define OFFSET_DECFRAMEINFO_DISP_WIDTH 50 635 #define OFFSET_DECFRAMEINFO_DISP_HEIGHT 52 636 #define OFFSET_DECFRAMEINFO_DISP_FRAMETYPE 54 637 #define OFFSET_DECFRAMEINFO_NEXTDISP_LUMAADDR 56 // for Mstreamer mode 638 #define OFFSET_DECFRAMEINFO_NEXTDISP_CHROMAADDR 60 639 #define OFFSET_DECFRAMEINFO_NEXTDISP_TIMESTAMP 64 640 #define OFFSET_DECFRAMEINFO_NEXTDISP_ID_L 68 641 #define OFFSET_DECFRAMEINFO_NEXTDISP_ID_H 72 642 #define OFFSET_DECFRAMEINFO_NEXTDISP_PITCH 76 643 #define OFFSET_DECFRAMEINFO_NEXTDISP_WIDTH 78 644 #define OFFSET_DECFRAMEINFO_NEXTDISP_HEIGHT 80 645 #define OFFSET_DECFRAMEINFO_NEXTDISP_FRAMETYPE 82 646 #define OFFSET_DECFRAMEINFO_NEXTDISP_FRAMEIDX 84 // for Mstreamer mode 647 #define OFFSET_DECFRAMEINFO_NEXTDISP_RANGERED_Y 86 // for vc1/rcv 648 #define OFFSET_DECFRAMEINFO_NEXTDISP_RANGERED_UV 87 // for vc1/rcv 649 #define OFFSET_DECFRAMEINFO_NEXTDISP_EXT_DATA 88 // for MCU mode, which support interlace 650 #define OFFSET_DECFRAMEINFO_NEXTDISP_PROGRESSIVE 90 // is progressive or not 651 652 653 typedef struct __DISPQ_IN_DRAM 654 { 655 volatile unsigned int dispQ_rd; 656 volatile unsigned int dispQ_wr; 657 volatile DecFrameInfo disp_info[DISPQ_SIZE]; 658 volatile int dispQ_len; 659 volatile unsigned int bUsedByOutside[DISPQ_SIZE]; 660 }DISPQ_IN_DRAM; 661 662 663 664 #define VCOMMANDQ_INFO (DISP_QUEUE+0x1000) 665 #define VDISP_COMMANDQ (VCOMMANDQ_INFO+0x1000) // 2k bytes 666 #define VNORMAL_COMMANDQ (VDISP_COMMANDQ+0x1000) // 2k bytes 667 668 669 670 typedef struct _DEBUG_INFO 671 { 672 // 673 volatile unsigned short max_coded_width; 674 volatile unsigned short max_coded_height; 675 volatile unsigned short sync_status; // defined by AV_SYNC 676 677 volatile unsigned short REG67; 678 volatile unsigned short REG68; 679 volatile unsigned short REG69; 680 681 volatile unsigned short REG6a; 682 volatile unsigned short REG6b; 683 volatile unsigned short REG6c; 684 685 volatile unsigned short REG6d; 686 volatile unsigned short REG6e; 687 volatile unsigned short REG6f; 688 689 // 690 volatile unsigned short overflow_count; 691 volatile unsigned short underflow_count; 692 volatile unsigned short vlderr_count; 693 volatile unsigned short frame_conut;//0 694 695 volatile unsigned int y_start_addr; //in byte unit 696 volatile unsigned int uv_start_addr;//in byte unit 697 698 volatile unsigned int width; 699 volatile unsigned int height; 700 701 // where 702 volatile unsigned short mb_x; 703 volatile unsigned short mb_y; 704 705 volatile unsigned short file_end; 706 //16-byte aligned 707 volatile unsigned char reserved[24]; 708 709 }DebugInfo; 710 711 typedef struct VC1_SEQ_INFO 712 { 713 volatile unsigned int PROFILE; 714 volatile unsigned int FRMRTQ_POSTPROC; 715 volatile unsigned int BITRTQ_POSTPROC; 716 volatile unsigned int LOOPFILTER; 717 volatile unsigned int MULTIRES; 718 volatile unsigned int FASTUVMC; 719 volatile unsigned int EXTENDED_MV; 720 volatile unsigned int DQUANT; 721 volatile unsigned int VSTRANSFORM; 722 volatile unsigned int OVERLAP; 723 volatile unsigned int SYNCMARKER; 724 volatile unsigned int RANGERED; 725 volatile unsigned int MAXBFRAMES; 726 volatile unsigned int QUANTIZER; 727 volatile unsigned int FINTERPFLAG; 728 volatile unsigned int LEVEL; 729 volatile unsigned int CBR; 730 volatile unsigned int FRAMERATE; 731 volatile unsigned int VERT_SIZE; 732 volatile unsigned int HORIZ_SIZE; 733 }VC1_SEQUENCE_INFO, *pVC1_SEQUENCE_INFO; 734 735 #define OFFSET_RCV_PROFILE 0 736 #define OFFSET_RCV_FRMRTQ_POSTPROC 4 737 #define OFFSET_RCV_BITRTQ_POSTPROC 8 738 #define OFFSET_RCV_LOOPFILTER 12 739 #define OFFSET_RCV_MULTIRES 16 740 #define OFFSET_RCV_FASTUVMC 20 741 #define OFFSET_RCV_EXTENDED_MV 24 742 #define OFFSET_RCV_DQUANT 28 743 #define OFFSET_RCV_VSTRANSFORM 32 744 #define OFFSET_RCV_OVERLAP 36 745 #define OFFSET_RCV_SYNCMARKER 40 746 #define OFFSET_RCV_RANGERED 44 747 #define OFFSET_RCV_MAXBFRAMES 48 748 #define OFFSET_RCV_QUANTIZER 52 749 #define OFFSET_RCV_FINTERPFLAG 56 750 #define OFFSET_RCV_LEVEL 60 751 #define OFFSET_RCV_CBR 64 752 #define OFFSET_RCV_FRAMERATE 68 753 #define OFFSET_RCV_VERT_SIZE 72 754 #define OFFSET_RCV_HORIZ_SIZE 76 755 756 typedef struct _FW_AVSYNC_TABLE 757 { 758 unsigned int byte_cnt; //0 //23 valid bits 759 unsigned int dummy_cnt; //4 //dummy packet counter 760 unsigned int id_low; //8 //ID specified by player 761 unsigned int id_high; //12 762 763 unsigned int time_stamp; //16 //pts or dts 764 unsigned int reserved_int0; //20 765 unsigned int reserved_int1; //24 766 unsigned int reserved_int2; //28 767 }FW_AVSYNC_TABLE, *pFW_AVSYNC_TABLE; 768 769 #define OFFSET_BYTE_CNT 0 770 #define OFFSET_DUMMY_CNT 4 771 #define OFFSET_ID_LOW 8 772 #define OFFSET_ID_HIGH 12 773 #define OFFSET_TIME_STAMP 16 774 775 #ifdef VDEC3 776 typedef struct _fw_VBBU 777 { 778 unsigned int u32WrPtr; 779 unsigned int u32RdPtr; 780 unsigned char u8Reserved[8]; 781 VDEC_VBBU_Entry stEntry[MAX_VDEC_VBBU_ENTRY_COUNT]; 782 } FW_VBBU,*pFW_VBBU; 783 #endif 784 785 #ifdef M4VDPLAYER 786 extern pFW_VOL_INFO gp_vol_info; 787 extern pFW_DIVX_INFO gp_divx_info; 788 #endif 789 790 //interupt flag 791 #define INT_CC_NEW (1<<0) 792 #define INT_USER_DATA (1<<0) 793 #define INT_VBUF_OVF (1<<1) 794 #define INT_VBUF_UNF (1<<2) 795 #define INT_VES_VALID (1<<3) 796 #define INT_VES_INVALID (1<<4) 797 #define INT_SEQ_FOUND (1<<5) 798 #define INT_PIC_FOUND (1<<6) 799 #define INT_DEC_ERR (1<<7) 800 #define INT_FIRST_FRAME (1<<8) 801 #define INT_DISP_RDY (1<<9) 802 #define INT_SYN_SKIP (1<<10) 803 #define INT_SYN_REP (1<<11) 804 #define INT_DISP_VSYNC (1<<12) 805 #define INT_USER_DATA_DISP (1<<13) //user data in display order 806 #define INT_PTS_DISCONTINUE (1<<14) //detection pts discontinue for t3-gp2, 20101214 807 #define INT_DEC_DONE (1<<15) //finishing decoding one frame. 808 #define INT_DEC_I (1<<16) //finishing decoding one frame. 809 #define INT_XC_LOW_DELAY (1<<17) //trigger this interrupt for XC speed up to show image on channel change... 810 811 #define INT_SYN_SKIP_P 10 812 #define INT_SYN_REP_P 11 813 814 815 //MVD TLB 816 #define MVD_TLB_BSR1 (1<<0) 817 #define MVD_TLB_BSR2 (1<<1) 818 #define MVD_TLB_PAS1 (1<<2) 819 #define MVD_TLB_PAS2 (1<<3) 820 #define MVD_TLB_PESFI1 (1<<4) 821 #define MVD_TLB_PESFI2 (1<<5) 822 #define MVD_TLB_SMDB (1<<6) 823 #define MVD_TLB_VLD (1<<7) 824 #define MVD_TLB_REF (1<<8) 825 #define MVD_TLB_NM (1<<9) 826 #define MVD_TLB_IAP (1<<10) 827 #define MVD_TLB_JSC (1<<11) 828 #define MVD_TLB_MTO (1<<12) 829 #define MVD_TLB_BSR3 (1<<13) 830 831 832 // decoding state definition 833 #define DEC_STAT_IDLE 0x00 834 #define DEC_STAT_FIND_SC 0x01 835 #define DEC_STAT_FIND_SPE_SC 0x11 836 #define DEC_STAT_FIND_FRAMEBUFFER 0x02 837 #define DEC_STAT_WAIT_DECODE_DONE 0x03 838 #define DEC_STAT_DECODE_DONE 0x04 839 #define DEC_STAT_WAIT_VDFIFO 0x05 840 #define DEC_STAT_INIT_SUCCESS 0x06 841 #define DEC_STAT_NO_FRAME_BUFFER 0x07 842 843 //error_code 844 #define VOL_SHAPE 1 //error_status 0:rectanglular 1:binary 2: binary only 3: grayscale 845 #define VOL_USED_SPRITE 2 //error_status 0:sprite not used 1:static 2: GMC 3: reserved 846 #define VOL_NOT_8_BIT 3 //error_status : bits per pixel 847 #define VOL_NERPRED_ENABLE 4 848 #define VOL_REDUCED_RES_ENABLE 5 849 #define VOL_SCALABILITY 6 850 #define VOL_OTHER 7 851 #define VOL_H263_ERROR 8 852 #define VOL_RES_NOT_SUPPORT 9 //error_status : none 853 #define VOL_MPEG4_NOT_SUPPORT 10 //error_status : none 854 #define VOL_PROFILE_NOT_SUPPORT 11 855 #define VOL_RCV_ERROR_OCCUR 12 856 #define VOL_VC1_NOT_SUPPORT 13 857 #define VOL_UNKNOW_CODEC_NOT_SUPPORT 14 858 #define VOL_SLQ_TBL_NOT_SUPPORT 15 859 #define VOL_FRAME_BUF_NOT_ENOUGH 16 //error_status : none 860 #define CODEC_MPEG4 0x00 //arg0: 0: mpeg4, 1: mpeg4 with short_video_header, 2: DivX311 861 #define CODEC_MPEG4_SHORT_VIDEO_HEADER 0x01 862 #define CODEC_DIVX311 0x02 863 #define CODEC_MPEG2 0x10 864 typedef enum //arg1: 0: file mode 1:slq 2:live stream mode 3:slqtbl 4: Ts file mode 865 { 866 FILE_MODE = 0, 867 SLQ_MODE, 868 STREAM_MODE, 869 SLQ_TBL_MODE, 870 TS_FILE_MODE, 871 OTHER 872 }stream_type; 873 874 typedef enum 875 { 876 E_MVD_CHIP_U01 = 0, 877 E_MVD_CHIP_U02, 878 }chip_eco_rev; 879 880 #define ENABLE_PARSER 0x00 //arg2: 0/1 enable/disable parser; 881 #define DISABLE_PARSER 0x01 882 #define ENABLE_PKT_LEN 0x02 883 #define PARSER_MPEG2 0x00 //arg3: 0 13818-1 pes header; 884 #define PARSER_MPEG1 0x01 // 1 11172-1 pes header; 885 886 #define FrcNormal 0 887 #define FrcDisplayTwice 1 //output rate is twice of input rate (ex. 30p a 60p) 888 #define Frc32Pulldown 2 //3:2 pulldown mode (ex. 24p a 60i or 60p) 889 #define FrcPALtoNTSC 3 //PALaNTSC conversion (50i a 60i) 890 #define FrcNTSCtoPAL 4 //NTSCaPAL conversion (60i a 50i) 891 #define FrcShowOneFiled 5 892 #define FrcDisplayDropHalf 6 893 #define FrcDisplay120To50 7 894 #define FrcDisplay100To60 8 895 #define FrcDisplay30To50 9 896 #define FrcDisplayRepeat51 10 897 #define FrcDisplayDrop51 11 898 #define FrcDisplayDrop52 12 899 #define FrcDisplayDrop53 13 900 #define FrcDisplay50To30 14 901 #define FrcDisplay60To24 15 902 #define FrcDisplay60To25 16 903 #define FrcDisplay30To24 17 904 905 #define FrcDisplayMultipleRepeat 20 //output_rate/input_rate=integer 906 #define FrcDisplayGeneralRepeat 21 //output_rate > input_rate, ex. 15->50... 907 #define FrcDisplayGeneralSkip 22 //output_rate < input_rate, 908 #define FrcDisplayThreeTimes 23 909 #define FrcDisplayFourTimes 24 910 911 #define MVD3_FILE_SD_MODE 0x02 //960*544 912 #define MVD3_HD_MODE 0x10 //1920*1088 913 #define MVD3_SD_MODE 0x00 //720*576 914 #define MVD3_DHD_MODE 0x20 // dual HD 915 #define MVD3_DHD_MODE_MIN 0x40 //ECO ISSUE : THE WIDTH OVER 2560 IN VC1 WILL HIT THE HW_ISSUE 916 917 #define MVD_CMA_MODE 0x1 918 // File mode avsync related 919 #define NONE_FILE_MODE 0 920 #define FILE_PTS_MODE 1 921 #define FILE_DTS_MODE 2 922 #define FILE_STS_MODE 3 923 924 925 // argument for "CMD_DISPLAY_PAUSE" 926 #define DISPLAY_PAUSE_OFF 0x00 927 #define DISPLAY_PAUSE_ON 0x01 928 929 // argument for "CMD_FRC_DROP_BEHAVIOR" 930 #define FRC_DROP_FRAME 0x00 // for default frc drop behavior, drop per frame 931 #define FRC_DROP_FIELD 0x01 // for frc drop behavior, drop per field to improve more smoothly in field mode 932 933 // ARG0 for "CMD_DRAM_OBF" 934 #define OBF_PAS1_WR 0x01 // for Dram obf write index (Parser1 write) 935 #define OBF_VBUF1_RD 0x02 // for Dram obf read index (VBUF1 read) 936 #define OBF_PES_FILE_IN1_WR 0x03 // for Dram obf read index for PESFI1 937 #define OBF_PAS2_WR 0x04 // for Dram obf write index (Parser2 write) 938 #define OBF_VBUF2_RD 0x05 // for Dram obf read index (VBUF2 read) 939 #define OBF_PES_FILE_IN2_WR 0x06 // for Dram obf read index for PESFI2 940 941 //command interface 942 #define CMD_PLAY 0x01 943 #define CMD_PAUSE 0x02 944 #define CMD_STOP 0x03 945 #define CMD_FIND_SEQ 0x04 //find seq header and set command = pause at picture header start code found 946 #define CMD_SINGLE_STEP 0x05 947 #define CMD_PLAY_NO_SQE 0x06 948 #define CMD_FAST_SLOW 0x07 //arg0: 0: nomarl mode, 1: decode I only, 2: deocde I/P only, 3: slow motion 949 #define CMD_CODEC_INFO 0x08 //arg0: 0: mpeg4, 1: mpeg4 with short_video_header, 2: DivX311 950 #define CMD_SYN_THRESHOLD 0x09 951 #define CMD_SYNC_ON 0x0a 952 #define CMD_SYNC_OFFSET 0x0b 953 #define CMD_DISPLAY_CTL 0x0c 954 //arg0: 0/1-display by display/decode order 955 //arg1: 1-drop display decoding error frame 956 //arg2: 1-drop display when decode fast than display 957 //arg3:set frame rate conversion mode 958 #define CMD_GET_SYNC_STAT 0x0d //return arg0: 0/1 sync off/on ; arg1: 3 sync init done 959 #define CMD_GET_AFD 0x0e 960 #define CMD_SKIP_DATA 0x0f //set to skip all data till find FW_SPE_SCODE to resume normal play 961 962 #define CMD_STREAM_BUF_START 0x10 963 #define CMD_STREAM_BUF_END 0x11 964 #define CMD_FB_BASE 0x12 //Frame buffer base address, from LSB to MSB are arg0, arg1, arg2, arg3 965 #define CMD_IAP_BUF_START 0x13 966 #define CMD_DP_BUF_START 0x14 967 #define CMD_MV_BUF_START 0x15 968 #define CMD_DMA_OVFTH 0x16 969 #define CMD_DMA_UNFTH 0x17 970 #define CMD_VC1_MIU_PROTECT_START 0x18 971 #define CMD_VC1_MIU_PROTECT_END 0x19 972 #define CMD_DISP_SPEED_CTRL 0x1a 973 #define CMD_STEP_DISP_DECODE_ONE 0x1b 974 #define CMD_STEP_DISP_ING 0x1c // repeat disp this frame 975 #define CMD_STEP_TO_PTS 0x1d 976 #define CMD_HANDSHAKE_STATUS 0x1e //report handshake status 977 #define CMD_DISPLAY_PAUSE 0x1f // display pause 978 979 #define CMD_USER_BUF_START 0x20 980 #define CMD_USER_BUF_SIZE 0x21 981 #define CMD_RD_USER_WP 0x22 982 #define CMD_WD_USER_RP 0x23 983 #define CMD_RD_CC_PKTCNT 0x24 984 #define CMD_RD_CC_OV 0x25 985 #define CMD_CLOSE_CC 0x26 986 #define CMD_EN_CC_INFO_ENHANCE 0X27 // arg0=1, for enhance to dump the pts/tmp_ref info with each cc-608 packet for mstar cc-lib, 20120406 987 #define CMD_BUF_OFFSET 0x2d // stream/frame buf offset, programable high adderss [bit-25] that allocate to low/high 256MB MIU:(only for K2) 988 #define CMD_ENABLE_VLD_TIMEOUT 0x2e // enable mvd vld timeout and threshold 989 #define CMD_ENABLE_INT_STAT 0x2f // set which int be enabled 990 991 #define CMD_GET_INT_STAT 0x30 992 #define CMD_PARSE_M4V_PACKMD 0x31 993 #define CMD_RD_PTS 0x32 994 #define CMD_FLUSH_LAST_IPFRAME 0x33 995 #define CMD_DECODE_STATUS 0x34 // arg0 = lastcommand ; arg1 = decode_status 996 #define CMD_VBUFFER_COUNT 0x35 997 #define CMD_START_DEC_STRICT 0x36 // start decoding in First I and skip non reference frame B decoding 998 #define CMD_SW_RESET 0x37 999 #define CMD_MVD_FAST_INT 0x38 1000 #define CMD_DIU_WIDTH_ALIGN 0x39 1001 #define CMD_SW_IDX_ADJ 0x3a // arg0=1 set sw_index as previous queue index infomation 1002 #define CMD_PARSER_READ_POSITION 0x3b 1003 #define CMD_REPEAT_MODE 0x3c // arg0=1 when frame display repeat only show one field 1004 #define CMD_PTS_BASE 0x3d 1005 #define CMD_SKIP_TO_PTS 0x3e 1006 #define CMD_AVSYNC_FREERUN_THRESHOLD 0x3f 1007 1008 #define CMD_DEBUG_BUF_START 0x40 1009 #define CMD_DEBUG_CTL 0x42 1010 #define CMD_RD_IO 0x43 1011 #define CMD_WR_IO 0x44 1012 #define CMD_FB_RED_SET 0x45 1013 #define CMD_FB_NUM 0x46 1014 #define CMD_PTS_DETECTOR_EN 0x47 // enable filter for stream discontinue // to force the pts follow stc when pts=-1 1015 #define CMD_PTS_TBL_RESET 0x48 // to reset pas/vld and pts_tbl // add new arg: 2 for only use mvd parser 1016 #define CMD_DRAM_OBF 0x49 // for Dram OBF key setting 1017 #define CMD_FP_FILTER 0x4A // 0:1 for disable/enable field polarity tuning filter, 0 for default... 1018 #define CMD_PUSH_FIRST_FRAME_DISP 0x4B // 0:1 for disable/enable to push the first I-frame to dispQ when decoded done on ts and ts-file mode, 0 for default(disable)... 1019 #define CMD_FAST_RST 0x4C // 1 for enable mvd self reset... 1020 #define CMD_RVU_EN 0x4D //open RVU feature 1021 1022 #define CMD_SLQ_START 0x50 //SLQ start address, from LSB to MSB are arg0, arg1, arg2, arg3 1023 #define CMD_SLQ_END 0x51 //SLQ end address, from LSB to MSB are arg0, arg1, arg2, arg3 1024 #define CMD_SLQ_AVAIL_LEVEL 0x52 //arg0: 4-0 1025 #define CMD_FPGA_COMP 0x53 //arg0: 1/0:enable/disable FPGA comp 1026 #define CMD_DIVX_PATCH 0x54 //arg0: D[0] divx mv p interlace chroma adjust 1027 #define CMD_HEADER_INFO_BUF 0x55 //header info buffer base address, from LSB to MSB are arg0, arg1, arg2, arg3 1028 #define CMD_IDCT_SEL 0x56 // arg0 D[0]:0/1 llm/divx6 D[1]:0/1 unbias/bias rounding mode 1029 #define CMD_VOL_INFO_BUF 0x57 1030 #define CMD_FRAME_INFO_BUF 0x58 1031 #define CMD_CODE_OFFSET 0x59 1032 #define CMD_RESET_FRAMECOUNT 0x5a 1033 #define CMD_CHIPID 0x5b 1034 #define CMD_DEC_FRAME_INFO_BUF 0x5c 1035 #define CMD_GET_FW_VERSION 0x5E 1036 #define CMD_GET_EN_CATCH_DATA 0x5F 1037 1038 #define CMD_SLQ_TBL_BUF_START 0x60 1039 #define CMD_SLQ_TBL_BUF_END 0x61 1040 #define CMD_SLQ_UPDATE_TBL_WPTR 0x62 1041 #define CMD_SLQ_GET_TBL_RPTR 0x63 1042 1043 // FW stop updating frames when vsync, but decoding process is still going. 1044 #define CMD_FREEZE_DISP 0x64 1045 #define CMD_DS_VIRTUAL_BOX 0x65 1046 #define CMD_SHOW_ONE_FIELD 0x66 1047 #define CMD_FD_MASK_DELAY_CNT 0x67 // delay n's vsync then active the fd_mask 1048 1049 #define CMD_UPDATE_FRAME 0x68 // updating next frame in slow motion mode 1050 #define CMD_FRC_OUPUT 0x69 1051 #define CMD_FRC_DROP_BEHAVIOR 0x6A // arg0: FRC_DROP_FRAME/FRC_DROP_FIELD, default is FRC_DROP_FRAME 1052 1053 #define CMD_GET_NEXTDISPFRM 0x6B // for Mstreamer mode and mcu mode 1054 #define CMD_FLIP_RELEASE_FRAME 0x6C // for Mstreamer mode and mcu mode 1055 #define CMD_SEND_UNI_PTS 0x6D // for Mstreamer mode and mcu mode 1056 #define CMD_SET_MST_MODE 0x6E // for Mstreamer mode and mcu mode 1057 #define CMD_SET_MCU_MODE 0x6F // for mcu mode 1058 1059 #define CMD_DUMP_BITSTREAM_BASE 0x70 1060 #define CMD_DUMP_BITSTREAM_LENGTH 0x71 1061 1062 #define CMD_XC_LOW_DELAY_PARA 0x72 // set the parameter for XC_low_delay mechanism 1063 1064 #define CMD_MVD_IDLE 0x73 1065 #define CMD_INTERFACE_VERSION 0x74 1066 #define CMD_VC1_STREAM_TYPE_JPEG 0x75 1067 #define CMD_VC1_STREAM_TYPE_MJPEG 0x76 1068 #define CMD_VC1_BYPASS_MODE 0x77 1069 #define CMD_VC1_UPDATE_SLQ 0x78 1070 #define CMD_VC1_HW_SLQ_RESET 0x79 1071 #define CMD_FLUSH_DISP_QUEUE 0x7A 1072 #define CMD_VC1_FORCE_INTLACE_DISP 0x7B 1073 #define CMD_VC1_IP_SCALE_THRESHOLD 0x7C 1074 #define CMD_MOTION_COM_REDUCE 0x7D 1075 #define CMD_CLOSE_DEBLOCK 0x7E 1076 #define CMD_FIXED_FRAME_BUFFER 0x7F 1077 #define CMD_ENABLE_AUTO_MUTE 0x80 1078 #define CMD_FORCE_ALIGN_VSIZE 0x81 1079 #define CMD_PROG_SEQ_STREAM 0x82 1080 1081 // File mode avsync related 1082 #define CMD_ENABLE_AVSYNC_QUALIFIER 0x83// arg0=1:for enhance to do avsync when "enable_avsync=1" && "(lastcommand != CMD_PLAY)" for patch avsync on particular clip, 20120314 1083 #define CMD_ENABLE_LAST_FRAME_QUALIFIER 0x84// arg0=1:for strict qualify the last_frame_show_done after the last_frame been displayed by mvop, 20120309 1084 #define CMD_ENABLE_FILE_SYNC 0x85 1085 #define CMD_PTS_TBL_START 0x86 1086 #define CMD_FORCE_BLUE_SCREEN 0x87 1087 #define CMD_ENABLE_LAST_FRAME_SHOW 0x88 1088 #define CMD_DYNAMIC_SCALE_BASE 0x89 1089 #define CMD_ENABLE_DYNAMIC_SCALE 0x8A 1090 #define CMD_SCALER_INFO_BASE 0x8B 1091 #define CMD_SW_BITPLANE_BASE 0x8C 1092 #define CMD_FRONTEND_SEL 0x8D // front end input selection 1093 #define CMD_ENABLE_FREEZE_PIC 0x8E 1094 #define CMD_FORBID_RESOLUTION_CHANGE 0x8F 1095 1096 // JPEG command 1097 #define CMD_JPEG_CONSTRAIN_SIZE 0x91 1098 #define CMD_JPEG_STATUS 0x92 1099 #define CMD_JPEG_SCALEFACTOR 0x93 1100 #define CMD_JPEG_ROI 0x94 1101 #define CMD_JPEG_ROI_DIM 0x95 1102 #define CMD_JPEG_IPM 0x96 1103 1104 #define CMD_ENABLE_SAM_UNI 0xA0 // for Mstreamer mode 1105 #define CMD_FLIP_TO_DISP 0xA1 // for Mstreamer mode 1106 1107 #define CMD_MIU_OFFSET 0xA2 // saving miu offset from hk for LDMA usage 1108 #define CMD_IQMEM_CTRL 0xA3 // for iqmem ctrl from HK 1109 #define CMD_IQMEM_CTRL_ACK 0xA4 // return ack by f/w 1110 #define CMD_IQMEM_BASE_ADDR 0xA5 // unit in byte 1111 1112 // PES file-in command 1113 #define CMD_PES_FILE_LOW_BND 0xA6 // for pes file in mode low bound 1114 #define CMD_PES_FILE_UP_BND 0xA7 // for pes file in mode upper bound 1115 #define CMD_PES_FILE_EN 0xA8 // for enable pes file in mode 1116 #define CMD_PES_FILE_UPDATE_WPTR 0xA9 // for update pes file mode wr_ptr 1117 #define CMD_PES_FILE_GET_RPTR 0xAA // for got pes file in mode rd_ptr 1118 1119 #define CMD_REGISTER_BASE 0xAB 1120 1121 //new feature 1122 #define CMD_SUSPEND_DS 0xB0 1123 #define CMD_MPEG_LINER_START 0xB1 1124 #define CMD_PREBUFFER_SIZE 0xB2 //unit:bytes 1125 #define CMD_CC_ENABLE_EXTERNAL_BUFFER 0xB3 1126 #define CMD_TIME_INCR_PREDICT 0xB4 // to predict the "vol_time_incr" when there is no vol_header on mpeg4... 1127 #define CMD_RUNTIME_DEBUG_CMD 0XB5 1128 #define CMD_DUMP_MVD_HARDWARE_REGISTER 0xB6 1129 #define CMD_SMOOTH_REWIND 0xB7 //Smooth_rewind 1130 #define CMD_DECODE_ERROR_TOLERANCE 0xB8 //drop error rate 1131 #define CMD_PVR_SEAMLESS_MODE 0xB9 1132 #define CMD_AUTO_REDUCE_ES_DATA 0xBA 1133 #define CMD_MVD_TLB 0xBB 1134 #define CMD_FRC_ONLY_SHOW_TOP_FIELD 0xBC 1135 #define CMD_THUMBNAIL_LESS_FB_MODE 0xBD 1136 #define CMD_ES_FULL_STOP 0xBE 1137 #define CMD_AUTO_DROP_FRAME_IN_DECODE 0xBF 1138 #define CMD_DISABLE_PATCH_PBFRAME 0xC0 1139 #define CMD_DYNAMIC_MVOP_CONNECT 0xC1 1140 #define CMD_SLOW_SYNC_REPEAT 0xC2 1141 #define CMD_SLOW_SYNC_SKIP 0xC3 1142 #define CMD_VARIABLE_FRAMERATE 0xC4 1143 #define CMD_DYNAMIC_SCALE_SIZE 0xC5 1144 1145 // add data in bitstream from skip mode back to normal 1146 // 00_00_01_C5_ab_08_06_27 1147 #define FW_SPE_SCODE 0xC5 1148 #define FW_RESUME1 0xab08 1149 #define FW_RESUME2 0x0627 1150 #define FILE_PAUSE_SC 0xBE 1151 #define FILE_END_SC 0xC6 1152 #define FILE_END_EXT1 0xaabb 1153 #define FILE_END_EXT2 0xccdd 1154 #define FILE_END_EXT3 0xeeff 1155 #define FILE_END_EXT4 0xffff 1156 #define FILE_END_EXT5 0x0000 1157 1158 // For Git Changes 1159 #define GIT_TIMESTAMP 1472564636 1160 #endif 1161