1 //<MStar Software> 2 //****************************************************************************** 3 // MStar Software 4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved. 5 // All software, firmware and related documentation herein ("MStar Software") are 6 // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by 7 // law, including, but not limited to, copyright law and international treaties. 8 // Any use, modification, reproduction, retransmission, or republication of all 9 // or part of MStar Software is expressly prohibited, unless prior written 10 // permission has been granted by MStar. 11 // 12 // By accessing, browsing and/or using MStar Software, you acknowledge that you 13 // have read, understood, and agree, to be bound by below terms ("Terms") and to 14 // comply with all applicable laws and regulations: 15 // 16 // 1. MStar shall retain any and all right, ownership and interest to MStar 17 // Software and any modification/derivatives thereof. 18 // No right, ownership, or interest to MStar Software and any 19 // modification/derivatives thereof is transferred to you under Terms. 20 // 21 // 2. You understand that MStar Software might include, incorporate or be 22 // supplied together with third party`s software and the use of MStar 23 // Software may require additional licenses from third parties. 24 // Therefore, you hereby agree it is your sole responsibility to separately 25 // obtain any and all third party right and license necessary for your use of 26 // such third party`s software. 27 // 28 // 3. MStar Software and any modification/derivatives thereof shall be deemed as 29 // MStar`s confidential information and you agree to keep MStar`s 30 // confidential information in strictest confidence and not disclose to any 31 // third party. 32 // 33 // 4. MStar Software is provided on an "AS IS" basis without warranties of any 34 // kind. Any warranties are hereby expressly disclaimed by MStar, including 35 // without limitation, any warranties of merchantability, non-infringement of 36 // intellectual property rights, fitness for a particular purpose, error free 37 // and in conformity with any international standard. You agree to waive any 38 // claim against MStar for any loss, damage, cost or expense that you may 39 // incur related to your use of MStar Software. 40 // In no event shall MStar be liable for any direct, indirect, incidental or 41 // consequential damages, including without limitation, lost of profit or 42 // revenues, lost or damage of data, and unauthorized system use. 43 // You agree that this Section 4 shall still apply without being affected 44 // even if MStar Software has been modified by MStar in accordance with your 45 // request or instruction for your use, except otherwise agreed by both 46 // parties in writing. 47 // 48 // 5. If requested, MStar may from time to time provide technical supports or 49 // services in relation with MStar Software to you for your use of 50 // MStar Software in conjunction with your or your customer`s product 51 // ("Services"). 52 // You understand and agree that, except otherwise agreed by both parties in 53 // writing, Services are provided on an "AS IS" basis and the warranty 54 // disclaimer set forth in Section 4 above shall apply. 55 // 56 // 6. Nothing contained herein shall be construed as by implication, estoppels 57 // or otherwise: 58 // (a) conferring any license or right to use MStar name, trademark, service 59 // mark, symbol or any other identification; 60 // (b) obligating MStar or any of its affiliates to furnish any person, 61 // including without limitation, you and your customers, any assistance 62 // of any kind whatsoever, or any information; or 63 // (c) conferring any license or right under any intellectual property right. 64 // 65 // 7. These terms shall be governed by and construed in accordance with the laws 66 // of Taiwan, R.O.C., excluding its conflict of law rules. 67 // Any and all dispute arising out hereof or related hereto shall be finally 68 // settled by arbitration referred to the Chinese Arbitration Association, 69 // Taipei in accordance with the ROC Arbitration Law and the Arbitration 70 // Rules of the Association by three (3) arbitrators appointed in accordance 71 // with the said Rules. 72 // The place of arbitration shall be in Taipei, Taiwan and the language shall 73 // be English. 74 // The arbitration award shall be final and binding to both parties. 75 // 76 //****************************************************************************** 77 //<MStar Software> 78 #ifndef __M4VD_MSG_QUE_H__ 79 #define __M4VD_MSG_QUE_H__ 80 81 #include "controller.h" 82 83 84 85 #define DISPQ_SIZE 12 86 #define FRAMEQ_SIZE 16 87 88 #ifdef LIGHTWEIGHT //FW31_1.8M 89 #define OFFSET_BASE 0x000C0000 90 #else 91 #if defined(SUPPORT_EVD) && (SUPPORT_EVD==1) 92 #define OFFSET_BASE 0x00100000 93 #else 94 #define OFFSET_BASE 0x000A0000 95 #endif 96 #endif 97 98 #define FW_VOL_INFO_START (0x000+OFFSET_BASE) 99 #define DEBUG_BUF_START (0x500+OFFSET_BASE) 100 #define DEBUG_VSYNC_BUF_START (0xF00+OFFSET_BASE) 101 #define FW_FRAME_INFO_START (0x1000+OFFSET_BASE) 102 #define FW_DIVX_INFO_START (0x2000+OFFSET_BASE) 103 #define DEC_FRMAE_INFO_START (0x14300+OFFSET_BASE) 104 #define VBBU_TABLE_START (0x15400+OFFSET_BASE) 105 #define DISP_QUEUE_START (0x17400+OFFSET_BASE) 106 #define VCOMMANDQ_INFO_START (0x18400+OFFSET_BASE) 107 #define VDISP_COMMANDQ_START (0x19400+OFFSET_BASE) // 4k bytes 108 #define VNORMAL_COMMANDQ_START (0x1A400+OFFSET_BASE) // 4k bytes 109 110 #define MVD_DRAM_SIZE 0x40000 // MVD DRAM heap size, 256k 111 112 #define MVD_MAX_VSYNC_DBG_CNT 0x100 113 114 /* 115 Share Memory layout 116 | FW_VOL_INFO | DEBUG_BUF | FW_FRAME_INFO | FW_DIVX_INFO | USERDATABUF | SLQBUF | PTSTBL | DSADDR | SCALER_INFO | DEC_FRMAE_INFO | VBBU_TABLE | VSYNC_BRIDGE 117 0 500 1000 2000 3000 B000 B200 13200 14200 14300 14400 1FA00 118 */ 119 120 // VC1_SEQ_INFO put on 65K 121 #define FW_VERSION 0x08043655 122 #define INTERFACE_VERSION 0x00000368 //add information : u8TileMode 123 #define EN_SECTION_START 0x20000000 124 125 typedef struct _FW_VOL_INFO 126 { 127 //VOL infomation 128 unsigned short vol_info; //0 129 // D[5] short_video_header; //1 130 // D[4] vol_interlaced; 131 // D[3] vol_qpel; 132 // D[2] vol_rsync_marker_disable; 133 // D[1] vol_dp_enable; 134 // D[0] vol_rvlc_enable; 135 unsigned short sprite_usage; //2 136 137 unsigned int width; //4 138 unsigned int height; //8 139 140 unsigned short pts_incr; //12 141 unsigned short reserved0; //14 142 143 unsigned char aspect_ratio; //16 144 unsigned char progressive_sequence; //17 145 unsigned char mpeg1; //18 146 unsigned char play_mode; //19 147 148 unsigned char mpeg_frc_mode; //20 149 unsigned char first_display; //21 150 unsigned char low_delay; //22 151 unsigned char video_range; //23 152 153 unsigned int bit_rate; //24 154 155 unsigned short vol_time_incr_res; //28 156 unsigned short fixed_vop_time_incr; //30 // 0: not fixed_vop_rate others : vop_time_incr 157 158 unsigned char par_width; //32 159 unsigned char par_height; //33 160 unsigned char u8AFD; //34 161 unsigned char original_progressive; //35 162 163 unsigned int vc1_frame_rate; //36 164 unsigned int frame_rate; //40 165 166 unsigned char key_gen[32]; //44 167 168 unsigned char ds_enable; //76 169 unsigned char stereo_type; //77 170 unsigned short CropBottom; //78 // For HDMI 3D Output mode. 171 172 unsigned int DSbufsize; //80 173 174 unsigned char suspend_ds; //84 175 unsigned char reserved4[2]; //85,86 176 unsigned char CMA_AllocDone; //87 177 178 unsigned int CMA_FB_Address; //88 179 unsigned int CMA_FB_Size; //92 180 unsigned int slq_end; //96 181 unsigned int slq_start; //100 182 unsigned int slq_end2; //104 183 unsigned int slq_start2; //108 184 185 volatile unsigned char u32VirtualCommandArg0; //112 186 volatile unsigned char u32VirtualCommandArg1; //113 187 volatile unsigned char u32VirtualCommandArg2; //114 188 volatile unsigned char u32VirtualCommandArg3; //115 189 190 volatile unsigned char u32VirtualCommandArg4; //116 191 volatile unsigned char u32VCHandshake; //117 192 unsigned short u16Profile; //118 193 194 unsigned int DS_Depth; //120 195 196 unsigned int u32RealFrameRate; //124 197 198 unsigned int u32DispWidth; //128 199 unsigned int u32DispHeight; //132 200 201 unsigned short u16Level; //136 202 unsigned char reserved[2]; //138 203 }FW_VOL_INFO,*pFW_VOL_INFO;//16 byte 204 205 #define OFFSET_VOL_INFO 0 206 #define OFFSET_SPRITE_USAGE 2 207 #define OFFSET_WIDTH 4 208 #define OFFSET_HEIGHT 8 209 #define OFFSET_PTS_INCR 12 210 #define OFFSET_RESERVED0 14 211 #define OFFSET_ASPECT_RATIO 16 212 #define OFFSET_PROGRESSIVE_SEQUENCE 17 213 #define OFFSET_MPEG1 18 214 #define OFFSET_PLAY_MODE 19 215 #define OFFSET_MPEG_FRC_MODE 20 216 #define OFFSET_FIRST_DISPLAY 21 217 #define OFFSET_LOW_DELAY 22 218 #define OFFSET_VIDEO_RANGE 23 219 #define OFFSET_BIT_RATE 24 220 #define OFFSET_VOL_TIME_INCR_RES 28 221 #define OFFSET_FIXED_VOP_TIME_INCR 30 222 #define OFFSET_PAR_WIDTH 32 223 #define OFFSET_PAR_HEIGHT 33 224 #define OFFSET_AFD 34 225 #define OFFSET_ORIGINAL_PROGRESSIVE 35 226 #define OFFSET_VC1_FRAME_RATE 36 227 #define OFFSET_FRAME_RATE 40 228 #define OFFSET_KEY_GEN 44 229 #define OFFSET_DS_ENABLE 76 230 #define OFFSET_STEREO_TYPE 77 231 #define OFFSET_CROPBOTTOM 78 232 #define OFFSET_DSBUFSIZE 80 233 #define OFFSET_SUSPEND_DS 84 234 #define OFFSET_CMA_ALLOCDONE 87 235 #define OFFSET_CMA_FB_ADDRESS 88 236 #define OFFSET_CMA_FB_SIZE 92 237 #define OFFSET_SLQ_END 96 238 #define OFFSET_SLQ_START 100 239 #define OFFSET_SLQ_END1 104 240 #define OFFSET_SLQ_START1 108 241 #define OFFSET_VIRTUAL_COMMANDARG0 112 242 #define OFFSET_VIRTUAL_COMMANDARG1 113 243 #define OFFSET_VIRTUAL_COMMANDARG2 114 244 #define OFFSET_VIRTUAL_COMMANDARG3 115 245 #define OFFSET_VIRTUAL_COMMANDARG4 116 246 #define OFFSET_VCHANDSHAKE 117 247 #define OFFSET_PROFILE 118 248 #define OFFSET_DS_DEPTH 120 249 #define OFFSET_REALFRAMERATE 124 250 #define OFFSET_DISPWIDTH 128 251 #define OFFSET_DISPHEIGHT 132 252 #define OFFSET_LEVEL 136 253 254 typedef struct 255 { 256 union 257 { 258 struct 259 { 260 unsigned int mvdcmd_handshake_pause : 1; // 1 for handshake ready with CMD_PAUSE, 261 unsigned int mvdcmd_handshake_slq_reset : 1; // 1 for handshake ready with CMD_VC1_HW_SLQ_RESET 262 unsigned int mvdcmd_handshake_stop : 1; // 1 for handshake ready with CMD_STOP 263 unsigned int mvdcmd_handshake_skip_data : 1; // 1 for handshake ready with CMD_SKIP_DATA 264 unsigned int mvdcmd_handshake_skip_to_pts : 1; // 1 for handshake ready with CMD_SKIP_TO_PTS 265 unsigned int mvdcmd_handshake_single_step : 1; // 1 for handshake ready with CMD_SINGLE_STEP 266 unsigned int mvdcmd_handshake_scaler_data_ready : 1; 267 unsigned int mvdcmd_handshake_get_nextdispfrm_ready : 1; // for Mstreamer mode 268 unsigned int mvdcmd_handshake_parser_rst : 1; // 1 for handshake done with CMD_PTS_TBL_RESET 269 unsigned int mvdcmd_handshake_cc608_rst : 1; // "0" for handshake done with mstar cc608 270 unsigned int mvdcmd_handshake_cc708_rst : 1; // "0" for handshake done with mstar cc708 271 unsigned int mvdcmd_handshake_fast_rst : 1; // 1 for handshake done with CMD_FAST_RST, 1 for fast_rst_done... 272 unsigned int mvdcmd_handshake_detatch : 1; // 1 for handshake ready with exit main loop 273 unsigned int mvdcmd_handshake_pvr_seamless_mode : 1; // 1 for handshake ready 274 unsigned int mvdcmd_handshake_virtualCommand : 1; // 1 for handshake ready with virtual command get status done 275 unsigned int mvdcmd_handshake_flush : 1; // 1 for handshake ready with flush disp queue command 276 unsigned int mvdcmd_handshake_vsync_control : 1; // 1 for handshake ready with flush disp queue command 277 unsigned int mvdcmd_handshake_reserved : 15; // reserved for extend 278 }; 279 unsigned int value; 280 }; 281 }MVD_CMD_HANDSHADE_INDEX; 282 283 typedef struct 284 { 285 union 286 { 287 struct 288 { 289 unsigned int mvd_xc_disable_black_screen : 1; // 1 for XC disable the black screen, defaule is "0"... 290 unsigned int mvd_xc_release_force_rbank : 1; // 1 for XC release force read bank, defaule is "0"... 291 unsigned int mvd_xc_release_bob_mode : 1; // 1 for XC release BOB mode, defaule is "0"... 292 unsigned int mvd_xc_release_UCNR : 1; // 1 for XC release UCNR, defaule is "0"... 293 unsigned int mvd_xc_reserved : 28; // reserved for extend 294 }; 295 unsigned int value; 296 }; 297 }MVD_XC_LOW_DELAY_INT_STATE; 298 299 typedef struct _FW_FRAME_INFO 300 { 301 unsigned int frame_count; //0 302 unsigned int slq_tbl_rptr; //4 // ==>ms 303 unsigned int vol_update; //8 304 unsigned int error_code; //12 305 306 unsigned int error_status; //16 307 unsigned int skip_frame_count; //20 308 unsigned int picture_type; //24 // 0:I frame 1:P frame 2:B frame 309 unsigned int slq_sw_index; //28 310 311 unsigned char fb_index; //32 312 unsigned char top_ff; //33 313 unsigned char repeat_ff; //34 314 unsigned char invalidstream; //35 315 unsigned int vld_err_count; //36 316 unsigned short tmp_ref; //40 317 unsigned char first_frame; //42 318 unsigned char first_I_found; //43 319 unsigned int gop_i_fcnt; //44 320 321 unsigned int gop_p_fcnt; //48 322 unsigned int gop_b_fcnt; //52 323 unsigned int overflow_count; //56 324 unsigned int time_incr; //60 325 326 unsigned int self_rst_count; //64 327 unsigned int sw_vd_count; //68 328 unsigned int step_disp_done; //72 329 unsigned int step_to_pts_done; //76 330 331 MVD_CMD_HANDSHADE_INDEX cmd_handshake_index; //80 332 unsigned int last_frame_show_done; //84 333 unsigned int meet_file_end_sc; //88 334 unsigned int rcv_payload_lenth; //92 335 336 unsigned int firmware_version; //96 337 unsigned int ic_version; //100 338 unsigned int interface_version; //104 339 unsigned char color_primaries; //108 340 unsigned char transfer_char; //109 341 unsigned char matrix_coef; //110 342 unsigned char video_format; //111 343 344 unsigned short disp_h_size; //112 345 unsigned short disp_v_size; //114 346 unsigned char time_code_hours; //116 347 unsigned char time_code_minutes; //117 348 unsigned char time_code_seconds; //118 349 unsigned char time_code_pictures; //119 350 unsigned char drop_frame_flag; //120 351 unsigned char time_code_hours_disp; //121 352 unsigned char time_code_minutes_disp; //122 353 unsigned char time_code_seconds_disp; //123 354 unsigned char time_code_pictures_disp; //124 355 unsigned char drop_frame_flag_disp; //125 356 unsigned char PicStruct; //126 357 unsigned char chroma_format; //127 358 359 int pts_stc; //128 360 unsigned int displayed_cnt; //132 361 unsigned int next_pts; //136 362 unsigned short centre_h_offset; //140 363 unsigned short centre_v_offset; //142 364 365 unsigned int int_cnt; //144 366 unsigned int disp_pts; //148 // pts of current displayed frame 367 unsigned int high32_pts; //152 // msb of 33-bit pts 368 unsigned char dispQnum; //156 369 unsigned char CurrentESBufferStatus; //157 // init:0x00,underflow:0x01,overflow:0x02,normal:0x03 370 unsigned char framebufferresource; //158 // default: 0, ok: 1, fail : 2 371 unsigned char framebuffer_status; //159 372 373 unsigned int divx_ver_5x; //160 // report divx version... 374 unsigned int frame_buf_size; //164 // report real frame buffer size(unit in bytes)... 375 MVD_XC_LOW_DELAY_INT_STATE xc_low_delay_int_state; //168 // for xc low delay interrupt status... 376 unsigned int xc_low_delay_cnt; //172 377 378 unsigned int xc_diff_field_no; //176 // for get XC diff field number... 379 unsigned int xc_low_delay_cnt_latched; //180 // for dbg xc_low_delay timing only... 380 unsigned int drop_count; //184 // for counting that decoded frame who doesn't display 381 382 unsigned int rdptr_pts_low; //188 // for TM14 pts flow control, pts based on pts table read pointer 383 unsigned int rdptr_pts_high; //192 // for TM14 pts flow control, pts based on pts table read pointer 384 unsigned int wrptr_pts_low; //196 // for TM14 pts flow control, pts based on pts table write pointer 385 unsigned int wrptr_pts_high; //200 // for TM14 pts flow control, pts based on pts table write pointer 386 387 unsigned int wait_decode_done_cnt; //204 388 unsigned int wait_seach_buffer_cnt; //208 389 unsigned int wait_search_code_cnt; //212 390 unsigned int wait_pre_buf_cnt; //216 391 unsigned int wait_vfifo_buf_cnt; //220 392 unsigned int wait_search_header_cnt; //224 393 unsigned int wait_flash_pattern_cnt; //228 394 unsigned int pb_chunk_count; //232 395 unsigned int pb_buffer_count; //236 396 unsigned int pb_chunk_flag; //240 397 unsigned int divx311_flag; //244 398 unsigned int pvr_seamless_status; //248 399 unsigned int int_stat; //252 400 unsigned int drop_frame_count; //256 401 unsigned int disp_stc; //260 402 unsigned int repeat_frame_count; //264 403 unsigned char color_descript; //268 404 unsigned char u8PVRSeamlessTargetPTSHigh; //269 405 unsigned char u8PVRSeamlessTargetFrameType; //270 406 unsigned char seq_found; //271 407 unsigned int idle_count; //272 408 unsigned int u32PVRSeamlessTargetPTS; //276 409 unsigned int frame_wrtptr; //280 410 unsigned int frame_readptr; //284 411 unsigned char frame_type[FRAMEQ_SIZE]; //288 412 unsigned int frame_timestamp[FRAMEQ_SIZE];//304 413 volatile unsigned int first_pts_h; //368 414 volatile unsigned int first_pts_l; //372 415 unsigned int u32CurMinTspDataSize; //376 416 417 }FW_FRAME_INFO, *pFW_FRAME_INFO; 418 419 #define OFFSET_FRAME_COUNT 0 420 #define OFFSET_SLQ_TBL_RPTR 4 421 #define OFFSET_VOL_UPDATE 8 422 #define OFFSET_ERROR_CODE 12 423 #define OFFSET_ERROR_STATUS 16 424 #define OFFSET_SKIP_FRAME_COUNT 20 425 #define OFFSET_PICTURE_TYPE 24 426 #define OFFSET_SLQ_SW_INDEX 28 427 #define OFFSET_FB_INDEX 32 428 #define OFFSET_TOP_FF 33 429 #define OFFSET_REPEAT_FF 34 430 #define OFFSET_INVALIDSTREAM 35 431 #define OFFSET_VLD_ERR_COUNT 36 432 #define OFFSET_TMP_REF 40 433 #define OFFSET_FIRST_FRAME 42 434 #define OFFSET_FIRST_I_FOUND 43 435 #define OFFSET_GOP_I_FCNT 44 436 #define OFFSET_GOP_P_FCNT 48 437 #define OFFSET_GOP_B_FCNT 52 438 #define OFFSET_OVERFLOW_COUNT 56 439 #define OFFSET_TIME_INCR 60 440 #define OFFSET_SELF_RST_COUNT 64 441 #define OFFSET_SW_VD_COUNT 68 442 #define OFFSET_STEP_DISP_DONE 72 443 #define OFFSET_STEP_TO_PTS_DONE 76 444 #define OFFSET_CMD_HANDSHAKE_INDEX 80 445 #define OFFSET_CMD_LAST_FRAME_SHOW 84 446 #define OFFSET_MEET_FILE_END_SC 88 447 #define OFFSET_RCV_PAYLOAD_LENGTH 92 448 #define OFFSET_FIRMWARE_VERSION 96 449 #define OFFSET_IC_VERSION 100 450 #define OFFSET_INTERFACE_VERSION 104 451 #define OFFSET_COLOR_PRIMARIES 108 452 #define OFFSET_TRANSFER_CHAR 109 453 #define OFFSET_MATRIX_COEF 110 454 #define OFFSET_VIDEO_FORMAT 111 455 #define OFFSET_DISP_H_SIZE 112 456 #define OFFSET_DISP_V_SIZE 114 457 #define OFFSET_TIME_CODE_HOURS 116 // for decoding frame 458 #define OFFSET_TIME_CODE_MINUTES 117 // for decoding frame 459 #define OFFSET_TIME_CODE_SECONDS 118 // for decoding frame 460 #define OFFSET_TIME_CODE_PICTURES 119 // for decoding frame 461 #define OFFSET_DROP_FRAME_FLAG 120 // for decoding frame 462 #define OFFSET_TIME_CODE_HOURS_DISP 121 // for displaying frame 463 #define OFFSET_TIME_CODE_MINUTES_DISP 122 // for displaying frame 464 #define OFFSET_TIME_CODE_SECONDS_DISP 123 // for displaying frame 465 #define OFFSET_TIME_CODE_PICTURES_DISP 124 // for displaying frame 466 #define OFFSET_DROP_FRAME_FLAG_DISP 125 // for displaying frame 467 #define OFFSET_PICTURE_STRUCTURE 126 468 #define OFFSET_CHROMA_FORMAT 127 469 #define OFFSET_PTS_STC 128 // integer, pts_stc(n)=pts(n)-stc(n) 470 #define OFFSET_DISPLAYED_CNT 132 471 #define OFFSET_NEXT_PTS 136 472 #define OFFSET_CENTRE_H_OFFSET 140 473 #define OFFSET_CENTRE_V_OFFSET 142 474 #define OFFSET_INT_CNT 144 475 #define OFFSET_DISP_PTS 148 476 #define OFFSET_DISP_PTS_MSB 152 477 #define OFFSET_DISPQ_NUM 156 478 #define OFFSET_CURRENT_ES_BUFFER_STATUS 157 479 #define OFFSET_FRAME_BUFFER_RESOURCE 158 480 #define OFFSET_FRAME_BUFFER_STATUS 159 481 #define OFFSET_DIVX_VER_5X 160 482 #define OFFSET_FRAME_BUF_SIZE 164 // report real frame buffer size(unit in bytes)... 483 #define OFFSET_XC_LOW_DELAY_INT_STATE 168 // for xc low delay interrupt status... 484 #define OFFSET_XC_LOW_DELAY_CNT 172 // for xc low delay interrupt status... 485 #define OFFSET_XC_DIFF_FIELD_NO 176 // for get XC diff field number... 486 #define OFFSET_XC_LOW_DELAY_CNT_LATCH 180 // for dbg xc_low_delay timing only... 487 #define OFFSET_DROP_COUNT 184 // for counting that decoded frame who doesn't display 488 #define OFFSET_RDPTR_PTS_LOW 188 489 #define OFFSET_RDPTR_PTS_HIGH 192 490 #define OFFSET_WRPTR_PTS_LOW 196 491 #define OFFSET_WRPTR_PTS_HIGH 200 492 #define OFFSET_DECODEDONE_COUNT 204 493 #define OFFSET_SEARCHBUF_COUNT 208 494 #define OFFSET_SEARCHCODE_COUNT 212 495 #define OFFSET_PREBUF_COUNT 216 496 #define OFFSET_VFIFOBUF_COUNT 220 497 #define OFFSET_SEARCHHEADER_COUNT 224 498 #define OFFSET_FLASHPATTERN_COUNT 228 499 #define OFFSET_PB_CHUNK_COUNT 232 500 #define OFFSET_PB_BUFFER_COUNT 236 501 #define OFFSET_PB_CHUNK_FLAG 240 502 #define OFFSET_DIVX311_FLAG 244 503 #define OFFSET_PVR_SEAMLESS_STATUS 248 504 #define OFFSET_INT_STAT 252 505 #define OFFSET_DROP_FRAME_COUNT 256 506 #define OFFSET_DISP_STC 260 507 #define OFFSET_REPEAT_FRAME_COUNT 264 508 #define OFFSET_COLOR_DESCRIPT 268 509 #define OFFSET_PVRSEAMLESSTARGETPTSHIGH 269 510 #define OFFSET_PVRSEAMLESSTARGETFRAMETYPE 270 511 #define OFFSET_SEQ_FOUND 271 512 #define OFFSET_IDLE_COUNT 272 513 #define OFFSET_PVRSEAMLESSTARGETPTS 276 514 #define OFFSET_FRAME_WRTPTR 280 515 #define OFFSET_FRAME_READPTR 284 516 #define OFFSET_FRAME_TYPE 288 517 #define OFFSET_FRAME_TIMESTAMP 304 518 #define OFFSET_FIRST_PTS_H 368 519 #define OFFSET_FIRST_PTS_L 372 520 #define OFFSET_CUR_MIN_TSP_DATA_SIZE 376 521 522 typedef struct _FW_DIVX_INFO 523 { 524 unsigned int vol_handle_done; //0 525 526 unsigned int width; //4 527 unsigned int height; //8 528 unsigned int frame_count; //12 529 unsigned int frame_time; //16 530 531 unsigned short pts_incr; //20 532 unsigned short reserve0; 533 534 unsigned char aspect_ratio; //24 535 unsigned char progressive_sequence; //25 536 unsigned char mpeg1; //26 537 unsigned char play_mode; //27 538 539 unsigned char mpeg_frc_mode; //28 540 unsigned char invalidstream; //29 541 unsigned char reserve[2]; //30 542 unsigned int frame_rate; //32 543 }FW_DIVX_INFO, *pFW_DIVX_INFO; 544 545 #define OFFSET_DIVX_VOL_HANDLE_DONE 0 546 #define OFFSET_DIVX_WIDTH 4 547 #define OFFSET_DIVX_HEIGHT 8 548 #define OFFSET_DIVX_FRAME_COUNT 12 549 #define OFFSET_DIVX_FRAME_TIME 16 550 #define OFFSET_DIVX_PTS_INCR 20 551 #define OFFSET_DIVX_RESERVE0 22 552 #define OFFSET_DIVX_ASPECT_RATIO 24 553 #define OFFSET_DIVX_PROGRESSIVE_SEQUENCE 25 554 #define OFFSET_DIVX_MPEG1 26 555 #define OFFSET_DIVX_PLAY_MODE 27 556 #define OFFSET_DIVX_MPEG_FRC_MODE 28 557 #define OFFSET_DIVX_INVALIDSTREAM 29 558 #define OFFSET_DIVX_RESERVED 30 559 #define OFFSET_DIVX_FRAME_RATE 32 560 561 #define STATUS_VIDEO_SYNC (1<<0) 562 #define STATUS_VIDEO_FREERUN (1<<1) 563 #define STATUS_VIDEO_SKIP (1<<2) 564 #define STATUS_VIDEO_REPEAT (1<<3) 565 566 typedef struct _FW_USER_DATA_BUF 567 { 568 unsigned char picType; /* picture type: 1->I picture, 2->P,3->B */ 569 unsigned char top_ff; /* Top field first: 1 if top field first*/ 570 unsigned char rpt_ff; /* Repeat first field: 1 if repeat field first*/ 571 unsigned char userdatabytecnt; 572 573 unsigned short tmpRef; /* Temporal reference of the picture*/ 574 575 unsigned char userdata[250]; 576 }FW_USER_DATA_BUF,*pFW_USER_DATA_BUF; 577 578 #define FW_USER_DATA_BUF_EXT_PACK_LEN 240 579 typedef struct _FW_USER_DATA_BUF_EXT 580 { 581 unsigned char picType; /* picture type: 1->I picture, 2->P,3->B */ 582 unsigned char top_ff; /* Top field first: 1 if top field first*/ 583 unsigned char rpt_ff; /* Repeat first field: 1 if repeat field first*/ 584 unsigned char userdatabytecnt; 585 586 unsigned short tmpRef; /* Temporal reference of the picture*/ 587 unsigned char PicStruct; /* picture struct with this cc pack*/ 588 unsigned char reserved; 589 590 unsigned int pts; /* pts with this cc pack*/ 591 unsigned int reserved2; 592 593 unsigned char userdata[FW_USER_DATA_BUF_EXT_PACK_LEN]; 594 }FW_USER_DATA_BUF_EXT,*pFW_USER_DATA_BUF_EXT; 595 596 typedef struct _DecFrameInfo 597 { 598 unsigned int u32DecLumaAddr; //0 599 unsigned int u32DecChromaAddr; //4 600 unsigned int u32DecTimeStamp; //8 601 unsigned int u32DecID_L; //12 602 unsigned int u32DecID_H; //16 603 unsigned short u16DecPitch; //20 604 unsigned short u16DecWidth; //22 605 unsigned short u16DecHeight; //24 606 unsigned short u16DeceFrameType; //26 607 unsigned int u32DispLumaAddr; //28 608 unsigned int u32DispChromaAddr; //32 609 unsigned int u32DispTimeStamp; //36 610 unsigned int u32DispID_L; //40 611 unsigned int u32DispID_H; //44 612 unsigned short u16DispPitch; //48 613 unsigned short u16DispWidth; //50 614 unsigned short u16DispHeight; //52 615 unsigned short u16DispeFrameType; //54 616 // for Mstreamer mode 617 unsigned int u32NextDispLumaAddr; //56 618 unsigned int u32NextDispChromaAddr; //60 619 unsigned int u32NextDispTimeStamp; //64 620 unsigned int u32NextDispID_L; //68 621 unsigned int u32NextDispID_H; //72 622 unsigned short u16NextDispPitch; //76 623 unsigned short u16NextDispWidth; //78 624 unsigned short u16NextDispHeight; //80 625 unsigned short u16NextDispeFrameType; //82 626 unsigned short u16NextDispFrameIdx; //84 627 // for vc1/rcv range reduction 628 unsigned char u8NextDispRangeRed_Y; //86 //[7]: on/off [6:0]: scale 629 unsigned char u8NextDispRangeRed_UV; //87 //[7]: on/off [6:0]: scale 630 // for MCU mode, which support interlace 631 unsigned short u16ExtData; //88 632 unsigned char u8Progressive; //90 633 unsigned char u8TileMode; //91 634 }DecFrameInfo, *pDecFrameInfo; 635 636 #define OFFSET_DECFRAMEINFO_DEC_LUMAADDR 0 637 #define OFFSET_DECFRAMEINFO_DEC_CHROMAADDR 4 638 #define OFFSET_DECFRAMEINFO_DEC_TIMESTAMP 8 639 #define OFFSET_DECFRAMEINFO_DEC_ID_L 12 640 #define OFFSET_DECFRAMEINFO_DEC_ID_H 16 641 #define OFFSET_DECFRAMEINFO_DEC_PITCH 20 642 #define OFFSET_DECFRAMEINFO_DEC_WIDTH 22 643 #define OFFSET_DECFRAMEINFO_DEC_HEIGHT 24 644 #define OFFSET_DECFRAMEINFO_DEC_FRAMETYPE 26 645 #define OFFSET_DECFRAMEINFO_DISP_LUMAADDR 28 646 #define OFFSET_DECFRAMEINFO_DISP_CHROMAADDR 32 647 #define OFFSET_DECFRAMEINFO_DISP_TIMESTAMP 36 648 #define OFFSET_DECFRAMEINFO_DISP_ID_L 40 649 #define OFFSET_DECFRAMEINFO_DISP_ID_H 44 650 #define OFFSET_DECFRAMEINFO_DISP_PITCH 48 651 #define OFFSET_DECFRAMEINFO_DISP_WIDTH 50 652 #define OFFSET_DECFRAMEINFO_DISP_HEIGHT 52 653 #define OFFSET_DECFRAMEINFO_DISP_FRAMETYPE 54 654 #define OFFSET_DECFRAMEINFO_NEXTDISP_LUMAADDR 56 // for Mstreamer mode 655 #define OFFSET_DECFRAMEINFO_NEXTDISP_CHROMAADDR 60 656 #define OFFSET_DECFRAMEINFO_NEXTDISP_TIMESTAMP 64 657 #define OFFSET_DECFRAMEINFO_NEXTDISP_ID_L 68 658 #define OFFSET_DECFRAMEINFO_NEXTDISP_ID_H 72 659 #define OFFSET_DECFRAMEINFO_NEXTDISP_PITCH 76 660 #define OFFSET_DECFRAMEINFO_NEXTDISP_WIDTH 78 661 #define OFFSET_DECFRAMEINFO_NEXTDISP_HEIGHT 80 662 #define OFFSET_DECFRAMEINFO_NEXTDISP_FRAMETYPE 82 663 #define OFFSET_DECFRAMEINFO_NEXTDISP_FRAMEIDX 84 // for Mstreamer mode 664 #define OFFSET_DECFRAMEINFO_NEXTDISP_RANGERED_Y 86 // for vc1/rcv 665 #define OFFSET_DECFRAMEINFO_NEXTDISP_RANGERED_UV 87 // for vc1/rcv 666 #define OFFSET_DECFRAMEINFO_NEXTDISP_EXT_DATA 88 // for MCU mode, which support interlace 667 #define OFFSET_DECFRAMEINFO_NEXTDISP_PROGRESSIVE 90 // is progressive or not 668 669 670 typedef struct __DISPQ_IN_DRAM 671 { 672 volatile unsigned int dispQ_rd; 673 volatile unsigned int dispQ_wr; 674 volatile DecFrameInfo disp_info[DISPQ_SIZE]; 675 volatile int dispQ_len; 676 volatile unsigned int bUsedByOutside[DISPQ_SIZE]; 677 }DISPQ_IN_DRAM; 678 679 680 681 typedef struct _DEBUG_INFO 682 { 683 // 684 volatile unsigned short max_coded_width; 685 volatile unsigned short max_coded_height; 686 volatile unsigned short sync_status; // defined by AV_SYNC 687 688 volatile unsigned short REG67; 689 volatile unsigned short REG68; 690 volatile unsigned short REG69; 691 692 volatile unsigned short REG6a; 693 volatile unsigned short REG6b; 694 volatile unsigned short REG6c; 695 696 volatile unsigned short REG6d; 697 volatile unsigned short REG6e; 698 volatile unsigned short REG6f; 699 700 // 701 volatile unsigned short overflow_count; 702 volatile unsigned short underflow_count; 703 volatile unsigned short vlderr_count; 704 volatile unsigned short frame_conut;//0 705 706 volatile unsigned int y_start_addr; //in byte unit 707 volatile unsigned int uv_start_addr;//in byte unit 708 709 volatile unsigned int width; 710 volatile unsigned int height; 711 712 // where 713 volatile unsigned short mb_x; 714 volatile unsigned short mb_y; 715 716 volatile unsigned short file_end; 717 //16-byte aligned 718 volatile unsigned char reserved[24]; 719 720 }DebugInfo; 721 722 typedef struct VC1_SEQ_INFO 723 { 724 volatile unsigned int PROFILE; 725 volatile unsigned int FRMRTQ_POSTPROC; 726 volatile unsigned int BITRTQ_POSTPROC; 727 volatile unsigned int LOOPFILTER; 728 volatile unsigned int MULTIRES; 729 volatile unsigned int FASTUVMC; 730 volatile unsigned int EXTENDED_MV; 731 volatile unsigned int DQUANT; 732 volatile unsigned int VSTRANSFORM; 733 volatile unsigned int OVERLAP; 734 volatile unsigned int SYNCMARKER; 735 volatile unsigned int RANGERED; 736 volatile unsigned int MAXBFRAMES; 737 volatile unsigned int QUANTIZER; 738 volatile unsigned int FINTERPFLAG; 739 volatile unsigned int LEVEL; 740 volatile unsigned int CBR; 741 volatile unsigned int FRAMERATE; 742 volatile unsigned int VERT_SIZE; 743 volatile unsigned int HORIZ_SIZE; 744 }VC1_SEQUENCE_INFO, *pVC1_SEQUENCE_INFO; 745 746 #define OFFSET_RCV_PROFILE 0 747 #define OFFSET_RCV_FRMRTQ_POSTPROC 4 748 #define OFFSET_RCV_BITRTQ_POSTPROC 8 749 #define OFFSET_RCV_LOOPFILTER 12 750 #define OFFSET_RCV_MULTIRES 16 751 #define OFFSET_RCV_FASTUVMC 20 752 #define OFFSET_RCV_EXTENDED_MV 24 753 #define OFFSET_RCV_DQUANT 28 754 #define OFFSET_RCV_VSTRANSFORM 32 755 #define OFFSET_RCV_OVERLAP 36 756 #define OFFSET_RCV_SYNCMARKER 40 757 #define OFFSET_RCV_RANGERED 44 758 #define OFFSET_RCV_MAXBFRAMES 48 759 #define OFFSET_RCV_QUANTIZER 52 760 #define OFFSET_RCV_FINTERPFLAG 56 761 #define OFFSET_RCV_LEVEL 60 762 #define OFFSET_RCV_CBR 64 763 #define OFFSET_RCV_FRAMERATE 68 764 #define OFFSET_RCV_VERT_SIZE 72 765 #define OFFSET_RCV_HORIZ_SIZE 76 766 767 typedef struct _FW_AVSYNC_TABLE 768 { 769 unsigned int byte_cnt; //0 //23 valid bits 770 unsigned int dummy_cnt; //4 //dummy packet counter 771 unsigned int id_low; //8 //ID specified by player 772 unsigned int id_high; //12 773 774 unsigned int time_stamp; //16 //pts or dts 775 unsigned int reserved_int0; //20 776 unsigned int reserved_int1; //24 777 unsigned int reserved_int2; //28 778 }FW_AVSYNC_TABLE, *pFW_AVSYNC_TABLE; 779 780 #define OFFSET_BYTE_CNT 0 781 #define OFFSET_DUMMY_CNT 4 782 #define OFFSET_ID_LOW 8 783 #define OFFSET_ID_HIGH 12 784 #define OFFSET_TIME_STAMP 16 785 786 typedef struct _fw_VBBU 787 { 788 unsigned int u32WrPtr; 789 unsigned int u32RdPtr; 790 unsigned char u8Reserved[8]; 791 VDEC_VBBU_Entry stEntry[MAX_VDEC_VBBU_ENTRY_COUNT]; 792 } FW_VBBU,*pFW_VBBU; 793 794 #ifdef M4VDPLAYER 795 extern pFW_VOL_INFO gp_vol_info; 796 extern pFW_DIVX_INFO gp_divx_info; 797 #endif 798 799 //interupt flag 800 #define INT_CC_NEW (1<<0) 801 #define INT_USER_DATA (1<<0) 802 #define INT_VBUF_OVF (1<<1) 803 #define INT_VBUF_UNF (1<<2) 804 #define INT_VES_VALID (1<<3) 805 #define INT_VES_INVALID (1<<4) 806 #define INT_SEQ_FOUND (1<<5) 807 #define INT_PIC_FOUND (1<<6) 808 #define INT_DEC_ERR (1<<7) 809 #define INT_FIRST_FRAME (1<<8) 810 #define INT_DISP_RDY (1<<9) 811 #define INT_SYN_SKIP (1<<10) 812 #define INT_SYN_REP (1<<11) 813 #define INT_DISP_VSYNC (1<<12) 814 #define INT_USER_DATA_DISP (1<<13) //user data in display order 815 #define INT_PTS_DISCONTINUE (1<<14) //detection pts discontinue for t3-gp2, 20101214 816 #define INT_DEC_DONE (1<<15) //finishing decoding one frame. 817 #define INT_DEC_I (1<<16) //finishing decoding one frame. 818 #define INT_XC_LOW_DELAY (1<<17) //trigger this interrupt for XC speed up to show image on channel change... 819 #define INT_DISP_FINISH (1<<18)// enable last frame show one 820 821 #define INT_SYN_SKIP_P 10 822 #define INT_SYN_REP_P 11 823 824 825 //MVD TLB 826 #define MVD_TLB_BSR1 (1<<0) 827 #define MVD_TLB_BSR2 (1<<1) 828 #define MVD_TLB_PAS1 (1<<2) 829 #define MVD_TLB_PAS2 (1<<3) 830 #define MVD_TLB_PESFI1 (1<<4) 831 #define MVD_TLB_PESFI2 (1<<5) 832 #define MVD_TLB_SMDB (1<<6) 833 #define MVD_TLB_VLD (1<<7) 834 #define MVD_TLB_REF (1<<8) 835 #define MVD_TLB_NM (1<<9) 836 #define MVD_TLB_IAP (1<<10) 837 #define MVD_TLB_JSC (1<<11) 838 #define MVD_TLB_MTO (1<<12) 839 #define MVD_TLB_BSR3 (1<<13) 840 841 842 // decoding state definition 843 #define DEC_STAT_IDLE 0x00 844 #define DEC_STAT_FIND_SC 0x01 845 #define DEC_STAT_FIND_SPE_SC 0x11 846 #define DEC_STAT_FIND_FRAMEBUFFER 0x02 847 #define DEC_STAT_WAIT_DECODE_DONE 0x03 848 #define DEC_STAT_DECODE_DONE 0x04 849 #define DEC_STAT_WAIT_VDFIFO 0x05 850 #define DEC_STAT_INIT_SUCCESS 0x06 851 #define DEC_STAT_NO_FRAME_BUFFER 0x07 852 #define DEC_STAT_WAIT_PLAY_CMD 0x08 853 854 //error_code 855 #define VOL_SHAPE 1 //error_status 0:rectanglular 1:binary 2: binary only 3: grayscale 856 #define VOL_USED_SPRITE 2 //error_status 0:sprite not used 1:static 2: GMC 3: reserved 857 #define VOL_NOT_8_BIT 3 //error_status : bits per pixel 858 #define VOL_NERPRED_ENABLE 4 859 #define VOL_REDUCED_RES_ENABLE 5 860 #define VOL_SCALABILITY 6 861 #define VOL_OTHER 7 862 #define VOL_H263_ERROR 8 863 #define VOL_RES_NOT_SUPPORT 9 //error_status : none 864 #define VOL_MPEG4_NOT_SUPPORT 10 //error_status : none 865 #define VOL_PROFILE_NOT_SUPPORT 11 866 #define VOL_RCV_ERROR_OCCUR 12 867 #define VOL_VC1_NOT_SUPPORT 13 868 #define VOL_UNKNOW_CODEC_NOT_SUPPORT 14 869 #define VOL_SLQ_TBL_NOT_SUPPORT 15 870 #define VOL_FRAME_BUF_NOT_ENOUGH 16 //error_status : none 871 #define CODEC_MPEG4 0x00 //arg0: 0: mpeg4, 1: mpeg4 with short_video_header, 2: DivX311 872 #define CODEC_MPEG4_SHORT_VIDEO_HEADER 0x01 873 #define CODEC_DIVX311 0x02 874 #define CODEC_MPEG2 0x10 875 typedef enum //arg1: 0: file mode 1:slq 2:live stream mode 3:slqtbl 4: Ts file mode 876 { 877 FILE_MODE = 0, 878 SLQ_MODE, 879 STREAM_MODE, 880 SLQ_TBL_MODE, 881 TS_FILE_MODE, 882 OTHER 883 }stream_type; 884 885 typedef enum 886 { 887 E_MVD_CHIP_U01 = 0, 888 E_MVD_CHIP_U02, 889 }chip_eco_rev; 890 891 #define ENABLE_PARSER 0x00 //arg2: 0/1 enable/disable parser; 892 #define DISABLE_PARSER 0x01 893 #define ENABLE_PKT_LEN 0x02 894 #define PARSER_MPEG2 0x00 //arg3: 0 13818-1 pes header; 895 #define PARSER_MPEG1 0x01 // 1 11172-1 pes header; 896 897 #define FrcNormal 0 898 #define FrcDisplayTwice 1 //output rate is twice of input rate (ex. 30p a 60p) 899 #define Frc32Pulldown 2 //3:2 pulldown mode (ex. 24p a 60i or 60p) 900 #define FrcPALtoNTSC 3 //PALaNTSC conversion (50i a 60i) 901 #define FrcNTSCtoPAL 4 //NTSCaPAL conversion (60i a 50i) 902 #define FrcShowOneFiled 5 903 #define FrcDisplayDropHalf 6 904 #define FrcDisplay120To50 7 905 #define FrcDisplay100To60 8 906 #define FrcDisplay30To50 9 907 #define FrcDisplayRepeat51 10 908 #define FrcDisplayDrop51 11 909 #define FrcDisplayDrop52 12 910 #define FrcDisplayDrop53 13 911 #define FrcDisplay50To30 14 912 #define FrcDisplay60To24 15 913 #define FrcDisplay60To25 16 914 #define FrcDisplay30To24 17 915 916 #define FrcDisplayMultipleRepeat 20 //output_rate/input_rate=integer 917 #define FrcDisplayGeneralRepeat 21 //output_rate > input_rate, ex. 15->50... 918 #define FrcDisplayGeneralSkip 22 //output_rate < input_rate, 919 #define FrcDisplayThreeTimes 23 920 #define FrcDisplayFourTimes 24 921 922 #define MVD3_FILE_SD_MODE 0x02 //960*544 923 #define MVD3_HD_MODE 0x10 //1920*1088 924 #define MVD3_SD_MODE 0x00 //720*576 925 #define MVD3_DHD_MODE 0x20 // dual HD 926 #define MVD3_DHD_MODE_MIN 0x40 //ECO ISSUE : THE WIDTH OVER 2560 IN VC1 WILL HIT THE HW_ISSUE 927 928 #define MVD_CMA_MODE 0x1 929 // File mode avsync related 930 #define NONE_FILE_MODE 0 931 #define FILE_PTS_MODE 1 932 #define FILE_DTS_MODE 2 933 #define FILE_STS_MODE 3 934 935 936 // argument for "CMD_DISPLAY_PAUSE" 937 #define DISPLAY_PAUSE_OFF 0x00 938 #define DISPLAY_PAUSE_ON 0x01 939 940 // argument for "CMD_FRC_DROP_BEHAVIOR" 941 #define FRC_DROP_FRAME 0x00 // for default frc drop behavior, drop per frame 942 #define FRC_DROP_FIELD 0x01 // for frc drop behavior, drop per field to improve more smoothly in field mode 943 944 // ARG0 for "CMD_DRAM_OBF" 945 #define OBF_PAS1_WR 0x01 // for Dram obf write index (Parser1 write) 946 #define OBF_VBUF1_RD 0x02 // for Dram obf read index (VBUF1 read) 947 #define OBF_PES_FILE_IN1_WR 0x03 // for Dram obf read index for PESFI1 948 #define OBF_PAS2_WR 0x04 // for Dram obf write index (Parser2 write) 949 #define OBF_VBUF2_RD 0x05 // for Dram obf read index (VBUF2 read) 950 #define OBF_PES_FILE_IN2_WR 0x06 // for Dram obf read index for PESFI2 951 952 //command interface 953 #define CMD_PLAY 0x01 954 #define CMD_PAUSE 0x02 955 #define CMD_STOP 0x03 956 #define CMD_FIND_SEQ 0x04 //find seq header and set command = pause at picture header start code found 957 #define CMD_SINGLE_STEP 0x05 958 #define CMD_PLAY_NO_SQE 0x06 959 #define CMD_FAST_SLOW 0x07 //arg0: 0: nomarl mode, 1: decode I only, 2: deocde I/P only, 3: slow motion 960 #define CMD_CODEC_INFO 0x08 //arg0: 0: mpeg4, 1: mpeg4 with short_video_header, 2: DivX311 961 #define CMD_SYN_THRESHOLD 0x09 962 #define CMD_SYNC_ON 0x0a 963 #define CMD_SYNC_OFFSET 0x0b 964 #define CMD_DISPLAY_CTL 0x0c 965 //arg0: 0/1-display by display/decode order 966 //arg1: 1-drop display decoding error frame 967 //arg2: 1-drop display when decode fast than display 968 //arg3:set frame rate conversion mode 969 #define CMD_GET_SYNC_STAT 0x0d //return arg0: 0/1 sync off/on ; arg1: 3 sync init done 970 #define CMD_GET_AFD 0x0e 971 #define CMD_SKIP_DATA 0x0f //set to skip all data till find FW_SPE_SCODE to resume normal play 972 973 #define CMD_STREAM_BUF_START 0x10 974 #define CMD_STREAM_BUF_END 0x11 975 #define CMD_FB_BASE 0x12 //Frame buffer base address, from LSB to MSB are arg0, arg1, arg2, arg3 976 #define CMD_IAP_BUF_START 0x13 977 #define CMD_DP_BUF_START 0x14 978 #define CMD_MV_BUF_START 0x15 979 #define CMD_DMA_OVFTH 0x16 980 #define CMD_DMA_UNFTH 0x17 981 #define CMD_VC1_MIU_PROTECT_START 0x18 982 #define CMD_VC1_MIU_PROTECT_END 0x19 983 #define CMD_DISP_SPEED_CTRL 0x1a 984 #define CMD_STEP_DISP_DECODE_ONE 0x1b 985 #define CMD_STEP_DISP_ING 0x1c // repeat disp this frame 986 #define CMD_STEP_TO_PTS 0x1d 987 #define CMD_HANDSHAKE_STATUS 0x1e //report handshake status 988 #define CMD_DISPLAY_PAUSE 0x1f // display pause 989 990 #define CMD_USER_BUF_START 0x20 991 #define CMD_USER_BUF_SIZE 0x21 992 #define CMD_RD_USER_WP 0x22 993 #define CMD_WD_USER_RP 0x23 994 #define CMD_RD_CC_PKTCNT 0x24 995 #define CMD_RD_CC_OV 0x25 996 #define CMD_CLOSE_CC 0x26 997 #define CMD_EN_CC_INFO_ENHANCE 0X27 // arg0=1, for enhance to dump the pts/tmp_ref info with each cc-608 packet for mstar cc-lib, 20120406 998 #define CMD_BUF_OFFSET 0x2d // stream/frame buf offset, programable high adderss [bit-25] that allocate to low/high 256MB MIU:(only for K2) 999 #define CMD_ENABLE_VLD_TIMEOUT 0x2e // enable mvd vld timeout and threshold 1000 #define CMD_ENABLE_INT_STAT 0x2f // set which int be enabled 1001 1002 #define CMD_GET_INT_STAT 0x30 1003 #define CMD_PARSE_M4V_PACKMD 0x31 1004 #define CMD_RD_PTS 0x32 1005 #define CMD_FLUSH_LAST_IPFRAME 0x33 1006 #define CMD_DECODE_STATUS 0x34 // arg0 = lastcommand ; arg1 = decode_status 1007 #define CMD_VBUFFER_COUNT 0x35 1008 #define CMD_START_DEC_STRICT 0x36 // start decoding in First I and skip non reference frame B decoding 1009 #define CMD_SW_RESET 0x37 1010 #define CMD_MVD_FAST_INT 0x38 1011 #define CMD_DIU_WIDTH_ALIGN 0x39 1012 #define CMD_SW_IDX_ADJ 0x3a // arg0=1 set sw_index as previous queue index infomation 1013 #define CMD_PARSER_READ_POSITION 0x3b 1014 #define CMD_REPEAT_MODE 0x3c // arg0=1 when frame display repeat only show one field 1015 #define CMD_PTS_BASE 0x3d 1016 #define CMD_SKIP_TO_PTS 0x3e 1017 #define CMD_AVSYNC_FREERUN_THRESHOLD 0x3f 1018 1019 #define CMD_DEBUG_BUF_START 0x40 1020 #define CMD_DEBUG_CTL 0x42 1021 #define CMD_RD_IO 0x43 1022 #define CMD_WR_IO 0x44 1023 #define CMD_FB_RED_SET 0x45 1024 #define CMD_FB_NUM 0x46 1025 #define CMD_PTS_DETECTOR_EN 0x47 // enable filter for stream discontinue // to force the pts follow stc when pts=-1 1026 #define CMD_PTS_TBL_RESET 0x48 // to reset pas/vld and pts_tbl // add new arg: 2 for only use mvd parser 1027 #define CMD_DRAM_OBF 0x49 // for Dram OBF key setting 1028 #define CMD_FP_FILTER 0x4A // 0:1 for disable/enable field polarity tuning filter, 0 for default... 1029 #define CMD_PUSH_FIRST_FRAME_DISP 0x4B // 0:1 for disable/enable to push the first I-frame to dispQ when decoded done on ts and ts-file mode, 0 for default(disable)... 1030 #define CMD_FAST_RST 0x4C // 1 for enable mvd self reset... 1031 #define CMD_RVU_EN 0x4D //open RVU feature 1032 1033 #define CMD_SLQ_START 0x50 //SLQ start address, from LSB to MSB are arg0, arg1, arg2, arg3 1034 #define CMD_SLQ_END 0x51 //SLQ end address, from LSB to MSB are arg0, arg1, arg2, arg3 1035 #define CMD_SLQ_AVAIL_LEVEL 0x52 //arg0: 4-0 1036 #define CMD_FPGA_COMP 0x53 //arg0: 1/0:enable/disable FPGA comp 1037 #define CMD_DIVX_PATCH 0x54 //arg0: D[0] divx mv p interlace chroma adjust 1038 #define CMD_HEADER_INFO_BUF 0x55 //header info buffer base address, from LSB to MSB are arg0, arg1, arg2, arg3 1039 #define CMD_IDCT_SEL 0x56 // arg0 D[0]:0/1 llm/divx6 D[1]:0/1 unbias/bias rounding mode 1040 #define CMD_VOL_INFO_BUF 0x57 1041 #define CMD_FRAME_INFO_BUF 0x58 1042 #define CMD_CODE_OFFSET 0x59 1043 #define CMD_RESET_FRAMECOUNT 0x5a 1044 #define CMD_CHIPID 0x5b 1045 #define CMD_DEC_FRAME_INFO_BUF 0x5c 1046 #define CMD_GET_FW_VERSION 0x5E 1047 #define CMD_GET_EN_CATCH_DATA 0x5F 1048 1049 #define CMD_SLQ_TBL_BUF_START 0x60 1050 #define CMD_SLQ_TBL_BUF_END 0x61 1051 #define CMD_SLQ_UPDATE_TBL_WPTR 0x62 1052 #define CMD_SLQ_GET_TBL_RPTR 0x63 1053 1054 // FW stop updating frames when vsync, but decoding process is still going. 1055 #define CMD_FREEZE_DISP 0x64 1056 #define CMD_DS_VIRTUAL_BOX 0x65 1057 #define CMD_SHOW_ONE_FIELD 0x66 1058 #define CMD_FD_MASK_DELAY_CNT 0x67 // delay n's vsync then active the fd_mask 1059 1060 #define CMD_UPDATE_FRAME 0x68 // updating next frame in slow motion mode 1061 #define CMD_FRC_OUPUT 0x69 1062 #define CMD_FRC_DROP_BEHAVIOR 0x6A // arg0: FRC_DROP_FRAME/FRC_DROP_FIELD, default is FRC_DROP_FRAME 1063 1064 #define CMD_GET_NEXTDISPFRM 0x6B // for Mstreamer mode and mcu mode 1065 #define CMD_FLIP_RELEASE_FRAME 0x6C // for Mstreamer mode and mcu mode 1066 #define CMD_SEND_UNI_PTS 0x6D // for Mstreamer mode and mcu mode 1067 #define CMD_SET_MST_MODE 0x6E // for Mstreamer mode and mcu mode 1068 #define CMD_SET_MCU_MODE 0x6F // for mcu mode 1069 1070 #define CMD_DUMP_BITSTREAM_BASE 0x70 1071 #define CMD_DUMP_BITSTREAM_LENGTH 0x71 1072 1073 #define CMD_XC_LOW_DELAY_PARA 0x72 // set the parameter for XC_low_delay mechanism 1074 1075 #define CMD_MVD_IDLE 0x73 1076 #define CMD_INTERFACE_VERSION 0x74 1077 #define CMD_VC1_STREAM_TYPE_JPEG 0x75 1078 #define CMD_VC1_STREAM_TYPE_MJPEG 0x76 1079 #define CMD_VC1_BYPASS_MODE 0x77 1080 #define CMD_VC1_UPDATE_SLQ 0x78 1081 #define CMD_VC1_HW_SLQ_RESET 0x79 1082 #define CMD_FLUSH_DISP_QUEUE 0x7A 1083 #define CMD_VC1_FORCE_INTLACE_DISP 0x7B 1084 #define CMD_VC1_IP_SCALE_THRESHOLD 0x7C 1085 #define CMD_MOTION_COM_REDUCE 0x7D 1086 #define CMD_CLOSE_DEBLOCK 0x7E 1087 #define CMD_FIXED_FRAME_BUFFER 0x7F 1088 #define CMD_ENABLE_AUTO_MUTE 0x80 1089 #define CMD_FORCE_ALIGN_VSIZE 0x81 1090 #define CMD_PROG_SEQ_STREAM 0x82 1091 1092 // File mode avsync related 1093 #define CMD_ENABLE_AVSYNC_QUALIFIER 0x83// arg0=1:for enhance to do avsync when "enable_avsync=1" && "(lastcommand != CMD_PLAY)" for patch avsync on particular clip, 20120314 1094 #define CMD_ENABLE_LAST_FRAME_QUALIFIER 0x84// arg0=1:for strict qualify the last_frame_show_done after the last_frame been displayed by mvop, 20120309 1095 #define CMD_ENABLE_FILE_SYNC 0x85 1096 #define CMD_PTS_TBL_START 0x86 1097 #define CMD_FORCE_BLUE_SCREEN 0x87 1098 #define CMD_ENABLE_LAST_FRAME_SHOW 0x88 1099 #define CMD_DYNAMIC_SCALE_BASE 0x89 1100 #define CMD_ENABLE_DYNAMIC_SCALE 0x8A 1101 #define CMD_SCALER_INFO_BASE 0x8B 1102 #define CMD_SW_BITPLANE_BASE 0x8C 1103 #define CMD_FRONTEND_SEL 0x8D // front end input selection 1104 #define CMD_ENABLE_FREEZE_PIC 0x8E 1105 #define CMD_FORBID_RESOLUTION_CHANGE 0x8F 1106 1107 // JPEG command 1108 #define CMD_JPEG_CONSTRAIN_SIZE 0x91 1109 #define CMD_JPEG_STATUS 0x92 1110 #define CMD_JPEG_SCALEFACTOR 0x93 1111 #define CMD_JPEG_ROI 0x94 1112 #define CMD_JPEG_ROI_DIM 0x95 1113 #define CMD_JPEG_IPM 0x96 1114 1115 #define CMD_ENABLE_SAM_UNI 0xA0 // for Mstreamer mode 1116 #define CMD_FLIP_TO_DISP 0xA1 // for Mstreamer mode 1117 1118 #define CMD_MIU_OFFSET 0xA2 // saving miu offset from hk for LDMA usage 1119 #define CMD_IQMEM_CTRL 0xA3 // for iqmem ctrl from HK 1120 #define CMD_IQMEM_CTRL_ACK 0xA4 // return ack by f/w 1121 #define CMD_IQMEM_BASE_ADDR 0xA5 // unit in byte 1122 1123 // PES file-in command 1124 #define CMD_PES_FILE_LOW_BND 0xA6 // for pes file in mode low bound 1125 #define CMD_PES_FILE_UP_BND 0xA7 // for pes file in mode upper bound 1126 #define CMD_PES_FILE_EN 0xA8 // for enable pes file in mode 1127 #define CMD_PES_FILE_UPDATE_WPTR 0xA9 // for update pes file mode wr_ptr 1128 #define CMD_PES_FILE_GET_RPTR 0xAA // for got pes file in mode rd_ptr 1129 1130 #define CMD_REGISTER_BASE 0xAB 1131 1132 #define CMD_DIVX_DISABLE 0xAC 1133 1134 //new feature 1135 #define CMD_SUSPEND_DS 0xB0 1136 #define CMD_MPEG_LINER_START 0xB1 1137 #define CMD_PREBUFFER_SIZE 0xB2 //unit:bytes 1138 #define CMD_CC_ENABLE_EXTERNAL_BUFFER 0xB3 1139 #define CMD_TIME_INCR_PREDICT 0xB4 // to predict the "vol_time_incr" when there is no vol_header on mpeg4... 1140 #define CMD_RUNTIME_DEBUG_CMD 0XB5 1141 #define CMD_DUMP_MVD_HARDWARE_REGISTER 0xB6 1142 #define CMD_SMOOTH_REWIND 0xB7 //Smooth_rewind 1143 #define CMD_DECODE_ERROR_TOLERANCE 0xB8 //drop error rate 1144 #define CMD_PVR_SEAMLESS_MODE 0xB9 1145 #define CMD_AUTO_REDUCE_ES_DATA 0xBA 1146 #define CMD_MVD_TLB 0xBB 1147 #define CMD_FRC_ONLY_SHOW_TOP_FIELD 0xBC 1148 #define CMD_THUMBNAIL_LESS_FB_MODE 0xBD 1149 #define CMD_ES_FULL_STOP 0xBE 1150 #define CMD_SET_DV_XC_SHM_ADDR 0xBF 1151 #define CMD_DISABLE_PATCH_PBFRAME 0xC0 1152 #define CMD_AUTO_DROP_FRAME_IN_DECODE 0xC1 1153 #define CMD_DYNAMIC_MVOP_CONNECT 0xC2 1154 #define CMD_SLOW_SYNC_REPEAT 0xC3 1155 #define CMD_SLOW_SYNC_SKIP 0xC4 1156 #define CMD_VARIABLE_FRAMERATE 0xC5 1157 #define CMD_DYNAMIC_SCALE_SIZE 0xC6 1158 #define CMD_PUSI_CONTROL 0xC7 1159 #define CMD_PVR_HEADER_EVENT 0xC8 1160 #define CMD_PRESET_CONNET_INPUT_TSP 0xC9 1161 #define CMD_ENABLE_NDS 0xCA 1162 1163 #define MVD_FHD_ES_MIN_TSP_DATA_SIZE 0x69500 1164 #define MVD_HD_ES_MIN_TSP_DATA_SIZE 0x42000 1165 #define MVD_DEFAULT_ES_MIN_TSP_DATA_SIZE 0x16000 1166 #define MVD_SINGLE_ES_MIN_TSP_DATA_SIZE 0x400 1167 1168 // add data in bitstream from skip mode back to normal 1169 // 00_00_01_C5_ab_08_06_27 1170 #define FW_SPE_SCODE 0xC5 1171 #define FW_RESUME1 0xab08 1172 #define FW_RESUME2 0x0627 1173 #define FILE_PAUSE_SC 0xBE 1174 #define FILE_END_SC 0xC6 1175 #define FILE_END_EXT1 0xaabb 1176 #define FILE_END_EXT2 0xccdd 1177 #define FILE_END_EXT3 0xeeff 1178 #define FILE_END_EXT4 0xffff 1179 #define FILE_END_EXT5 0x0000 1180 // For Git Changes 1181 #define GIT_TIMESTAMP 1511513310 1182 #endif 1183