1*53ee8cc1Swenshuai.xi //<MStar Software> 2*53ee8cc1Swenshuai.xi //****************************************************************************** 3*53ee8cc1Swenshuai.xi // MStar Software 4*53ee8cc1Swenshuai.xi // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved. 5*53ee8cc1Swenshuai.xi // All software, firmware and related documentation herein ("MStar Software") are 6*53ee8cc1Swenshuai.xi // intellectual property of MStar Semiconductor, Inc. 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MStar hereby reserves the 91*53ee8cc1Swenshuai.xi // rights to any and all damages, losses, costs and expenses resulting therefrom. 92*53ee8cc1Swenshuai.xi // 93*53ee8cc1Swenshuai.xi //////////////////////////////////////////////////////////////////////////////// 94*53ee8cc1Swenshuai.xi 95*53ee8cc1Swenshuai.xi /////////////////////////////////////////////////////////////////////////////////////////////////// 96*53ee8cc1Swenshuai.xi /// 97*53ee8cc1Swenshuai.xi /// @file drvHVD.h 98*53ee8cc1Swenshuai.xi /// @brief HVD Driver Interface 99*53ee8cc1Swenshuai.xi /// @author MStar Semiconductor Inc. 100*53ee8cc1Swenshuai.xi /////////////////////////////////////////////////////////////////////////////////////////////////// 101*53ee8cc1Swenshuai.xi 102*53ee8cc1Swenshuai.xi #ifndef _DRV_HVD_H_ 103*53ee8cc1Swenshuai.xi #define _DRV_HVD_H_ 104*53ee8cc1Swenshuai.xi 105*53ee8cc1Swenshuai.xi #ifdef __cplusplus 106*53ee8cc1Swenshuai.xi extern "C" 107*53ee8cc1Swenshuai.xi { 108*53ee8cc1Swenshuai.xi #endif 109*53ee8cc1Swenshuai.xi 110*53ee8cc1Swenshuai.xi #if (!defined(MSOS_TYPE_NUTTX) && !defined(MSOS_TYPE_OPTEE)) || defined(SUPPORT_X_MODEL_FEATURE) 111*53ee8cc1Swenshuai.xi 112*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 113*53ee8cc1Swenshuai.xi // Driver Capability 114*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 115*53ee8cc1Swenshuai.xi 116*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 117*53ee8cc1Swenshuai.xi // Macro and Define 118*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 119*53ee8cc1Swenshuai.xi #define MSIF_HVD_LIB_CODE {'H','V','D','_'} //Lib code 120*53ee8cc1Swenshuai.xi #define MSIF_HVD_LIBVER {'0','C'} //LIB version 0.0 ~ Z.Z 121*53ee8cc1Swenshuai.xi #define MSIF_HVD_BUILDNUM {'0','2'} //Build Number 00 ~ 99 122*53ee8cc1Swenshuai.xi #define MSIF_HVD_CHANGELIST {'0','0','6','4','4','6','7','9'} //P4 ChangeList Number 123*53ee8cc1Swenshuai.xi 124*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 125*53ee8cc1Swenshuai.xi /// @brief \b HVD_DRV_VERSION : HVD Version 126*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 127*53ee8cc1Swenshuai.xi #define HVD_DRV_VERSION /* Character String for DRV/API version */ \ 128*53ee8cc1Swenshuai.xi MSIF_TAG, /* 'MSIF' */ \ 129*53ee8cc1Swenshuai.xi MSIF_CLASS, /* '00' */ \ 130*53ee8cc1Swenshuai.xi MSIF_CUS, /* 0x0000 */ \ 131*53ee8cc1Swenshuai.xi MSIF_MOD, /* 0x0000 */ \ 132*53ee8cc1Swenshuai.xi MSIF_CHIP, \ 133*53ee8cc1Swenshuai.xi MSIF_CPU, \ 134*53ee8cc1Swenshuai.xi MSIF_HVD_LIB_CODE, /* IP__ */ \ 135*53ee8cc1Swenshuai.xi MSIF_HVD_LIBVER, /* 0.0 ~ Z.Z */ \ 136*53ee8cc1Swenshuai.xi MSIF_HVD_BUILDNUM, /* 00 ~ 99 */ \ 137*53ee8cc1Swenshuai.xi MSIF_HVD_CHANGELIST, /* CL# */ \ 138*53ee8cc1Swenshuai.xi MSIF_OS 139*53ee8cc1Swenshuai.xi 140*53ee8cc1Swenshuai.xi #define HVD_INIT_HW_MASK BMASK(3:0) ///< HW Type 141*53ee8cc1Swenshuai.xi #define HVD_INIT_HW_AVC BITS(3:0, 0) ///< HW deflaut: AVC 0X00 142*53ee8cc1Swenshuai.xi #define HVD_INIT_HW_AVS BITS(3:0, 1) ///< HW : AVS 0X01 143*53ee8cc1Swenshuai.xi #define HVD_INIT_HW_RM BITS(3:0, 2) ///< HW: RM 0X10 144*53ee8cc1Swenshuai.xi #define HVD_INIT_HW_MVC BITS(3:0, 3) ///< HW: RM 0X11 145*53ee8cc1Swenshuai.xi #define HVD_INIT_HW_VP8 BITS(3:0, 4) ///< HW: VP8 0X100 146*53ee8cc1Swenshuai.xi #define HVD_INIT_HW_MJPEG BITS(3:0, 5) ///< HW: MJPEG 0x101 147*53ee8cc1Swenshuai.xi #define HVD_INIT_HW_VP6 BITS(3:0, 6) ///< HW: VP6 0x110 148*53ee8cc1Swenshuai.xi #define HVD_INIT_HW_HEVC BITS(3:0, 7) ///< HW: HEVC 0x111 149*53ee8cc1Swenshuai.xi #define HVD_INIT_HW_VP9 BITS(3:0, 8) ///< HW: VP9 0x1000 150*53ee8cc1Swenshuai.xi #define HVD_INIT_HW_HEVC_DV BITS(3:0, 9) ///< HW: HEVC_DOLBY 0x1001 151*53ee8cc1Swenshuai.xi #define HVD_INIT_MAIN_MASK BMASK(5:4) ///< main type 152*53ee8cc1Swenshuai.xi #define HVD_INIT_MAIN_FILE_RAW BITS(5:4, 0) ///< main type: default: 0X00 153*53ee8cc1Swenshuai.xi #define HVD_INIT_MAIN_FILE_TS BITS(5:4, 1) ///< main type: 0X01 154*53ee8cc1Swenshuai.xi #define HVD_INIT_MAIN_LIVE_STREAM BITS(5:4, 2) ///< main type: 0X10 155*53ee8cc1Swenshuai.xi #define HVD_INIT_INPUT_MASK BMASK(6:6) ///< process path for filling BBU table: file mode. use drive; TSP: use tsp mode 156*53ee8cc1Swenshuai.xi #define HVD_INIT_INPUT_TSP BITS(6:6, 0) ///< tsp input( default) 157*53ee8cc1Swenshuai.xi #define HVD_INIT_INPUT_DRV BITS(6:6, 1) ///< driver input 158*53ee8cc1Swenshuai.xi #define HVD_INIT_START_CODE_MASK BMASK(7:7) ///< AVC FILE MODE ONLY: mkv, mp4 container use. 159*53ee8cc1Swenshuai.xi #define HVD_INIT_START_CODE_REMAINED BITS(7:7, 0) ///< start code remained.(Defualt) 160*53ee8cc1Swenshuai.xi #define HVD_INIT_START_CODE_REMOVED BITS(7:7, 1) ///< start code removed. 161*53ee8cc1Swenshuai.xi #define HVD_INIT_UTOPIA_ENVI BIT(8) ///< check MIU sel and set it 162*53ee8cc1Swenshuai.xi #define HVD_INIT_DBG_FW BIT(9) ///< check FW is debug version or not 163*53ee8cc1Swenshuai.xi #define HVD_INIT_DUAL_ES_MASK BMASK(10:10) ///< Dual ES buffer iput. 164*53ee8cc1Swenshuai.xi #define HVD_INIT_DUAL_ES_DISABLE BITS(10:10, 0) ///< Disable Dual ES buffer input. 165*53ee8cc1Swenshuai.xi #define HVD_INIT_DUAL_ES_ENABLE BITS(10:10, 1) ///< Enable Dual ES buffer input. 166*53ee8cc1Swenshuai.xi 167*53ee8cc1Swenshuai.xi //#define HVD_INIT_ENABLE_ISR_DISP BIT( 8) ///< enable display ISR. ISR occurs at every Vsync. 168*53ee8cc1Swenshuai.xi 169*53ee8cc1Swenshuai.xi #define HVD_RV_BROKEN_BY_US_MASK 0x80000000 170*53ee8cc1Swenshuai.xi 171*53ee8cc1Swenshuai.xi #define HVD_BBU_TAG_LIMITATION 0x200000 172*53ee8cc1Swenshuai.xi #define QUANTITY_AFTER_BROKEN_BY_US 4 173*53ee8cc1Swenshuai.xi #define QUANTITY_LENGTH 0x1FFF00 174*53ee8cc1Swenshuai.xi #define MAX_QUANTITY (QUANTITY_LENGTH * QUANTITY_AFTER_BROKEN_BY_US) 175*53ee8cc1Swenshuai.xi #define MIN_BBU_VACANCY_PER_PUSH 2 176*53ee8cc1Swenshuai.xi #define MIN_BBU_VACANCY_FOR_4K2K (MIN_BBU_VACANCY_PER_PUSH * QUANTITY_AFTER_BROKEN_BY_US) // about 6MB 177*53ee8cc1Swenshuai.xi 178*53ee8cc1Swenshuai.xi #define HVD_MAX_DEC_NUM 2 179*53ee8cc1Swenshuai.xi 180*53ee8cc1Swenshuai.xi 181*53ee8cc1Swenshuai.xi 182*53ee8cc1Swenshuai.xi #define HVD_CCRB_PACKET_LENGTH 8 183*53ee8cc1Swenshuai.xi 184*53ee8cc1Swenshuai.xi #define T35_DVB_COUNTRY_CODE 0xB5 185*53ee8cc1Swenshuai.xi #define T35_DVB_PROVIDER_CODE 0x0031 186*53ee8cc1Swenshuai.xi 187*53ee8cc1Swenshuai.xi #define DTV_AFD_CODE 0x44544731 188*53ee8cc1Swenshuai.xi #define DTV_DTB1_CODE 0x47413934 189*53ee8cc1Swenshuai.xi 190*53ee8cc1Swenshuai.xi #define DTV_BAR_CODE 0x06 191*53ee8cc1Swenshuai.xi #define DTV_CC_CODE 0x03 192*53ee8cc1Swenshuai.xi #define DTV_DIRECTTV_CODE 0x2F 193*53ee8cc1Swenshuai.xi 194*53ee8cc1Swenshuai.xi #define MAX_NTSC_CC_ELE 4 195*53ee8cc1Swenshuai.xi #define MAX_NTSC_CC_BYTE (MAX_NTSC_CC_ELE << 2) 196*53ee8cc1Swenshuai.xi #define MAX_DTV_CC_BYTE 128 197*53ee8cc1Swenshuai.xi 198*53ee8cc1Swenshuai.xi #define CC_NTSC1 1 199*53ee8cc1Swenshuai.xi #define CC_NTSC2 2 200*53ee8cc1Swenshuai.xi #define CC_ATSC 4 201*53ee8cc1Swenshuai.xi #define CC_157 (CC_NTSC1|CC_NTSC2) 202*53ee8cc1Swenshuai.xi 203*53ee8cc1Swenshuai.xi #define USER_DATA_MODE_DVB_NORMAL 0x00 204*53ee8cc1Swenshuai.xi #define USER_DATA_MODE_DIRECTTV_CC 0x01 205*53ee8cc1Swenshuai.xi #define USER_DATA_MODE_FRM_PACKING_ARRANGEMENT 0x02 206*53ee8cc1Swenshuai.xi #define USER_DATA_MODE_ATSC_CC_RAW 0x04 207*53ee8cc1Swenshuai.xi #define USER_DATA_MODE_EXTERNAL_CC_BUFFER 0x10 208*53ee8cc1Swenshuai.xi 209*53ee8cc1Swenshuai.xi #define MAX_608_CC_LEN 512 210*53ee8cc1Swenshuai.xi #define MAX_708_CC_LEN 512 211*53ee8cc1Swenshuai.xi 212*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 213*53ee8cc1Swenshuai.xi // Type and Structure 214*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 215*53ee8cc1Swenshuai.xi typedef void (*HVD_InterruptCb)(void); 216*53ee8cc1Swenshuai.xi 217*53ee8cc1Swenshuai.xi 218*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 219*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: EN_CC_HVD_INFO 220*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: The type of Close Caption Selector 221*53ee8cc1Swenshuai.xi typedef enum 222*53ee8cc1Swenshuai.xi { 223*53ee8cc1Swenshuai.xi HVD_EX_CC_SELECTOR_708_SW = 0x0000, 224*53ee8cc1Swenshuai.xi HVD_EX_CC_SELECTOR_RINGBUFFER = 0x0001 225*53ee8cc1Swenshuai.xi 226*53ee8cc1Swenshuai.xi } EN_CC_HVD_EX_INFO; 227*53ee8cc1Swenshuai.xi 228*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 229*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_EX_Result 230*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: General result of HVD functions 231*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 232*53ee8cc1Swenshuai.xi typedef enum 233*53ee8cc1Swenshuai.xi { 234*53ee8cc1Swenshuai.xi E_HVD_EX_FAIL, ///< General fail cases. 235*53ee8cc1Swenshuai.xi E_HVD_EX_OK, ///< Action success. 236*53ee8cc1Swenshuai.xi E_HVD_EX_RET_INVALID_PARAMETER, ///< Function has invalid input. 237*53ee8cc1Swenshuai.xi E_HVD_EX_RET_ILLEGAL_ACCESS, ///< Illegal access. like driver not initialized. 238*53ee8cc1Swenshuai.xi E_HVD_EX_RET_HARDWARE_BREAKDOWN,///< HW has no responses or impossible responses. 239*53ee8cc1Swenshuai.xi E_HVD_EX_RET_OUTOF_MEMORY, ///< The input memory config is not enough. 240*53ee8cc1Swenshuai.xi E_HVD_EX_RET_UNSUPPORTED, ///< Function is not supported by HVD driver. 241*53ee8cc1Swenshuai.xi E_HVD_EX_RET_TIMEOUT, ///< Action timeout. 242*53ee8cc1Swenshuai.xi E_HVD_EX_RET_NOTREADY, ///< Action not ready. User needs to call it again later. 243*53ee8cc1Swenshuai.xi E_HVD_EX_RET_MEMORY_OVERWIRTE, ///< The input memory config may be overwrite. 244*53ee8cc1Swenshuai.xi E_HVD_EX_RET_QUEUE_FULL, ///< HVD BBU queue or ES buffer is full. 245*53ee8cc1Swenshuai.xi E_HVD_EX_RET_RE_INIT, 246*53ee8cc1Swenshuai.xi E_HVD_EX_RET_NOT_RUNNING, 247*53ee8cc1Swenshuai.xi E_HVD_EX_RET_CMA_ERROR, ///< CMA initialization error 248*53ee8cc1Swenshuai.xi } HVD_EX_Result; 249*53ee8cc1Swenshuai.xi 250*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 251*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_EX_GetPlayState 252*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: The current HVD play state. 253*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 254*53ee8cc1Swenshuai.xi typedef enum 255*53ee8cc1Swenshuai.xi { 256*53ee8cc1Swenshuai.xi E_HVD_EX_GSTATE_INIT, ///< Before or during initialization. 257*53ee8cc1Swenshuai.xi E_HVD_EX_GSTATE_PLAY, ///< playback. 258*53ee8cc1Swenshuai.xi E_HVD_EX_GSTATE_PAUSE, ///< decode and display are all paused. 259*53ee8cc1Swenshuai.xi E_HVD_EX_GSTATE_STOP, ///< after stop. 260*53ee8cc1Swenshuai.xi } HVD_EX_GetPlayState; 261*53ee8cc1Swenshuai.xi 262*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 263*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_EX_SyncType 264*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: The current mode type of HVD synchronization . 265*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 266*53ee8cc1Swenshuai.xi typedef enum 267*53ee8cc1Swenshuai.xi { 268*53ee8cc1Swenshuai.xi E_HVD_EX_SYNC_ATS, ///< Live stream, or TS file mode. 269*53ee8cc1Swenshuai.xi E_HVD_EX_SYNC_PTS, ///< only for file mode, input time stamp is PTS. 270*53ee8cc1Swenshuai.xi E_HVD_EX_SYNC_DTS, ///< only for file mode, input time stamp is DTS. 271*53ee8cc1Swenshuai.xi E_HVD_EX_SYNC_STS, ///< only for file mode, input time stamp is random, output should be sorted. 272*53ee8cc1Swenshuai.xi } HVD_EX_SyncType; 273*53ee8cc1Swenshuai.xi 274*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 275*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_EX_DispSpeed 276*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: The current mode type of HVD display speed 277*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 278*53ee8cc1Swenshuai.xi typedef enum 279*53ee8cc1Swenshuai.xi { 280*53ee8cc1Swenshuai.xi E_HVD_EX_DISP_SPEED_FF_32X = 32, ///< Speed fast forward 32x. 281*53ee8cc1Swenshuai.xi E_HVD_EX_DISP_SPEED_FF_16X = 16, ///< Speed fast forward 16x. 282*53ee8cc1Swenshuai.xi E_HVD_EX_DISP_SPEED_FF_8X = 8, ///< Speed fast forward 8x. 283*53ee8cc1Swenshuai.xi E_HVD_EX_DISP_SPEED_FF_4X = 4, ///< Speed fast forward 4x. 284*53ee8cc1Swenshuai.xi E_HVD_EX_DISP_SPEED_FF_2X = 2, ///< Speed fast forward 2x. 285*53ee8cc1Swenshuai.xi E_HVD_EX_DISP_SPEED_NORMAL_1X = 1, ///< Normal display speed. 286*53ee8cc1Swenshuai.xi E_HVD_EX_DISP_SPEED_SF_2X = -2, ///< Slow forward 2X. 287*53ee8cc1Swenshuai.xi E_HVD_EX_DISP_SPEED_SF_4X = -4, ///< Slow forward 4X. 288*53ee8cc1Swenshuai.xi E_HVD_EX_DISP_SPEED_SF_8X = -8, ///< Slow forward 8X. 289*53ee8cc1Swenshuai.xi E_HVD_EX_DISP_SPEED_SF_16X = -16, ///< Slow forward 16X. 290*53ee8cc1Swenshuai.xi E_HVD_EX_DISP_SPEED_SF_32X = -32, ///< Slow forward 32X. 291*53ee8cc1Swenshuai.xi } HVD_EX_DispSpeed; 292*53ee8cc1Swenshuai.xi 293*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 294*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_EX_DropDisp 295*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: The current mode type of HVD dropping decoded frames. 296*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 297*53ee8cc1Swenshuai.xi typedef enum 298*53ee8cc1Swenshuai.xi { 299*53ee8cc1Swenshuai.xi E_HVD_EX_DROP_DISPLAY_AUTO = (1 << 0), ///< automatic drop mode, drop frame if display queue is more than threshold 300*53ee8cc1Swenshuai.xi E_HVD_EX_DROP_DISPLAY_ONCE = (1 << 1), ///< drop once, drop the number of non-ref frames 301*53ee8cc1Swenshuai.xi } HVD_EX_DropDisp; 302*53ee8cc1Swenshuai.xi 303*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 304*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_EX_FrmRateConvMode 305*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: The current mode type of HVD frame rate convertion. 306*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 307*53ee8cc1Swenshuai.xi typedef enum 308*53ee8cc1Swenshuai.xi { 309*53ee8cc1Swenshuai.xi E_HVD_EX_FRC_MODE_NORMAL, ///< Disable FRC mode. 310*53ee8cc1Swenshuai.xi E_HVD_EX_FRC_MODE_32PULLDOWN, ///< 3:2 pulldown mode (ex. 24p a 60i or 60p) 311*53ee8cc1Swenshuai.xi E_HVD_EX_FRC_MODE_PAL2NTSC , ///< PALaNTSC conversion (50i a 60i) 312*53ee8cc1Swenshuai.xi E_HVD_EX_FRC_MODE_NTSC2PAL, ///< NTSCaPAL conversion (60i a 50i) 313*53ee8cc1Swenshuai.xi E_HVD_EX_FRC_MODE_DISP_2X, ///< output rate is twice of input rate (ex. 30p a 60p) 314*53ee8cc1Swenshuai.xi E_HVD_EX_FRC_MODE_24_TO_50, ///< output rate 24P->50P 48I->50I 315*53ee8cc1Swenshuai.xi E_HVD_EX_FRC_MODE_50P_60P, ///< output rate 50P ->60P 316*53ee8cc1Swenshuai.xi E_HVD_EX_FRC_MODE_60P_50P, ///< output rate 60P ->50P 317*53ee8cc1Swenshuai.xi } HVD_EX_FrmRateConvMode; 318*53ee8cc1Swenshuai.xi 319*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 320*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_EX_Codec 321*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: The supported codec type. 322*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 323*53ee8cc1Swenshuai.xi typedef enum 324*53ee8cc1Swenshuai.xi { 325*53ee8cc1Swenshuai.xi E_HVD_EX_AVC, 326*53ee8cc1Swenshuai.xi E_HVD_EX_AVS, 327*53ee8cc1Swenshuai.xi E_HVD_EX_RM, 328*53ee8cc1Swenshuai.xi E_HVD_EX_MVC, 329*53ee8cc1Swenshuai.xi E_HVD_EX_VP8, 330*53ee8cc1Swenshuai.xi E_HVD_EX_MJPEG, 331*53ee8cc1Swenshuai.xi E_HVD_EX_VP6, 332*53ee8cc1Swenshuai.xi E_HVD_EX_HEVC, 333*53ee8cc1Swenshuai.xi E_HVD_EX_VP9, 334*53ee8cc1Swenshuai.xi E_HVD_EX_HEVC_DV, 335*53ee8cc1Swenshuai.xi E_HVD_EX_NONE, 336*53ee8cc1Swenshuai.xi } HVD_EX_Codec; 337*53ee8cc1Swenshuai.xi 338*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 339*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_EX_GetModeStatus 340*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: The available mode information supported by HVD. 341*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 342*53ee8cc1Swenshuai.xi typedef enum 343*53ee8cc1Swenshuai.xi { 344*53ee8cc1Swenshuai.xi E_HVD_EX_GMODE_IS_SHOW_ERR_FRM, 345*53ee8cc1Swenshuai.xi E_HVD_EX_GMODE_IS_REPEAT_LAST_FIELD, 346*53ee8cc1Swenshuai.xi E_HVD_EX_GMODE_IS_ERR_CONCEAL, 347*53ee8cc1Swenshuai.xi E_HVD_EX_GMODE_IS_SYNC_ON, 348*53ee8cc1Swenshuai.xi E_HVD_EX_GMODE_IS_PLAYBACK_FINISH, 349*53ee8cc1Swenshuai.xi E_HVD_EX_GMODE_SYNC_MODE, 350*53ee8cc1Swenshuai.xi E_HVD_EX_GMODE_SKIP_MODE, 351*53ee8cc1Swenshuai.xi E_HVD_EX_GMODE_DROP_MODE, 352*53ee8cc1Swenshuai.xi E_HVD_EX_GMODE_DISPLAY_SPEED, 353*53ee8cc1Swenshuai.xi E_HVD_EX_GMODE_FRC_MODE, 354*53ee8cc1Swenshuai.xi E_HVD_EX_GMODE_ISR_TYPE, 355*53ee8cc1Swenshuai.xi E_HVD_EX_GMODE_IS_STEP_DISPLAY = 0x0100, 356*53ee8cc1Swenshuai.xi E_HVD_EX_GMODE_STREAM_TYPE, 357*53ee8cc1Swenshuai.xi } HVD_EX_GetModeStatus; 358*53ee8cc1Swenshuai.xi 359*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 360*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_EX_SkipDecode 361*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: The HVD decoding frame types. 362*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 363*53ee8cc1Swenshuai.xi typedef enum 364*53ee8cc1Swenshuai.xi { 365*53ee8cc1Swenshuai.xi E_HVD_EX_SKIP_DECODE_ALL, ///< decode all frames 366*53ee8cc1Swenshuai.xi E_HVD_EX_SKIP_DECODE_I, ///< decode I frames only 367*53ee8cc1Swenshuai.xi E_HVD_EX_SKIP_DECODE_IP, ///< decode I and referenced frames only( skip non-ref frames) 368*53ee8cc1Swenshuai.xi } HVD_EX_SkipDecode; 369*53ee8cc1Swenshuai.xi 370*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 371*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_EX_FrmType 372*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: The frame type. 373*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 374*53ee8cc1Swenshuai.xi typedef enum 375*53ee8cc1Swenshuai.xi { 376*53ee8cc1Swenshuai.xi E_HVD_EX_FRM_TYPE_I, ///< I frame. 377*53ee8cc1Swenshuai.xi E_HVD_EX_FRM_TYPE_P, ///< P frame. 378*53ee8cc1Swenshuai.xi E_HVD_EX_FRM_TYPE_B, ///< B frame. 379*53ee8cc1Swenshuai.xi E_HVD_EX_FRM_TYPE_OTHER, ///reservase 380*53ee8cc1Swenshuai.xi } HVD_EX_FrmType; 381*53ee8cc1Swenshuai.xi 382*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 383*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_EX_FieldType 384*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: The Field type. 385*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 386*53ee8cc1Swenshuai.xi typedef enum 387*53ee8cc1Swenshuai.xi { 388*53ee8cc1Swenshuai.xi E_HVD_EX_FIELDTYPE_NONE, ///< no field. 389*53ee8cc1Swenshuai.xi E_HVD_EX_FIELDTYPE_TOP, ///< Top field only. 390*53ee8cc1Swenshuai.xi E_HVD_EX_FIELDTYPE_BOTTOM, ///< Bottom field only. 391*53ee8cc1Swenshuai.xi E_HVD_EX_FIELDTYPE_BOTH, ///< Both fields. 392*53ee8cc1Swenshuai.xi } HVD_EX_FieldType; 393*53ee8cc1Swenshuai.xi 394*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 395*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_EX_UartLevel 396*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: The debug level of HVD. 397*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 398*53ee8cc1Swenshuai.xi typedef enum 399*53ee8cc1Swenshuai.xi { 400*53ee8cc1Swenshuai.xi E_HVD_EX_UART_LEVEL_NONE = 0, ///< Disable all uart message. 401*53ee8cc1Swenshuai.xi E_HVD_EX_UART_LEVEL_ERR, ///< Only output error message 402*53ee8cc1Swenshuai.xi E_HVD_EX_UART_LEVEL_INFO, ///< output general message, and above. 403*53ee8cc1Swenshuai.xi E_HVD_EX_UART_LEVEL_DBG, ///< output debug message, and above. 404*53ee8cc1Swenshuai.xi E_HVD_EX_UART_LEVEL_TRACE, ///< output function trace message, and above. 405*53ee8cc1Swenshuai.xi E_HVD_EX_UART_LEVEL_FW, ///< output FW message, and above. 406*53ee8cc1Swenshuai.xi } HVD_EX_UartLevel; 407*53ee8cc1Swenshuai.xi 408*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 409*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_EX_PatternInfo 410*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: The information type of specific pattern. 411*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 412*53ee8cc1Swenshuai.xi typedef enum 413*53ee8cc1Swenshuai.xi { 414*53ee8cc1Swenshuai.xi E_HVD_EX_FLUSH_PATTERN_SIZE, ///< flush pattern size. 415*53ee8cc1Swenshuai.xi E_HVD_EX_DUMMY_HW_FIFO, ///< HW fifo size. 416*53ee8cc1Swenshuai.xi } HVD_EX_PatternInfo; 417*53ee8cc1Swenshuai.xi 418*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 419*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_EX_DynamicScalingInfo 420*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: The information type of specific dynamic information. 421*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 422*53ee8cc1Swenshuai.xi typedef enum 423*53ee8cc1Swenshuai.xi { 424*53ee8cc1Swenshuai.xi E_HVD_EX_DS_BUF_MIUSEL, ///< the HW MIU selection of the buffer of dynamic scaling. TRUE: MIU 1. FALSE: MIU 0. 425*53ee8cc1Swenshuai.xi E_HVD_EX_DS_BUF_ADDR, ///< the start physical address of the buffer of dynamic scaling. 426*53ee8cc1Swenshuai.xi E_HVD_EX_DS_BUF_SIZE, ///< the size of the buffer of dynamic scaling. 427*53ee8cc1Swenshuai.xi E_HVD_EX_DS_VECTOR_DEPTH, ///< the required vector depth of the dynamic scaling. 428*53ee8cc1Swenshuai.xi E_HVD_EX_DS_INFO_ADDR, ///< the scaler info buffer address of dynamic scaling. 429*53ee8cc1Swenshuai.xi E_HVD_EX_DS_IS_ENABLED, ///< if dynamic scaling is enabled. 430*53ee8cc1Swenshuai.xi } HVD_EX_DynamicScalingInfo; 431*53ee8cc1Swenshuai.xi 432*53ee8cc1Swenshuai.xi typedef enum 433*53ee8cc1Swenshuai.xi { 434*53ee8cc1Swenshuai.xi E_HVD_EX_FLUSH_NONE = 0, 435*53ee8cc1Swenshuai.xi E_HVD_EX_FLUSH_RUNNING, //HK -> FW 436*53ee8cc1Swenshuai.xi E_HVD_EX_FLUSH_DONE //FW -> HK 437*53ee8cc1Swenshuai.xi } HVD_EX_FlushStatus; 438*53ee8cc1Swenshuai.xi 439*53ee8cc1Swenshuai.xi typedef enum 440*53ee8cc1Swenshuai.xi { 441*53ee8cc1Swenshuai.xi E_HVD_EX_DISP_PATH_DEFAULT = 0, 442*53ee8cc1Swenshuai.xi E_HVD_EX_DISP_PATH_DYNMC_DISCONNECT, 443*53ee8cc1Swenshuai.xi E_HVD_EX_DISP_PATH_DYNMC_HANDLING, 444*53ee8cc1Swenshuai.xi E_HVD_EX_DISP_PATH_DYNMC_CONNECTTED 445*53ee8cc1Swenshuai.xi } HVD_EX_DISP_PATH_CONNECT_STATUS; 446*53ee8cc1Swenshuai.xi 447*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 448*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_EX_IsrEvent 449*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: The information type of ISR event. 450*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 451*53ee8cc1Swenshuai.xi typedef enum 452*53ee8cc1Swenshuai.xi { 453*53ee8cc1Swenshuai.xi E_HVD_EX_ISR_NONE = 0, ///< disable ISR 454*53ee8cc1Swenshuai.xi E_HVD_EX_ISR_DISP_ONE = BIT(0), ///< HVD display one frame on screen. 455*53ee8cc1Swenshuai.xi E_HVD_EX_ISR_DISP_REPEAT = BIT(1), ///< The current displayed frame is repeated frame. 456*53ee8cc1Swenshuai.xi E_HVD_EX_ISR_DISP_WITH_CC = BIT(2), ///< Current displayed frame should be displayed with user data. 457*53ee8cc1Swenshuai.xi E_HVD_EX_ISR_DISP_FIRST_FRM = BIT(3), ///< HVD display first frame on screen. 458*53ee8cc1Swenshuai.xi 459*53ee8cc1Swenshuai.xi 460*53ee8cc1Swenshuai.xi E_HVD_EX_ISR_DEC_CMA_ACTION = BIT(7), ///< HVD handle CMA action 461*53ee8cc1Swenshuai.xi E_HVD_EX_ISR_DEC_ONE = BIT(8), ///< HVD decoded one frame done. 462*53ee8cc1Swenshuai.xi E_HVD_EX_ISR_DEC_I = BIT(9), ///< HVD decoded one I frame done. 463*53ee8cc1Swenshuai.xi E_HVD_EX_ISR_DEC_HW_ERR = BIT(10), ///< HVD HW found decode error. 464*53ee8cc1Swenshuai.xi E_HVD_EX_ISR_DEC_CC_FOUND = BIT(11), ///< HVD found one user data with decoded frame. 465*53ee8cc1Swenshuai.xi E_HVD_EX_ISR_DEC_DISP_INFO_CHANGE = BIT(12), ///< HVD found display information change. 466*53ee8cc1Swenshuai.xi E_HVD_EX_ISR_DEC_DATA_ERR = BIT(13), ///< HVD HW found decode error. 467*53ee8cc1Swenshuai.xi E_HVD_EX_ISR_DEC_FIRST_FRM = BIT(14), ///< HVD decode first frame. 468*53ee8cc1Swenshuai.xi E_HVD_EX_ISR_DEC_SEQ_HDR_FOUND = BIT(15), ///< HVD decode first frame. 469*53ee8cc1Swenshuai.xi } HVD_EX_IsrEvent; 470*53ee8cc1Swenshuai.xi 471*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 472*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_EX_GetFrmInfoType 473*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: The information type of get frame information. 474*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 475*53ee8cc1Swenshuai.xi typedef enum 476*53ee8cc1Swenshuai.xi { 477*53ee8cc1Swenshuai.xi E_HVD_EX_GFRMINFO_DISPLAY = 0, ///< Displayed frame. 478*53ee8cc1Swenshuai.xi E_HVD_EX_GFRMINFO_DECODE, ///< Decoded frame. 479*53ee8cc1Swenshuai.xi E_HVD_EX_GFRMINFO_NEXT_DISPLAY, ///< Next frame to be displayed. 480*53ee8cc1Swenshuai.xi E_HVD_EX_GFRMINFO_DISPLAY_SUB, ///< Displayed sub frame. 481*53ee8cc1Swenshuai.xi E_HVD_EX_GFRMINFO_DECODE_SUB, ///< Decoded sub frame. 482*53ee8cc1Swenshuai.xi E_HVD_EX_GFRMINFO_LAST_DISPLAY, 483*53ee8cc1Swenshuai.xi E_HVD_EX_GFRMINFO_LAST_DISPLAY_EX, 484*53ee8cc1Swenshuai.xi } HVD_EX_GetFrmInfoType; 485*53ee8cc1Swenshuai.xi 486*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 487*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_EX_GDataType 488*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: The information type of get data 489*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 490*53ee8cc1Swenshuai.xi typedef enum 491*53ee8cc1Swenshuai.xi { 492*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_DISP_CNT, 493*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_SKIP_CNT, 494*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_DROP_CNT, 495*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_IDLE_CNT, 496*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_VSYNC_CNT, 497*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_MAIN_LOOP_CNT, 498*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_AVC_LEVEL_IDC, 499*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_DISP_Q_SIZE, 500*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_ES_LEVEL, 501*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_AVC_VUI_DISP_INFO, 502*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_DISP_STC, 503*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_USERDATA_IDX_TBL_SIZE, 504*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_USERDATA_PACKET_SIZE, 505*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_REAL_FRAMERATE, 506*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_IS_ORI_INTERLACE_MODE, 507*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_FRAME_MBS_ONLY_FLAG, 508*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_FW_CODEC_TYPE, 509*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_FRC_MODE, 510*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_IS_LEAST_DISPQ_SIZE, 511*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_FIELD_PIC_FLAG, 512*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_FW_STATUS_FLAG, 513*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_HVD_HW_MAX_PIXEL, 514*53ee8cc1Swenshuai.xi #ifdef VDEC3 515*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_VBBU_ADDR, 516*53ee8cc1Swenshuai.xi #endif 517*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_VIDEO_FULL_RANGE_FLAG, 518*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_SEQ_CHANGE_INFO, 519*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_GET_NOT_SUPPORT_INFO, 520*53ee8cc1Swenshuai.xi E_HVD_EX_GDATA_TYPE_GET_MIN_TSP_DATA_SIZE, 521*53ee8cc1Swenshuai.xi } HVD_EX_GDataType; 522*53ee8cc1Swenshuai.xi 523*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 524*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_EX_GDataType 525*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: The type of set settings 526*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 527*53ee8cc1Swenshuai.xi typedef enum 528*53ee8cc1Swenshuai.xi { 529*53ee8cc1Swenshuai.xi E_HVD_EX_SSET_TIME_UNIT, ///< set the HVD time unit of all interface. HVD_TimeUnit_Type 530*53ee8cc1Swenshuai.xi E_HVD_EX_SSET_PITCH, ///< set the pitch of vsync. 531*53ee8cc1Swenshuai.xi E_HVD_EX_SSET_SYNC_EACH_FRM, ///< HVD does sync action at every frame. TREU: turn on; FALSE: turn off. 532*53ee8cc1Swenshuai.xi E_HVD_EX_SSET_MAX_DEC_TICK, ///< HVD limits the max decode ticks for one field. 533*53ee8cc1Swenshuai.xi E_HVD_EX_SSET_AUTO_FREE_ES, ///< HVD frees the ES buffer data when ES is being fulled. 534*53ee8cc1Swenshuai.xi E_HVD_EX_SSET_MIN_FRAME_GAP, ///< set HVD not to report error which is caused by the frame gap larger than min frame gap. 535*53ee8cc1Swenshuai.xi E_HVD_EX_SSET_DISABLE_DEBLOCKING, ///< HVD will not do deblocking process. 536*53ee8cc1Swenshuai.xi E_HVD_EX_SSET_DISABLE_QUARTER_PIXEL,///< HVD will not do quarter pixel process. 537*53ee8cc1Swenshuai.xi E_HVD_EX_SSET_MIU_BURST_CNT_LEVEL, ///< HVD MIU Burst Cnt, Arg 0~7: burst cnt level, 0xFFFFFFFF = Disable 538*53ee8cc1Swenshuai.xi } HVD_EX_SSettingsType; 539*53ee8cc1Swenshuai.xi 540*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 541*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_EX_PatternType 542*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: The type of special pattern for specific purpose. 543*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 544*53ee8cc1Swenshuai.xi typedef enum 545*53ee8cc1Swenshuai.xi { 546*53ee8cc1Swenshuai.xi E_HVD_EX_PATTERN_FLUSH = 0, ///< Used after MDrv_HVD_Flush(). 547*53ee8cc1Swenshuai.xi E_HVD_EX_PATTERN_FILEEND, ///< Used after MDrv_HVD_EX_SetDataEnd(). 548*53ee8cc1Swenshuai.xi } HVD_EX_PatternType; 549*53ee8cc1Swenshuai.xi 550*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 551*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_EX_ESLevel 552*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: The level of ES buffer. 553*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 554*53ee8cc1Swenshuai.xi typedef enum 555*53ee8cc1Swenshuai.xi { 556*53ee8cc1Swenshuai.xi E_HVD_EX_ES_LEVEL_NORMAL = 0, 557*53ee8cc1Swenshuai.xi E_HVD_EX_ES_LEVEL_UNDER = BIT(0), 558*53ee8cc1Swenshuai.xi E_HVD_EX_ES_LEVEL_OVER = BIT(1), 559*53ee8cc1Swenshuai.xi } HVD_EX_ESLevel; 560*53ee8cc1Swenshuai.xi 561*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 562*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_EX_ErrorCode 563*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: The type of HVD error 564*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 565*53ee8cc1Swenshuai.xi typedef enum 566*53ee8cc1Swenshuai.xi { 567*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_GENERAL_BASE = 0x0000, 568*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_OUT_OF_SPEC, 569*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_UNKNOW_ERR, 570*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_HW_BREAK_DOWN, 571*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_HW_DEC_TIMEOUT, 572*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_OUT_OF_MEMORY, 573*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_UNKNOWN_CODEC, 574*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_RES_NOT_SUPPORT, 575*53ee8cc1Swenshuai.xi 576*53ee8cc1Swenshuai.xi // AVC 577*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_AVC_BASE = 0x1000, 578*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_AVC_SPS_BROKEN, // SPS is not valid 579*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_AVC_SPS_NOT_IN_SPEC, 580*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_AVC_SPS_NOT_ENOUGH_FRM, // DPB size at specified level is smaller than the specified number of reference frames. This is not allowed 581*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_AVC_PPS_BROKEN, // PPS is not valid 582*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_AVC_REF_LIST, 583*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_AVC_NO_REF, 584*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_AVC_RES, 585*53ee8cc1Swenshuai.xi 586*53ee8cc1Swenshuai.xi // AVS 587*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_AVS_BASE = (0x2000), 588*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_AVS_RES, 589*53ee8cc1Swenshuai.xi 590*53ee8cc1Swenshuai.xi // RM 591*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_RM_BASE = (0x3000), 592*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_RM_PACKET_HEADER, 593*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_RM_FRAME_HEADER, 594*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_RM_SLICE_HEADER, 595*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_RM_BYTE_CNT, 596*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_RM_DISP_TIMEOUT, 597*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_RM_NO_REF, 598*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_RM_RES, // out of supported resolution 599*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_RM_VLC, 600*53ee8cc1Swenshuai.xi E_HVD_EX_ERRCODE_RM_SIZE_OUT_FB_LAYOUT, 601*53ee8cc1Swenshuai.xi } HVD_EX_ErrorCode; 602*53ee8cc1Swenshuai.xi 603*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 604*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_TurboInitLevel 605*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: The level of turbo init mode. 606*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 607*53ee8cc1Swenshuai.xi typedef enum 608*53ee8cc1Swenshuai.xi { 609*53ee8cc1Swenshuai.xi E_HVD_EX_TURBOINIT_NONE = 0, ///< Not omit any process. 610*53ee8cc1Swenshuai.xi E_HVD_EX_TURBOINIT_CHECK = BIT(0), ///< Omit checking. 611*53ee8cc1Swenshuai.xi E_HVD_EX_TURBOINIT_MEMORY = BIT(1), ///< Omit memory reset process. 612*53ee8cc1Swenshuai.xi E_HVD_EX_TURBOINIT_DISPLAY = BIT(2), ///< Omit FW display setup process. 613*53ee8cc1Swenshuai.xi E_HVD_EX_TURBOINIT_FW_RELOAD = BIT(3), ///< Omit FW reload process. 614*53ee8cc1Swenshuai.xi } HVD_EX_TurboInitType; 615*53ee8cc1Swenshuai.xi 616*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 617*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_EX_FWSourceType 618*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: The type of fw binary input source 619*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 620*53ee8cc1Swenshuai.xi typedef enum 621*53ee8cc1Swenshuai.xi { 622*53ee8cc1Swenshuai.xi E_HVD_EX_FW_SOURCE_NONE, ///< No input FW; FW will be loaded by VDEC library. 623*53ee8cc1Swenshuai.xi E_HVD_EX_FW_SOURCE_DRAM, ///< input source from DRAM. 624*53ee8cc1Swenshuai.xi E_HVD_EX_FW_SOURCE_FLASH, ///< input source from FLASH. 625*53ee8cc1Swenshuai.xi } HVD_EX_FWSourceType; 626*53ee8cc1Swenshuai.xi 627*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 628*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_EX_DumpStatus 629*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: The type of fw binary input source 630*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 631*53ee8cc1Swenshuai.xi typedef enum 632*53ee8cc1Swenshuai.xi { 633*53ee8cc1Swenshuai.xi E_HVD_EX_DUMP_STATUS_DRV = BIT(0), ///< Dump Driver status 634*53ee8cc1Swenshuai.xi E_HVD_EX_DUMP_STATUS_FW = BIT(1), ///< Dump firmware status 635*53ee8cc1Swenshuai.xi E_HVD_EX_DUMP_STATUS_HW = BIT(2), ///< Dump hardware status 636*53ee8cc1Swenshuai.xi } HVD_EX_DumpStatus; 637*53ee8cc1Swenshuai.xi 638*53ee8cc1Swenshuai.xi // VDEC SEQ change info, must match VDEC_SpsChangeInfo in fwHVD_if.h 639*53ee8cc1Swenshuai.xi typedef enum 640*53ee8cc1Swenshuai.xi { 641*53ee8cc1Swenshuai.xi E_HVD_SEQ_CHANGE_NONE = 0, ///< unknown sps change info 642*53ee8cc1Swenshuai.xi E_HVD_SEQ_CHANGE_FIRST_TIME = BIT(0), ///< seq change due to first sequence 643*53ee8cc1Swenshuai.xi E_HVD_SEQ_CHANGE_RESOLUTION = BIT(1), ///< seq chagne due to resolution 644*53ee8cc1Swenshuai.xi E_HVD_SEQ_CHANGE_PICTURE_TYPE = BIT(2), ///< seq chagne due to picture type 645*53ee8cc1Swenshuai.xi E_HVD_SEQ_CHANGE_ASPECT_RATIO = BIT(3), ///< seq chagne due to aspect ratio 646*53ee8cc1Swenshuai.xi E_HVD_SEQ_CHANGE_FRAME_RATE = BIT(4), ///< seq chagne due to frame rate 647*53ee8cc1Swenshuai.xi E_HVD_SEQ_CHANGE_HDR_INFO = BIT(5), ///< seq chagne due to HDR info 648*53ee8cc1Swenshuai.xi } HVD_SeqChangeInfo; 649*53ee8cc1Swenshuai.xi 650*53ee8cc1Swenshuai.xi typedef enum 651*53ee8cc1Swenshuai.xi { 652*53ee8cc1Swenshuai.xi E_HVD_EX_DRV_STREAM_NONE = 0, 653*53ee8cc1Swenshuai.xi E_HVD_EX_DRV_MAIN_STREAM, 654*53ee8cc1Swenshuai.xi E_HVD_EX_DRV_SUB_STREAM, 655*53ee8cc1Swenshuai.xi E_HVD_EX_DRV_MVC_STREAM, 656*53ee8cc1Swenshuai.xi #ifdef VDEC3 657*53ee8cc1Swenshuai.xi E_HVD_EX_DRV_N_STREAM, 658*53ee8cc1Swenshuai.xi #endif 659*53ee8cc1Swenshuai.xi } HVD_EX_DRV_StreamType; 660*53ee8cc1Swenshuai.xi 661*53ee8cc1Swenshuai.xi typedef enum 662*53ee8cc1Swenshuai.xi { 663*53ee8cc1Swenshuai.xi E_HVD_EX_FB_REDUCTION_NONE = 0, ///< FB reduction disable 664*53ee8cc1Swenshuai.xi E_HVD_EX_FB_REDUCTION_1_2 = 1, ///< FB reduction 1/2 665*53ee8cc1Swenshuai.xi E_HVD_EX_FB_REDUCTION_1_4 = 2, ///< FB reduction 1/4 666*53ee8cc1Swenshuai.xi } HVD_EX_FBReductionType; 667*53ee8cc1Swenshuai.xi 668*53ee8cc1Swenshuai.xi typedef enum 669*53ee8cc1Swenshuai.xi { 670*53ee8cc1Swenshuai.xi E_HVD_EX_CLOCK_SPEED_NONE = 0, 671*53ee8cc1Swenshuai.xi E_HVD_EX_CLOCK_SPEED_HIGHEST, 672*53ee8cc1Swenshuai.xi E_HVD_EX_CLOCK_SPEED_HIGH, 673*53ee8cc1Swenshuai.xi E_HVD_EX_CLOCK_SPEED_MEDIUM, 674*53ee8cc1Swenshuai.xi E_HVD_EX_CLOCK_SPEED_LOW, 675*53ee8cc1Swenshuai.xi E_HVD_EX_CLOCK_SPEED_LOWEST, 676*53ee8cc1Swenshuai.xi E_HVD_EX_CLOCK_SPEED_DEFAULT, 677*53ee8cc1Swenshuai.xi } HVD_EX_ClockSpeed; 678*53ee8cc1Swenshuai.xi 679*53ee8cc1Swenshuai.xi 680*53ee8cc1Swenshuai.xi typedef enum 681*53ee8cc1Swenshuai.xi { 682*53ee8cc1Swenshuai.xi E_HVD_EX_ES_BUF_STATUS_UNKNOWN = 0, 683*53ee8cc1Swenshuai.xi E_HVD_EX_ES_BUF_STATUS_UNDERFLOW = 1, 684*53ee8cc1Swenshuai.xi E_HVD_EX_ES_BUF_STATUS_OVERFLOW = 2, 685*53ee8cc1Swenshuai.xi E_HVD_EX_ES_BUF_STATUS_NORMAL = 3, 686*53ee8cc1Swenshuai.xi } HVD_EX_ES_Buf_Status; 687*53ee8cc1Swenshuai.xi 688*53ee8cc1Swenshuai.xi typedef enum 689*53ee8cc1Swenshuai.xi { 690*53ee8cc1Swenshuai.xi E_HVD_EX_DISPLAY_PATH_MVOP_MAIN = 0, 691*53ee8cc1Swenshuai.xi E_HVD_EX_DISPLAY_PATH_MVOP_SUB, 692*53ee8cc1Swenshuai.xi E_HVD_EX_DISPLAY_PATH_NONE 693*53ee8cc1Swenshuai.xi } HVD_EX_DISPLAY_PATH; 694*53ee8cc1Swenshuai.xi 695*53ee8cc1Swenshuai.xi typedef enum 696*53ee8cc1Swenshuai.xi { 697*53ee8cc1Swenshuai.xi E_HVD_EX_INPUT_TSP_0 = 0, 698*53ee8cc1Swenshuai.xi E_HVD_EX_INPUT_TSP_1, 699*53ee8cc1Swenshuai.xi E_HVD_EX_INPUT_TSP_2, 700*53ee8cc1Swenshuai.xi E_HVD_EX_INPUT_TSP_3, 701*53ee8cc1Swenshuai.xi E_HVD_EX_INPUT_TSP_NONE = 0xFF, 702*53ee8cc1Swenshuai.xi } HVD_EX_INPUT_TSP; 703*53ee8cc1Swenshuai.xi 704*53ee8cc1Swenshuai.xi //HVD set MFcodec Mode 705*53ee8cc1Swenshuai.xi typedef enum 706*53ee8cc1Swenshuai.xi { 707*53ee8cc1Swenshuai.xi E_HVD_EX_MFCODEC_DEFAULT = 0, 708*53ee8cc1Swenshuai.xi E_HVD_EX_MFCODEC_FORCE_ENABLE, 709*53ee8cc1Swenshuai.xi E_HVD_EX_MFCODEC_FORCE_DISABLE, 710*53ee8cc1Swenshuai.xi } HVD_EX_MFCodec_mode; 711*53ee8cc1Swenshuai.xi 712*53ee8cc1Swenshuai.xi //set VDEC Feature 713*53ee8cc1Swenshuai.xi typedef enum 714*53ee8cc1Swenshuai.xi { 715*53ee8cc1Swenshuai.xi E_HVD_EX_FEATURE_DEFAULT = 0, 716*53ee8cc1Swenshuai.xi E_HVD_EX_FEATURE_FORCE_MAIN_PROFILE = 1, //BIT0=1: HEVC Only support Main profile decode 717*53ee8cc1Swenshuai.xi E_HVD_EX_FEATURE_DISABLE_TEMPORAL_SCALABILITY = 1 << 1, // Bit 1 = 1: do not support temporal scalibity 718*53ee8cc1Swenshuai.xi } HVD_EX_Feature; 719*53ee8cc1Swenshuai.xi 720*53ee8cc1Swenshuai.xi /// input source select enumerator 721*53ee8cc1Swenshuai.xi typedef enum 722*53ee8cc1Swenshuai.xi { 723*53ee8cc1Swenshuai.xi ///DTV mode 724*53ee8cc1Swenshuai.xi E_HVD_EX_SRC_MODE_DTV = 0, 725*53ee8cc1Swenshuai.xi ///TS file mode 726*53ee8cc1Swenshuai.xi E_HVD_EX_SRC_MODE_TS_FILE, 727*53ee8cc1Swenshuai.xi ///generic file mode 728*53ee8cc1Swenshuai.xi E_HVD_EX_SRC_MODE_FILE, 729*53ee8cc1Swenshuai.xi /// TS file and dual ES buffer mode 730*53ee8cc1Swenshuai.xi E_HVD_EX_SRC_MODE_TS_FILE_DUAL_ES, 731*53ee8cc1Swenshuai.xi ///generic file and dual ES buffer mode 732*53ee8cc1Swenshuai.xi E_HVD_EX_SRC_MODE_FILE_DUAL_ES, 733*53ee8cc1Swenshuai.xi } HVD_EX_SrcMode; 734*53ee8cc1Swenshuai.xi 735*53ee8cc1Swenshuai.xi /// codec type enumerator 736*53ee8cc1Swenshuai.xi typedef enum 737*53ee8cc1Swenshuai.xi { 738*53ee8cc1Swenshuai.xi ///unsupported codec type 739*53ee8cc1Swenshuai.xi E_HVD_EX_CODEC_TYPE_NONE = 0, 740*53ee8cc1Swenshuai.xi ///MPEG 1/2 741*53ee8cc1Swenshuai.xi E_HVD_EX_CODEC_TYPE_MPEG2, 742*53ee8cc1Swenshuai.xi ///H263 (short video header) 743*53ee8cc1Swenshuai.xi E_HVD_EX_CODEC_TYPE_H263, 744*53ee8cc1Swenshuai.xi ///MPEG4 (default) 745*53ee8cc1Swenshuai.xi E_HVD_EX_CODEC_TYPE_MPEG4, 746*53ee8cc1Swenshuai.xi ///MPEG4 (Divx311) 747*53ee8cc1Swenshuai.xi E_HVD_EX_CODEC_TYPE_DIVX311, 748*53ee8cc1Swenshuai.xi ///MPEG4 (Divx412) 749*53ee8cc1Swenshuai.xi E_HVD_EX_CODEC_TYPE_DIVX412, 750*53ee8cc1Swenshuai.xi ///FLV 751*53ee8cc1Swenshuai.xi E_HVD_EX_CODEC_TYPE_FLV, 752*53ee8cc1Swenshuai.xi ///VC1 advanced profile (VC1) 753*53ee8cc1Swenshuai.xi E_HVD_EX_CODEC_TYPE_VC1_ADV, 754*53ee8cc1Swenshuai.xi ///VC1 main profile (RCV) 755*53ee8cc1Swenshuai.xi E_HVD_EX_CODEC_TYPE_VC1_MAIN, 756*53ee8cc1Swenshuai.xi ///Real Video version 8 757*53ee8cc1Swenshuai.xi E_HVD_EX_CODEC_TYPE_RV8, 758*53ee8cc1Swenshuai.xi ///Real Video version 9 and 10 759*53ee8cc1Swenshuai.xi E_HVD_EX_CODEC_TYPE_RV9, 760*53ee8cc1Swenshuai.xi ///H264 761*53ee8cc1Swenshuai.xi E_HVD_EX_CODEC_TYPE_H264, 762*53ee8cc1Swenshuai.xi ///AVS 763*53ee8cc1Swenshuai.xi E_HVD_EX_CODEC_TYPE_AVS, 764*53ee8cc1Swenshuai.xi ///MJPEG 765*53ee8cc1Swenshuai.xi E_HVD_EX_CODEC_TYPE_MJPEG, 766*53ee8cc1Swenshuai.xi ///MVC 767*53ee8cc1Swenshuai.xi E_HVD_EX_CODEC_TYPE_MVC, 768*53ee8cc1Swenshuai.xi ///VP8 769*53ee8cc1Swenshuai.xi E_HVD_EX_CODEC_TYPE_VP8, 770*53ee8cc1Swenshuai.xi ///HEVC 771*53ee8cc1Swenshuai.xi E_HVD_EX_CODEC_TYPE_HEVC, 772*53ee8cc1Swenshuai.xi ///VP9 773*53ee8cc1Swenshuai.xi E_HVD_EX_CODEC_TYPE_VP9, 774*53ee8cc1Swenshuai.xi E_HVD_EX_CODEC_TYPE_NUM 775*53ee8cc1Swenshuai.xi } HVD_EX_CodecType; 776*53ee8cc1Swenshuai.xi 777*53ee8cc1Swenshuai.xi typedef enum 778*53ee8cc1Swenshuai.xi { 779*53ee8cc1Swenshuai.xi E_HVD_EX_CMA_ALLOCATION_NONE = 0, 780*53ee8cc1Swenshuai.xi E_HVD_EX_CMA_ALLOCATION_WAITING, 781*53ee8cc1Swenshuai.xi E_HVD_EX_CMA_ALLOCATION_DONE, 782*53ee8cc1Swenshuai.xi E_HVD_EX_CMA_ALLOCATION_FAILED, 783*53ee8cc1Swenshuai.xi } HVD_EX_CMA_Allocation_Status; 784*53ee8cc1Swenshuai.xi 785*53ee8cc1Swenshuai.xi typedef enum 786*53ee8cc1Swenshuai.xi { 787*53ee8cc1Swenshuai.xi E_HVD_EX_CMA_RELEASE_NONE = 0, 788*53ee8cc1Swenshuai.xi E_HVD_EX_CMA_RELEASE_WAITING, 789*53ee8cc1Swenshuai.xi E_HVD_EX_CMA_RELEASE_DONE, 790*53ee8cc1Swenshuai.xi } HVD_EX_CMA_Release_Status; 791*53ee8cc1Swenshuai.xi 792*53ee8cc1Swenshuai.xi typedef enum 793*53ee8cc1Swenshuai.xi { 794*53ee8cc1Swenshuai.xi E_HVD_EX_GET_DV_SUPPORT_PROFILE = 0, 795*53ee8cc1Swenshuai.xi E_HVD_EX_GET_DV_SUPPORT_LEVEL, 796*53ee8cc1Swenshuai.xi E_HVD_EX_SET_DV_INFO,//set profile and level 797*53ee8cc1Swenshuai.xi } HVD_EX_DV_CMD_TYPE; 798*53ee8cc1Swenshuai.xi 799*53ee8cc1Swenshuai.xi typedef enum 800*53ee8cc1Swenshuai.xi { 801*53ee8cc1Swenshuai.xi E_HVD_EX_ORIGINAL_MAIN_STREAM = 0, 802*53ee8cc1Swenshuai.xi E_HVD_EX_ORIGINAL_SUB_STREAM, 803*53ee8cc1Swenshuai.xi E_HVD_EX_ORIGINAL_N_STREAM, 804*53ee8cc1Swenshuai.xi } HVD_EX_Original_Stream; 805*53ee8cc1Swenshuai.xi 806*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 807*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_EX_DispInfo 808*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description: Store the HVD driver information 809*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 810*53ee8cc1Swenshuai.xi typedef struct 811*53ee8cc1Swenshuai.xi { 812*53ee8cc1Swenshuai.xi MS_U16 u16HorSize; ///< pixel width. 813*53ee8cc1Swenshuai.xi MS_U16 u16VerSize; ///< pixel height. 814*53ee8cc1Swenshuai.xi MS_U32 u32FrameRate; ///< 1000 times frames per second. 815*53ee8cc1Swenshuai.xi MS_U8 u8AspectRate; ///< aspect ration ID. 816*53ee8cc1Swenshuai.xi MS_U8 u8Interlace; ///< interlace content 817*53ee8cc1Swenshuai.xi MS_U8 u8AFD; ///< AFD ID number 818*53ee8cc1Swenshuai.xi MS_U8 bChroma_idc_Mono; ///< - TRUE: mono mode FALSE: colorful, not mono 819*53ee8cc1Swenshuai.xi MS_U16 u16SarWidth; ///< Sample aspect width ratio. 820*53ee8cc1Swenshuai.xi MS_U16 u16SarHeight; ///< Sample aspect height ratio. 821*53ee8cc1Swenshuai.xi MS_U16 u16CropRight; ///< crop right. 822*53ee8cc1Swenshuai.xi MS_U16 u16CropLeft; ///< crop left. 823*53ee8cc1Swenshuai.xi MS_U16 u16CropBottom; ///< crop bottom. 824*53ee8cc1Swenshuai.xi MS_U16 u16CropTop; ///< crop top. 825*53ee8cc1Swenshuai.xi MS_U16 u16Pitch; ///< pitch 826*53ee8cc1Swenshuai.xi MS_U8 u8ColourPrimaries; ///< Color Primaries in VUI 827*53ee8cc1Swenshuai.xi //**************************** 828*53ee8cc1Swenshuai.xi MS_U8 reserved8_0; ///< reserved. 829*53ee8cc1Swenshuai.xi //****************************** 830*53ee8cc1Swenshuai.xi } HVD_EX_DispInfo; // bytes 831*53ee8cc1Swenshuai.xi 832*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 833*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_EX_DrvInfo 834*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description: Store the HVD driver information 835*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 836*53ee8cc1Swenshuai.xi typedef struct 837*53ee8cc1Swenshuai.xi { 838*53ee8cc1Swenshuai.xi MS_BOOL bAVC; ///< - TRUE: HW does support AVC. - FALSE: HW does not support AVC. 839*53ee8cc1Swenshuai.xi MS_BOOL bAVS; ///< - TRUE: HW does support AVS. - FALSE: HW does not support AVS. 840*53ee8cc1Swenshuai.xi MS_BOOL bRM; ///< - TRUE: HW does support RM. - FALSE: HW does not support RM. 841*53ee8cc1Swenshuai.xi MS_U32 FWversion; ///< FW version number. 842*53ee8cc1Swenshuai.xi } HVD_EX_DrvInfo; 843*53ee8cc1Swenshuai.xi 844*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 845*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_EX_DrvStatus 846*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description: Store the HVD driver status 847*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 848*53ee8cc1Swenshuai.xi typedef struct 849*53ee8cc1Swenshuai.xi { 850*53ee8cc1Swenshuai.xi MS_BOOL bInit; ///< - TRUE: Initialization success. - FALSE: Initialization failed or not initialized yet. 851*53ee8cc1Swenshuai.xi MS_BOOL bBusy; ///< - TRUE: Driver is processing - FALSE: Driver is Idle. 852*53ee8cc1Swenshuai.xi } HVD_EX_DrvStatus; 853*53ee8cc1Swenshuai.xi 854*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 855*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_EX_RVInfo 856*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description: RV file information 857*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 858*53ee8cc1Swenshuai.xi typedef struct 859*53ee8cc1Swenshuai.xi { 860*53ee8cc1Swenshuai.xi MS_U16 RV_Version; ///< Real Video Bitstream version 861*53ee8cc1Swenshuai.xi MS_U16 ulNumSizes; ///< Real Video Number sizes 862*53ee8cc1Swenshuai.xi MS_U16 ulPicSizes_w[8]; ///< Real Video file width 863*53ee8cc1Swenshuai.xi MS_U16 ulPicSizes_h[8]; ///< Real Video file height 864*53ee8cc1Swenshuai.xi } HVD_EX_RVInfo; 865*53ee8cc1Swenshuai.xi 866*53ee8cc1Swenshuai.xi typedef struct 867*53ee8cc1Swenshuai.xi { 868*53ee8cc1Swenshuai.xi HVD_EX_FBReductionType LumaFBReductionMode; ///< Luma frame buffer reduction mode. 869*53ee8cc1Swenshuai.xi HVD_EX_FBReductionType ChromaFBReductionMode; ///< Chroma frame buffer reduction mode. 870*53ee8cc1Swenshuai.xi MS_U8 u8EnableAutoMode; /// 0: Disable, 1: Enable 871*53ee8cc1Swenshuai.xi } HVD_EX_FBReduction; 872*53ee8cc1Swenshuai.xi 873*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 874*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_EX_MemCfg 875*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description: Store the HVD driver config 876*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 877*53ee8cc1Swenshuai.xi typedef struct 878*53ee8cc1Swenshuai.xi { 879*53ee8cc1Swenshuai.xi HVD_EX_FWSourceType eFWSourceType; //!< the input FW source type. 880*53ee8cc1Swenshuai.xi MS_VIRT u32FWBinaryVAddr; //!< virtual address of input FW binary in DRAM 881*53ee8cc1Swenshuai.xi MS_PHY u32FWBinaryAddr; //!< the physical memory start address in Flash/DRAM memory of FW code 882*53ee8cc1Swenshuai.xi MS_U32 u32FWBinarySize; //!< the FW code size 883*53ee8cc1Swenshuai.xi MS_VIRT u32VLCBinaryVAddr;///< VLC table binary data buffer start address 884*53ee8cc1Swenshuai.xi MS_PHY u32VLCBinaryAddr;///< VLC table binary data buffer start address 885*53ee8cc1Swenshuai.xi MS_U32 u32VLCBinarySize;///<VLC table binary data buffer size 886*53ee8cc1Swenshuai.xi MS_PHY u32MIU1BaseAddr; //!< the physical memory start address of MIU 1 base address. 0: default value. 887*53ee8cc1Swenshuai.xi MS_VIRT u32CodeBufVAddr; //!< the virtual memory start address of code buffer 888*53ee8cc1Swenshuai.xi MS_PHY u32CodeBufAddr; //!< the physical memory start address of code buffer 889*53ee8cc1Swenshuai.xi MS_U32 u32CodeBufSize; //!< the code buffer size 890*53ee8cc1Swenshuai.xi MS_VIRT u32FrameBufVAddr; //!< the virtual memory start address of frame buffer 891*53ee8cc1Swenshuai.xi MS_PHY u32FrameBufAddr; //!< the physical memory start address of frame buffer 892*53ee8cc1Swenshuai.xi MS_U32 u32FrameBufSize; //!< the frame buffer size 893*53ee8cc1Swenshuai.xi MS_VIRT u32BitstreamBufVAddr; //!< the virtual memory start address of bit stream buffer 894*53ee8cc1Swenshuai.xi MS_PHY u32BitstreamBufAddr; //!< the physical memory start address of bit stream buffer 895*53ee8cc1Swenshuai.xi MS_U32 u32BitstreamBufSize; //!< the bit stream buffer size 896*53ee8cc1Swenshuai.xi MS_VIRT u32DrvProcessBufVAddr; //!< the virtual memory start address of driver process buffer 897*53ee8cc1Swenshuai.xi MS_PHY u32DrvProcessBufAddr; //!< the physical memory start address of driver process buffer 898*53ee8cc1Swenshuai.xi MS_U32 u32DrvProcessBufSize; //!< the driver process buffer size 899*53ee8cc1Swenshuai.xi #ifdef VDEC3 900*53ee8cc1Swenshuai.xi MS_PHY u32TotalBitstreamBufAddr; 901*53ee8cc1Swenshuai.xi MS_U32 u32TotalBitstreamBufSize; 902*53ee8cc1Swenshuai.xi #endif 903*53ee8cc1Swenshuai.xi } HVD_EX_MemCfg; 904*53ee8cc1Swenshuai.xi 905*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 906*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_Init_Params 907*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description: Store the initialization settings 908*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 909*53ee8cc1Swenshuai.xi typedef struct 910*53ee8cc1Swenshuai.xi { 911*53ee8cc1Swenshuai.xi MS_U32 u32ModeFlag; ///< init mode flag, use HVD_INIT_* to setup HVD. 912*53ee8cc1Swenshuai.xi MS_U32 u32FrameRate; ///< frame rate. 913*53ee8cc1Swenshuai.xi MS_U32 u32FrameRateBase; ///< frame rate base. The value of u32FrameRate /u32FrameRateBase must be frames per sec. 914*53ee8cc1Swenshuai.xi MS_U8 u8MinFrmGap; ///< set the min frame gap. 915*53ee8cc1Swenshuai.xi MS_U8 u8SyncType; ///< HVD_EX_SyncType. sync type of current playback. 916*53ee8cc1Swenshuai.xi MS_U16 u16Pitch; ///< not zero: specify the pitch. 0: use default value. 917*53ee8cc1Swenshuai.xi MS_U32 u32MaxDecTick; ///< not zero: specify the max decode tick. 0: use default value. 918*53ee8cc1Swenshuai.xi MS_BOOL bSyncEachFrm; ///< TRUE: sync STC at each frame. FALSE: not sync each frame. 919*53ee8cc1Swenshuai.xi MS_BOOL bAutoFreeES; ///< TRUE: auto free ES buffer when ES buffer is full. FALSE: not do the auto free. 920*53ee8cc1Swenshuai.xi MS_BOOL bAutoPowerSaving; ///< TRUE: auto power saving. FALSE: not do the auto power saving. 921*53ee8cc1Swenshuai.xi MS_BOOL bDynamicScaling; ///< TRUE: enable Dynamic Scaling. FALSE: disable Dynamic Scaling. 922*53ee8cc1Swenshuai.xi MS_BOOL bFastDisplay; ///< TRUE: enable Fast Display. FALSE: disable Fast Display. 923*53ee8cc1Swenshuai.xi MS_BOOL bUserData; ///< TRUE: enable processing User data. FALSE: disable processing User data. 924*53ee8cc1Swenshuai.xi MS_U8 u8TurboInit; ///< HVD_TurboInitLevel. set the turbo init mode. 925*53ee8cc1Swenshuai.xi MS_U8 u8TimeUnit; ///< HVD_Time_Unit_Type.set the type of input/output time unit. 926*53ee8cc1Swenshuai.xi MS_U16 u16DecoderClock; ///< HVD decoder clock speed. 0: default value. non-zero: any nearist clock. 927*53ee8cc1Swenshuai.xi MS_U16 u16ChipECONum; ///< Chip revision, ECO number. 928*53ee8cc1Swenshuai.xi HVD_EX_RVInfo* pRVFileInfo; ///< pointer to RV file info 929*53ee8cc1Swenshuai.xi HVD_EX_FBReduction stFBReduction; ///< HVD Frame buffer reduction type 930*53ee8cc1Swenshuai.xi } HVD_EX_InitSettings; 931*53ee8cc1Swenshuai.xi 932*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 933*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_EX_PacketInfo 934*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description: Store the packet information 935*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 936*53ee8cc1Swenshuai.xi typedef struct 937*53ee8cc1Swenshuai.xi { 938*53ee8cc1Swenshuai.xi MS_PHY u32Staddr; ///< Packet offset from bitstream buffer base address. unit: byte. 939*53ee8cc1Swenshuai.xi MS_U32 u32Length; ///< Packet size. unit: byte. 940*53ee8cc1Swenshuai.xi MS_PHY u32Staddr2; ///< Packet offset from bitstream buffer base address. unit: byte. 941*53ee8cc1Swenshuai.xi MS_U32 u32Length2; ///< Packet size. unit: byte. 942*53ee8cc1Swenshuai.xi MS_U32 u32TimeStamp; ///< Packet time stamp. unit: ms. 943*53ee8cc1Swenshuai.xi MS_U32 u32ID_L; ///< Packet ID low part. 944*53ee8cc1Swenshuai.xi MS_U32 u32ID_H; ///< Packet ID high part. 945*53ee8cc1Swenshuai.xi MS_U32 u32AllocLength; ///< Allocated Packet size. unit: byte. 946*53ee8cc1Swenshuai.xi MS_U8 u8Version; ///< Packet version 0 means u32Offset is the offset of ES buffer 947*53ee8cc1Swenshuai.xi ///< 1 means u32Offset is used as esHandleID 948*53ee8cc1Swenshuai.xi } HVD_EX_PacketInfo; 949*53ee8cc1Swenshuai.xi 950*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 951*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_EX_FrameInfo 952*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description: Store the frame information 953*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 954*53ee8cc1Swenshuai.xi typedef struct 955*53ee8cc1Swenshuai.xi { 956*53ee8cc1Swenshuai.xi MS_PHY u32LumaAddr; ///< The start physical of luma data. Unit: byte. 957*53ee8cc1Swenshuai.xi MS_PHY u32ChromaAddr; ///< The start physcal of chroma data. Unit: byte. 958*53ee8cc1Swenshuai.xi MS_U32 u32TimeStamp; ///< Time stamp(DTS, PTS) of current displayed frame. Unit: 90khz. 959*53ee8cc1Swenshuai.xi MS_U32 u32ID_L; ///< low part of ID number decided by MDrv_HVD_EX_PushQueue(). 960*53ee8cc1Swenshuai.xi MS_U32 u32ID_H; ///< high part of ID number decided by MDrv_HVD_EX_PushQueue(). 961*53ee8cc1Swenshuai.xi MS_U16 u16Pitch; ///< The pitch of current frame. 962*53ee8cc1Swenshuai.xi MS_U16 u16Width; ///< pixel width of current frame. 963*53ee8cc1Swenshuai.xi MS_U16 u16Height; ///< pixel height of current frame. 964*53ee8cc1Swenshuai.xi HVD_EX_FrmType eFrmType; ///< picture type: I, P, B frame 965*53ee8cc1Swenshuai.xi HVD_EX_FieldType eFieldType; ///< none, top , bottom, both field 966*53ee8cc1Swenshuai.xi MS_U32 u32PrivateData; //[STB]only for AVC 967*53ee8cc1Swenshuai.xi MS_PHY u32LumaAddr_2bit; ///< The start offset of luma data. Unit: byte. 968*53ee8cc1Swenshuai.xi MS_PHY u32ChromaAddr_2bit; ///< The start offset of chroma data. Unit: byte. 969*53ee8cc1Swenshuai.xi MS_U16 u16Pitch_2bit; 970*53ee8cc1Swenshuai.xi MS_U8 u8LumaBitdepth; 971*53ee8cc1Swenshuai.xi MS_U8 u8ChromaBitdepth; 972*53ee8cc1Swenshuai.xi MS_PHY u32LumaAddrI; 973*53ee8cc1Swenshuai.xi MS_PHY u32LumaAddrI_2bit; 974*53ee8cc1Swenshuai.xi MS_PHY u32ChromaAddrI; 975*53ee8cc1Swenshuai.xi MS_PHY u32ChromaAddrI_2bit; 976*53ee8cc1Swenshuai.xi MS_U32 u32MFCodecInfo; 977*53ee8cc1Swenshuai.xi MS_U32 u32LumaMFCbitlen; 978*53ee8cc1Swenshuai.xi MS_U32 u32ChromaMFCbitlen; 979*53ee8cc1Swenshuai.xi ////HVD_MasteringDisplayColourVolume// 980*53ee8cc1Swenshuai.xi MS_U32 u32MaxLuminance; 981*53ee8cc1Swenshuai.xi MS_U32 u32MinLuminance; 982*53ee8cc1Swenshuai.xi MS_U16 u16Primaries[3][2]; 983*53ee8cc1Swenshuai.xi MS_U16 u16WhitePoint[2]; 984*53ee8cc1Swenshuai.xi MS_U8 u8Frm_Info_Ext_avail; ///bit[1]: SEI_Enabled, bit[0]: colur_description_present_flag 985*53ee8cc1Swenshuai.xi ////colour_description//////////// 986*53ee8cc1Swenshuai.xi MS_U8 u8Colour_primaries; // u(8) 987*53ee8cc1Swenshuai.xi MS_U8 u8Transfer_characteristics; // u(8) 988*53ee8cc1Swenshuai.xi MS_U8 u8Matrix_coefficients; // u(8) 989*53ee8cc1Swenshuai.xi ////Dolby_Vision//////////// 990*53ee8cc1Swenshuai.xi MS_U8 u8DVMode; // bit[0:1] 0: Disable 1:Single layer 2: Dual layer, bit[2] 0:Base Layer 1:Enhance Layer 991*53ee8cc1Swenshuai.xi MS_U8 u8CurrentIndex; 992*53ee8cc1Swenshuai.xi MS_U8 bDMEnable; 993*53ee8cc1Swenshuai.xi MS_U8 bCompEnable; 994*53ee8cc1Swenshuai.xi MS_PHY u32DVMetadataAddr; 995*53ee8cc1Swenshuai.xi MS_U32 u32DVDMSize; 996*53ee8cc1Swenshuai.xi MS_U32 u32DVCompSize; 997*53ee8cc1Swenshuai.xi MS_PHY u32HDRRegAddr; 998*53ee8cc1Swenshuai.xi MS_U32 u32HDRRegSize; 999*53ee8cc1Swenshuai.xi MS_PHY u32HDRLutAddr; 1000*53ee8cc1Swenshuai.xi MS_U32 u32HDRLutSize; 1001*53ee8cc1Swenshuai.xi // Other 1002*53ee8cc1Swenshuai.xi MS_U8 u8ComplexityLevel; // from 1~5, smaller number means smaller complexity 1003*53ee8cc1Swenshuai.xi MS_U8 u8TileMode; 1004*53ee8cc1Swenshuai.xi MS_U8 u8Reserve[2]; 1005*53ee8cc1Swenshuai.xi // Pixel aspect ratio info, crop info 1006*53ee8cc1Swenshuai.xi MS_U32 u32ParWidth; 1007*53ee8cc1Swenshuai.xi MS_U32 u32ParHeight; 1008*53ee8cc1Swenshuai.xi MS_U16 u16CropRight; 1009*53ee8cc1Swenshuai.xi MS_U16 u16CropLeft; 1010*53ee8cc1Swenshuai.xi MS_U16 u16CropBottom; 1011*53ee8cc1Swenshuai.xi MS_U16 u16CropTop; 1012*53ee8cc1Swenshuai.xi // Profiling / benchmark 1013*53ee8cc1Swenshuai.xi MS_U16 u16MIUBandwidth; 1014*53ee8cc1Swenshuai.xi MS_U16 u16Bitrate; 1015*53ee8cc1Swenshuai.xi // HTLB 1016*53ee8cc1Swenshuai.xi MS_U8 u8HTLBTableId; 1017*53ee8cc1Swenshuai.xi MS_U8 u8HTLBEntriesSize; 1018*53ee8cc1Swenshuai.xi MS_U8 u8Reserve1[2]; 1019*53ee8cc1Swenshuai.xi MS_U32 u32HTLBEntriesAddr; 1020*53ee8cc1Swenshuai.xi } HVD_EX_FrameInfo; 1021*53ee8cc1Swenshuai.xi 1022*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 1023*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_DISP_INFO_THRESHOLD 1024*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description: Store the disp information threshold 1025*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 1026*53ee8cc1Swenshuai.xi typedef struct 1027*53ee8cc1Swenshuai.xi { 1028*53ee8cc1Swenshuai.xi MS_U32 u32FrmrateUpBound; //Framerate filter upper bound 1029*53ee8cc1Swenshuai.xi MS_U32 u32FrmrateLowBound; //Framerate filter lower bound 1030*53ee8cc1Swenshuai.xi MS_U32 u32MvopUpBound; //mvop filter upper bound 1031*53ee8cc1Swenshuai.xi MS_U32 u32MvopLowBound; //mvop filter lower bound 1032*53ee8cc1Swenshuai.xi } HVD_EX_DispInfoThreshold; 1033*53ee8cc1Swenshuai.xi 1034*53ee8cc1Swenshuai.xi typedef struct 1035*53ee8cc1Swenshuai.xi { 1036*53ee8cc1Swenshuai.xi MS_U8 u8DecMod; 1037*53ee8cc1Swenshuai.xi MS_U8 u8CodecCnt; 1038*53ee8cc1Swenshuai.xi MS_U8 u8CodecType[HVD_MAX_DEC_NUM]; 1039*53ee8cc1Swenshuai.xi MS_U8 u8ArgSize; 1040*53ee8cc1Swenshuai.xi MS_U32 u32Arg; 1041*53ee8cc1Swenshuai.xi } HVD_EX_DecModCfg; 1042*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 1043*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_UsrData_Info 1044*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description: Store the User Data information 1045*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 1046*53ee8cc1Swenshuai.xi typedef struct 1047*53ee8cc1Swenshuai.xi { 1048*53ee8cc1Swenshuai.xi MS_U32 u32Pts; 1049*53ee8cc1Swenshuai.xi MS_U8 u8PicStruct; // picture_structure 1050*53ee8cc1Swenshuai.xi MS_U8 u8PicType; // picture type: 1->I picture, 2->P,3->B 1051*53ee8cc1Swenshuai.xi MS_U8 u8TopFieldFirst; // Top field first: 1 if top field first 1052*53ee8cc1Swenshuai.xi MS_U8 u8RptFirstField; // Repeat first field: 1 if repeat field first 1053*53ee8cc1Swenshuai.xi 1054*53ee8cc1Swenshuai.xi MS_PHY u32DataBuf; // User_Data data buffer address 1055*53ee8cc1Swenshuai.xi MS_U16 u16TmpRef; // Temporal reference of the picture 1056*53ee8cc1Swenshuai.xi MS_U8 u8ByteCnt; // User Data length 1057*53ee8cc1Swenshuai.xi MS_U8 u8Reserve; // Reserved 1058*53ee8cc1Swenshuai.xi } HVD_EX_UserData_Info; 1059*53ee8cc1Swenshuai.xi 1060*53ee8cc1Swenshuai.xi typedef struct 1061*53ee8cc1Swenshuai.xi { 1062*53ee8cc1Swenshuai.xi MS_BOOL bvaild; 1063*53ee8cc1Swenshuai.xi MS_BOOL bUsed; 1064*53ee8cc1Swenshuai.xi MS_U8 u8Frm_packing_arr_cnl_flag; 1065*53ee8cc1Swenshuai.xi MS_U8 u8Frm_packing_arr_type; 1066*53ee8cc1Swenshuai.xi MS_U8 u8content_interpretation_type; 1067*53ee8cc1Swenshuai.xi MS_U8 u1Quincunx_sampling_flag; 1068*53ee8cc1Swenshuai.xi MS_U8 u1Spatial_flipping_flag; 1069*53ee8cc1Swenshuai.xi MS_U8 u1Frame0_flipping_flag; 1070*53ee8cc1Swenshuai.xi MS_U8 u1Field_views_flag; 1071*53ee8cc1Swenshuai.xi MS_U8 u1Current_frame_is_frame0_flag; 1072*53ee8cc1Swenshuai.xi MS_U8 u1Frame0_self_contained_flag; 1073*53ee8cc1Swenshuai.xi MS_U8 u1Frame1_self_contained_flag; 1074*53ee8cc1Swenshuai.xi MS_U8 u4Frame0_grid_position_x; 1075*53ee8cc1Swenshuai.xi MS_U8 u4Frame0_grid_position_y; 1076*53ee8cc1Swenshuai.xi MS_U8 u4Frame1_grid_position_x; 1077*53ee8cc1Swenshuai.xi MS_U8 u4Frame1_grid_position_y; 1078*53ee8cc1Swenshuai.xi MS_U16 u16CropRight; 1079*53ee8cc1Swenshuai.xi MS_U16 u16CropLeft; 1080*53ee8cc1Swenshuai.xi MS_U16 u16CropBottom; 1081*53ee8cc1Swenshuai.xi MS_U16 u16CropTop; 1082*53ee8cc1Swenshuai.xi MS_U8 u8payload_len; 1083*53ee8cc1Swenshuai.xi MS_U8 u8WaitSPS; 1084*53ee8cc1Swenshuai.xi MS_U8 u8Reserved01; 1085*53ee8cc1Swenshuai.xi MS_U8 u8Reserved02; 1086*53ee8cc1Swenshuai.xi MS_U32 u32payload; 1087*53ee8cc1Swenshuai.xi }HVD_EX_FrmPackingSEI; 1088*53ee8cc1Swenshuai.xi 1089*53ee8cc1Swenshuai.xi typedef struct 1090*53ee8cc1Swenshuai.xi { 1091*53ee8cc1Swenshuai.xi MS_BOOL bUsed; 1092*53ee8cc1Swenshuai.xi MS_BOOL bColourVolumeSEIEnabled; 1093*53ee8cc1Swenshuai.xi MS_U32 u32MaxLuminance; 1094*53ee8cc1Swenshuai.xi MS_U32 u32MinLuminance; 1095*53ee8cc1Swenshuai.xi MS_U16 u16Primaries[3][2]; 1096*53ee8cc1Swenshuai.xi MS_U16 u16WhitePoint[2]; 1097*53ee8cc1Swenshuai.xi }HVD_EX_DisplayColourVolumeSEI; 1098*53ee8cc1Swenshuai.xi 1099*53ee8cc1Swenshuai.xi typedef struct 1100*53ee8cc1Swenshuai.xi { 1101*53ee8cc1Swenshuai.xi MS_BOOL bUsed; 1102*53ee8cc1Swenshuai.xi MS_BOOL ContentLightLevelEnabled; 1103*53ee8cc1Swenshuai.xi MS_U16 maxContentLightLevel; 1104*53ee8cc1Swenshuai.xi MS_U16 maxPicAverageLightLevel; 1105*53ee8cc1Swenshuai.xi } HVD_EX_ContentLightLevelInfoSEI; 1106*53ee8cc1Swenshuai.xi 1107*53ee8cc1Swenshuai.xi typedef struct 1108*53ee8cc1Swenshuai.xi { 1109*53ee8cc1Swenshuai.xi MS_PHY u32DSBufAddr; // Buffer Address 1110*53ee8cc1Swenshuai.xi MS_U32 u32DSBufSize; // Buffer Size 1111*53ee8cc1Swenshuai.xi }HVD_EX_ExternalDSBuf; 1112*53ee8cc1Swenshuai.xi 1113*53ee8cc1Swenshuai.xi typedef struct 1114*53ee8cc1Swenshuai.xi { 1115*53ee8cc1Swenshuai.xi MS_U64 u64PTS; 1116*53ee8cc1Swenshuai.xi MS_U32 u32POC; 1117*53ee8cc1Swenshuai.xi MS_U8 u8FrameType; 1118*53ee8cc1Swenshuai.xi }HVD_EX_PVR_Seamless_Info; 1119*53ee8cc1Swenshuai.xi 1120*53ee8cc1Swenshuai.xi typedef struct 1121*53ee8cc1Swenshuai.xi { 1122*53ee8cc1Swenshuai.xi MS_U32 u32Version; 1123*53ee8cc1Swenshuai.xi MS_U8 u8MatrixCoefficients; 1124*53ee8cc1Swenshuai.xi MS_U8 u8BitsPerChannel; 1125*53ee8cc1Swenshuai.xi MS_U8 u8ChromaSubsamplingHorz; 1126*53ee8cc1Swenshuai.xi MS_U8 u8ChromaSubsamplingVert; 1127*53ee8cc1Swenshuai.xi MS_U8 u8CbSubsamplingHorz; 1128*53ee8cc1Swenshuai.xi MS_U8 u8CbSubsamplingVert; 1129*53ee8cc1Swenshuai.xi MS_U8 u8ChromaSitingHorz; 1130*53ee8cc1Swenshuai.xi MS_U8 u8ChromaSitingVert; 1131*53ee8cc1Swenshuai.xi MS_U8 u8ColorRange; 1132*53ee8cc1Swenshuai.xi MS_U8 u8TransferCharacteristics; 1133*53ee8cc1Swenshuai.xi MS_U8 u8ColourPrimaries; 1134*53ee8cc1Swenshuai.xi MS_U16 u16MaxCLL; //Max Content Light Level 1135*53ee8cc1Swenshuai.xi MS_U16 u16MaxFALL; //Max Frame Average Light Level 1136*53ee8cc1Swenshuai.xi MS_U16 u16Primaries[3][2]; 1137*53ee8cc1Swenshuai.xi MS_U16 u16WhitePoint[2]; 1138*53ee8cc1Swenshuai.xi MS_U32 u32MaxLuminance; 1139*53ee8cc1Swenshuai.xi MS_U32 u32MinLuminance; 1140*53ee8cc1Swenshuai.xi } HVD_EX_Config_VP9HDR10; 1141*53ee8cc1Swenshuai.xi 1142*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1143*53ee8cc1Swenshuai.xi // Function and Variable 1144*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1145*53ee8cc1Swenshuai.xi void MDrv_HVD_EX_SetCtrlsBase(MS_U32 u32Id); 1146*53ee8cc1Swenshuai.xi void MDrv_HVD_EX_MJPEG_InitSharemem(MS_U32 u32Id, MS_VIRT u32CodeBufVAddr, MS_BOOL bPreConnEnable, MS_BOOL bConnect, HVD_EX_DISPLAY_PATH eMvopPath, HVD_EX_Original_Stream eStream); 1147*53ee8cc1Swenshuai.xi void MDrv_HVD_EX_MJPEG_Exit(MS_U32 u32Id); 1148*53ee8cc1Swenshuai.xi 1149*53ee8cc1Swenshuai.xi void MDrv_HVD_EX_SetOSRegBase(MS_VIRT u32RegBaseAddr); 1150*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_GetFreeStream(MS_U32 *pu32Id, HVD_EX_DRV_StreamType eStreamType); 1151*53ee8cc1Swenshuai.xi #ifdef VDEC3 1152*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_Init(MS_U32 u32Id, HVD_EX_MemCfg *pStMemCfg, HVD_EX_InitSettings *pStInitSettings, MS_BOOL bFWdecideFB, MS_BOOL bShareBBU, HVD_EX_Original_Stream eStream); 1153*53ee8cc1Swenshuai.xi #else 1154*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_Init(MS_U32 u32Id, HVD_EX_MemCfg *pStMemCfg, HVD_EX_InitSettings *pStInitSettings); 1155*53ee8cc1Swenshuai.xi #endif 1156*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_Rst(MS_U32 u32Id, MS_BOOL bErrHandle); 1157*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_Play(MS_U32 u32Id); 1158*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_Exit(MS_U32 u32Id); 1159*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_Pause(MS_U32 u32Id); 1160*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_Flush(MS_U32 u32Id, MS_BOOL bShowLast); 1161*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_StepDisp(MS_U32 u32Id); 1162*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_StepDecode(MS_U32 u32Id); 1163*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_PushQueue(MS_U32 u32Id, HVD_EX_PacketInfo *pInfo); 1164*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_PushQueue_Fire(MS_U32 u32Id); 1165*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_DecodeIFrame(MS_U32 u32Id, MS_PHY u32SrcSt, MS_U32 u32SrcSize); 1166*53ee8cc1Swenshuai.xi 1167*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetDataEnd(MS_U32 u32Id, MS_BOOL bEnd); 1168*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetDispErrFrm(MS_U32 u32Id, MS_BOOL bEnable); 1169*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetCalFrameRate(MS_U32 u32Id, MS_BOOL bEnable); 1170*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SkipNFrame(MS_U32 u32Id, MS_U32 u32FrameCnt); 1171*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetDispRepeatField(MS_U32 u32Id, MS_BOOL bEnable); 1172*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetSkipDecMode(MS_U32 u32Id, HVD_EX_SkipDecode eDecType); 1173*53ee8cc1Swenshuai.xi #ifdef VDEC3_FB 1174*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetFrmBuffAddr(MS_U32 u32Id, MS_PHY u32FrmBuffAddr); 1175*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetFrmBuffSize(MS_U32 u32Id, MS_U32 u32FrmBuffSize); 1176*53ee8cc1Swenshuai.xi #endif 1177*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetEnalbeHDR(MS_U32 u32Id, MS_BOOL bEnable); 1178*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetHDR10PerFrame(MS_U32 u32Id, MS_BOOL bEnable); 1179*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetDVXCShmBuff(MS_U32 u32Id, MS_PHY u32FWBaseAddr, MS_PHY u32DVXCShmAddr, MS_SIZE u32DVXCShmSize); 1180*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetFrmBuff2(MS_U32 u32Id, MS_PHY u32FrmBuffAddr, MS_U32 u32FrmBuffSize); 1181*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetDispSpeed(MS_U32 u32Id, HVD_EX_DispSpeed eSpeed); 1182*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetSyncActive(MS_U32 u32Id, MS_BOOL bEnable); 1183*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetDropMode(MS_U32 u32Id, HVD_EX_DropDisp eMode, MS_U32 u32Arg); 1184*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_RstPTS(MS_U32 u32Id, MS_U32 u32PTS); 1185*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetFrcMode(MS_U32 u32Id, HVD_EX_FrmRateConvMode eMode); 1186*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetSyncTolerance(MS_U32 u32Id, MS_U32 u32Arg); 1187*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetSyncVideoDelay(MS_U32 u32Id, MS_U32 u32Arg); 1188*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetSyncFreeRunTH(MS_U32 u32Id, MS_U32 u32Arg); 1189*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetSyncRepeatTH(MS_U32 u32Id, MS_U32 u32Arg); 1190*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetErrConceal(MS_U32 u32Id, MS_BOOL u32Arg); 1191*53ee8cc1Swenshuai.xi void MDrv_HVD_EX_SetDbgLevel(HVD_EX_UartLevel elevel); 1192*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SeekToPTS(MS_U32 u32Id, MS_U32 u32PTS); 1193*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SkipToPTS(MS_U32 u32Id, MS_U32 u32PTS); 1194*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetFreezeImg(MS_U32 u32Id, MS_BOOL bEnable); 1195*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetBlueScreen(MS_U32 u32Id, MS_BOOL bEnable); 1196*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetDispOneField(MS_U32 u32Id, MS_BOOL bEnable); 1197*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetISREvent(MS_U32 u32Id, MS_U32 u32Event, HVD_InterruptCb fnISRHandler); 1198*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_SetEnableISR(MS_U32 u32Id, MS_BOOL bEnable); 1199*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_SetForceISR(MS_U32 u32Id, MS_BOOL bEnable); 1200*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_SetMVOPDone(MS_U32 u32Id); 1201*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetVirtualBox(MS_U32 u32Id, MS_U16 u16Width, MS_U16 u16Height); 1202*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetDynScalingParam(MS_U32 u32Id, void *pStAddr, MS_U32 u32Size); 1203*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetAutoRmLstZeroByte(MS_U32 u32Id, MS_BOOL bOn); 1204*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetDispInfoTH(MS_U32 u32Id, HVD_EX_DispInfoThreshold *DispInfoTH); 1205*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetFastDisplay(MS_U32 u32Id, MS_BOOL bFastDisplay); 1206*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetIgnoreErrRef(MS_U32 u32Id, MS_BOOL bIgnore); 1207*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_ForceFollowDTVSpec(MS_U32 u32Id, MS_BOOL bEnable); 1208*53ee8cc1Swenshuai.xi 1209*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_IsISROccured(MS_U32 u32Id); 1210*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_IsDispFinish(MS_U32 u32Id); 1211*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_IsFrameShowed(MS_U32 u32Id); 1212*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_IsStepDecodeDone(MS_U32 u32Id); 1213*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_CheckDispInfoRdy(MS_U32 u32Id); 1214*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_IsDispInfoChg(MS_U32 u32Id); 1215*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_IsIdle(MS_U32 u32Id); 1216*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_IsSyncStart(MS_U32 u32Id); 1217*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_IsSyncReach(MS_U32 u32Id); 1218*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_IsLowDelay(MS_U32 u32Id); 1219*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_IsIFrmFound(MS_U32 u32Id); 1220*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_Is1stFrmRdy(MS_U32 u32Id); 1221*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_IsAllBufferEmpty(MS_U32 u32Id); 1222*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_IsAlive(MS_U32 u32Id); 1223*53ee8cc1Swenshuai.xi 1224*53ee8cc1Swenshuai.xi MS_U32 MDrv_HVD_EX_GetBBUVacancy(MS_U32 u32Id); 1225*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_GetDispInfo(MS_U32 u32Id, HVD_EX_DispInfo *pInfo); 1226*53ee8cc1Swenshuai.xi MS_U32 MDrv_HVD_EX_GetPTS(MS_U32 u32Id); 1227*53ee8cc1Swenshuai.xi MS_U64 MDrv_HVD_EX_GetU64PTS(MS_U32 u32Id); 1228*53ee8cc1Swenshuai.xi MS_U64 MDrv_HVD_EX_GetU64PTS_PreParse(MS_U32 u32Id); 1229*53ee8cc1Swenshuai.xi MS_U32 MDrv_HVD_EX_GetNextPTS(MS_U32 u32Id); 1230*53ee8cc1Swenshuai.xi MS_U32 MDrv_HVD_EX_GetNextDispQPtr(MS_U32 u32Id); 1231*53ee8cc1Swenshuai.xi MS_U32 MDrv_HVD_EX_GetDataErrCnt(MS_U32 u32Id); 1232*53ee8cc1Swenshuai.xi MS_U32 MDrv_HVD_EX_GetDecErrCnt(MS_U32 u32Id); 1233*53ee8cc1Swenshuai.xi MS_VIRT MDrv_HVD_EX_GetESWritePtr(MS_U32 u32Id); 1234*53ee8cc1Swenshuai.xi MS_VIRT MDrv_HVD_EX_GetESReadPtr(MS_U32 u32Id); 1235*53ee8cc1Swenshuai.xi MS_U32 MDrv_HVD_EX_GetESQuantity(MS_U32 u32Id); 1236*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_GetCaps(HVD_EX_Codec u32Type); 1237*53ee8cc1Swenshuai.xi MS_U32 MDrv_HVD_EX_GetErrCode(MS_U32 u32Id); 1238*53ee8cc1Swenshuai.xi MS_U32 MDrv_HVD_EX_GetPlayMode(MS_U32 u32Id, HVD_EX_GetModeStatus eMode); 1239*53ee8cc1Swenshuai.xi HVD_EX_GetPlayState MDrv_HVD_EX_GetPlayState(MS_U32 u32Id); 1240*53ee8cc1Swenshuai.xi MS_U32 MDrv_HVD_EX_GetDecodeCnt(MS_U32 u32Id); 1241*53ee8cc1Swenshuai.xi MS_U8 MDrv_HVD_EX_GetActiveFormat(MS_U32 u32Id); 1242*53ee8cc1Swenshuai.xi const HVD_EX_DrvInfo *MDrv_HVD_EX_GetInfo(void); 1243*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_GetLibVer(const MSIF_Version **ppVersion); 1244*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_GetStatus(MS_U32 u32Id, HVD_EX_DrvStatus *pstatus); 1245*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_GetFrmInfo(MS_U32 u32Id, HVD_EX_GetFrmInfoType eType, HVD_EX_FrameInfo *pInfo); 1246*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_GetISRInfo(MS_U32 u32Id, MS_U32 *eType); 1247*53ee8cc1Swenshuai.xi MS_U32 MDrv_HVD_EX_CalLumaSum(MS_U32 u32Id, HVD_EX_GetFrmInfoType eType); 1248*53ee8cc1Swenshuai.xi MS_U32 MDrv_HVD_EX_GetUserData_Wptr(MS_U32 u32Id); 1249*53ee8cc1Swenshuai.xi MS_VIRT MDrv_HVD_EX_GetUserData_Packet(MS_U32 u32Id, MS_U32 u32Idx, MS_U32 *u32Size); 1250*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_GenPattern(MS_U32 u32Id, HVD_EX_PatternType eType, MS_VIRT u32VAddr, MS_U32 *u32Size); 1251*53ee8cc1Swenshuai.xi MS_U32 MDrv_HVD_EX_GetPatternInfo(MS_U32 u32Id, HVD_EX_PatternInfo eType); 1252*53ee8cc1Swenshuai.xi MS_U64 MDrv_HVD_EX_GetDynamicScalingInfo(MS_U32 u32Id, HVD_EX_DynamicScalingInfo eType); 1253*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_GetFrmRateIsSupported(MS_U32 u32Id); 1254*53ee8cc1Swenshuai.xi 1255*53ee8cc1Swenshuai.xi MS_VIRT MDrv_HVD_EX_GetData(MS_U32 u32Id, HVD_EX_GDataType eType); 1256*53ee8cc1Swenshuai.xi MS_U32 MDrv_HVD_EX_GetMem_Dbg(MS_U32 u32Id, MS_VIRT u32Addr); 1257*53ee8cc1Swenshuai.xi void MDrv_HVD_EX_DbgDumpStatus(MS_U32 u32Id, HVD_EX_DumpStatus eFlag); 1258*53ee8cc1Swenshuai.xi void MDrv_HVD_EX_SetMem_Dbg(MS_U32 u32Id, MS_VIRT u32Addr, MS_U32 u32Arg); 1259*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetCmd_Dbg(MS_U32 u32Id, MS_U32 u32Cmd, MS_U32 u32Arg); 1260*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetSettings_Pro(MS_U32 u32Id, HVD_EX_SSettingsType eType, MS_U32 u32Arg); 1261*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetBalanceBW(MS_U32 u32Id, MS_U8 u8QPCnt, MS_U8 u8DBCnt, MS_U8 u8Upper); 1262*53ee8cc1Swenshuai.xi MS_S64 MDrv_HVD_EX_GetPtsStcDiff(MS_U32 u32Id); 1263*53ee8cc1Swenshuai.xi MS_U32 MDrv_HVD_EX_GetDrvFwVer(void); 1264*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetFdMaskDelayCnt(MS_U32 u32Id, MS_U8 u8DelayCnt); 1265*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetOutputFRCMode(MS_U32 u32Id, MS_U8 u8FrameRate, MS_U8 u8Interlace); 1266*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_DispFrame(MS_U32 u32Id, MS_U32 u32FrmIdx); 1267*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_FreeFrame(MS_U32 u32Id, MS_U32 u32FrmIdx); 1268*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_EnableDispQue(MS_U32 u32Id, MS_BOOL bEnable); 1269*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_EnableVSizeAlign(MS_U32 u32Id, MS_BOOL bEnable); 1270*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_ShowDecodeOrder(MS_U32 u32Id, MS_BOOL bEnable); 1271*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_Disp_Ignore_Crop(MS_U32 u32Id, MS_BOOL bEnable); 1272*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_RmEnablePtsTbl(MS_U32 u32Id, MS_BOOL bEnable); 1273*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetFRCDropType(MS_U32 u32Id, MS_U8 u8DropType); 1274*53ee8cc1Swenshuai.xi MS_U32 MDrv_HVD_EX_GetDrvFwVer(void); 1275*53ee8cc1Swenshuai.xi MS_U32 MDrv_HVD_EX_GetFwVer(MS_U32 u32Id); 1276*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_DispOutsideMode(MS_U32 u32Id, MS_BOOL bEnable); 1277*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_SetSingleDecodeMode(MS_BOOL bEnable); 1278*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_SetSTCMode(MS_U32 u32Id, MS_U32 u32STCIndex); 1279*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_SetDecodeMode(HVD_EX_DecModCfg *pstCfg); 1280*53ee8cc1Swenshuai.xi void MDrv_HVD_EX_SetBurstMode(MS_U32 u32Id, MS_BOOL bBurst); 1281*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_ForceInterlaceMode(MS_U32 u32Id, MS_U8 u8Mode); 1282*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_Support_AVC2MVC(MS_U32 u32Id, MS_BOOL bEnable); 1283*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_3DLR_View_Exchange(MS_U32 u32Id, MS_BOOL bEnable); 1284*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_Enable_New_Slow_Motion(MS_U32 u32Id, MS_BOOL bEnable); 1285*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetDTVUserDataMode(MS_U32 u32Id,MS_U8 u8UserDataMode); 1286*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_GetUsrDataIsAvailable(MS_U32 u32Id); 1287*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_GetUserDataInfo(MS_U32 u32Id,HVD_EX_UserData_Info* pUsrInfo); 1288*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_GetFrmPackingArrSEI(MS_U32 u32Id,HVD_EX_FrmPackingSEI *pFrmPacking); 1289*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_GetContentLightLevelInfoSEI(MS_U32 u32Id, HVD_EX_ContentLightLevelInfoSEI *pContentLightLevel); 1290*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_GetDisplayColourVolumeArrSEI(MS_U32 u32Id, HVD_EX_DisplayColourVolumeSEI *pDisplayColourVolume); 1291*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SuspendDynamicScale(MS_U32 u32Id, MS_BOOL bEnable); 1292*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_PushDispQWithRefNum(MS_U32 u32Id, MS_U8 u8Mode); 1293*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_IgnorePicOverrun(MS_U32 u32Id, MS_BOOL bEnable); 1294*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_DynamicScalingResvNBuffer(MS_U32 u32Id, MS_BOOL bEnable); 1295*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_CtlSpeedInDispOnly(MS_U32 u32Id, MS_BOOL bEnable); 1296*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_AVCSupportRefNumOverMaxDBPSize(MS_U32 u32Id, MS_BOOL bEnable); 1297*53ee8cc1Swenshuai.xi MS_U32 MDrv_HVD_EX_GetBBUQNum(MS_U32 u32Id); 1298*53ee8cc1Swenshuai.xi MS_U32 MDrv_HVD_EX_GetDispFrmNum(MS_U32 u32Id); 1299*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_Init_Share_Mem(void); 1300*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetHVDClockSpeed(HVD_EX_ClockSpeed eClockSpeed); 1301*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetVPUClockSpeed(HVD_EX_ClockSpeed eClockSpeed); 1302*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_DSReportDispInfoChange(MS_U32 u32Id, MS_BOOL bEnable); 1303*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetSecureMode(MS_U32 u32Id, MS_U32 u32SecureMode); 1304*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SupportRefNumOverMaxDpbSize(MS_U32 u32Id, MS_BOOL bEnable); 1305*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_RVU_Setting_Mode(MS_U32 u32Id, MS_U32 u32Param); 1306*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_FramerateHandling(MS_U32 u32Id, MS_U32 u32FrameRate); 1307*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_DualNonBlockMode(MS_U32 u32Id, MS_BOOL bEnable); 1308*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_IgnorePicStructDisplay(MS_U32 u32Id, MS_U32 param); 1309*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_InputPtsFreerunMode(MS_U32 u32Id, MS_U32 param); 1310*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_ErrConcealStartSlice1stMB(MS_U32 u32Id, MS_U32 param); 1311*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetExternalDSBuffer(MS_U32 u32Id, HVD_EX_ExternalDSBuf *pExternalBuf); 1312*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetHVDColBBUMode(MS_U32 u32Id, MS_U8 bEnable); 1313*53ee8cc1Swenshuai.xi 1314*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_CC_Init(MS_U32 u32Id); 1315*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_CC_SetCfg(MS_U32 u32Id, MS_U8 u8Operation, MS_U16 u16BufferSize, MS_U8 u8CC608); 1316*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_CC_Set_RB_StartAddr(MS_U32 u32Id, MS_PHY u32StartPAddress, MS_U8 u8CC608); 1317*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_CC_SyncRB_RdAddr2WrAddr(MS_U32 u32Id, MS_U8 u8CC608); 1318*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_CC_Adv_RB_ReadAddr(MS_U32 u32Id, MS_U32 u32EachPacketSize, MS_U8 u8CC608); 1319*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_CC_DisableParsing(MS_U32 u32Id, MS_U8 u8CC608); 1320*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_CC_GetInfo(MS_U32 u32Id, MS_U32 selector, MS_U8 type, MS_U32 *p1, MS_U32 *p2); 1321*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_CC_IsHvdRstDone(MS_U32 u32Id, MS_U8 type); 1322*53ee8cc1Swenshuai.xi MS_U8 MDrv_HVD_EX_CC_GetOverflowStatus(MS_U32 u32Id, MS_U8 u8CC608); 1323*53ee8cc1Swenshuai.xi MS_U32 MDrv_HVD_EX_CC_Get_RB_WriteAddr(MS_U32 u32Id, MS_U8 u8CC608); 1324*53ee8cc1Swenshuai.xi MS_U32 MDrv_HVD_EX_CC_Get_RB_ReadAddr(MS_U32 u32Id, MS_U8 u8CC608); 1325*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_CC_InfoEnhanceMode(MS_U32 u32Id, MS_BOOL bEnable); 1326*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_AutoExhaustESMode(MS_U32 u32Id, MS_U32 u32ESbound); 1327*53ee8cc1Swenshuai.xi MS_U32 MDrv_HVD_EX_GetESBufferStatus(MS_U32 u32Id); 1328*53ee8cc1Swenshuai.xi MS_U32 MDrv_HVD_EX_SetCMAReleaseStatus(MS_U32 u32Id, HVD_EX_CMA_Release_Status eCMAReleaseStatus); 1329*53ee8cc1Swenshuai.xi HVD_EX_CMA_Release_Status MDrv_HVD_EX_GetCMAReleaseStatus(MS_U32 u32Id); 1330*53ee8cc1Swenshuai.xi MS_U32 MDrv_HVD_EX_SetCMAAllocateStatus(MS_U32 u32Id, HVD_EX_CMA_Allocation_Status eCMAAllocStatus); 1331*53ee8cc1Swenshuai.xi HVD_EX_CMA_Allocation_Status MDrv_HVD_EX_GetCMAAllocateStatus(MS_U32 u32Id); 1332*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_GetCMAAllocationInfo(MS_U32 u32Id, MS_U8 *Miu_sel, MS_U64 *offset, MS_SIZE *length); 1333*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_GetCMAReleaseInfo(MS_U32 u32Id, MS_U8 *Miu_sel, MS_U8 *block_sel, MS_U64 *offset, MS_SIZE *length); 1334*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_SetCMAAllocateData(MS_U32 u32Id, MS_U8 miu_sel, MS_PHY FWBaseAddr, MS_PHY offset, MS_U32 length); 1335*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_WaitCMAStatusDone(MS_U32 u32Id, MS_BOOL bCMAInitPool0, MS_BOOL bCMAInitPool1); 1336*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_ReturnInvalidAFD(MS_U32 u32Id, MS_BOOL bEnable); 1337*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_AVCForceBrokenByUs(MS_U32 u32Id, MS_BOOL bEnable); 1338*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_ShowFirstFrameDirect(MS_U32 u32Id, MS_BOOL bEnable); 1339*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_AVCResizeDosDispPendBuf(MS_U32 u32Id, MS_U32 u32Size); 1340*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetMinTspSize(MS_U32 u32Id, MS_U32 u32Size); 1341*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetDmxFrameRate(MS_U32 u32Id, MS_U32 u32Value); 1342*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetDmxFrameRateBase(MS_U32 u32Id, MS_U32 u32Value); 1343*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_GetSupport2ndMVOPInterface(void); 1344*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_SetVPUSecureMode(MS_BOOL bEnable); 1345*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetExternal_CC608_Buffer(MS_U32 u32Id, MS_PHY u32Addr, MS_U32 u32Len); 1346*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetExternal_CC708_Buffer(MS_U32 u32Id, MS_PHY u32Addr, MS_U32 u32Len); 1347*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_OnePendingBufferMode(MS_U32 u32Id,MS_BOOL bEnable); 1348*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_TsInBbuMode(MS_U32 u32Id,MS_BOOL bEnable); 1349*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_IapGnBufShareBWMode(MS_U32 u32Id,MS_BOOL bEnable, MS_PHY u32IapGnBufAddr, MS_U32 u32IapGnBufSize); 1350*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetPTSUsecMode(MS_U32 u32Id, MS_BOOL bEnable); 1351*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_Set_Err_Tolerance(MS_U32 u32Id, MS_U32 u32Arg); 1352*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetDVInfo(MS_U32 u32Id, MS_U32 u32Arg); 1353*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_PVRTimeShiftSeamlessMode(MS_U32 u32Id, MS_U8 u8Arg); 1354*53ee8cc1Swenshuai.xi MS_U8 MDrv_HVD_EX_GetDSBufMiuSelect(MS_U32 u32Id); 1355*53ee8cc1Swenshuai.xi MS_U8 MDrv_HVD_EX_CHIP_Capability(void* pHWCap); 1356*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_GetPVRSeamlessInfo(MS_U32 u32Id, HVD_EX_PVR_Seamless_Info* param); 1357*53ee8cc1Swenshuai.xi void MDrv_HVD_EX_BBU_Proc(MS_U32 u32Id); 1358*53ee8cc1Swenshuai.xi void MDrv_HVD_EX_BBU_StopProc(MS_U32 u32Id); 1359*53ee8cc1Swenshuai.xi void MDrv_HVD_EX_SetCMAInformation(void* cmaInitParam); 1360*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_CPBRemovalDelay(MS_U32 u32Id, MS_BOOL bEnable); 1361*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetAVSyncDispAutoDrop(MS_U32 u32Id, MS_BOOL bEnable); 1362*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetDynmcDispPath(MS_U32 u32Id, MS_BOOL bConnect, HVD_EX_DISPLAY_PATH eDispPath); 1363*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_PreConnectDispPath(MS_U32 u32Id, MS_BOOL bEnable, MS_BOOL bConnect, HVD_EX_DISPLAY_PATH eMvopPath); 1364*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_PreConnectInputTsp(MS_U32 u32Id, MS_BOOL bEnable, HVD_EX_INPUT_TSP eInputTsp); 1365*53ee8cc1Swenshuai.xi 1366*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_PreSetMFCodecMode(MS_U32 u32Id, HVD_EX_MFCodec_mode eMFCodecMode); 1367*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_PreSetForce8BitMode(MS_U32 u32Id, MS_BOOL bForce8BitMode); 1368*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_PreSetDVSingleLayerMode(MS_U32 u32Id, HVD_EX_Feature bEnableDVSingleLayerMode); 1369*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_PreSetVdecFeature(MS_U32 u32Id, MS_U32 eVdecFeature); 1370*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_PreSetDynamicCMA(MS_U32 u32Id, MS_BOOL bDynamicCMAMode); 1371*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetMaxCMASize(MS_U32 u32Id, MS_U32 u32MaxCMASize, MS_U32 u32MaxCMASize2); 1372*53ee8cc1Swenshuai.xi 1373*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_GetCodecCapInfo( int eCodecType, void *pCodecCapInfo); 1374*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_FRC_OnlyShowTopField(MS_U32 u32Id, MS_BOOL bEnable); 1375*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_DisableEsFullStop(MS_U32 u32Id, MS_BOOL bDisable); 1376*53ee8cc1Swenshuai.xi void MDrv_HVD_EX_ForceSwRst(void); 1377*53ee8cc1Swenshuai.xi 1378*53ee8cc1Swenshuai.xi MS_SIZE MDrv_HVD_EX_GetFrameBufferDefaultSize(HVD_EX_CodecType eCodecType); 1379*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_GetCMAMemSize(HVD_EX_CodecType eCodecType, HVD_EX_SrcMode eSrcMode, 1380*53ee8cc1Swenshuai.xi MS_U64 *offset, MS_SIZE *length, MS_U64 total_length, MS_SIZE unUseSize); 1381*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_GetCapability(MS_U8 *pu8CmdNameIn, void *pParamIn, void *pParamOut); 1382*53ee8cc1Swenshuai.xi 1383*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_GetDVSupportProfiles(MS_U32 *pu32DVSupportProfiles); 1384*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_GetDVSupportHighestLevel(MS_U32 u32DVProfile, MS_U32 *pu32DVLevel); 1385*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_Set_Slow_Sync(MS_U32 u32Id, MS_U32 u32Arg); 1386*53ee8cc1Swenshuai.xi HVD_EX_Result MDrv_HVD_EX_SetVP9HDR10Info(MS_U32 u32Id, HVD_EX_Config_VP9HDR10 *stVP9HDR10Info); 1387*53ee8cc1Swenshuai.xi 1388*53ee8cc1Swenshuai.xi #else 1389*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_LoadCodeInSecure(MS_U32 addr); 1390*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_SetLockDownRegister(void* param); 1391*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_TEE_AllocateEsBufHandle(MS_U8 u8Idx, MS_PHY pVPUCodecAddr, MS_U32 u32ReqSize, MS_U32 u32BuffEnd, MS_U32 *pu32EsHandle); 1392*53ee8cc1Swenshuai.xi MS_BOOL MDrv_HVD_EX_TEE_GetESBufByHandle(MS_U8 u8Idx, MS_PHY pVPUCodecAddr, MS_U32 u32EsHandle, MS_PHY *pPhyAddr); 1393*53ee8cc1Swenshuai.xi #endif 1394*53ee8cc1Swenshuai.xi 1395*53ee8cc1Swenshuai.xi #ifdef __cplusplus 1396*53ee8cc1Swenshuai.xi } 1397*53ee8cc1Swenshuai.xi #endif 1398*53ee8cc1Swenshuai.xi #endif // _DRV_HVD_H_ 1399*53ee8cc1Swenshuai.xi 1400