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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 /////////////////////////////////////////////////////////////////////////////////////////////////// 96 /// 97 /// @file drvHVD.h 98 /// @brief HVD Driver Interface 99 /// @author MStar Semiconductor Inc. 100 /////////////////////////////////////////////////////////////////////////////////////////////////// 101 102 #ifndef _DRV_HVD_H_ 103 #define _DRV_HVD_H_ 104 105 #ifdef __cplusplus 106 extern "C" 107 { 108 #endif 109 110 #if (!defined(MSOS_TYPE_NUTTX) && !defined(MSOS_TYPE_OPTEE)) || defined(SUPPORT_X_MODEL_FEATURE) 111 112 //------------------------------------------------------------------------------------------------- 113 // Driver Capability 114 //------------------------------------------------------------------------------------------------- 115 116 //------------------------------------------------------------------------------------------------- 117 // Macro and Define 118 //------------------------------------------------------------------------------------------------- 119 #define MSIF_HVD_LIB_CODE {'H','V','D','_'} //Lib code 120 #define MSIF_HVD_LIBVER {'0','C'} //LIB version 0.0 ~ Z.Z 121 #define MSIF_HVD_BUILDNUM {'0','2'} //Build Number 00 ~ 99 122 #define MSIF_HVD_CHANGELIST {'0','0','6','4','4','6','7','9'} //P4 ChangeList Number 123 124 //------------------------------------------------------------------------------ 125 /// @brief \b HVD_DRV_VERSION : HVD Version 126 //------------------------------------------------------------------------------ 127 #define HVD_DRV_VERSION /* Character String for DRV/API version */ \ 128 MSIF_TAG, /* 'MSIF' */ \ 129 MSIF_CLASS, /* '00' */ \ 130 MSIF_CUS, /* 0x0000 */ \ 131 MSIF_MOD, /* 0x0000 */ \ 132 MSIF_CHIP, \ 133 MSIF_CPU, \ 134 MSIF_HVD_LIB_CODE, /* IP__ */ \ 135 MSIF_HVD_LIBVER, /* 0.0 ~ Z.Z */ \ 136 MSIF_HVD_BUILDNUM, /* 00 ~ 99 */ \ 137 MSIF_HVD_CHANGELIST, /* CL# */ \ 138 MSIF_OS 139 140 #define HVD_INIT_HW_MASK BMASK(3:0) ///< HW Type 141 #define HVD_INIT_HW_AVC BITS(3:0, 0) ///< HW deflaut: AVC 0X00 142 #define HVD_INIT_HW_AVS BITS(3:0, 1) ///< HW : AVS 0X01 143 #define HVD_INIT_HW_RM BITS(3:0, 2) ///< HW: RM 0X10 144 #define HVD_INIT_HW_MVC BITS(3:0, 3) ///< HW: RM 0X11 145 #define HVD_INIT_HW_VP8 BITS(3:0, 4) ///< HW: VP8 0X100 146 #define HVD_INIT_HW_MJPEG BITS(3:0, 5) ///< HW: MJPEG 0x101 147 #define HVD_INIT_HW_VP6 BITS(3:0, 6) ///< HW: VP6 0x110 148 #define HVD_INIT_HW_HEVC BITS(3:0, 7) ///< HW: HEVC 0x111 149 #define HVD_INIT_HW_VP9 BITS(3:0, 8) ///< HW: VP9 0x1000 150 #define HVD_INIT_HW_HEVC_DV BITS(3:0, 9) ///< HW: HEVC_DOLBY 0x1001 151 #define HVD_INIT_MAIN_MASK BMASK(5:4) ///< main type 152 #define HVD_INIT_MAIN_FILE_RAW BITS(5:4, 0) ///< main type: default: 0X00 153 #define HVD_INIT_MAIN_FILE_TS BITS(5:4, 1) ///< main type: 0X01 154 #define HVD_INIT_MAIN_LIVE_STREAM BITS(5:4, 2) ///< main type: 0X10 155 #define HVD_INIT_INPUT_MASK BMASK(6:6) ///< process path for filling BBU table: file mode. use drive; TSP: use tsp mode 156 #define HVD_INIT_INPUT_TSP BITS(6:6, 0) ///< tsp input( default) 157 #define HVD_INIT_INPUT_DRV BITS(6:6, 1) ///< driver input 158 #define HVD_INIT_START_CODE_MASK BMASK(7:7) ///< AVC FILE MODE ONLY: mkv, mp4 container use. 159 #define HVD_INIT_START_CODE_REMAINED BITS(7:7, 0) ///< start code remained.(Defualt) 160 #define HVD_INIT_START_CODE_REMOVED BITS(7:7, 1) ///< start code removed. 161 #define HVD_INIT_UTOPIA_ENVI BIT(8) ///< check MIU sel and set it 162 #define HVD_INIT_DBG_FW BIT(9) ///< check FW is debug version or not 163 #define HVD_INIT_DUAL_ES_MASK BMASK(10:10) ///< Dual ES buffer iput. 164 #define HVD_INIT_DUAL_ES_DISABLE BITS(10:10, 0) ///< Disable Dual ES buffer input. 165 #define HVD_INIT_DUAL_ES_ENABLE BITS(10:10, 1) ///< Enable Dual ES buffer input. 166 167 //#define HVD_INIT_ENABLE_ISR_DISP BIT( 8) ///< enable display ISR. ISR occurs at every Vsync. 168 169 #define HVD_RV_BROKEN_BY_US_MASK 0x80000000 170 171 #define HVD_BBU_TAG_LIMITATION 0x200000 172 #define QUANTITY_AFTER_BROKEN_BY_US 4 173 #define QUANTITY_LENGTH 0x1FFF00 174 #define MAX_QUANTITY (QUANTITY_LENGTH * QUANTITY_AFTER_BROKEN_BY_US) 175 #define MIN_BBU_VACANCY_PER_PUSH 2 176 #define MIN_BBU_VACANCY_FOR_4K2K (MIN_BBU_VACANCY_PER_PUSH * QUANTITY_AFTER_BROKEN_BY_US) // about 6MB 177 178 #define HVD_MAX_DEC_NUM 2 179 180 181 182 #define HVD_CCRB_PACKET_LENGTH 8 183 184 #define T35_DVB_COUNTRY_CODE 0xB5 185 #define T35_DVB_PROVIDER_CODE 0x0031 186 187 #define DTV_AFD_CODE 0x44544731 188 #define DTV_DTB1_CODE 0x47413934 189 190 #define DTV_BAR_CODE 0x06 191 #define DTV_CC_CODE 0x03 192 #define DTV_DIRECTTV_CODE 0x2F 193 194 #define MAX_NTSC_CC_ELE 4 195 #define MAX_NTSC_CC_BYTE (MAX_NTSC_CC_ELE << 2) 196 #define MAX_DTV_CC_BYTE 128 197 198 #define CC_NTSC1 1 199 #define CC_NTSC2 2 200 #define CC_ATSC 4 201 #define CC_157 (CC_NTSC1|CC_NTSC2) 202 203 #define USER_DATA_MODE_DVB_NORMAL 0x00 204 #define USER_DATA_MODE_DIRECTTV_CC 0x01 205 #define USER_DATA_MODE_FRM_PACKING_ARRANGEMENT 0x02 206 #define USER_DATA_MODE_ATSC_CC_RAW 0x04 207 #define USER_DATA_MODE_EXTERNAL_CC_BUFFER 0x10 208 209 #define MAX_608_CC_LEN 512 210 #define MAX_708_CC_LEN 512 211 212 //------------------------------------------------------------------------------------------------- 213 // Type and Structure 214 //------------------------------------------------------------------------------------------------- 215 typedef void (*HVD_InterruptCb)(void); 216 217 218 //----------------------------------------------------------------------------- 219 /// @brief \b Enum \b Name: EN_CC_HVD_INFO 220 /// @brief \b Enum \b Description: The type of Close Caption Selector 221 typedef enum 222 { 223 HVD_EX_CC_SELECTOR_708_SW = 0x0000, 224 HVD_EX_CC_SELECTOR_RINGBUFFER = 0x0001 225 226 } EN_CC_HVD_EX_INFO; 227 228 //----------------------------------------------------------------------------- 229 /// @brief \b Enum \b Name: HVD_EX_Result 230 /// @brief \b Enum \b Description: General result of HVD functions 231 //----------------------------------------------------------------------------- 232 typedef enum 233 { 234 E_HVD_EX_FAIL, ///< General fail cases. 235 E_HVD_EX_OK, ///< Action success. 236 E_HVD_EX_RET_INVALID_PARAMETER, ///< Function has invalid input. 237 E_HVD_EX_RET_ILLEGAL_ACCESS, ///< Illegal access. like driver not initialized. 238 E_HVD_EX_RET_HARDWARE_BREAKDOWN,///< HW has no responses or impossible responses. 239 E_HVD_EX_RET_OUTOF_MEMORY, ///< The input memory config is not enough. 240 E_HVD_EX_RET_UNSUPPORTED, ///< Function is not supported by HVD driver. 241 E_HVD_EX_RET_TIMEOUT, ///< Action timeout. 242 E_HVD_EX_RET_NOTREADY, ///< Action not ready. User needs to call it again later. 243 E_HVD_EX_RET_MEMORY_OVERWIRTE, ///< The input memory config may be overwrite. 244 E_HVD_EX_RET_QUEUE_FULL, ///< HVD BBU queue or ES buffer is full. 245 E_HVD_EX_RET_RE_INIT, 246 E_HVD_EX_RET_NOT_RUNNING, 247 E_HVD_EX_RET_CMA_ERROR, ///< CMA initialization error 248 } HVD_EX_Result; 249 250 //----------------------------------------------------------------------------- 251 /// @brief \b Enum \b Name: HVD_EX_GetPlayState 252 /// @brief \b Enum \b Description: The current HVD play state. 253 //----------------------------------------------------------------------------- 254 typedef enum 255 { 256 E_HVD_EX_GSTATE_INIT, ///< Before or during initialization. 257 E_HVD_EX_GSTATE_PLAY, ///< playback. 258 E_HVD_EX_GSTATE_PAUSE, ///< decode and display are all paused. 259 E_HVD_EX_GSTATE_STOP, ///< after stop. 260 } HVD_EX_GetPlayState; 261 262 //----------------------------------------------------------------------------- 263 /// @brief \b Enum \b Name: HVD_EX_SyncType 264 /// @brief \b Enum \b Description: The current mode type of HVD synchronization . 265 //----------------------------------------------------------------------------- 266 typedef enum 267 { 268 E_HVD_EX_SYNC_ATS, ///< Live stream, or TS file mode. 269 E_HVD_EX_SYNC_PTS, ///< only for file mode, input time stamp is PTS. 270 E_HVD_EX_SYNC_DTS, ///< only for file mode, input time stamp is DTS. 271 E_HVD_EX_SYNC_STS, ///< only for file mode, input time stamp is random, output should be sorted. 272 } HVD_EX_SyncType; 273 274 //----------------------------------------------------------------------------- 275 /// @brief \b Enum \b Name: HVD_EX_DispSpeed 276 /// @brief \b Enum \b Description: The current mode type of HVD display speed 277 //----------------------------------------------------------------------------- 278 typedef enum 279 { 280 E_HVD_EX_DISP_SPEED_FF_32X = 32, ///< Speed fast forward 32x. 281 E_HVD_EX_DISP_SPEED_FF_16X = 16, ///< Speed fast forward 16x. 282 E_HVD_EX_DISP_SPEED_FF_8X = 8, ///< Speed fast forward 8x. 283 E_HVD_EX_DISP_SPEED_FF_4X = 4, ///< Speed fast forward 4x. 284 E_HVD_EX_DISP_SPEED_FF_2X = 2, ///< Speed fast forward 2x. 285 E_HVD_EX_DISP_SPEED_NORMAL_1X = 1, ///< Normal display speed. 286 E_HVD_EX_DISP_SPEED_SF_2X = -2, ///< Slow forward 2X. 287 E_HVD_EX_DISP_SPEED_SF_4X = -4, ///< Slow forward 4X. 288 E_HVD_EX_DISP_SPEED_SF_8X = -8, ///< Slow forward 8X. 289 E_HVD_EX_DISP_SPEED_SF_16X = -16, ///< Slow forward 16X. 290 E_HVD_EX_DISP_SPEED_SF_32X = -32, ///< Slow forward 32X. 291 } HVD_EX_DispSpeed; 292 293 //----------------------------------------------------------------------------- 294 /// @brief \b Enum \b Name: HVD_EX_DropDisp 295 /// @brief \b Enum \b Description: The current mode type of HVD dropping decoded frames. 296 //----------------------------------------------------------------------------- 297 typedef enum 298 { 299 E_HVD_EX_DROP_DISPLAY_AUTO = (1 << 0), ///< automatic drop mode, drop frame if display queue is more than threshold 300 E_HVD_EX_DROP_DISPLAY_ONCE = (1 << 1), ///< drop once, drop the number of non-ref frames 301 } HVD_EX_DropDisp; 302 303 //----------------------------------------------------------------------------- 304 /// @brief \b Enum \b Name: HVD_EX_FrmRateConvMode 305 /// @brief \b Enum \b Description: The current mode type of HVD frame rate convertion. 306 //----------------------------------------------------------------------------- 307 typedef enum 308 { 309 E_HVD_EX_FRC_MODE_NORMAL, ///< Disable FRC mode. 310 E_HVD_EX_FRC_MODE_32PULLDOWN, ///< 3:2 pulldown mode (ex. 24p a 60i or 60p) 311 E_HVD_EX_FRC_MODE_PAL2NTSC , ///< PALaNTSC conversion (50i a 60i) 312 E_HVD_EX_FRC_MODE_NTSC2PAL, ///< NTSCaPAL conversion (60i a 50i) 313 E_HVD_EX_FRC_MODE_DISP_2X, ///< output rate is twice of input rate (ex. 30p a 60p) 314 E_HVD_EX_FRC_MODE_24_TO_50, ///< output rate 24P->50P 48I->50I 315 E_HVD_EX_FRC_MODE_50P_60P, ///< output rate 50P ->60P 316 E_HVD_EX_FRC_MODE_60P_50P, ///< output rate 60P ->50P 317 } HVD_EX_FrmRateConvMode; 318 319 //----------------------------------------------------------------------------- 320 /// @brief \b Enum \b Name: HVD_EX_Codec 321 /// @brief \b Enum \b Description: The supported codec type. 322 //----------------------------------------------------------------------------- 323 typedef enum 324 { 325 E_HVD_EX_AVC, 326 E_HVD_EX_AVS, 327 E_HVD_EX_RM, 328 E_HVD_EX_MVC, 329 E_HVD_EX_VP8, 330 E_HVD_EX_MJPEG, 331 E_HVD_EX_VP6, 332 E_HVD_EX_HEVC, 333 E_HVD_EX_VP9, 334 E_HVD_EX_HEVC_DV, 335 E_HVD_EX_NONE, 336 } HVD_EX_Codec; 337 338 //----------------------------------------------------------------------------- 339 /// @brief \b Enum \b Name: HVD_EX_GetModeStatus 340 /// @brief \b Enum \b Description: The available mode information supported by HVD. 341 //----------------------------------------------------------------------------- 342 typedef enum 343 { 344 E_HVD_EX_GMODE_IS_SHOW_ERR_FRM, 345 E_HVD_EX_GMODE_IS_REPEAT_LAST_FIELD, 346 E_HVD_EX_GMODE_IS_ERR_CONCEAL, 347 E_HVD_EX_GMODE_IS_SYNC_ON, 348 E_HVD_EX_GMODE_IS_PLAYBACK_FINISH, 349 E_HVD_EX_GMODE_SYNC_MODE, 350 E_HVD_EX_GMODE_SKIP_MODE, 351 E_HVD_EX_GMODE_DROP_MODE, 352 E_HVD_EX_GMODE_DISPLAY_SPEED, 353 E_HVD_EX_GMODE_FRC_MODE, 354 E_HVD_EX_GMODE_ISR_TYPE, 355 E_HVD_EX_GMODE_IS_STEP_DISPLAY = 0x0100, 356 E_HVD_EX_GMODE_STREAM_TYPE, 357 } HVD_EX_GetModeStatus; 358 359 //----------------------------------------------------------------------------- 360 /// @brief \b Enum \b Name: HVD_EX_SkipDecode 361 /// @brief \b Enum \b Description: The HVD decoding frame types. 362 //----------------------------------------------------------------------------- 363 typedef enum 364 { 365 E_HVD_EX_SKIP_DECODE_ALL, ///< decode all frames 366 E_HVD_EX_SKIP_DECODE_I, ///< decode I frames only 367 E_HVD_EX_SKIP_DECODE_IP, ///< decode I and referenced frames only( skip non-ref frames) 368 } HVD_EX_SkipDecode; 369 370 //----------------------------------------------------------------------------- 371 /// @brief \b Enum \b Name: HVD_EX_FrmType 372 /// @brief \b Enum \b Description: The frame type. 373 //----------------------------------------------------------------------------- 374 typedef enum 375 { 376 E_HVD_EX_FRM_TYPE_I, ///< I frame. 377 E_HVD_EX_FRM_TYPE_P, ///< P frame. 378 E_HVD_EX_FRM_TYPE_B, ///< B frame. 379 E_HVD_EX_FRM_TYPE_OTHER, ///reservase 380 } HVD_EX_FrmType; 381 382 //----------------------------------------------------------------------------- 383 /// @brief \b Enum \b Name: HVD_EX_FieldType 384 /// @brief \b Enum \b Description: The Field type. 385 //----------------------------------------------------------------------------- 386 typedef enum 387 { 388 E_HVD_EX_FIELDTYPE_NONE, ///< no field. 389 E_HVD_EX_FIELDTYPE_TOP, ///< Top field only. 390 E_HVD_EX_FIELDTYPE_BOTTOM, ///< Bottom field only. 391 E_HVD_EX_FIELDTYPE_BOTH, ///< Both fields. 392 } HVD_EX_FieldType; 393 394 //----------------------------------------------------------------------------- 395 /// @brief \b Enum \b Name: HVD_EX_UartLevel 396 /// @brief \b Enum \b Description: The debug level of HVD. 397 //----------------------------------------------------------------------------- 398 typedef enum 399 { 400 E_HVD_EX_UART_LEVEL_NONE = 0, ///< Disable all uart message. 401 E_HVD_EX_UART_LEVEL_ERR, ///< Only output error message 402 E_HVD_EX_UART_LEVEL_INFO, ///< output general message, and above. 403 E_HVD_EX_UART_LEVEL_DBG, ///< output debug message, and above. 404 E_HVD_EX_UART_LEVEL_TRACE, ///< output function trace message, and above. 405 E_HVD_EX_UART_LEVEL_FW, ///< output FW message, and above. 406 } HVD_EX_UartLevel; 407 408 //----------------------------------------------------------------------------- 409 /// @brief \b Enum \b Name: HVD_EX_PatternInfo 410 /// @brief \b Enum \b Description: The information type of specific pattern. 411 //----------------------------------------------------------------------------- 412 typedef enum 413 { 414 E_HVD_EX_FLUSH_PATTERN_SIZE, ///< flush pattern size. 415 E_HVD_EX_DUMMY_HW_FIFO, ///< HW fifo size. 416 } HVD_EX_PatternInfo; 417 418 //----------------------------------------------------------------------------- 419 /// @brief \b Enum \b Name: HVD_EX_DynamicScalingInfo 420 /// @brief \b Enum \b Description: The information type of specific dynamic information. 421 //----------------------------------------------------------------------------- 422 typedef enum 423 { 424 E_HVD_EX_DS_BUF_MIUSEL, ///< the HW MIU selection of the buffer of dynamic scaling. TRUE: MIU 1. FALSE: MIU 0. 425 E_HVD_EX_DS_BUF_ADDR, ///< the start physical address of the buffer of dynamic scaling. 426 E_HVD_EX_DS_BUF_SIZE, ///< the size of the buffer of dynamic scaling. 427 E_HVD_EX_DS_VECTOR_DEPTH, ///< the required vector depth of the dynamic scaling. 428 E_HVD_EX_DS_INFO_ADDR, ///< the scaler info buffer address of dynamic scaling. 429 E_HVD_EX_DS_IS_ENABLED, ///< if dynamic scaling is enabled. 430 } HVD_EX_DynamicScalingInfo; 431 432 typedef enum 433 { 434 E_HVD_EX_FLUSH_NONE = 0, 435 E_HVD_EX_FLUSH_RUNNING, //HK -> FW 436 E_HVD_EX_FLUSH_DONE //FW -> HK 437 } HVD_EX_FlushStatus; 438 439 typedef enum 440 { 441 E_HVD_EX_DISP_PATH_DEFAULT = 0, 442 E_HVD_EX_DISP_PATH_DYNMC_DISCONNECT, 443 E_HVD_EX_DISP_PATH_DYNMC_HANDLING, 444 E_HVD_EX_DISP_PATH_DYNMC_CONNECTTED 445 } HVD_EX_DISP_PATH_CONNECT_STATUS; 446 447 //----------------------------------------------------------------------------- 448 /// @brief \b Enum \b Name: HVD_EX_IsrEvent 449 /// @brief \b Enum \b Description: The information type of ISR event. 450 //----------------------------------------------------------------------------- 451 typedef enum 452 { 453 E_HVD_EX_ISR_NONE = 0, ///< disable ISR 454 E_HVD_EX_ISR_DISP_ONE = BIT(0), ///< HVD display one frame on screen. 455 E_HVD_EX_ISR_DISP_REPEAT = BIT(1), ///< The current displayed frame is repeated frame. 456 E_HVD_EX_ISR_DISP_WITH_CC = BIT(2), ///< Current displayed frame should be displayed with user data. 457 E_HVD_EX_ISR_DISP_FIRST_FRM = BIT(3), ///< HVD display first frame on screen. 458 459 460 E_HVD_EX_ISR_DEC_CMA_ACTION = BIT(7), ///< HVD handle CMA action 461 E_HVD_EX_ISR_DEC_ONE = BIT(8), ///< HVD decoded one frame done. 462 E_HVD_EX_ISR_DEC_I = BIT(9), ///< HVD decoded one I frame done. 463 E_HVD_EX_ISR_DEC_HW_ERR = BIT(10), ///< HVD HW found decode error. 464 E_HVD_EX_ISR_DEC_CC_FOUND = BIT(11), ///< HVD found one user data with decoded frame. 465 E_HVD_EX_ISR_DEC_DISP_INFO_CHANGE = BIT(12), ///< HVD found display information change. 466 E_HVD_EX_ISR_DEC_DATA_ERR = BIT(13), ///< HVD HW found decode error. 467 E_HVD_EX_ISR_DEC_FIRST_FRM = BIT(14), ///< HVD decode first frame. 468 E_HVD_EX_ISR_DEC_SEQ_HDR_FOUND = BIT(15), ///< HVD decode first frame. 469 } HVD_EX_IsrEvent; 470 471 //----------------------------------------------------------------------------- 472 /// @brief \b Enum \b Name: HVD_EX_GetFrmInfoType 473 /// @brief \b Enum \b Description: The information type of get frame information. 474 //----------------------------------------------------------------------------- 475 typedef enum 476 { 477 E_HVD_EX_GFRMINFO_DISPLAY = 0, ///< Displayed frame. 478 E_HVD_EX_GFRMINFO_DECODE, ///< Decoded frame. 479 E_HVD_EX_GFRMINFO_NEXT_DISPLAY, ///< Next frame to be displayed. 480 E_HVD_EX_GFRMINFO_DISPLAY_SUB, ///< Displayed sub frame. 481 E_HVD_EX_GFRMINFO_DECODE_SUB, ///< Decoded sub frame. 482 E_HVD_EX_GFRMINFO_LAST_DISPLAY, 483 E_HVD_EX_GFRMINFO_LAST_DISPLAY_EX, 484 } HVD_EX_GetFrmInfoType; 485 486 //----------------------------------------------------------------------------- 487 /// @brief \b Enum \b Name: HVD_EX_GDataType 488 /// @brief \b Enum \b Description: The information type of get data 489 //----------------------------------------------------------------------------- 490 typedef enum 491 { 492 E_HVD_EX_GDATA_TYPE_DISP_CNT, 493 E_HVD_EX_GDATA_TYPE_SKIP_CNT, 494 E_HVD_EX_GDATA_TYPE_DROP_CNT, 495 E_HVD_EX_GDATA_TYPE_IDLE_CNT, 496 E_HVD_EX_GDATA_TYPE_VSYNC_CNT, 497 E_HVD_EX_GDATA_TYPE_MAIN_LOOP_CNT, 498 E_HVD_EX_GDATA_TYPE_AVC_LEVEL_IDC, 499 E_HVD_EX_GDATA_TYPE_DISP_Q_SIZE, 500 E_HVD_EX_GDATA_TYPE_ES_LEVEL, 501 E_HVD_EX_GDATA_TYPE_AVC_VUI_DISP_INFO, 502 E_HVD_EX_GDATA_TYPE_DISP_STC, 503 E_HVD_EX_GDATA_TYPE_USERDATA_IDX_TBL_SIZE, 504 E_HVD_EX_GDATA_TYPE_USERDATA_PACKET_SIZE, 505 E_HVD_EX_GDATA_TYPE_REAL_FRAMERATE, 506 E_HVD_EX_GDATA_TYPE_IS_ORI_INTERLACE_MODE, 507 E_HVD_EX_GDATA_TYPE_FRAME_MBS_ONLY_FLAG, 508 E_HVD_EX_GDATA_TYPE_FW_CODEC_TYPE, 509 E_HVD_EX_GDATA_TYPE_FRC_MODE, 510 E_HVD_EX_GDATA_TYPE_IS_LEAST_DISPQ_SIZE, 511 E_HVD_EX_GDATA_TYPE_FIELD_PIC_FLAG, 512 E_HVD_EX_GDATA_TYPE_FW_STATUS_FLAG, 513 E_HVD_EX_GDATA_TYPE_HVD_HW_MAX_PIXEL, 514 #ifdef VDEC3 515 E_HVD_EX_GDATA_TYPE_VBBU_ADDR, 516 #endif 517 E_HVD_EX_GDATA_TYPE_VIDEO_FULL_RANGE_FLAG, 518 E_HVD_EX_GDATA_TYPE_SEQ_CHANGE_INFO, 519 E_HVD_EX_GDATA_TYPE_GET_NOT_SUPPORT_INFO, 520 E_HVD_EX_GDATA_TYPE_GET_MIN_TSP_DATA_SIZE, 521 } HVD_EX_GDataType; 522 523 //----------------------------------------------------------------------------- 524 /// @brief \b Enum \b Name: HVD_EX_GDataType 525 /// @brief \b Enum \b Description: The type of set settings 526 //----------------------------------------------------------------------------- 527 typedef enum 528 { 529 E_HVD_EX_SSET_TIME_UNIT, ///< set the HVD time unit of all interface. HVD_TimeUnit_Type 530 E_HVD_EX_SSET_PITCH, ///< set the pitch of vsync. 531 E_HVD_EX_SSET_SYNC_EACH_FRM, ///< HVD does sync action at every frame. TREU: turn on; FALSE: turn off. 532 E_HVD_EX_SSET_MAX_DEC_TICK, ///< HVD limits the max decode ticks for one field. 533 E_HVD_EX_SSET_AUTO_FREE_ES, ///< HVD frees the ES buffer data when ES is being fulled. 534 E_HVD_EX_SSET_MIN_FRAME_GAP, ///< set HVD not to report error which is caused by the frame gap larger than min frame gap. 535 E_HVD_EX_SSET_DISABLE_DEBLOCKING, ///< HVD will not do deblocking process. 536 E_HVD_EX_SSET_DISABLE_QUARTER_PIXEL,///< HVD will not do quarter pixel process. 537 E_HVD_EX_SSET_MIU_BURST_CNT_LEVEL, ///< HVD MIU Burst Cnt, Arg 0~7: burst cnt level, 0xFFFFFFFF = Disable 538 } HVD_EX_SSettingsType; 539 540 //----------------------------------------------------------------------------- 541 /// @brief \b Enum \b Name: HVD_EX_PatternType 542 /// @brief \b Enum \b Description: The type of special pattern for specific purpose. 543 //----------------------------------------------------------------------------- 544 typedef enum 545 { 546 E_HVD_EX_PATTERN_FLUSH = 0, ///< Used after MDrv_HVD_Flush(). 547 E_HVD_EX_PATTERN_FILEEND, ///< Used after MDrv_HVD_EX_SetDataEnd(). 548 } HVD_EX_PatternType; 549 550 //----------------------------------------------------------------------------- 551 /// @brief \b Enum \b Name: HVD_EX_ESLevel 552 /// @brief \b Enum \b Description: The level of ES buffer. 553 //----------------------------------------------------------------------------- 554 typedef enum 555 { 556 E_HVD_EX_ES_LEVEL_NORMAL = 0, 557 E_HVD_EX_ES_LEVEL_UNDER = BIT(0), 558 E_HVD_EX_ES_LEVEL_OVER = BIT(1), 559 } HVD_EX_ESLevel; 560 561 //----------------------------------------------------------------------------- 562 /// @brief \b Enum \b Name: HVD_EX_ErrorCode 563 /// @brief \b Enum \b Description: The type of HVD error 564 //----------------------------------------------------------------------------- 565 typedef enum 566 { 567 E_HVD_EX_ERRCODE_GENERAL_BASE = 0x0000, 568 E_HVD_EX_ERRCODE_OUT_OF_SPEC, 569 E_HVD_EX_ERRCODE_UNKNOW_ERR, 570 E_HVD_EX_ERRCODE_HW_BREAK_DOWN, 571 E_HVD_EX_ERRCODE_HW_DEC_TIMEOUT, 572 E_HVD_EX_ERRCODE_OUT_OF_MEMORY, 573 E_HVD_EX_ERRCODE_UNKNOWN_CODEC, 574 E_HVD_EX_ERRCODE_RES_NOT_SUPPORT, 575 576 // AVC 577 E_HVD_EX_ERRCODE_AVC_BASE = 0x1000, 578 E_HVD_EX_ERRCODE_AVC_SPS_BROKEN, // SPS is not valid 579 E_HVD_EX_ERRCODE_AVC_SPS_NOT_IN_SPEC, 580 E_HVD_EX_ERRCODE_AVC_SPS_NOT_ENOUGH_FRM, // DPB size at specified level is smaller than the specified number of reference frames. This is not allowed 581 E_HVD_EX_ERRCODE_AVC_PPS_BROKEN, // PPS is not valid 582 E_HVD_EX_ERRCODE_AVC_REF_LIST, 583 E_HVD_EX_ERRCODE_AVC_NO_REF, 584 E_HVD_EX_ERRCODE_AVC_RES, 585 586 // AVS 587 E_HVD_EX_ERRCODE_AVS_BASE = (0x2000), 588 E_HVD_EX_ERRCODE_AVS_RES, 589 590 // RM 591 E_HVD_EX_ERRCODE_RM_BASE = (0x3000), 592 E_HVD_EX_ERRCODE_RM_PACKET_HEADER, 593 E_HVD_EX_ERRCODE_RM_FRAME_HEADER, 594 E_HVD_EX_ERRCODE_RM_SLICE_HEADER, 595 E_HVD_EX_ERRCODE_RM_BYTE_CNT, 596 E_HVD_EX_ERRCODE_RM_DISP_TIMEOUT, 597 E_HVD_EX_ERRCODE_RM_NO_REF, 598 E_HVD_EX_ERRCODE_RM_RES, // out of supported resolution 599 E_HVD_EX_ERRCODE_RM_VLC, 600 E_HVD_EX_ERRCODE_RM_SIZE_OUT_FB_LAYOUT, 601 } HVD_EX_ErrorCode; 602 603 //----------------------------------------------------------------------------- 604 /// @brief \b Enum \b Name: HVD_TurboInitLevel 605 /// @brief \b Enum \b Description: The level of turbo init mode. 606 //----------------------------------------------------------------------------- 607 typedef enum 608 { 609 E_HVD_EX_TURBOINIT_NONE = 0, ///< Not omit any process. 610 E_HVD_EX_TURBOINIT_CHECK = BIT(0), ///< Omit checking. 611 E_HVD_EX_TURBOINIT_MEMORY = BIT(1), ///< Omit memory reset process. 612 E_HVD_EX_TURBOINIT_DISPLAY = BIT(2), ///< Omit FW display setup process. 613 E_HVD_EX_TURBOINIT_FW_RELOAD = BIT(3), ///< Omit FW reload process. 614 } HVD_EX_TurboInitType; 615 616 //----------------------------------------------------------------------------- 617 /// @brief \b Enum \b Name: HVD_EX_FWSourceType 618 /// @brief \b Enum \b Description: The type of fw binary input source 619 //----------------------------------------------------------------------------- 620 typedef enum 621 { 622 E_HVD_EX_FW_SOURCE_NONE, ///< No input FW; FW will be loaded by VDEC library. 623 E_HVD_EX_FW_SOURCE_DRAM, ///< input source from DRAM. 624 E_HVD_EX_FW_SOURCE_FLASH, ///< input source from FLASH. 625 } HVD_EX_FWSourceType; 626 627 //----------------------------------------------------------------------------- 628 /// @brief \b Enum \b Name: HVD_EX_DumpStatus 629 /// @brief \b Enum \b Description: The type of fw binary input source 630 //----------------------------------------------------------------------------- 631 typedef enum 632 { 633 E_HVD_EX_DUMP_STATUS_DRV = BIT(0), ///< Dump Driver status 634 E_HVD_EX_DUMP_STATUS_FW = BIT(1), ///< Dump firmware status 635 E_HVD_EX_DUMP_STATUS_HW = BIT(2), ///< Dump hardware status 636 } HVD_EX_DumpStatus; 637 638 // VDEC SEQ change info, must match VDEC_SpsChangeInfo in fwHVD_if.h 639 typedef enum 640 { 641 E_HVD_SEQ_CHANGE_NONE = 0, ///< unknown sps change info 642 E_HVD_SEQ_CHANGE_FIRST_TIME = BIT(0), ///< seq change due to first sequence 643 E_HVD_SEQ_CHANGE_RESOLUTION = BIT(1), ///< seq chagne due to resolution 644 E_HVD_SEQ_CHANGE_PICTURE_TYPE = BIT(2), ///< seq chagne due to picture type 645 E_HVD_SEQ_CHANGE_ASPECT_RATIO = BIT(3), ///< seq chagne due to aspect ratio 646 E_HVD_SEQ_CHANGE_FRAME_RATE = BIT(4), ///< seq chagne due to frame rate 647 E_HVD_SEQ_CHANGE_HDR_INFO = BIT(5), ///< seq chagne due to HDR info 648 } HVD_SeqChangeInfo; 649 650 typedef enum 651 { 652 E_HVD_EX_DRV_STREAM_NONE = 0, 653 E_HVD_EX_DRV_MAIN_STREAM, 654 E_HVD_EX_DRV_SUB_STREAM, 655 E_HVD_EX_DRV_MVC_STREAM, 656 #ifdef VDEC3 657 E_HVD_EX_DRV_N_STREAM, 658 #endif 659 } HVD_EX_DRV_StreamType; 660 661 typedef enum 662 { 663 E_HVD_EX_FB_REDUCTION_NONE = 0, ///< FB reduction disable 664 E_HVD_EX_FB_REDUCTION_1_2 = 1, ///< FB reduction 1/2 665 E_HVD_EX_FB_REDUCTION_1_4 = 2, ///< FB reduction 1/4 666 } HVD_EX_FBReductionType; 667 668 typedef enum 669 { 670 E_HVD_EX_CLOCK_SPEED_NONE = 0, 671 E_HVD_EX_CLOCK_SPEED_HIGHEST, 672 E_HVD_EX_CLOCK_SPEED_HIGH, 673 E_HVD_EX_CLOCK_SPEED_MEDIUM, 674 E_HVD_EX_CLOCK_SPEED_LOW, 675 E_HVD_EX_CLOCK_SPEED_LOWEST, 676 E_HVD_EX_CLOCK_SPEED_DEFAULT, 677 } HVD_EX_ClockSpeed; 678 679 680 typedef enum 681 { 682 E_HVD_EX_ES_BUF_STATUS_UNKNOWN = 0, 683 E_HVD_EX_ES_BUF_STATUS_UNDERFLOW = 1, 684 E_HVD_EX_ES_BUF_STATUS_OVERFLOW = 2, 685 E_HVD_EX_ES_BUF_STATUS_NORMAL = 3, 686 } HVD_EX_ES_Buf_Status; 687 688 typedef enum 689 { 690 E_HVD_EX_DISPLAY_PATH_MVOP_MAIN = 0, 691 E_HVD_EX_DISPLAY_PATH_MVOP_SUB, 692 E_HVD_EX_DISPLAY_PATH_NONE 693 } HVD_EX_DISPLAY_PATH; 694 695 typedef enum 696 { 697 E_HVD_EX_INPUT_TSP_0 = 0, 698 E_HVD_EX_INPUT_TSP_1, 699 E_HVD_EX_INPUT_TSP_2, 700 E_HVD_EX_INPUT_TSP_3, 701 E_HVD_EX_INPUT_TSP_NONE = 0xFF, 702 } HVD_EX_INPUT_TSP; 703 704 //HVD set MFcodec Mode 705 typedef enum 706 { 707 E_HVD_EX_MFCODEC_DEFAULT = 0, 708 E_HVD_EX_MFCODEC_FORCE_ENABLE, 709 E_HVD_EX_MFCODEC_FORCE_DISABLE, 710 } HVD_EX_MFCodec_mode; 711 712 //set VDEC Feature 713 typedef enum 714 { 715 E_HVD_EX_FEATURE_DEFAULT = 0, 716 E_HVD_EX_FEATURE_FORCE_MAIN_PROFILE = 1, //BIT0=1: HEVC Only support Main profile decode 717 E_HVD_EX_FEATURE_DISABLE_TEMPORAL_SCALABILITY = 1 << 1, // Bit 1 = 1: do not support temporal scalibity 718 } HVD_EX_Feature; 719 720 /// input source select enumerator 721 typedef enum 722 { 723 ///DTV mode 724 E_HVD_EX_SRC_MODE_DTV = 0, 725 ///TS file mode 726 E_HVD_EX_SRC_MODE_TS_FILE, 727 ///generic file mode 728 E_HVD_EX_SRC_MODE_FILE, 729 /// TS file and dual ES buffer mode 730 E_HVD_EX_SRC_MODE_TS_FILE_DUAL_ES, 731 ///generic file and dual ES buffer mode 732 E_HVD_EX_SRC_MODE_FILE_DUAL_ES, 733 } HVD_EX_SrcMode; 734 735 /// codec type enumerator 736 typedef enum 737 { 738 ///unsupported codec type 739 E_HVD_EX_CODEC_TYPE_NONE = 0, 740 ///MPEG 1/2 741 E_HVD_EX_CODEC_TYPE_MPEG2, 742 ///H263 (short video header) 743 E_HVD_EX_CODEC_TYPE_H263, 744 ///MPEG4 (default) 745 E_HVD_EX_CODEC_TYPE_MPEG4, 746 ///MPEG4 (Divx311) 747 E_HVD_EX_CODEC_TYPE_DIVX311, 748 ///MPEG4 (Divx412) 749 E_HVD_EX_CODEC_TYPE_DIVX412, 750 ///FLV 751 E_HVD_EX_CODEC_TYPE_FLV, 752 ///VC1 advanced profile (VC1) 753 E_HVD_EX_CODEC_TYPE_VC1_ADV, 754 ///VC1 main profile (RCV) 755 E_HVD_EX_CODEC_TYPE_VC1_MAIN, 756 ///Real Video version 8 757 E_HVD_EX_CODEC_TYPE_RV8, 758 ///Real Video version 9 and 10 759 E_HVD_EX_CODEC_TYPE_RV9, 760 ///H264 761 E_HVD_EX_CODEC_TYPE_H264, 762 ///AVS 763 E_HVD_EX_CODEC_TYPE_AVS, 764 ///MJPEG 765 E_HVD_EX_CODEC_TYPE_MJPEG, 766 ///MVC 767 E_HVD_EX_CODEC_TYPE_MVC, 768 ///VP8 769 E_HVD_EX_CODEC_TYPE_VP8, 770 ///HEVC 771 E_HVD_EX_CODEC_TYPE_HEVC, 772 ///VP9 773 E_HVD_EX_CODEC_TYPE_VP9, 774 E_HVD_EX_CODEC_TYPE_NUM 775 } HVD_EX_CodecType; 776 777 typedef enum 778 { 779 E_HVD_EX_CMA_ALLOCATION_NONE = 0, 780 E_HVD_EX_CMA_ALLOCATION_WAITING, 781 E_HVD_EX_CMA_ALLOCATION_DONE, 782 E_HVD_EX_CMA_ALLOCATION_FAILED, 783 } HVD_EX_CMA_Allocation_Status; 784 785 typedef enum 786 { 787 E_HVD_EX_CMA_RELEASE_NONE = 0, 788 E_HVD_EX_CMA_RELEASE_WAITING, 789 E_HVD_EX_CMA_RELEASE_DONE, 790 } HVD_EX_CMA_Release_Status; 791 792 typedef enum 793 { 794 E_HVD_EX_GET_DV_SUPPORT_PROFILE = 0, 795 E_HVD_EX_GET_DV_SUPPORT_LEVEL, 796 E_HVD_EX_SET_DV_INFO,//set profile and level 797 } HVD_EX_DV_CMD_TYPE; 798 799 typedef enum 800 { 801 E_HVD_EX_ORIGINAL_MAIN_STREAM = 0, 802 E_HVD_EX_ORIGINAL_SUB_STREAM, 803 E_HVD_EX_ORIGINAL_N_STREAM, 804 } HVD_EX_Original_Stream; 805 806 //----------------------------------------------------------------------------- 807 /// @brief \b Struct \b Name: HVD_EX_DispInfo 808 /// @brief \b Struct \b Description: Store the HVD driver information 809 //----------------------------------------------------------------------------- 810 typedef struct 811 { 812 MS_U16 u16HorSize; ///< pixel width. 813 MS_U16 u16VerSize; ///< pixel height. 814 MS_U32 u32FrameRate; ///< 1000 times frames per second. 815 MS_U8 u8AspectRate; ///< aspect ration ID. 816 MS_U8 u8Interlace; ///< interlace content 817 MS_U8 u8AFD; ///< AFD ID number 818 MS_U8 bChroma_idc_Mono; ///< - TRUE: mono mode FALSE: colorful, not mono 819 MS_U16 u16SarWidth; ///< Sample aspect width ratio. 820 MS_U16 u16SarHeight; ///< Sample aspect height ratio. 821 MS_U16 u16CropRight; ///< crop right. 822 MS_U16 u16CropLeft; ///< crop left. 823 MS_U16 u16CropBottom; ///< crop bottom. 824 MS_U16 u16CropTop; ///< crop top. 825 MS_U16 u16Pitch; ///< pitch 826 MS_U8 u8ColourPrimaries; ///< Color Primaries in VUI 827 //**************************** 828 MS_U8 reserved8_0; ///< reserved. 829 //****************************** 830 } HVD_EX_DispInfo; // bytes 831 832 //----------------------------------------------------------------------------- 833 /// @brief \b Struct \b Name: HVD_EX_DrvInfo 834 /// @brief \b Struct \b Description: Store the HVD driver information 835 //----------------------------------------------------------------------------- 836 typedef struct 837 { 838 MS_BOOL bAVC; ///< - TRUE: HW does support AVC. - FALSE: HW does not support AVC. 839 MS_BOOL bAVS; ///< - TRUE: HW does support AVS. - FALSE: HW does not support AVS. 840 MS_BOOL bRM; ///< - TRUE: HW does support RM. - FALSE: HW does not support RM. 841 MS_U32 FWversion; ///< FW version number. 842 } HVD_EX_DrvInfo; 843 844 //----------------------------------------------------------------------------- 845 /// @brief \b Struct \b Name: HVD_EX_DrvStatus 846 /// @brief \b Struct \b Description: Store the HVD driver status 847 //----------------------------------------------------------------------------- 848 typedef struct 849 { 850 MS_BOOL bInit; ///< - TRUE: Initialization success. - FALSE: Initialization failed or not initialized yet. 851 MS_BOOL bBusy; ///< - TRUE: Driver is processing - FALSE: Driver is Idle. 852 } HVD_EX_DrvStatus; 853 854 //----------------------------------------------------------------------------- 855 /// @brief \b Struct \b Name: HVD_EX_RVInfo 856 /// @brief \b Struct \b Description: RV file information 857 //----------------------------------------------------------------------------- 858 typedef struct 859 { 860 MS_U16 RV_Version; ///< Real Video Bitstream version 861 MS_U16 ulNumSizes; ///< Real Video Number sizes 862 MS_U16 ulPicSizes_w[8]; ///< Real Video file width 863 MS_U16 ulPicSizes_h[8]; ///< Real Video file height 864 } HVD_EX_RVInfo; 865 866 typedef struct 867 { 868 HVD_EX_FBReductionType LumaFBReductionMode; ///< Luma frame buffer reduction mode. 869 HVD_EX_FBReductionType ChromaFBReductionMode; ///< Chroma frame buffer reduction mode. 870 MS_U8 u8EnableAutoMode; /// 0: Disable, 1: Enable 871 } HVD_EX_FBReduction; 872 873 //----------------------------------------------------------------------------- 874 /// @brief \b Struct \b Name: HVD_EX_MemCfg 875 /// @brief \b Struct \b Description: Store the HVD driver config 876 //----------------------------------------------------------------------------- 877 typedef struct 878 { 879 HVD_EX_FWSourceType eFWSourceType; //!< the input FW source type. 880 MS_VIRT u32FWBinaryVAddr; //!< virtual address of input FW binary in DRAM 881 MS_PHY u32FWBinaryAddr; //!< the physical memory start address in Flash/DRAM memory of FW code 882 MS_U32 u32FWBinarySize; //!< the FW code size 883 MS_VIRT u32VLCBinaryVAddr;///< VLC table binary data buffer start address 884 MS_PHY u32VLCBinaryAddr;///< VLC table binary data buffer start address 885 MS_U32 u32VLCBinarySize;///<VLC table binary data buffer size 886 MS_PHY u32MIU1BaseAddr; //!< the physical memory start address of MIU 1 base address. 0: default value. 887 MS_VIRT u32CodeBufVAddr; //!< the virtual memory start address of code buffer 888 MS_PHY u32CodeBufAddr; //!< the physical memory start address of code buffer 889 MS_U32 u32CodeBufSize; //!< the code buffer size 890 MS_VIRT u32FrameBufVAddr; //!< the virtual memory start address of frame buffer 891 MS_PHY u32FrameBufAddr; //!< the physical memory start address of frame buffer 892 MS_U32 u32FrameBufSize; //!< the frame buffer size 893 MS_VIRT u32BitstreamBufVAddr; //!< the virtual memory start address of bit stream buffer 894 MS_PHY u32BitstreamBufAddr; //!< the physical memory start address of bit stream buffer 895 MS_U32 u32BitstreamBufSize; //!< the bit stream buffer size 896 MS_VIRT u32DrvProcessBufVAddr; //!< the virtual memory start address of driver process buffer 897 MS_PHY u32DrvProcessBufAddr; //!< the physical memory start address of driver process buffer 898 MS_U32 u32DrvProcessBufSize; //!< the driver process buffer size 899 #ifdef VDEC3 900 MS_PHY u32TotalBitstreamBufAddr; 901 MS_U32 u32TotalBitstreamBufSize; 902 #endif 903 } HVD_EX_MemCfg; 904 905 //----------------------------------------------------------------------------- 906 /// @brief \b Struct \b Name: HVD_Init_Params 907 /// @brief \b Struct \b Description: Store the initialization settings 908 //----------------------------------------------------------------------------- 909 typedef struct 910 { 911 MS_U32 u32ModeFlag; ///< init mode flag, use HVD_INIT_* to setup HVD. 912 MS_U32 u32FrameRate; ///< frame rate. 913 MS_U32 u32FrameRateBase; ///< frame rate base. The value of u32FrameRate /u32FrameRateBase must be frames per sec. 914 MS_U8 u8MinFrmGap; ///< set the min frame gap. 915 MS_U8 u8SyncType; ///< HVD_EX_SyncType. sync type of current playback. 916 MS_U16 u16Pitch; ///< not zero: specify the pitch. 0: use default value. 917 MS_U32 u32MaxDecTick; ///< not zero: specify the max decode tick. 0: use default value. 918 MS_BOOL bSyncEachFrm; ///< TRUE: sync STC at each frame. FALSE: not sync each frame. 919 MS_BOOL bAutoFreeES; ///< TRUE: auto free ES buffer when ES buffer is full. FALSE: not do the auto free. 920 MS_BOOL bAutoPowerSaving; ///< TRUE: auto power saving. FALSE: not do the auto power saving. 921 MS_BOOL bDynamicScaling; ///< TRUE: enable Dynamic Scaling. FALSE: disable Dynamic Scaling. 922 MS_BOOL bFastDisplay; ///< TRUE: enable Fast Display. FALSE: disable Fast Display. 923 MS_BOOL bUserData; ///< TRUE: enable processing User data. FALSE: disable processing User data. 924 MS_U8 u8TurboInit; ///< HVD_TurboInitLevel. set the turbo init mode. 925 MS_U8 u8TimeUnit; ///< HVD_Time_Unit_Type.set the type of input/output time unit. 926 MS_U16 u16DecoderClock; ///< HVD decoder clock speed. 0: default value. non-zero: any nearist clock. 927 MS_U16 u16ChipECONum; ///< Chip revision, ECO number. 928 HVD_EX_RVInfo* pRVFileInfo; ///< pointer to RV file info 929 HVD_EX_FBReduction stFBReduction; ///< HVD Frame buffer reduction type 930 } HVD_EX_InitSettings; 931 932 //----------------------------------------------------------------------------- 933 /// @brief \b Struct \b Name: HVD_EX_PacketInfo 934 /// @brief \b Struct \b Description: Store the packet information 935 //----------------------------------------------------------------------------- 936 typedef struct 937 { 938 MS_PHY u32Staddr; ///< Packet offset from bitstream buffer base address. unit: byte. 939 MS_U32 u32Length; ///< Packet size. unit: byte. 940 MS_PHY u32Staddr2; ///< Packet offset from bitstream buffer base address. unit: byte. 941 MS_U32 u32Length2; ///< Packet size. unit: byte. 942 MS_U32 u32TimeStamp; ///< Packet time stamp. unit: ms. 943 MS_U32 u32ID_L; ///< Packet ID low part. 944 MS_U32 u32ID_H; ///< Packet ID high part. 945 MS_U32 u32AllocLength; ///< Allocated Packet size. unit: byte. 946 MS_U8 u8Version; ///< Packet version 0 means u32Offset is the offset of ES buffer 947 ///< 1 means u32Offset is used as esHandleID 948 } HVD_EX_PacketInfo; 949 950 //----------------------------------------------------------------------------- 951 /// @brief \b Struct \b Name: HVD_EX_FrameInfo 952 /// @brief \b Struct \b Description: Store the frame information 953 //----------------------------------------------------------------------------- 954 typedef struct 955 { 956 MS_PHY u32LumaAddr; ///< The start physical of luma data. Unit: byte. 957 MS_PHY u32ChromaAddr; ///< The start physcal of chroma data. Unit: byte. 958 MS_U32 u32TimeStamp; ///< Time stamp(DTS, PTS) of current displayed frame. Unit: 90khz. 959 MS_U32 u32ID_L; ///< low part of ID number decided by MDrv_HVD_EX_PushQueue(). 960 MS_U32 u32ID_H; ///< high part of ID number decided by MDrv_HVD_EX_PushQueue(). 961 MS_U16 u16Pitch; ///< The pitch of current frame. 962 MS_U16 u16Width; ///< pixel width of current frame. 963 MS_U16 u16Height; ///< pixel height of current frame. 964 HVD_EX_FrmType eFrmType; ///< picture type: I, P, B frame 965 HVD_EX_FieldType eFieldType; ///< none, top , bottom, both field 966 MS_U32 u32PrivateData; //[STB]only for AVC 967 MS_PHY u32LumaAddr_2bit; ///< The start offset of luma data. Unit: byte. 968 MS_PHY u32ChromaAddr_2bit; ///< The start offset of chroma data. Unit: byte. 969 MS_U16 u16Pitch_2bit; 970 MS_U8 u8LumaBitdepth; 971 MS_U8 u8ChromaBitdepth; 972 MS_PHY u32LumaAddrI; 973 MS_PHY u32LumaAddrI_2bit; 974 MS_PHY u32ChromaAddrI; 975 MS_PHY u32ChromaAddrI_2bit; 976 MS_U32 u32MFCodecInfo; 977 MS_U32 u32LumaMFCbitlen; 978 MS_U32 u32ChromaMFCbitlen; 979 ////HVD_MasteringDisplayColourVolume// 980 MS_U32 u32MaxLuminance; 981 MS_U32 u32MinLuminance; 982 MS_U16 u16Primaries[3][2]; 983 MS_U16 u16WhitePoint[2]; 984 MS_U8 u8Frm_Info_Ext_avail; ///bit[1]: SEI_Enabled, bit[0]: colur_description_present_flag 985 ////colour_description//////////// 986 MS_U8 u8Colour_primaries; // u(8) 987 MS_U8 u8Transfer_characteristics; // u(8) 988 MS_U8 u8Matrix_coefficients; // u(8) 989 ////Dolby_Vision//////////// 990 MS_U8 u8DVMode; // bit[0:1] 0: Disable 1:Single layer 2: Dual layer, bit[2] 0:Base Layer 1:Enhance Layer 991 MS_U8 u8CurrentIndex; 992 MS_U8 bDMEnable; 993 MS_U8 bCompEnable; 994 MS_PHY u32DVMetadataAddr; 995 MS_U32 u32DVDMSize; 996 MS_U32 u32DVCompSize; 997 MS_PHY u32HDRRegAddr; 998 MS_U32 u32HDRRegSize; 999 MS_PHY u32HDRLutAddr; 1000 MS_U32 u32HDRLutSize; 1001 // Other 1002 MS_U8 u8ComplexityLevel; // from 1~5, smaller number means smaller complexity 1003 MS_U8 u8TileMode; 1004 MS_U8 u8Reserve[2]; 1005 // Pixel aspect ratio info, crop info 1006 MS_U32 u32ParWidth; 1007 MS_U32 u32ParHeight; 1008 MS_U16 u16CropRight; 1009 MS_U16 u16CropLeft; 1010 MS_U16 u16CropBottom; 1011 MS_U16 u16CropTop; 1012 // Profiling / benchmark 1013 MS_U16 u16MIUBandwidth; 1014 MS_U16 u16Bitrate; 1015 // HTLB 1016 MS_U8 u8HTLBTableId; 1017 MS_U8 u8HTLBEntriesSize; 1018 MS_U8 u8Reserve1[2]; 1019 MS_U32 u32HTLBEntriesAddr; 1020 } HVD_EX_FrameInfo; 1021 1022 //----------------------------------------------------------------------------- 1023 /// @brief \b Struct \b Name: HVD_DISP_INFO_THRESHOLD 1024 /// @brief \b Struct \b Description: Store the disp information threshold 1025 //----------------------------------------------------------------------------- 1026 typedef struct 1027 { 1028 MS_U32 u32FrmrateUpBound; //Framerate filter upper bound 1029 MS_U32 u32FrmrateLowBound; //Framerate filter lower bound 1030 MS_U32 u32MvopUpBound; //mvop filter upper bound 1031 MS_U32 u32MvopLowBound; //mvop filter lower bound 1032 } HVD_EX_DispInfoThreshold; 1033 1034 typedef struct 1035 { 1036 MS_U8 u8DecMod; 1037 MS_U8 u8CodecCnt; 1038 MS_U8 u8CodecType[HVD_MAX_DEC_NUM]; 1039 MS_U8 u8ArgSize; 1040 MS_U32 u32Arg; 1041 } HVD_EX_DecModCfg; 1042 //----------------------------------------------------------------------------- 1043 /// @brief \b Struct \b Name: HVD_UsrData_Info 1044 /// @brief \b Struct \b Description: Store the User Data information 1045 //----------------------------------------------------------------------------- 1046 typedef struct 1047 { 1048 MS_U32 u32Pts; 1049 MS_U8 u8PicStruct; // picture_structure 1050 MS_U8 u8PicType; // picture type: 1->I picture, 2->P,3->B 1051 MS_U8 u8TopFieldFirst; // Top field first: 1 if top field first 1052 MS_U8 u8RptFirstField; // Repeat first field: 1 if repeat field first 1053 1054 MS_PHY u32DataBuf; // User_Data data buffer address 1055 MS_U16 u16TmpRef; // Temporal reference of the picture 1056 MS_U8 u8ByteCnt; // User Data length 1057 MS_U8 u8Reserve; // Reserved 1058 } HVD_EX_UserData_Info; 1059 1060 typedef struct 1061 { 1062 MS_BOOL bvaild; 1063 MS_BOOL bUsed; 1064 MS_U8 u8Frm_packing_arr_cnl_flag; 1065 MS_U8 u8Frm_packing_arr_type; 1066 MS_U8 u8content_interpretation_type; 1067 MS_U8 u1Quincunx_sampling_flag; 1068 MS_U8 u1Spatial_flipping_flag; 1069 MS_U8 u1Frame0_flipping_flag; 1070 MS_U8 u1Field_views_flag; 1071 MS_U8 u1Current_frame_is_frame0_flag; 1072 MS_U8 u1Frame0_self_contained_flag; 1073 MS_U8 u1Frame1_self_contained_flag; 1074 MS_U8 u4Frame0_grid_position_x; 1075 MS_U8 u4Frame0_grid_position_y; 1076 MS_U8 u4Frame1_grid_position_x; 1077 MS_U8 u4Frame1_grid_position_y; 1078 MS_U16 u16CropRight; 1079 MS_U16 u16CropLeft; 1080 MS_U16 u16CropBottom; 1081 MS_U16 u16CropTop; 1082 MS_U8 u8payload_len; 1083 MS_U8 u8WaitSPS; 1084 MS_U8 u8Reserved01; 1085 MS_U8 u8Reserved02; 1086 MS_U32 u32payload; 1087 }HVD_EX_FrmPackingSEI; 1088 1089 typedef struct 1090 { 1091 MS_BOOL bUsed; 1092 MS_BOOL bColourVolumeSEIEnabled; 1093 MS_U32 u32MaxLuminance; 1094 MS_U32 u32MinLuminance; 1095 MS_U16 u16Primaries[3][2]; 1096 MS_U16 u16WhitePoint[2]; 1097 }HVD_EX_DisplayColourVolumeSEI; 1098 1099 typedef struct 1100 { 1101 MS_BOOL bUsed; 1102 MS_BOOL ContentLightLevelEnabled; 1103 MS_U16 maxContentLightLevel; 1104 MS_U16 maxPicAverageLightLevel; 1105 } HVD_EX_ContentLightLevelInfoSEI; 1106 1107 typedef struct 1108 { 1109 MS_PHY u32DSBufAddr; // Buffer Address 1110 MS_U32 u32DSBufSize; // Buffer Size 1111 }HVD_EX_ExternalDSBuf; 1112 1113 typedef struct 1114 { 1115 MS_U64 u64PTS; 1116 MS_U32 u32POC; 1117 MS_U8 u8FrameType; 1118 }HVD_EX_PVR_Seamless_Info; 1119 1120 typedef struct 1121 { 1122 MS_U32 u32Version; 1123 MS_U8 u8MatrixCoefficients; 1124 MS_U8 u8BitsPerChannel; 1125 MS_U8 u8ChromaSubsamplingHorz; 1126 MS_U8 u8ChromaSubsamplingVert; 1127 MS_U8 u8CbSubsamplingHorz; 1128 MS_U8 u8CbSubsamplingVert; 1129 MS_U8 u8ChromaSitingHorz; 1130 MS_U8 u8ChromaSitingVert; 1131 MS_U8 u8ColorRange; 1132 MS_U8 u8TransferCharacteristics; 1133 MS_U8 u8ColourPrimaries; 1134 MS_U16 u16MaxCLL; //Max Content Light Level 1135 MS_U16 u16MaxFALL; //Max Frame Average Light Level 1136 MS_U16 u16Primaries[3][2]; 1137 MS_U16 u16WhitePoint[2]; 1138 MS_U32 u32MaxLuminance; 1139 MS_U32 u32MinLuminance; 1140 } HVD_EX_Config_VP9HDR10; 1141 1142 //------------------------------------------------------------------------------------------------- 1143 // Function and Variable 1144 //------------------------------------------------------------------------------------------------- 1145 void MDrv_HVD_EX_SetCtrlsBase(MS_U32 u32Id); 1146 void MDrv_HVD_EX_MJPEG_InitSharemem(MS_U32 u32Id, MS_VIRT u32CodeBufVAddr, MS_BOOL bPreConnEnable, MS_BOOL bConnect, HVD_EX_DISPLAY_PATH eMvopPath, HVD_EX_Original_Stream eStream); 1147 void MDrv_HVD_EX_MJPEG_Exit(MS_U32 u32Id); 1148 1149 void MDrv_HVD_EX_SetOSRegBase(MS_VIRT u32RegBaseAddr); 1150 HVD_EX_Result MDrv_HVD_EX_GetFreeStream(MS_U32 *pu32Id, HVD_EX_DRV_StreamType eStreamType); 1151 #ifdef VDEC3 1152 HVD_EX_Result MDrv_HVD_EX_Init(MS_U32 u32Id, HVD_EX_MemCfg *pStMemCfg, HVD_EX_InitSettings *pStInitSettings, MS_BOOL bFWdecideFB, MS_BOOL bShareBBU, HVD_EX_Original_Stream eStream); 1153 #else 1154 HVD_EX_Result MDrv_HVD_EX_Init(MS_U32 u32Id, HVD_EX_MemCfg *pStMemCfg, HVD_EX_InitSettings *pStInitSettings); 1155 #endif 1156 HVD_EX_Result MDrv_HVD_EX_Rst(MS_U32 u32Id, MS_BOOL bErrHandle); 1157 HVD_EX_Result MDrv_HVD_EX_Play(MS_U32 u32Id); 1158 HVD_EX_Result MDrv_HVD_EX_Exit(MS_U32 u32Id); 1159 HVD_EX_Result MDrv_HVD_EX_Pause(MS_U32 u32Id); 1160 HVD_EX_Result MDrv_HVD_EX_Flush(MS_U32 u32Id, MS_BOOL bShowLast); 1161 HVD_EX_Result MDrv_HVD_EX_StepDisp(MS_U32 u32Id); 1162 HVD_EX_Result MDrv_HVD_EX_StepDecode(MS_U32 u32Id); 1163 HVD_EX_Result MDrv_HVD_EX_PushQueue(MS_U32 u32Id, HVD_EX_PacketInfo *pInfo); 1164 HVD_EX_Result MDrv_HVD_EX_PushQueue_Fire(MS_U32 u32Id); 1165 HVD_EX_Result MDrv_HVD_EX_DecodeIFrame(MS_U32 u32Id, MS_PHY u32SrcSt, MS_U32 u32SrcSize); 1166 1167 HVD_EX_Result MDrv_HVD_EX_SetDataEnd(MS_U32 u32Id, MS_BOOL bEnd); 1168 HVD_EX_Result MDrv_HVD_EX_SetDispErrFrm(MS_U32 u32Id, MS_BOOL bEnable); 1169 HVD_EX_Result MDrv_HVD_EX_SetCalFrameRate(MS_U32 u32Id, MS_BOOL bEnable); 1170 HVD_EX_Result MDrv_HVD_EX_SkipNFrame(MS_U32 u32Id, MS_U32 u32FrameCnt); 1171 HVD_EX_Result MDrv_HVD_EX_SetDispRepeatField(MS_U32 u32Id, MS_BOOL bEnable); 1172 HVD_EX_Result MDrv_HVD_EX_SetSkipDecMode(MS_U32 u32Id, HVD_EX_SkipDecode eDecType); 1173 #ifdef VDEC3_FB 1174 HVD_EX_Result MDrv_HVD_EX_SetFrmBuffAddr(MS_U32 u32Id, MS_PHY u32FrmBuffAddr); 1175 HVD_EX_Result MDrv_HVD_EX_SetFrmBuffSize(MS_U32 u32Id, MS_U32 u32FrmBuffSize); 1176 #endif 1177 HVD_EX_Result MDrv_HVD_EX_SetEnalbeHDR(MS_U32 u32Id, MS_BOOL bEnable); 1178 HVD_EX_Result MDrv_HVD_EX_SetHDR10PerFrame(MS_U32 u32Id, MS_BOOL bEnable); 1179 HVD_EX_Result MDrv_HVD_EX_SetDVXCShmBuff(MS_U32 u32Id, MS_PHY u32FWBaseAddr, MS_PHY u32DVXCShmAddr, MS_SIZE u32DVXCShmSize); 1180 HVD_EX_Result MDrv_HVD_EX_SetFrmBuff2(MS_U32 u32Id, MS_PHY u32FrmBuffAddr, MS_U32 u32FrmBuffSize); 1181 HVD_EX_Result MDrv_HVD_EX_SetDispSpeed(MS_U32 u32Id, HVD_EX_DispSpeed eSpeed); 1182 HVD_EX_Result MDrv_HVD_EX_SetSyncActive(MS_U32 u32Id, MS_BOOL bEnable); 1183 HVD_EX_Result MDrv_HVD_EX_SetDropMode(MS_U32 u32Id, HVD_EX_DropDisp eMode, MS_U32 u32Arg); 1184 HVD_EX_Result MDrv_HVD_EX_RstPTS(MS_U32 u32Id, MS_U32 u32PTS); 1185 HVD_EX_Result MDrv_HVD_EX_SetFrcMode(MS_U32 u32Id, HVD_EX_FrmRateConvMode eMode); 1186 HVD_EX_Result MDrv_HVD_EX_SetSyncTolerance(MS_U32 u32Id, MS_U32 u32Arg); 1187 HVD_EX_Result MDrv_HVD_EX_SetSyncVideoDelay(MS_U32 u32Id, MS_U32 u32Arg); 1188 HVD_EX_Result MDrv_HVD_EX_SetSyncFreeRunTH(MS_U32 u32Id, MS_U32 u32Arg); 1189 HVD_EX_Result MDrv_HVD_EX_SetSyncRepeatTH(MS_U32 u32Id, MS_U32 u32Arg); 1190 HVD_EX_Result MDrv_HVD_EX_SetErrConceal(MS_U32 u32Id, MS_BOOL u32Arg); 1191 void MDrv_HVD_EX_SetDbgLevel(HVD_EX_UartLevel elevel); 1192 HVD_EX_Result MDrv_HVD_EX_SeekToPTS(MS_U32 u32Id, MS_U32 u32PTS); 1193 HVD_EX_Result MDrv_HVD_EX_SkipToPTS(MS_U32 u32Id, MS_U32 u32PTS); 1194 HVD_EX_Result MDrv_HVD_EX_SetFreezeImg(MS_U32 u32Id, MS_BOOL bEnable); 1195 HVD_EX_Result MDrv_HVD_EX_SetBlueScreen(MS_U32 u32Id, MS_BOOL bEnable); 1196 HVD_EX_Result MDrv_HVD_EX_SetDispOneField(MS_U32 u32Id, MS_BOOL bEnable); 1197 HVD_EX_Result MDrv_HVD_EX_SetISREvent(MS_U32 u32Id, MS_U32 u32Event, HVD_InterruptCb fnISRHandler); 1198 MS_BOOL MDrv_HVD_EX_SetEnableISR(MS_U32 u32Id, MS_BOOL bEnable); 1199 MS_BOOL MDrv_HVD_EX_SetForceISR(MS_U32 u32Id, MS_BOOL bEnable); 1200 MS_BOOL MDrv_HVD_EX_SetMVOPDone(MS_U32 u32Id); 1201 HVD_EX_Result MDrv_HVD_EX_SetVirtualBox(MS_U32 u32Id, MS_U16 u16Width, MS_U16 u16Height); 1202 HVD_EX_Result MDrv_HVD_EX_SetDynScalingParam(MS_U32 u32Id, void *pStAddr, MS_U32 u32Size); 1203 HVD_EX_Result MDrv_HVD_EX_SetAutoRmLstZeroByte(MS_U32 u32Id, MS_BOOL bOn); 1204 HVD_EX_Result MDrv_HVD_EX_SetDispInfoTH(MS_U32 u32Id, HVD_EX_DispInfoThreshold *DispInfoTH); 1205 HVD_EX_Result MDrv_HVD_EX_SetFastDisplay(MS_U32 u32Id, MS_BOOL bFastDisplay); 1206 HVD_EX_Result MDrv_HVD_EX_SetIgnoreErrRef(MS_U32 u32Id, MS_BOOL bIgnore); 1207 HVD_EX_Result MDrv_HVD_EX_ForceFollowDTVSpec(MS_U32 u32Id, MS_BOOL bEnable); 1208 1209 MS_BOOL MDrv_HVD_EX_IsISROccured(MS_U32 u32Id); 1210 MS_BOOL MDrv_HVD_EX_IsDispFinish(MS_U32 u32Id); 1211 MS_BOOL MDrv_HVD_EX_IsFrameShowed(MS_U32 u32Id); 1212 MS_BOOL MDrv_HVD_EX_IsStepDecodeDone(MS_U32 u32Id); 1213 HVD_EX_Result MDrv_HVD_EX_CheckDispInfoRdy(MS_U32 u32Id); 1214 MS_BOOL MDrv_HVD_EX_IsDispInfoChg(MS_U32 u32Id); 1215 MS_BOOL MDrv_HVD_EX_IsIdle(MS_U32 u32Id); 1216 MS_BOOL MDrv_HVD_EX_IsSyncStart(MS_U32 u32Id); 1217 MS_BOOL MDrv_HVD_EX_IsSyncReach(MS_U32 u32Id); 1218 MS_BOOL MDrv_HVD_EX_IsLowDelay(MS_U32 u32Id); 1219 MS_BOOL MDrv_HVD_EX_IsIFrmFound(MS_U32 u32Id); 1220 MS_BOOL MDrv_HVD_EX_Is1stFrmRdy(MS_U32 u32Id); 1221 MS_BOOL MDrv_HVD_EX_IsAllBufferEmpty(MS_U32 u32Id); 1222 HVD_EX_Result MDrv_HVD_EX_IsAlive(MS_U32 u32Id); 1223 1224 MS_U32 MDrv_HVD_EX_GetBBUVacancy(MS_U32 u32Id); 1225 HVD_EX_Result MDrv_HVD_EX_GetDispInfo(MS_U32 u32Id, HVD_EX_DispInfo *pInfo); 1226 MS_U32 MDrv_HVD_EX_GetPTS(MS_U32 u32Id); 1227 MS_U64 MDrv_HVD_EX_GetU64PTS(MS_U32 u32Id); 1228 MS_U64 MDrv_HVD_EX_GetU64PTS_PreParse(MS_U32 u32Id); 1229 MS_U32 MDrv_HVD_EX_GetNextPTS(MS_U32 u32Id); 1230 MS_U32 MDrv_HVD_EX_GetNextDispQPtr(MS_U32 u32Id); 1231 MS_U32 MDrv_HVD_EX_GetDataErrCnt(MS_U32 u32Id); 1232 MS_U32 MDrv_HVD_EX_GetDecErrCnt(MS_U32 u32Id); 1233 MS_VIRT MDrv_HVD_EX_GetESWritePtr(MS_U32 u32Id); 1234 MS_VIRT MDrv_HVD_EX_GetESReadPtr(MS_U32 u32Id); 1235 MS_U32 MDrv_HVD_EX_GetESQuantity(MS_U32 u32Id); 1236 MS_BOOL MDrv_HVD_EX_GetCaps(HVD_EX_Codec u32Type); 1237 MS_U32 MDrv_HVD_EX_GetErrCode(MS_U32 u32Id); 1238 MS_U32 MDrv_HVD_EX_GetPlayMode(MS_U32 u32Id, HVD_EX_GetModeStatus eMode); 1239 HVD_EX_GetPlayState MDrv_HVD_EX_GetPlayState(MS_U32 u32Id); 1240 MS_U32 MDrv_HVD_EX_GetDecodeCnt(MS_U32 u32Id); 1241 MS_U8 MDrv_HVD_EX_GetActiveFormat(MS_U32 u32Id); 1242 const HVD_EX_DrvInfo *MDrv_HVD_EX_GetInfo(void); 1243 HVD_EX_Result MDrv_HVD_EX_GetLibVer(const MSIF_Version **ppVersion); 1244 MS_BOOL MDrv_HVD_EX_GetStatus(MS_U32 u32Id, HVD_EX_DrvStatus *pstatus); 1245 HVD_EX_Result MDrv_HVD_EX_GetFrmInfo(MS_U32 u32Id, HVD_EX_GetFrmInfoType eType, HVD_EX_FrameInfo *pInfo); 1246 MS_BOOL MDrv_HVD_EX_GetISRInfo(MS_U32 u32Id, MS_U32 *eType); 1247 MS_U32 MDrv_HVD_EX_CalLumaSum(MS_U32 u32Id, HVD_EX_GetFrmInfoType eType); 1248 MS_U32 MDrv_HVD_EX_GetUserData_Wptr(MS_U32 u32Id); 1249 MS_VIRT MDrv_HVD_EX_GetUserData_Packet(MS_U32 u32Id, MS_U32 u32Idx, MS_U32 *u32Size); 1250 HVD_EX_Result MDrv_HVD_EX_GenPattern(MS_U32 u32Id, HVD_EX_PatternType eType, MS_VIRT u32VAddr, MS_U32 *u32Size); 1251 MS_U32 MDrv_HVD_EX_GetPatternInfo(MS_U32 u32Id, HVD_EX_PatternInfo eType); 1252 MS_U64 MDrv_HVD_EX_GetDynamicScalingInfo(MS_U32 u32Id, HVD_EX_DynamicScalingInfo eType); 1253 MS_BOOL MDrv_HVD_EX_GetFrmRateIsSupported(MS_U32 u32Id); 1254 1255 MS_VIRT MDrv_HVD_EX_GetData(MS_U32 u32Id, HVD_EX_GDataType eType); 1256 MS_U32 MDrv_HVD_EX_GetMem_Dbg(MS_U32 u32Id, MS_VIRT u32Addr); 1257 void MDrv_HVD_EX_DbgDumpStatus(MS_U32 u32Id, HVD_EX_DumpStatus eFlag); 1258 void MDrv_HVD_EX_SetMem_Dbg(MS_U32 u32Id, MS_VIRT u32Addr, MS_U32 u32Arg); 1259 HVD_EX_Result MDrv_HVD_EX_SetCmd_Dbg(MS_U32 u32Id, MS_U32 u32Cmd, MS_U32 u32Arg); 1260 HVD_EX_Result MDrv_HVD_EX_SetSettings_Pro(MS_U32 u32Id, HVD_EX_SSettingsType eType, MS_U32 u32Arg); 1261 HVD_EX_Result MDrv_HVD_EX_SetBalanceBW(MS_U32 u32Id, MS_U8 u8QPCnt, MS_U8 u8DBCnt, MS_U8 u8Upper); 1262 MS_S64 MDrv_HVD_EX_GetPtsStcDiff(MS_U32 u32Id); 1263 MS_U32 MDrv_HVD_EX_GetDrvFwVer(void); 1264 HVD_EX_Result MDrv_HVD_EX_SetFdMaskDelayCnt(MS_U32 u32Id, MS_U8 u8DelayCnt); 1265 HVD_EX_Result MDrv_HVD_EX_SetOutputFRCMode(MS_U32 u32Id, MS_U8 u8FrameRate, MS_U8 u8Interlace); 1266 HVD_EX_Result MDrv_HVD_EX_DispFrame(MS_U32 u32Id, MS_U32 u32FrmIdx); 1267 HVD_EX_Result MDrv_HVD_EX_FreeFrame(MS_U32 u32Id, MS_U32 u32FrmIdx); 1268 HVD_EX_Result MDrv_HVD_EX_EnableDispQue(MS_U32 u32Id, MS_BOOL bEnable); 1269 HVD_EX_Result MDrv_HVD_EX_EnableVSizeAlign(MS_U32 u32Id, MS_BOOL bEnable); 1270 HVD_EX_Result MDrv_HVD_EX_ShowDecodeOrder(MS_U32 u32Id, MS_BOOL bEnable); 1271 HVD_EX_Result MDrv_HVD_EX_Disp_Ignore_Crop(MS_U32 u32Id, MS_BOOL bEnable); 1272 HVD_EX_Result MDrv_HVD_EX_RmEnablePtsTbl(MS_U32 u32Id, MS_BOOL bEnable); 1273 HVD_EX_Result MDrv_HVD_EX_SetFRCDropType(MS_U32 u32Id, MS_U8 u8DropType); 1274 MS_U32 MDrv_HVD_EX_GetDrvFwVer(void); 1275 MS_U32 MDrv_HVD_EX_GetFwVer(MS_U32 u32Id); 1276 HVD_EX_Result MDrv_HVD_EX_DispOutsideMode(MS_U32 u32Id, MS_BOOL bEnable); 1277 MS_BOOL MDrv_HVD_SetSingleDecodeMode(MS_BOOL bEnable); 1278 MS_BOOL MDrv_HVD_SetSTCMode(MS_U32 u32Id, MS_U32 u32STCIndex); 1279 MS_BOOL MDrv_HVD_SetDecodeMode(HVD_EX_DecModCfg *pstCfg); 1280 void MDrv_HVD_EX_SetBurstMode(MS_U32 u32Id, MS_BOOL bBurst); 1281 HVD_EX_Result MDrv_HVD_EX_ForceInterlaceMode(MS_U32 u32Id, MS_U8 u8Mode); 1282 HVD_EX_Result MDrv_HVD_EX_Support_AVC2MVC(MS_U32 u32Id, MS_BOOL bEnable); 1283 HVD_EX_Result MDrv_HVD_EX_3DLR_View_Exchange(MS_U32 u32Id, MS_BOOL bEnable); 1284 HVD_EX_Result MDrv_HVD_EX_Enable_New_Slow_Motion(MS_U32 u32Id, MS_BOOL bEnable); 1285 HVD_EX_Result MDrv_HVD_EX_SetDTVUserDataMode(MS_U32 u32Id,MS_U8 u8UserDataMode); 1286 MS_BOOL MDrv_HVD_EX_GetUsrDataIsAvailable(MS_U32 u32Id); 1287 HVD_EX_Result MDrv_HVD_EX_GetUserDataInfo(MS_U32 u32Id,HVD_EX_UserData_Info* pUsrInfo); 1288 HVD_EX_Result MDrv_HVD_EX_GetFrmPackingArrSEI(MS_U32 u32Id,HVD_EX_FrmPackingSEI *pFrmPacking); 1289 HVD_EX_Result MDrv_HVD_EX_GetContentLightLevelInfoSEI(MS_U32 u32Id, HVD_EX_ContentLightLevelInfoSEI *pContentLightLevel); 1290 HVD_EX_Result MDrv_HVD_EX_GetDisplayColourVolumeArrSEI(MS_U32 u32Id, HVD_EX_DisplayColourVolumeSEI *pDisplayColourVolume); 1291 HVD_EX_Result MDrv_HVD_EX_SuspendDynamicScale(MS_U32 u32Id, MS_BOOL bEnable); 1292 HVD_EX_Result MDrv_HVD_EX_PushDispQWithRefNum(MS_U32 u32Id, MS_U8 u8Mode); 1293 HVD_EX_Result MDrv_HVD_EX_IgnorePicOverrun(MS_U32 u32Id, MS_BOOL bEnable); 1294 HVD_EX_Result MDrv_HVD_EX_DynamicScalingResvNBuffer(MS_U32 u32Id, MS_BOOL bEnable); 1295 HVD_EX_Result MDrv_HVD_EX_CtlSpeedInDispOnly(MS_U32 u32Id, MS_BOOL bEnable); 1296 HVD_EX_Result MDrv_HVD_EX_AVCSupportRefNumOverMaxDBPSize(MS_U32 u32Id, MS_BOOL bEnable); 1297 MS_U32 MDrv_HVD_EX_GetBBUQNum(MS_U32 u32Id); 1298 MS_U32 MDrv_HVD_EX_GetDispFrmNum(MS_U32 u32Id); 1299 HVD_EX_Result MDrv_HVD_Init_Share_Mem(void); 1300 HVD_EX_Result MDrv_HVD_EX_SetHVDClockSpeed(HVD_EX_ClockSpeed eClockSpeed); 1301 HVD_EX_Result MDrv_HVD_EX_SetVPUClockSpeed(HVD_EX_ClockSpeed eClockSpeed); 1302 HVD_EX_Result MDrv_HVD_EX_DSReportDispInfoChange(MS_U32 u32Id, MS_BOOL bEnable); 1303 HVD_EX_Result MDrv_HVD_EX_SetSecureMode(MS_U32 u32Id, MS_U32 u32SecureMode); 1304 HVD_EX_Result MDrv_HVD_EX_SupportRefNumOverMaxDpbSize(MS_U32 u32Id, MS_BOOL bEnable); 1305 HVD_EX_Result MDrv_HVD_EX_RVU_Setting_Mode(MS_U32 u32Id, MS_U32 u32Param); 1306 HVD_EX_Result MDrv_HVD_EX_FramerateHandling(MS_U32 u32Id, MS_U32 u32FrameRate); 1307 HVD_EX_Result MDrv_HVD_EX_DualNonBlockMode(MS_U32 u32Id, MS_BOOL bEnable); 1308 HVD_EX_Result MDrv_HVD_EX_IgnorePicStructDisplay(MS_U32 u32Id, MS_U32 param); 1309 HVD_EX_Result MDrv_HVD_EX_InputPtsFreerunMode(MS_U32 u32Id, MS_U32 param); 1310 HVD_EX_Result MDrv_HVD_EX_ErrConcealStartSlice1stMB(MS_U32 u32Id, MS_U32 param); 1311 HVD_EX_Result MDrv_HVD_EX_SetExternalDSBuffer(MS_U32 u32Id, HVD_EX_ExternalDSBuf *pExternalBuf); 1312 HVD_EX_Result MDrv_HVD_EX_SetHVDColBBUMode(MS_U32 u32Id, MS_U8 bEnable); 1313 1314 HVD_EX_Result MDrv_HVD_EX_CC_Init(MS_U32 u32Id); 1315 HVD_EX_Result MDrv_HVD_EX_CC_SetCfg(MS_U32 u32Id, MS_U8 u8Operation, MS_U16 u16BufferSize, MS_U8 u8CC608); 1316 HVD_EX_Result MDrv_HVD_EX_CC_Set_RB_StartAddr(MS_U32 u32Id, MS_PHY u32StartPAddress, MS_U8 u8CC608); 1317 HVD_EX_Result MDrv_HVD_EX_CC_SyncRB_RdAddr2WrAddr(MS_U32 u32Id, MS_U8 u8CC608); 1318 HVD_EX_Result MDrv_HVD_EX_CC_Adv_RB_ReadAddr(MS_U32 u32Id, MS_U32 u32EachPacketSize, MS_U8 u8CC608); 1319 HVD_EX_Result MDrv_HVD_EX_CC_DisableParsing(MS_U32 u32Id, MS_U8 u8CC608); 1320 HVD_EX_Result MDrv_HVD_EX_CC_GetInfo(MS_U32 u32Id, MS_U32 selector, MS_U8 type, MS_U32 *p1, MS_U32 *p2); 1321 MS_BOOL MDrv_HVD_EX_CC_IsHvdRstDone(MS_U32 u32Id, MS_U8 type); 1322 MS_U8 MDrv_HVD_EX_CC_GetOverflowStatus(MS_U32 u32Id, MS_U8 u8CC608); 1323 MS_U32 MDrv_HVD_EX_CC_Get_RB_WriteAddr(MS_U32 u32Id, MS_U8 u8CC608); 1324 MS_U32 MDrv_HVD_EX_CC_Get_RB_ReadAddr(MS_U32 u32Id, MS_U8 u8CC608); 1325 MS_BOOL MDrv_HVD_EX_CC_InfoEnhanceMode(MS_U32 u32Id, MS_BOOL bEnable); 1326 HVD_EX_Result MDrv_HVD_EX_AutoExhaustESMode(MS_U32 u32Id, MS_U32 u32ESbound); 1327 MS_U32 MDrv_HVD_EX_GetESBufferStatus(MS_U32 u32Id); 1328 MS_U32 MDrv_HVD_EX_SetCMAReleaseStatus(MS_U32 u32Id, HVD_EX_CMA_Release_Status eCMAReleaseStatus); 1329 HVD_EX_CMA_Release_Status MDrv_HVD_EX_GetCMAReleaseStatus(MS_U32 u32Id); 1330 MS_U32 MDrv_HVD_EX_SetCMAAllocateStatus(MS_U32 u32Id, HVD_EX_CMA_Allocation_Status eCMAAllocStatus); 1331 HVD_EX_CMA_Allocation_Status MDrv_HVD_EX_GetCMAAllocateStatus(MS_U32 u32Id); 1332 MS_BOOL MDrv_HVD_EX_GetCMAAllocationInfo(MS_U32 u32Id, MS_U8 *Miu_sel, MS_U64 *offset, MS_SIZE *length); 1333 MS_BOOL MDrv_HVD_EX_GetCMAReleaseInfo(MS_U32 u32Id, MS_U8 *Miu_sel, MS_U8 *block_sel, MS_U64 *offset, MS_SIZE *length); 1334 MS_BOOL MDrv_HVD_EX_SetCMAAllocateData(MS_U32 u32Id, MS_U8 miu_sel, MS_PHY FWBaseAddr, MS_PHY offset, MS_U32 length); 1335 MS_BOOL MDrv_HVD_EX_WaitCMAStatusDone(MS_U32 u32Id, MS_BOOL bCMAInitPool0, MS_BOOL bCMAInitPool1); 1336 HVD_EX_Result MDrv_HVD_EX_ReturnInvalidAFD(MS_U32 u32Id, MS_BOOL bEnable); 1337 HVD_EX_Result MDrv_HVD_EX_AVCForceBrokenByUs(MS_U32 u32Id, MS_BOOL bEnable); 1338 HVD_EX_Result MDrv_HVD_EX_ShowFirstFrameDirect(MS_U32 u32Id, MS_BOOL bEnable); 1339 HVD_EX_Result MDrv_HVD_EX_AVCResizeDosDispPendBuf(MS_U32 u32Id, MS_U32 u32Size); 1340 HVD_EX_Result MDrv_HVD_EX_SetMinTspSize(MS_U32 u32Id, MS_U32 u32Size); 1341 HVD_EX_Result MDrv_HVD_EX_SetDmxFrameRate(MS_U32 u32Id, MS_U32 u32Value); 1342 HVD_EX_Result MDrv_HVD_EX_SetDmxFrameRateBase(MS_U32 u32Id, MS_U32 u32Value); 1343 MS_BOOL MDrv_HVD_EX_GetSupport2ndMVOPInterface(void); 1344 MS_BOOL MDrv_HVD_EX_SetVPUSecureMode(MS_BOOL bEnable); 1345 HVD_EX_Result MDrv_HVD_EX_SetExternal_CC608_Buffer(MS_U32 u32Id, MS_PHY u32Addr, MS_U32 u32Len); 1346 HVD_EX_Result MDrv_HVD_EX_SetExternal_CC708_Buffer(MS_U32 u32Id, MS_PHY u32Addr, MS_U32 u32Len); 1347 HVD_EX_Result MDrv_HVD_EX_OnePendingBufferMode(MS_U32 u32Id,MS_BOOL bEnable); 1348 HVD_EX_Result MDrv_HVD_EX_TsInBbuMode(MS_U32 u32Id,MS_BOOL bEnable); 1349 HVD_EX_Result MDrv_HVD_EX_IapGnBufShareBWMode(MS_U32 u32Id,MS_BOOL bEnable, MS_PHY u32IapGnBufAddr, MS_U32 u32IapGnBufSize); 1350 HVD_EX_Result MDrv_HVD_EX_SetPTSUsecMode(MS_U32 u32Id, MS_BOOL bEnable); 1351 HVD_EX_Result MDrv_HVD_EX_Set_Err_Tolerance(MS_U32 u32Id, MS_U32 u32Arg); 1352 HVD_EX_Result MDrv_HVD_EX_SetDVInfo(MS_U32 u32Id, MS_U32 u32Arg); 1353 HVD_EX_Result MDrv_HVD_EX_PVRTimeShiftSeamlessMode(MS_U32 u32Id, MS_U8 u8Arg); 1354 MS_U8 MDrv_HVD_EX_GetDSBufMiuSelect(MS_U32 u32Id); 1355 MS_U8 MDrv_HVD_EX_CHIP_Capability(void* pHWCap); 1356 MS_BOOL MDrv_HVD_EX_GetPVRSeamlessInfo(MS_U32 u32Id, HVD_EX_PVR_Seamless_Info* param); 1357 void MDrv_HVD_EX_BBU_Proc(MS_U32 u32Id); 1358 void MDrv_HVD_EX_BBU_StopProc(MS_U32 u32Id); 1359 void MDrv_HVD_EX_SetCMAInformation(void* cmaInitParam); 1360 HVD_EX_Result MDrv_HVD_EX_CPBRemovalDelay(MS_U32 u32Id, MS_BOOL bEnable); 1361 HVD_EX_Result MDrv_HVD_EX_SetAVSyncDispAutoDrop(MS_U32 u32Id, MS_BOOL bEnable); 1362 HVD_EX_Result MDrv_HVD_EX_SetDynmcDispPath(MS_U32 u32Id, MS_BOOL bConnect, HVD_EX_DISPLAY_PATH eDispPath); 1363 HVD_EX_Result MDrv_HVD_EX_PreConnectDispPath(MS_U32 u32Id, MS_BOOL bEnable, MS_BOOL bConnect, HVD_EX_DISPLAY_PATH eMvopPath); 1364 HVD_EX_Result MDrv_HVD_EX_PreConnectInputTsp(MS_U32 u32Id, MS_BOOL bEnable, HVD_EX_INPUT_TSP eInputTsp); 1365 1366 HVD_EX_Result MDrv_HVD_EX_PreSetMFCodecMode(MS_U32 u32Id, HVD_EX_MFCodec_mode eMFCodecMode); 1367 HVD_EX_Result MDrv_HVD_EX_PreSetForce8BitMode(MS_U32 u32Id, MS_BOOL bForce8BitMode); 1368 HVD_EX_Result MDrv_HVD_EX_PreSetDVSingleLayerMode(MS_U32 u32Id, HVD_EX_Feature bEnableDVSingleLayerMode); 1369 HVD_EX_Result MDrv_HVD_EX_PreSetVdecFeature(MS_U32 u32Id, MS_U32 eVdecFeature); 1370 HVD_EX_Result MDrv_HVD_EX_PreSetDynamicCMA(MS_U32 u32Id, MS_BOOL bDynamicCMAMode); 1371 HVD_EX_Result MDrv_HVD_EX_SetMaxCMASize(MS_U32 u32Id, MS_U32 u32MaxCMASize, MS_U32 u32MaxCMASize2); 1372 1373 HVD_EX_Result MDrv_HVD_EX_GetCodecCapInfo( int eCodecType, void *pCodecCapInfo); 1374 HVD_EX_Result MDrv_HVD_EX_FRC_OnlyShowTopField(MS_U32 u32Id, MS_BOOL bEnable); 1375 HVD_EX_Result MDrv_HVD_EX_DisableEsFullStop(MS_U32 u32Id, MS_BOOL bDisable); 1376 void MDrv_HVD_EX_ForceSwRst(void); 1377 1378 MS_SIZE MDrv_HVD_EX_GetFrameBufferDefaultSize(HVD_EX_CodecType eCodecType); 1379 MS_BOOL MDrv_HVD_EX_GetCMAMemSize(HVD_EX_CodecType eCodecType, HVD_EX_SrcMode eSrcMode, 1380 MS_U64 *offset, MS_SIZE *length, MS_U64 total_length, MS_SIZE unUseSize); 1381 MS_BOOL MDrv_HVD_EX_GetCapability(MS_U8 *pu8CmdNameIn, void *pParamIn, void *pParamOut); 1382 1383 HVD_EX_Result MDrv_HVD_EX_GetDVSupportProfiles(MS_U32 *pu32DVSupportProfiles); 1384 HVD_EX_Result MDrv_HVD_EX_GetDVSupportHighestLevel(MS_U32 u32DVProfile, MS_U32 *pu32DVLevel); 1385 HVD_EX_Result MDrv_HVD_EX_Set_Slow_Sync(MS_U32 u32Id, MS_U32 u32Arg); 1386 HVD_EX_Result MDrv_HVD_EX_SetVP9HDR10Info(MS_U32 u32Id, HVD_EX_Config_VP9HDR10 *stVP9HDR10Info); 1387 1388 #else 1389 MS_BOOL MDrv_HVD_EX_LoadCodeInSecure(MS_U32 addr); 1390 MS_BOOL MDrv_HVD_EX_SetLockDownRegister(void* param); 1391 MS_BOOL MDrv_HVD_EX_TEE_AllocateEsBufHandle(MS_U8 u8Idx, MS_PHY pVPUCodecAddr, MS_U32 u32ReqSize, MS_U32 u32BuffEnd, MS_U32 *pu32EsHandle); 1392 MS_BOOL MDrv_HVD_EX_TEE_GetESBufByHandle(MS_U8 u8Idx, MS_PHY pVPUCodecAddr, MS_U32 u32EsHandle, MS_PHY *pPhyAddr); 1393 #endif 1394 1395 #ifdef __cplusplus 1396 } 1397 #endif 1398 #endif // _DRV_HVD_H_ 1399 1400