1*53ee8cc1Swenshuai.xi //<MStar Software> 2*53ee8cc1Swenshuai.xi //****************************************************************************** 3*53ee8cc1Swenshuai.xi // MStar Software 4*53ee8cc1Swenshuai.xi // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved. 5*53ee8cc1Swenshuai.xi // All software, firmware and related documentation herein ("MStar Software") are 6*53ee8cc1Swenshuai.xi // intellectual property of MStar Semiconductor, Inc. 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These terms shall be governed by and construed in accordance with the laws 66*53ee8cc1Swenshuai.xi // of Taiwan, R.O.C., excluding its conflict of law rules. 67*53ee8cc1Swenshuai.xi // Any and all dispute arising out hereof or related hereto shall be finally 68*53ee8cc1Swenshuai.xi // settled by arbitration referred to the Chinese Arbitration Association, 69*53ee8cc1Swenshuai.xi // Taipei in accordance with the ROC Arbitration Law and the Arbitration 70*53ee8cc1Swenshuai.xi // Rules of the Association by three (3) arbitrators appointed in accordance 71*53ee8cc1Swenshuai.xi // with the said Rules. 72*53ee8cc1Swenshuai.xi // The place of arbitration shall be in Taipei, Taiwan and the language shall 73*53ee8cc1Swenshuai.xi // be English. 74*53ee8cc1Swenshuai.xi // The arbitration award shall be final and binding to both parties. 75*53ee8cc1Swenshuai.xi // 76*53ee8cc1Swenshuai.xi //****************************************************************************** 77*53ee8cc1Swenshuai.xi //<MStar Software> 78*53ee8cc1Swenshuai.xi //////////////////////////////////////////////////////////////////////////////// 79*53ee8cc1Swenshuai.xi // 80*53ee8cc1Swenshuai.xi // Copyright (c) 2008-2009 MStar Semiconductor, Inc. 81*53ee8cc1Swenshuai.xi // All rights reserved. 82*53ee8cc1Swenshuai.xi // 83*53ee8cc1Swenshuai.xi // Unless otherwise stipulated in writing, any and all information contained 84*53ee8cc1Swenshuai.xi // herein regardless in any format shall remain the sole proprietary of 85*53ee8cc1Swenshuai.xi // MStar Semiconductor Inc. and be kept in strict confidence 86*53ee8cc1Swenshuai.xi // ("MStar Confidential Information") by the recipient. 87*53ee8cc1Swenshuai.xi // Any unauthorized act including without limitation unauthorized disclosure, 88*53ee8cc1Swenshuai.xi // copying, use, reproduction, sale, distribution, modification, disassembling, 89*53ee8cc1Swenshuai.xi // reverse engineering and compiling of the contents of MStar Confidential 90*53ee8cc1Swenshuai.xi // Information is unlawful and strictly prohibited. MStar hereby reserves the 91*53ee8cc1Swenshuai.xi // rights to any and all damages, losses, costs and expenses resulting therefrom. 92*53ee8cc1Swenshuai.xi // 93*53ee8cc1Swenshuai.xi //////////////////////////////////////////////////////////////////////////////// 94*53ee8cc1Swenshuai.xi 95*53ee8cc1Swenshuai.xi /////////////////////////////////////////////////////////////////////////////////////////////////// 96*53ee8cc1Swenshuai.xi /// 97*53ee8cc1Swenshuai.xi /// @file drvHVD.h 98*53ee8cc1Swenshuai.xi /// @brief HVD Driver Interface 99*53ee8cc1Swenshuai.xi /// @author MStar Semiconductor Inc. 100*53ee8cc1Swenshuai.xi /////////////////////////////////////////////////////////////////////////////////////////////////// 101*53ee8cc1Swenshuai.xi 102*53ee8cc1Swenshuai.xi #ifndef _DRV_HVD_DEF_H_ 103*53ee8cc1Swenshuai.xi #define _DRV_HVD_DEF_H_ 104*53ee8cc1Swenshuai.xi 105*53ee8cc1Swenshuai.xi #include "drvHVD_Common.h" 106*53ee8cc1Swenshuai.xi 107*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 108*53ee8cc1Swenshuai.xi // Driver Capability 109*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 110*53ee8cc1Swenshuai.xi 111*53ee8cc1Swenshuai.xi // HW capability 112*53ee8cc1Swenshuai.xi #define HVD_HW_SVD 1 113*53ee8cc1Swenshuai.xi #define HVD_HW_HVD 2 114*53ee8cc1Swenshuai.xi #if defined(CHIP_T2) 115*53ee8cc1Swenshuai.xi #define HVD_HW_VERSION HVD_HW_SVD 116*53ee8cc1Swenshuai.xi #else 117*53ee8cc1Swenshuai.xi #define HVD_HW_VERSION HVD_HW_HVD 118*53ee8cc1Swenshuai.xi #endif 119*53ee8cc1Swenshuai.xi 120*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 121*53ee8cc1Swenshuai.xi // Macro and Define 122*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 123*53ee8cc1Swenshuai.xi // Feature switch 124*53ee8cc1Swenshuai.xi #if defined(REDLION_LINUX_KERNEL_ENVI) 125*53ee8cc1Swenshuai.xi #define HVD_ENABLE_MUTEX_PROTECT 0 126*53ee8cc1Swenshuai.xi #define HVD_ENABLE_MIU_RST_PROTECT 1 127*53ee8cc1Swenshuai.xi #define HVD_ENABLE_AUTO_SET_REG_BASE 0 128*53ee8cc1Swenshuai.xi #define HVD_ENABLE_MSOS_SYSTEM_CALL 0 129*53ee8cc1Swenshuai.xi #define HVD_ENABLE_PATCH_ISFRAMERDY 0 130*53ee8cc1Swenshuai.xi #define HVD_ENABLE_STOP_ACCESS_OVER_256 0 131*53ee8cc1Swenshuai.xi #define HVD_ENABLE_AUTO_AVI_NULL_PACKET 0 132*53ee8cc1Swenshuai.xi #define HVD_ENABLE_MSOS_MIU1_BASE 0 133*53ee8cc1Swenshuai.xi #define HVD_ENABLE_BDMA_2_BITSTREAMBUF 0 134*53ee8cc1Swenshuai.xi #define HVD_ENABLE_EMBEDDED_FW_BINARY 1 135*53ee8cc1Swenshuai.xi #define HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD 0 136*53ee8cc1Swenshuai.xi #define HVD_ENABLE_WAIT_CMD_FINISHED 0 137*53ee8cc1Swenshuai.xi #define HVD_ENABLE_TIME_MEASURE 0 138*53ee8cc1Swenshuai.xi #define HVD_ENABLE_REINIT_FAILED 1 139*53ee8cc1Swenshuai.xi #define HVD_ENABLE_RV_FEATURE 0 140*53ee8cc1Swenshuai.xi #else 141*53ee8cc1Swenshuai.xi #define HVD_ENABLE_MUTEX_PROTECT 1 142*53ee8cc1Swenshuai.xi #define HVD_ENABLE_MIU_RST_PROTECT 1 143*53ee8cc1Swenshuai.xi #if 1//defined( MSOS_TYPE_LINUX) 144*53ee8cc1Swenshuai.xi #define HVD_ENABLE_AUTO_SET_REG_BASE 1 145*53ee8cc1Swenshuai.xi #else 146*53ee8cc1Swenshuai.xi #define HVD_ENABLE_AUTO_SET_REG_BASE 0 147*53ee8cc1Swenshuai.xi #endif 148*53ee8cc1Swenshuai.xi #if defined(MSOS_TYPE_LINUX) || defined(MSOS_TYPE_ECOS) //|| defined( MSOS_TYPE_NOS) 149*53ee8cc1Swenshuai.xi #define HVD_ENABLE_PATCH_ISFRAMERDY 0 150*53ee8cc1Swenshuai.xi #define HVD_ENABLE_MSOS_SYSTEM_CALL 1 151*53ee8cc1Swenshuai.xi #else 152*53ee8cc1Swenshuai.xi #define HVD_ENABLE_PATCH_ISFRAMERDY 1 153*53ee8cc1Swenshuai.xi #define HVD_ENABLE_MSOS_SYSTEM_CALL 1 154*53ee8cc1Swenshuai.xi #endif 155*53ee8cc1Swenshuai.xi #if defined(MSOS_TYPE_NOS) && (defined(CHIP_T3) || defined(CHIP_T8) || defined(CHIP_J2)) 156*53ee8cc1Swenshuai.xi #define HVD_ENABLE_STOP_ACCESS_OVER_256 1 157*53ee8cc1Swenshuai.xi #define HVD_ENABLE_BDMA_2_BITSTREAMBUF 1 158*53ee8cc1Swenshuai.xi #else 159*53ee8cc1Swenshuai.xi #define HVD_ENABLE_STOP_ACCESS_OVER_256 0 160*53ee8cc1Swenshuai.xi #define HVD_ENABLE_BDMA_2_BITSTREAMBUF 0 161*53ee8cc1Swenshuai.xi #endif 162*53ee8cc1Swenshuai.xi 163*53ee8cc1Swenshuai.xi #define HVD_ENABLE_AUTO_AVI_NULL_PACKET 1 164*53ee8cc1Swenshuai.xi 165*53ee8cc1Swenshuai.xi #if defined(CHIP_JANUS) 166*53ee8cc1Swenshuai.xi #define HVD_ENABLE_MSOS_MIU1_BASE 0 167*53ee8cc1Swenshuai.xi #else 168*53ee8cc1Swenshuai.xi #define HVD_ENABLE_MSOS_MIU1_BASE 1 169*53ee8cc1Swenshuai.xi #endif 170*53ee8cc1Swenshuai.xi 171*53ee8cc1Swenshuai.xi #define HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD 0 172*53ee8cc1Swenshuai.xi #define HVD_ENABLE_WAIT_CMD_FINISHED 0 173*53ee8cc1Swenshuai.xi #define HVD_ENABLE_TIME_MEASURE 0 174*53ee8cc1Swenshuai.xi #define HVD_ENABLE_REINIT_FAILED 0 175*53ee8cc1Swenshuai.xi 176*53ee8cc1Swenshuai.xi #if defined(CHIP_T2) || defined(CHIP_U3) || defined(CHIP_T3) || defined(CHIP_T4) || defined(CHIP_T7) 177*53ee8cc1Swenshuai.xi #define HVD_ENABLE_RV_FEATURE 0 178*53ee8cc1Swenshuai.xi #else 179*53ee8cc1Swenshuai.xi #define HVD_ENABLE_RV_FEATURE 1 180*53ee8cc1Swenshuai.xi #endif 181*53ee8cc1Swenshuai.xi 182*53ee8cc1Swenshuai.xi #if defined(CHIP_T12) || \ 183*53ee8cc1Swenshuai.xi defined(CHIP_J2) || \ 184*53ee8cc1Swenshuai.xi defined(CHIP_A1) || \ 185*53ee8cc1Swenshuai.xi defined(CHIP_A2) || \ 186*53ee8cc1Swenshuai.xi defined(CHIP_A5) || \ 187*53ee8cc1Swenshuai.xi defined(CHIP_A5P) || \ 188*53ee8cc1Swenshuai.xi defined(CHIP_A7) || \ 189*53ee8cc1Swenshuai.xi defined(CHIP_A3) || \ 190*53ee8cc1Swenshuai.xi defined(CHIP_AMETHYST)|| \ 191*53ee8cc1Swenshuai.xi defined(CHIP_AGATE) || \ 192*53ee8cc1Swenshuai.xi defined(CHIP_EDISON) || \ 193*53ee8cc1Swenshuai.xi defined(CHIP_EMERALD)|| \ 194*53ee8cc1Swenshuai.xi defined(CHIP_EAGLE) || \ 195*53ee8cc1Swenshuai.xi defined(CHIP_EIFFEL) || \ 196*53ee8cc1Swenshuai.xi defined(CHIP_NIKE) || \ 197*53ee8cc1Swenshuai.xi defined(CHIP_MADISON) || \ 198*53ee8cc1Swenshuai.xi defined(CHIP_CLIPPERS) || \ 199*53ee8cc1Swenshuai.xi defined(CHIP_MIAMI) || \ 200*53ee8cc1Swenshuai.xi defined(CHIP_NUGGET) || \ 201*53ee8cc1Swenshuai.xi defined(CHIP_KAISER) || \ 202*53ee8cc1Swenshuai.xi defined(CHIP_NIKON) || \ 203*53ee8cc1Swenshuai.xi defined(CHIP_EINSTEIN)|| \ 204*53ee8cc1Swenshuai.xi defined(CHIP_NAPOLI) || \ 205*53ee8cc1Swenshuai.xi defined(CHIP_KERES) || \ 206*53ee8cc1Swenshuai.xi defined(CHIP_MONACO) || \ 207*53ee8cc1Swenshuai.xi defined(CHIP_MUNICH) 208*53ee8cc1Swenshuai.xi #define HVD_ENABLE_MVC 1 209*53ee8cc1Swenshuai.xi #else 210*53ee8cc1Swenshuai.xi #define HVD_ENABLE_MVC 0 211*53ee8cc1Swenshuai.xi #endif 212*53ee8cc1Swenshuai.xi 213*53ee8cc1Swenshuai.xi #endif 214*53ee8cc1Swenshuai.xi 215*53ee8cc1Swenshuai.xi #if defined(REDLION_LINUX_KERNEL_ENVI) 216*53ee8cc1Swenshuai.xi #include "drvHVD_redlion.h" 217*53ee8cc1Swenshuai.xi #endif 218*53ee8cc1Swenshuai.xi 219*53ee8cc1Swenshuai.xi #if (HVD_ENABLE_MUTEX_PROTECT) || ( HVD_ENABLE_MSOS_SYSTEM_CALL ) 220*53ee8cc1Swenshuai.xi #include "osalHVD_EX.h" 221*53ee8cc1Swenshuai.xi #endif 222*53ee8cc1Swenshuai.xi 223*53ee8cc1Swenshuai.xi #if HVD_ENABLE_MSOS_MIU1_BASE 224*53ee8cc1Swenshuai.xi #include "halCHIP.h" 225*53ee8cc1Swenshuai.xi #endif 226*53ee8cc1Swenshuai.xi 227*53ee8cc1Swenshuai.xi #if HVD_ENABLE_BDMA_2_BITSTREAMBUF 228*53ee8cc1Swenshuai.xi #include "drvBDMA.h" 229*53ee8cc1Swenshuai.xi #define HVD_dmacpy( DESTADDR, SRCADDR , LEN) MDrv_BDMA_CopyHnd((MS_PHYADDR)(SRCADDR), (MS_PHYADDR)(DESTADDR), (LEN), E_BDMA_SDRAM2SDRAM1, BDMA_OPCFG_DEF) 230*53ee8cc1Swenshuai.xi #define HVD_BDMAcpy(DESTADDR, SRCADDR, LEN , Flag) MDrv_BDMA_CopyHnd((MS_PHYADDR)(SRCADDR), (MS_PHYADDR)(DESTADDR), (LEN), (Flag), BDMA_OPCFG_DEF) 231*53ee8cc1Swenshuai.xi #endif 232*53ee8cc1Swenshuai.xi 233*53ee8cc1Swenshuai.xi // debug switch 234*53ee8cc1Swenshuai.xi // DEBUG 235*53ee8cc1Swenshuai.xi #if defined (REDLION_LINUX_KERNEL_ENVI) 236*53ee8cc1Swenshuai.xi #define HVD_PRINT printk 237*53ee8cc1Swenshuai.xi #define HVD_ERR printk 238*53ee8cc1Swenshuai.xi #elif defined (ANDROID) 239*53ee8cc1Swenshuai.xi #include <sys/mman.h> 240*53ee8cc1Swenshuai.xi #include <cutils/ashmem.h> 241*53ee8cc1Swenshuai.xi #include <cutils/log.h> 242*53ee8cc1Swenshuai.xi #ifndef LOGI // android 4.1 rename LOGx to ALOGx 243*53ee8cc1Swenshuai.xi #define HVD_PRINT ALOGI 244*53ee8cc1Swenshuai.xi #else 245*53ee8cc1Swenshuai.xi #define HVD_PRINT LOGI 246*53ee8cc1Swenshuai.xi #endif 247*53ee8cc1Swenshuai.xi #ifndef LOGE // android 4.1 rename LOGx to ALOGx 248*53ee8cc1Swenshuai.xi #define HVD_ERR ALOGE 249*53ee8cc1Swenshuai.xi #else 250*53ee8cc1Swenshuai.xi #define HVD_ERR LOGE 251*53ee8cc1Swenshuai.xi #endif 252*53ee8cc1Swenshuai.xi #else 253*53ee8cc1Swenshuai.xi #define HVD_PRINT printf 254*53ee8cc1Swenshuai.xi #define HVD_ERR printf 255*53ee8cc1Swenshuai.xi #endif 256*53ee8cc1Swenshuai.xi 257*53ee8cc1Swenshuai.xi #define HVD_EX_MSG_MUST(format, args...) \ 258*53ee8cc1Swenshuai.xi do \ 259*53ee8cc1Swenshuai.xi { \ 260*53ee8cc1Swenshuai.xi if (u32UartCtrl & E_HVD_UART_CTRL_MUST) \ 261*53ee8cc1Swenshuai.xi { \ 262*53ee8cc1Swenshuai.xi HVD_ERR("[HVD][MUST]%s:", __FUNCTION__); \ 263*53ee8cc1Swenshuai.xi HVD_ERR(format, ##args); \ 264*53ee8cc1Swenshuai.xi } \ 265*53ee8cc1Swenshuai.xi } while (0) 266*53ee8cc1Swenshuai.xi 267*53ee8cc1Swenshuai.xi #define HVD_EX_MSG_ERR(format, args...) \ 268*53ee8cc1Swenshuai.xi do \ 269*53ee8cc1Swenshuai.xi { \ 270*53ee8cc1Swenshuai.xi if (u32UartCtrl & E_HVD_UART_CTRL_ERR) \ 271*53ee8cc1Swenshuai.xi { \ 272*53ee8cc1Swenshuai.xi HVD_ERR("[HVD][ERR]%s:", __FUNCTION__); \ 273*53ee8cc1Swenshuai.xi HVD_ERR(format, ##args); \ 274*53ee8cc1Swenshuai.xi } \ 275*53ee8cc1Swenshuai.xi } while (0) 276*53ee8cc1Swenshuai.xi 277*53ee8cc1Swenshuai.xi #if ((defined(CHIP_A1) || defined(CHIP_A7) || defined(CHIP_AMETHYST) || defined(CHIP_EMERALD) || defined(CHIP_NUGGET) || defined(CHIP_NIKON)) && defined (__aeon__)) 278*53ee8cc1Swenshuai.xi #define HVD_EX_MSG_INF(format, args...) 279*53ee8cc1Swenshuai.xi #define HVD_EX_MSG_DBG(format, args...) 280*53ee8cc1Swenshuai.xi #define HVD_EX_MSG_TRACE() 281*53ee8cc1Swenshuai.xi #else 282*53ee8cc1Swenshuai.xi #define HVD_EX_MSG_INF(format, args...) \ 283*53ee8cc1Swenshuai.xi do \ 284*53ee8cc1Swenshuai.xi { \ 285*53ee8cc1Swenshuai.xi if (u32UartCtrl & E_HVD_UART_CTRL_INFO) \ 286*53ee8cc1Swenshuai.xi { \ 287*53ee8cc1Swenshuai.xi HVD_PRINT("[HVD][INF]%s:", __FUNCTION__); \ 288*53ee8cc1Swenshuai.xi HVD_PRINT(format, ##args); \ 289*53ee8cc1Swenshuai.xi } \ 290*53ee8cc1Swenshuai.xi } while (0) 291*53ee8cc1Swenshuai.xi 292*53ee8cc1Swenshuai.xi #define HVD_EX_MSG_DBG(format, args...) \ 293*53ee8cc1Swenshuai.xi do \ 294*53ee8cc1Swenshuai.xi { \ 295*53ee8cc1Swenshuai.xi if (u32UartCtrl & E_HVD_UART_CTRL_DBG) \ 296*53ee8cc1Swenshuai.xi { \ 297*53ee8cc1Swenshuai.xi HVD_PRINT("[HVD][DBG]%s:", __FUNCTION__); \ 298*53ee8cc1Swenshuai.xi HVD_PRINT(format, ##args); \ 299*53ee8cc1Swenshuai.xi } \ 300*53ee8cc1Swenshuai.xi } while (0) 301*53ee8cc1Swenshuai.xi 302*53ee8cc1Swenshuai.xi #define HVD_EX_MSG_TRACE() \ 303*53ee8cc1Swenshuai.xi do \ 304*53ee8cc1Swenshuai.xi { \ 305*53ee8cc1Swenshuai.xi if (u32UartCtrl & E_HVD_UART_CTRL_TRACE) \ 306*53ee8cc1Swenshuai.xi { \ 307*53ee8cc1Swenshuai.xi HVD_PRINT("[HVD][TRA]%s:", __FUNCTION__); \ 308*53ee8cc1Swenshuai.xi } \ 309*53ee8cc1Swenshuai.xi } while (0) 310*53ee8cc1Swenshuai.xi #endif 311*53ee8cc1Swenshuai.xi 312*53ee8cc1Swenshuai.xi // Configs 313*53ee8cc1Swenshuai.xi #define HVD_FW_IDLE_THRESHOLD 5000 // VPU ticks 314*53ee8cc1Swenshuai.xi #define HVD_BBU_ST_ADDR_IN_BITSTREAMBUF 0x400 315*53ee8cc1Swenshuai.xi 316*53ee8cc1Swenshuai.xi #define HVD_DRV_CMD_WAIT_FINISH_TIMEOUT 100 317*53ee8cc1Swenshuai.xi 318*53ee8cc1Swenshuai.xi 319*53ee8cc1Swenshuai.xi // Util or Functions 320*53ee8cc1Swenshuai.xi #define HVD_MAX3(x,y,z) (((x)>(y) ? (x):(y)) > (z) ? ((x)>(y) ? (x):(y)):(z)) 321*53ee8cc1Swenshuai.xi #define HVD_LWORD(x) (MS_U16)((x)&0xffff) 322*53ee8cc1Swenshuai.xi #define HVD_HWORD(x) (MS_U16)(((x)>>16)&0xffff) 323*53ee8cc1Swenshuai.xi #define HVD_U32_MAX 0xffffffffUL 324*53ee8cc1Swenshuai.xi #define HVD_RV_BROKENBYUS_MASK 0x00800000 325*53ee8cc1Swenshuai.xi 326*53ee8cc1Swenshuai.xi #ifdef MSOS_TYPE_LINUX 327*53ee8cc1Swenshuai.xi #if HVD_ENABLE_MSOS_SYSTEM_CALL 328*53ee8cc1Swenshuai.xi #define HVD_VA2PA(x ) (x)//(MS_U32)(MS_VA2PA( (void*)(x))) // fixme 329*53ee8cc1Swenshuai.xi #else 330*53ee8cc1Swenshuai.xi #define HVD_VA2PA(x ) (x)//(MS_U32)(MS_VA2PA( (void*)(x))) // fixme 331*53ee8cc1Swenshuai.xi #endif 332*53ee8cc1Swenshuai.xi #else 333*53ee8cc1Swenshuai.xi #define HVD_VA2PA(x) (x) 334*53ee8cc1Swenshuai.xi #endif 335*53ee8cc1Swenshuai.xi 336*53ee8cc1Swenshuai.xi #if defined(REDLION_LINUX_KERNEL_ENVI) 337*53ee8cc1Swenshuai.xi #define HVD_PA2VA(x ) (MS_U32)MDrv_SYS_PA2NonCacheSeg((void*)(x)) 338*53ee8cc1Swenshuai.xi #else 339*53ee8cc1Swenshuai.xi #define HVD_PA2VA(x ) (MS_U32)MS_PA2KSEG1((MS_U32)(x)) 340*53ee8cc1Swenshuai.xi #endif 341*53ee8cc1Swenshuai.xi 342*53ee8cc1Swenshuai.xi #if 0//def memcpy 343*53ee8cc1Swenshuai.xi #define HVD_memcpy(x , y , z) memcpy(x, y, z) 344*53ee8cc1Swenshuai.xi #else 345*53ee8cc1Swenshuai.xi 346*53ee8cc1Swenshuai.xi #if 0 347*53ee8cc1Swenshuai.xi #define HVD_memcpy( pDstAddr, pSrcAddr, u32Size) \ 348*53ee8cc1Swenshuai.xi do { \ 349*53ee8cc1Swenshuai.xi MS_U32 i = 0; \ 350*53ee8cc1Swenshuai.xi volatile MS_U8 *Dest = (volatile MS_U8 *)(pDstAddr ); \ 351*53ee8cc1Swenshuai.xi volatile MS_U8 *Src = ( volatile MS_U8 *)(pSrcAddr) ; \ 352*53ee8cc1Swenshuai.xi for (i = 0; i < (u32Size); i++) \ 353*53ee8cc1Swenshuai.xi { \ 354*53ee8cc1Swenshuai.xi Dest[i] = Src[i]; \ 355*53ee8cc1Swenshuai.xi } \ 356*53ee8cc1Swenshuai.xi }while(0) 357*53ee8cc1Swenshuai.xi #else 358*53ee8cc1Swenshuai.xi #define HVD_memcpy( pDstAddr, pSrcAddr, u32Size) \ 359*53ee8cc1Swenshuai.xi do { \ 360*53ee8cc1Swenshuai.xi register unsigned long u32I=0; \ 361*53ee8cc1Swenshuai.xi register unsigned long u32Dst = (unsigned long)pDstAddr; \ 362*53ee8cc1Swenshuai.xi void * pSrc = (void *)pSrcAddr; \ 363*53ee8cc1Swenshuai.xi MS_U32 _u32memsize = u32Size; \ 364*53ee8cc1Swenshuai.xi if( (u32Dst % 4) || ((unsigned long)pSrc % 4) ) \ 365*53ee8cc1Swenshuai.xi { \ 366*53ee8cc1Swenshuai.xi for( u32I=0; u32I< (unsigned long)(_u32memsize); u32I++) \ 367*53ee8cc1Swenshuai.xi { \ 368*53ee8cc1Swenshuai.xi ((volatile unsigned char *)u32Dst)[u32I] = ((volatile unsigned char *)pSrc)[u32I]; \ 369*53ee8cc1Swenshuai.xi } \ 370*53ee8cc1Swenshuai.xi } \ 371*53ee8cc1Swenshuai.xi else \ 372*53ee8cc1Swenshuai.xi { \ 373*53ee8cc1Swenshuai.xi for( u32I=0; u32I < ((unsigned long)(u32Size)/4); u32I++) \ 374*53ee8cc1Swenshuai.xi { \ 375*53ee8cc1Swenshuai.xi ((volatile unsigned long *)u32Dst)[u32I] = ((volatile unsigned long *)pSrc)[u32I]; \ 376*53ee8cc1Swenshuai.xi } \ 377*53ee8cc1Swenshuai.xi if((_u32memsize)%4) \ 378*53ee8cc1Swenshuai.xi { \ 379*53ee8cc1Swenshuai.xi u32Dst += u32I*4; \ 380*53ee8cc1Swenshuai.xi pSrc = (void *)((unsigned long)pSrc + u32I*4); \ 381*53ee8cc1Swenshuai.xi for( u32I=0; u32I<((unsigned long)(_u32memsize)%4); u32I++) \ 382*53ee8cc1Swenshuai.xi { \ 383*53ee8cc1Swenshuai.xi ((volatile unsigned char *)u32Dst)[u32I] = ((volatile unsigned char *)pSrc)[u32I]; \ 384*53ee8cc1Swenshuai.xi } \ 385*53ee8cc1Swenshuai.xi } \ 386*53ee8cc1Swenshuai.xi } \ 387*53ee8cc1Swenshuai.xi }while(0) 388*53ee8cc1Swenshuai.xi #endif 389*53ee8cc1Swenshuai.xi 390*53ee8cc1Swenshuai.xi #endif 391*53ee8cc1Swenshuai.xi 392*53ee8cc1Swenshuai.xi 393*53ee8cc1Swenshuai.xi 394*53ee8cc1Swenshuai.xi #if HVD_ENABLE_MSOS_SYSTEM_CALL 395*53ee8cc1Swenshuai.xi #define HVD_Delay_ms(x) MsOS_DelayTask(x) 396*53ee8cc1Swenshuai.xi #define HVD_SYSTEM_DELAY_MS_TYPE 2 397*53ee8cc1Swenshuai.xi #elif defined(REDLION_LINUX_KERNEL_ENVI) 398*53ee8cc1Swenshuai.xi #define HVD_Delay_ms(x) msleep(x) 399*53ee8cc1Swenshuai.xi //#define HVD_Delay_ms(x) MHal_H264_Delay_ms(x) 400*53ee8cc1Swenshuai.xi #define HVD_SYSTEM_DELAY_MS_TYPE 3 401*53ee8cc1Swenshuai.xi #else 402*53ee8cc1Swenshuai.xi #define HVD_Delay_ms(x) \ 403*53ee8cc1Swenshuai.xi do { \ 404*53ee8cc1Swenshuai.xi volatile MS_U32 ticks=0; \ 405*53ee8cc1Swenshuai.xi while( ticks < ( ((MS_U32)(x)) <<13) ) \ 406*53ee8cc1Swenshuai.xi { \ 407*53ee8cc1Swenshuai.xi ticks++; \ 408*53ee8cc1Swenshuai.xi } \ 409*53ee8cc1Swenshuai.xi } while(0) 410*53ee8cc1Swenshuai.xi #define HVD_SYSTEM_DELAY_MS_TYPE 0 411*53ee8cc1Swenshuai.xi #endif // HVD_ENABLE_MSOS_SYSTEM_CALL 412*53ee8cc1Swenshuai.xi 413*53ee8cc1Swenshuai.xi 414*53ee8cc1Swenshuai.xi #define HVD_DumpMemory( addr, size , ascii , NonCacheMask) \ 415*53ee8cc1Swenshuai.xi do{ \ 416*53ee8cc1Swenshuai.xi MS_U32 i = 0; \ 417*53ee8cc1Swenshuai.xi MS_U32 j = 0; \ 418*53ee8cc1Swenshuai.xi MS_U8* temp = (MS_U8*)addr; \ 419*53ee8cc1Swenshuai.xi MS_U8 string[17] ; \ 420*53ee8cc1Swenshuai.xi HVD_EX_MSG_DBG("HVD Dump Memory addr: 0x%x ; size: 0x%x \r\n", addr, size); \ 421*53ee8cc1Swenshuai.xi temp = (MS_U8*)(((MS_U32)temp) | NonCacheMask); \ 422*53ee8cc1Swenshuai.xi memset(string , 0 , sizeof(string)); \ 423*53ee8cc1Swenshuai.xi for (j = 0; j < (size >> 4); j++) \ 424*53ee8cc1Swenshuai.xi { \ 425*53ee8cc1Swenshuai.xi if (ascii) \ 426*53ee8cc1Swenshuai.xi { \ 427*53ee8cc1Swenshuai.xi for (i = 0; i < 16; i++) \ 428*53ee8cc1Swenshuai.xi { \ 429*53ee8cc1Swenshuai.xi if (*(temp + i) >= 30 && *(temp + i) <= 126) \ 430*53ee8cc1Swenshuai.xi string[i] = *(temp + i); \ 431*53ee8cc1Swenshuai.xi else \ 432*53ee8cc1Swenshuai.xi string[i] = '.'; \ 433*53ee8cc1Swenshuai.xi } \ 434*53ee8cc1Swenshuai.xi HVD_EX_MSG_DBG("0x%08x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %s\n" \ 435*53ee8cc1Swenshuai.xi , j << 4 , *temp, *(temp + 1), *(temp + 2), *(temp + 3), *(temp + 4), *(temp + 5), *(temp + 6), *(temp + 7), *(temp + 8), *(temp + 9), *(temp + 10), *(temp + 11), *(temp + 12), *(temp + 13), *(temp + 14), *(temp + 15) , string); \ 436*53ee8cc1Swenshuai.xi } \ 437*53ee8cc1Swenshuai.xi else \ 438*53ee8cc1Swenshuai.xi { \ 439*53ee8cc1Swenshuai.xi HVD_EX_MSG_DBG("0x%08x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n" \ 440*53ee8cc1Swenshuai.xi , j << 4 , *temp, *(temp + 1), *(temp + 2), *(temp + 3), *(temp + 4), *(temp + 5), *(temp + 6), *(temp + 7), *(temp + 8), *(temp + 9), *(temp + 10), *(temp + 11), *(temp + 12), *(temp + 13), *(temp + 14), *(temp + 15)); \ 441*53ee8cc1Swenshuai.xi } \ 442*53ee8cc1Swenshuai.xi temp += 16; \ 443*53ee8cc1Swenshuai.xi } \ 444*53ee8cc1Swenshuai.xi HVD_EX_MSG_DBG("0x%08x " , j << 4); \ 445*53ee8cc1Swenshuai.xi memset(string , 0 , sizeof(string)); \ 446*53ee8cc1Swenshuai.xi for (i = 0; i < (size & 0x0f); i++) \ 447*53ee8cc1Swenshuai.xi { \ 448*53ee8cc1Swenshuai.xi if (*(temp + i) >= 30 && *(temp + i) <= 126) \ 449*53ee8cc1Swenshuai.xi string[i] = *(temp + i); \ 450*53ee8cc1Swenshuai.xi else \ 451*53ee8cc1Swenshuai.xi string[i] = '.'; \ 452*53ee8cc1Swenshuai.xi HVD_EX_MSG_DBG("%02x ", *(MS_U8*)(temp + i)); \ 453*53ee8cc1Swenshuai.xi } \ 454*53ee8cc1Swenshuai.xi if (ascii) \ 455*53ee8cc1Swenshuai.xi { \ 456*53ee8cc1Swenshuai.xi for (; i < 16 ; i++) \ 457*53ee8cc1Swenshuai.xi HVD_EX_MSG_DBG(" "); \ 458*53ee8cc1Swenshuai.xi HVD_EX_MSG_DBG(" %s\n" , string); \ 459*53ee8cc1Swenshuai.xi } \ 460*53ee8cc1Swenshuai.xi else \ 461*53ee8cc1Swenshuai.xi HVD_EX_MSG_DBG("\n"); \ 462*53ee8cc1Swenshuai.xi }while(0) 463*53ee8cc1Swenshuai.xi 464*53ee8cc1Swenshuai.xi 465*53ee8cc1Swenshuai.xi #if HVD_ENABLE_MSOS_SYSTEM_CALL 466*53ee8cc1Swenshuai.xi #define HVD_GetSysTime_ms() MsOS_GetSystemTime() 467*53ee8cc1Swenshuai.xi #define HVD_SYSTEM_CLOCK_TYPE 1 468*53ee8cc1Swenshuai.xi #elif defined(REDLION_LINUX_KERNEL_ENVI) 469*53ee8cc1Swenshuai.xi #define HVD_GetSysTime_ms() MHal_H264_GetSyetemTime() 470*53ee8cc1Swenshuai.xi #define HVD_SYSTEM_CLOCK_TYPE 2 471*53ee8cc1Swenshuai.xi #else 472*53ee8cc1Swenshuai.xi #define HVD_GetSysTime_ms() 1 473*53ee8cc1Swenshuai.xi #define HVD_SYSTEM_CLOCK_TYPE 0 474*53ee8cc1Swenshuai.xi #endif // MsOS_GetSystemTime 475*53ee8cc1Swenshuai.xi 476*53ee8cc1Swenshuai.xi #if HVD_ENABLE_MSOS_SYSTEM_CALL 477*53ee8cc1Swenshuai.xi #include "asmCPU.h" 478*53ee8cc1Swenshuai.xi #define HAL_MEMORY_BARRIER() MAsm_CPU_Sync() 479*53ee8cc1Swenshuai.xi #define HVD_MEMORY_BARRIER_TYPE 3 480*53ee8cc1Swenshuai.xi #else 481*53ee8cc1Swenshuai.xi #if defined (__mips__) 482*53ee8cc1Swenshuai.xi #define HAL_MEMORY_BARRIER() __asm__ volatile ("sync;") 483*53ee8cc1Swenshuai.xi #define HVD_MEMORY_BARRIER_TYPE 1 484*53ee8cc1Swenshuai.xi #elif defined (__aeon__) 485*53ee8cc1Swenshuai.xi #ifdef __AEONR2__ 486*53ee8cc1Swenshuai.xi #define HAL_MEMORY_BARRIER() __asm__ volatile ("b.syncwritebuffer;") 487*53ee8cc1Swenshuai.xi #define HVD_MEMORY_BARRIER_TYPE 22 488*53ee8cc1Swenshuai.xi #else 489*53ee8cc1Swenshuai.xi #if defined( CHIP_T2 ) 490*53ee8cc1Swenshuai.xi #define HAL_MEMORY_BARRIER() __asm__ volatile ("l.msync;") 491*53ee8cc1Swenshuai.xi #define HVD_MEMORY_BARRIER_TYPE 21 492*53ee8cc1Swenshuai.xi #else 493*53ee8cc1Swenshuai.xi #define HAL_MEMORY_BARRIER() __asm__ volatile ("l.syncwritebuffer;") 494*53ee8cc1Swenshuai.xi #define HVD_MEMORY_BARRIER_TYPE 23 495*53ee8cc1Swenshuai.xi #endif 496*53ee8cc1Swenshuai.xi #endif 497*53ee8cc1Swenshuai.xi #else 498*53ee8cc1Swenshuai.xi #define HAL_MEMORY_BARRIER() 499*53ee8cc1Swenshuai.xi #define HVD_MEMORY_BARRIER_TYPE 0 500*53ee8cc1Swenshuai.xi #endif 501*53ee8cc1Swenshuai.xi #endif 502*53ee8cc1Swenshuai.xi 503*53ee8cc1Swenshuai.xi #define HVD_DRV_MODE_EXTERNAL_DS_BUFFER (1 << 0) 504*53ee8cc1Swenshuai.xi 505*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 506*53ee8cc1Swenshuai.xi // Type and Structure 507*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 508*53ee8cc1Swenshuai.xi typedef void (*HVD_ISRCallBack)(MS_U32 u32Sid); 509*53ee8cc1Swenshuai.xi 510*53ee8cc1Swenshuai.xi typedef enum 511*53ee8cc1Swenshuai.xi { 512*53ee8cc1Swenshuai.xi E_HVD_RETURN_FAIL=0, 513*53ee8cc1Swenshuai.xi E_HVD_RETURN_SUCCESS, 514*53ee8cc1Swenshuai.xi E_HVD_RETURN_INVALID_PARAMETER, 515*53ee8cc1Swenshuai.xi E_HVD_RETURN_ILLEGAL_ACCESS, 516*53ee8cc1Swenshuai.xi E_HVD_RETURN_HARDWARE_BREAKDOWN, 517*53ee8cc1Swenshuai.xi E_HVD_RETURN_OUTOF_MEMORY, 518*53ee8cc1Swenshuai.xi E_HVD_RETURN_UNSUPPORTED, 519*53ee8cc1Swenshuai.xi E_HVD_RETURN_TIMEOUT, 520*53ee8cc1Swenshuai.xi E_HVD_RETURN_NOTREADY, 521*53ee8cc1Swenshuai.xi E_HVD_RETURN_MEMORY_OVERWIRTE, 522*53ee8cc1Swenshuai.xi E_HVD_RETURN_ES_FULL, 523*53ee8cc1Swenshuai.xi E_HVD_RETURN_RE_INIT, 524*53ee8cc1Swenshuai.xi E_HVD_RETURN_NOT_RUNNING, 525*53ee8cc1Swenshuai.xi } HVD_Return; 526*53ee8cc1Swenshuai.xi 527*53ee8cc1Swenshuai.xi typedef enum 528*53ee8cc1Swenshuai.xi { 529*53ee8cc1Swenshuai.xi // share memory 530*53ee8cc1Swenshuai.xi E_HVD_GDATA_SHARE_MEM=0x1000, 531*53ee8cc1Swenshuai.xi // switch 532*53ee8cc1Swenshuai.xi //E_HVD_GDATA_SEMAPHORE, 533*53ee8cc1Swenshuai.xi E_HVD_GDATA_DISP_INFO_ADDR=(0x0100+E_HVD_GDATA_SHARE_MEM), 534*53ee8cc1Swenshuai.xi // report 535*53ee8cc1Swenshuai.xi E_HVD_GDATA_PTS=(0x0200+E_HVD_GDATA_SHARE_MEM), 536*53ee8cc1Swenshuai.xi E_HVD_GDATA_U64PTS, 537*53ee8cc1Swenshuai.xi E_HVD_GDATA_DECODE_CNT, 538*53ee8cc1Swenshuai.xi E_HVD_GDATA_DATA_ERROR_CNT, 539*53ee8cc1Swenshuai.xi E_HVD_GDATA_DEC_ERROR_CNT, 540*53ee8cc1Swenshuai.xi E_HVD_GDATA_ERROR_CODE, 541*53ee8cc1Swenshuai.xi E_HVD_GDATA_VPU_IDLE_CNT, 542*53ee8cc1Swenshuai.xi E_HVD_GDATA_DISP_FRM_INFO, 543*53ee8cc1Swenshuai.xi E_HVD_GDATA_DEC_FRM_INFO, 544*53ee8cc1Swenshuai.xi E_HVD_GDATA_ES_LEVEL, 545*53ee8cc1Swenshuai.xi E_HVD_GDATA_PTS_STC_DIFF, 546*53ee8cc1Swenshuai.xi #if HVD_ENABLE_MVC 547*53ee8cc1Swenshuai.xi E_HVD_GDATA_DISP_FRM_INFO_SUB, 548*53ee8cc1Swenshuai.xi E_HVD_GDATA_DEC_FRM_INFO_SUB, 549*53ee8cc1Swenshuai.xi #endif 550*53ee8cc1Swenshuai.xi E_HVD_GDATA_HVD_HW_MAX_PIXEL, 551*53ee8cc1Swenshuai.xi 552*53ee8cc1Swenshuai.xi // user data 553*53ee8cc1Swenshuai.xi E_HVD_GDATA_USERDATA_WPTR, 554*53ee8cc1Swenshuai.xi E_HVD_GDATA_USERDATA_IDX_TBL_ADDR, 555*53ee8cc1Swenshuai.xi E_HVD_GDATA_USERDATA_PACKET_TBL_ADDR, 556*53ee8cc1Swenshuai.xi E_HVD_GDATA_USERDATA_PACKET_SIZE, 557*53ee8cc1Swenshuai.xi E_HVD_GDATA_USERDATA_IDX_TBL_SIZE, 558*53ee8cc1Swenshuai.xi E_HVD_GDATA_USERDATA_PACKET_TBL_SIZE, 559*53ee8cc1Swenshuai.xi // report - modes 560*53ee8cc1Swenshuai.xi E_HVD_GDATA_IS_SHOW_ERR_FRM, 561*53ee8cc1Swenshuai.xi E_HVD_GDATA_IS_REPEAT_LAST_FIELD, 562*53ee8cc1Swenshuai.xi E_HVD_GDATA_IS_ERR_CONCEAL, 563*53ee8cc1Swenshuai.xi E_HVD_GDATA_IS_SYNC_ON, 564*53ee8cc1Swenshuai.xi E_HVD_GDATA_IS_PLAYBACK_FINISH, 565*53ee8cc1Swenshuai.xi E_HVD_GDATA_SYNC_MODE, 566*53ee8cc1Swenshuai.xi E_HVD_GDATA_SKIP_MODE, 567*53ee8cc1Swenshuai.xi E_HVD_GDATA_DROP_MODE, 568*53ee8cc1Swenshuai.xi E_HVD_GDATA_DISPLAY_DURATION, 569*53ee8cc1Swenshuai.xi E_HVD_GDATA_FRC_MODE, 570*53ee8cc1Swenshuai.xi E_HVD_GDATA_NEXT_PTS, 571*53ee8cc1Swenshuai.xi E_HVD_GDATA_DISP_Q_SIZE, 572*53ee8cc1Swenshuai.xi E_HVD_GDATA_DISP_Q_PTR, 573*53ee8cc1Swenshuai.xi E_HVD_GDATA_NEXT_DISP_FRM_INFO, 574*53ee8cc1Swenshuai.xi E_HVD_GDATA_REAL_FRAMERATE, 575*53ee8cc1Swenshuai.xi E_HVD_GDATA_IS_ORI_INTERLACE_MODE, 576*53ee8cc1Swenshuai.xi E_HVD_GDATA_FRM_PACKING_SEI_DATA, 577*53ee8cc1Swenshuai.xi E_HVD_GDATA_TYPE_FRAME_MBS_ONLY_FLAG, 578*53ee8cc1Swenshuai.xi E_HVD_GDATA_TYPE_IS_LEAST_DISPQ_SIZE, 579*53ee8cc1Swenshuai.xi E_HVD_GDATA_FIELD_PIC_FLAG, 580*53ee8cc1Swenshuai.xi E_HVD_GDATA_FW_STATUS_FLAG, 581*53ee8cc1Swenshuai.xi 582*53ee8cc1Swenshuai.xi // internal control 583*53ee8cc1Swenshuai.xi E_HVD_GDATA_IS_1ST_FRM_RDY=(0x0300+E_HVD_GDATA_SHARE_MEM), 584*53ee8cc1Swenshuai.xi E_HVD_GDATA_IS_I_FRM_FOUND, 585*53ee8cc1Swenshuai.xi E_HVD_GDATA_IS_SYNC_START, 586*53ee8cc1Swenshuai.xi E_HVD_GDATA_IS_SYNC_REACH, 587*53ee8cc1Swenshuai.xi E_HVD_GDATA_FW_VERSION_ID, 588*53ee8cc1Swenshuai.xi E_HVD_GDATA_FW_IF_VERSION_ID, 589*53ee8cc1Swenshuai.xi E_HVD_GDATA_BBU_Q_NUMB, 590*53ee8cc1Swenshuai.xi E_HVD_GDATA_DEC_Q_NUMB, 591*53ee8cc1Swenshuai.xi E_HVD_GDATA_DISP_Q_NUMB, 592*53ee8cc1Swenshuai.xi E_HVD_GDATA_PTS_Q_NUMB, 593*53ee8cc1Swenshuai.xi E_HVD_GDATA_FW_INIT_DONE, 594*53ee8cc1Swenshuai.xi E_HVD_GDATA_FW_IS_IQMEM_SUPPORT, 595*53ee8cc1Swenshuai.xi E_HVD_GDATA_FW_IQMEM_CTRL, 596*53ee8cc1Swenshuai.xi E_HVD_GDATA_FW_FLUSH_STATUS, 597*53ee8cc1Swenshuai.xi E_HVD_GDATA_FW_CODEC_TYPE, 598*53ee8cc1Swenshuai.xi E_HVD_GDATA_FW_ES_BUF_STATUS, 599*53ee8cc1Swenshuai.xi E_HVD_GDATA_TS_SEAMLESS_STATUS, 600*53ee8cc1Swenshuai.xi 601*53ee8cc1Swenshuai.xi // debug 602*53ee8cc1Swenshuai.xi E_HVD_GDATA_SKIP_CNT=(0x0400+E_HVD_GDATA_SHARE_MEM), 603*53ee8cc1Swenshuai.xi E_HVD_GDATA_GOP_CNT, 604*53ee8cc1Swenshuai.xi E_HVD_GDATA_DISP_CNT, 605*53ee8cc1Swenshuai.xi E_HVD_GDATA_DROP_CNT, 606*53ee8cc1Swenshuai.xi E_HVD_GDATA_DISP_STC, 607*53ee8cc1Swenshuai.xi E_HVD_GDATA_VSYNC_CNT, 608*53ee8cc1Swenshuai.xi E_HVD_GDATA_MAIN_LOOP_CNT, 609*53ee8cc1Swenshuai.xi // AVC 610*53ee8cc1Swenshuai.xi E_HVD_GDATA_AVC_LEVEL_IDC =(0x0500+E_HVD_GDATA_SHARE_MEM), 611*53ee8cc1Swenshuai.xi E_HVD_GDATA_AVC_LOW_DELAY, 612*53ee8cc1Swenshuai.xi E_HVD_GDATA_AVC_VUI_DISP_INFO, 613*53ee8cc1Swenshuai.xi //E_HVD_GDATA_AVC_SPS_ADDR, 614*53ee8cc1Swenshuai.xi 615*53ee8cc1Swenshuai.xi // SRAM 616*53ee8cc1Swenshuai.xi E_HVD_GDATA_SRAM=0x2000, 617*53ee8cc1Swenshuai.xi //E_HVD_GDATA_AVC_NAL_CNT, 618*53ee8cc1Swenshuai.xi 619*53ee8cc1Swenshuai.xi // Mailbox or Reg 620*53ee8cc1Swenshuai.xi E_HVD_GDATA_MBOX=0x3000, 621*53ee8cc1Swenshuai.xi E_HVD_GDATA_FW_STATE, // HVD RISC MBOX 0 (esp. FW init done) 622*53ee8cc1Swenshuai.xi E_HVD_GDATA_IS_DISP_INFO_UNCOPYED, // HVD RISC MBOX 0 (rdy only) 623*53ee8cc1Swenshuai.xi E_HVD_GDATA_IS_DISP_INFO_CHANGE, // HVD RISC MBOX 0 (rdy only) 624*53ee8cc1Swenshuai.xi E_HVD_GDATA_HVD_ISR_STATUS, // HVD RISC MBOX 1 (value only) 625*53ee8cc1Swenshuai.xi E_HVD_GDATA_IS_FRAME_SHOWED, // HVD HI mbox 0 ( showed: rdy cleared ; not show: rdy enable ) 626*53ee8cc1Swenshuai.xi E_HVD_GDATA_ES_READ_PTR, // 627*53ee8cc1Swenshuai.xi E_HVD_GDATA_ES_WRITE_PTR, // 628*53ee8cc1Swenshuai.xi E_HVD_GDATA_BBU_READ_PTR, // 629*53ee8cc1Swenshuai.xi E_HVD_GDATA_BBU_WRITE_PTR, // 630*53ee8cc1Swenshuai.xi E_HVD_GDATA_BBU_WRITE_PTR_FIRED, // 631*53ee8cc1Swenshuai.xi E_HVD_GDATA_VPU_PC_CNT, // 632*53ee8cc1Swenshuai.xi E_HVD_GDATA_ES_QUANTITY, 633*53ee8cc1Swenshuai.xi 634*53ee8cc1Swenshuai.xi // FW def 635*53ee8cc1Swenshuai.xi E_HVD_GDATA_FW_DEF=0x4000, 636*53ee8cc1Swenshuai.xi E_HVD_GDATA_FW_MAX_DUMMY_FIFO, // AVC: 256Bytes AVS: 2kB RM:??? 637*53ee8cc1Swenshuai.xi E_HVD_GDATA_FW_AVC_MAX_VIDEO_DELAY, 638*53ee8cc1Swenshuai.xi E_HVD_GDATA_FW_BBU_TOTAL_TBL_ENTRY, 639*53ee8cc1Swenshuai.xi E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB, 640*53ee8cc1Swenshuai.xi E_HVD_GDATA_FW_PTS_TOTAL_ENTRY_NUMB, 641*53ee8cc1Swenshuai.xi E_HVD_GDATA_FW_DUMMY_WRITE_ADDR, 642*53ee8cc1Swenshuai.xi E_HVD_GDATA_FW_DS_BUF_ADDR, 643*53ee8cc1Swenshuai.xi E_HVD_GDATA_FW_DS_BUF_SIZE, 644*53ee8cc1Swenshuai.xi E_HVD_GDATA_FW_DS_VECTOR_DEPTH, 645*53ee8cc1Swenshuai.xi E_HVD_GDATA_FW_DS_INFO_ADDR, 646*53ee8cc1Swenshuai.xi E_HVD_GDATA_FW_DS_IS_ENABLED, 647*53ee8cc1Swenshuai.xi E_HVD_GDATA_FW_VSYNC_BRIDGE_ADDR, 648*53ee8cc1Swenshuai.xi // BBU size 649*53ee8cc1Swenshuai.xi // default pitch number 650*53ee8cc1Swenshuai.xi // 651*53ee8cc1Swenshuai.xi } HVD_GetData; 652*53ee8cc1Swenshuai.xi 653*53ee8cc1Swenshuai.xi typedef enum 654*53ee8cc1Swenshuai.xi { 655*53ee8cc1Swenshuai.xi // share memory 656*53ee8cc1Swenshuai.xi E_HVD_SDATA_SHARE_MEM = 0x1000, 657*53ee8cc1Swenshuai.xi // switch 658*53ee8cc1Swenshuai.xi E_HVD_SDATA_FRAMEBUF_ADDR = (0x0100 + E_HVD_SDATA_SHARE_MEM), 659*53ee8cc1Swenshuai.xi E_HVD_SDATA_FRAMEBUF_SIZE, 660*53ee8cc1Swenshuai.xi E_HVD_SDATA_ERROR_CODE, 661*53ee8cc1Swenshuai.xi E_HVD_SDATA_DISP_INFO_TH, 662*53ee8cc1Swenshuai.xi E_HVD_SDATA_FW_FLUSH_STATUS, 663*53ee8cc1Swenshuai.xi E_HVD_SDATA_DMX_FRAMERATE, 664*53ee8cc1Swenshuai.xi E_HVD_SDATA_DMX_FRAMERATEBASE, 665*53ee8cc1Swenshuai.xi E_HVD_SDATA_MIU_SEL, 666*53ee8cc1Swenshuai.xi // display info 667*53ee8cc1Swenshuai.xi //E_HVD_SDATA_HOR_SIZE=(0x0200|E_HVD_SDATA_SHARE_MEM), 668*53ee8cc1Swenshuai.xi // report 669*53ee8cc1Swenshuai.xi //E_HVD_SDATA_PTS=0x0200, 670*53ee8cc1Swenshuai.xi // internal control 671*53ee8cc1Swenshuai.xi //E_HVD_SDATA_IDLE_CNT=0x0300, 672*53ee8cc1Swenshuai.xi // debug 673*53ee8cc1Swenshuai.xi //E_HVD_SDATA_SKIP_CNT=0x0400, 674*53ee8cc1Swenshuai.xi // RM 675*53ee8cc1Swenshuai.xi E_HVD_SDATA_RM_PICTURE_SIZES = (0x0500 | E_HVD_SDATA_SHARE_MEM), 676*53ee8cc1Swenshuai.xi 677*53ee8cc1Swenshuai.xi // SRAM 678*53ee8cc1Swenshuai.xi // Mailbox or Reg 679*53ee8cc1Swenshuai.xi E_HVD_SDATA_MAILBOX = 0x3000, 680*53ee8cc1Swenshuai.xi E_HVD_SDATA_FW_CODE_TYPE = (0x0000 | E_HVD_SDATA_MAILBOX), 681*53ee8cc1Swenshuai.xi E_HVD_SDATA_TRIGGER_DISP, 682*53ee8cc1Swenshuai.xi E_HVD_SDATA_GET_DISP_INFO_DONE, 683*53ee8cc1Swenshuai.xi E_HVD_SDATA_GET_DISP_INFO_START, 684*53ee8cc1Swenshuai.xi 685*53ee8cc1Swenshuai.xi // FW def 686*53ee8cc1Swenshuai.xi E_HVD_SDATA_FW_DEF = 0x4000, 687*53ee8cc1Swenshuai.xi E_HVD_SDATA_VIRTUAL_BOX_WIDTH, 688*53ee8cc1Swenshuai.xi E_HVD_SDATA_VIRTUAL_BOX_HEIGHT, 689*53ee8cc1Swenshuai.xi //modify the state of the frame in DispQueue 690*53ee8cc1Swenshuai.xi E_HVD_SDATA_DISPQ_STATUS_VIEW, 691*53ee8cc1Swenshuai.xi E_HVD_SDATA_DISPQ_STATUS_DISP, 692*53ee8cc1Swenshuai.xi E_HVD_SDATA_DISPQ_STATUS_FREE, 693*53ee8cc1Swenshuai.xi E_HVD_SDATA_FW_IQMEM_CTRL, 694*53ee8cc1Swenshuai.xi E_HVD_SDATA_FW_IQMEM_ENABLE_IF_SUPPORT, 695*53ee8cc1Swenshuai.xi } HVD_SetData; 696*53ee8cc1Swenshuai.xi 697*53ee8cc1Swenshuai.xi typedef enum 698*53ee8cc1Swenshuai.xi { 699*53ee8cc1Swenshuai.xi E_HVD_UART_CTRL_DISABLE = BIT(4), 700*53ee8cc1Swenshuai.xi E_HVD_UART_CTRL_ERR = BIT(0), 701*53ee8cc1Swenshuai.xi E_HVD_UART_CTRL_INFO = BIT(1), 702*53ee8cc1Swenshuai.xi E_HVD_UART_CTRL_DBG = BIT(2), 703*53ee8cc1Swenshuai.xi E_HVD_UART_CTRL_FW = BIT(3), 704*53ee8cc1Swenshuai.xi E_HVD_UART_CTRL_MUST = BIT(4), 705*53ee8cc1Swenshuai.xi E_HVD_UART_CTRL_TRACE = BIT(5), 706*53ee8cc1Swenshuai.xi } HVD_Uart_Ctrl; 707*53ee8cc1Swenshuai.xi 708*53ee8cc1Swenshuai.xi typedef enum 709*53ee8cc1Swenshuai.xi { 710*53ee8cc1Swenshuai.xi E_HVD_INIT_HW_MASK = BMASK(3:0), ///< HW Type, should same as HVD_Codec_Type in fwHVD_if.h 711*53ee8cc1Swenshuai.xi E_HVD_INIT_HW_AVC = BITS(3:0, 0), ///< HW deflaut: AVC 0X00 712*53ee8cc1Swenshuai.xi E_HVD_INIT_HW_AVS = BITS(3:0, 1), ///< HW: AVS 0X01 713*53ee8cc1Swenshuai.xi E_HVD_INIT_HW_RM = BITS(3:0, 2), ///< HW: RM 0X10 714*53ee8cc1Swenshuai.xi E_HVD_INIT_HW_MVC = BITS(3:0, 3), ///< HW: MVC 0x11 715*53ee8cc1Swenshuai.xi E_HVD_INIT_HW_VP8 = BITS(3:0, 4), ///< HW: VP8 0X100 716*53ee8cc1Swenshuai.xi E_HVD_INIT_HW_MJPEG = BITS(3:0, 5), ///< HW: MJPEG 0x101 717*53ee8cc1Swenshuai.xi E_HVD_INIT_HW_VP6 = BITS(3:0, 6), ///< HW: VP6 0x110 718*53ee8cc1Swenshuai.xi E_HVD_INIT_HW_HEVC = BITS(3:0, 7), ///< HW: HEVC 0x111 719*53ee8cc1Swenshuai.xi E_HVD_INIT_HW_VP9 = BITS(3:0, 8), ///< HW: VP9 0x1000 720*53ee8cc1Swenshuai.xi E_HVD_INIT_MAIN_MASK = BMASK(5:4), ///< main type 721*53ee8cc1Swenshuai.xi E_HVD_INIT_MAIN_FILE_RAW = BITS(5:4, 0), ///< main type: default: 0X00 722*53ee8cc1Swenshuai.xi E_HVD_INIT_MAIN_FILE_TS = BITS(5:4, 1), ///< main type: 0X01 723*53ee8cc1Swenshuai.xi E_HVD_INIT_MAIN_LIVE_STREAM = BITS(5:4, 2), ///< main type: 0X10 724*53ee8cc1Swenshuai.xi E_HVD_INIT_INPUT_MASK = BMASK(6:6), ///< process path for filling BBU table: file mode. use drive; TSP: use tsp mode 725*53ee8cc1Swenshuai.xi E_HVD_INIT_INPUT_TSP = BITS(6:6, 0), ///< tsp input( default) 726*53ee8cc1Swenshuai.xi E_HVD_INIT_INPUT_DRV = BITS(6:6, 1), ///< driver input 727*53ee8cc1Swenshuai.xi E_HVD_INIT_START_CODE_MASK = BMASK(7:7), ///< AVC FILE MODE ONLY: mkv, mp4 container use. 728*53ee8cc1Swenshuai.xi E_HVD_INIT_START_CODE_REMAINED = BITS(7:7, 0), ///< start code remained.(Defualt) 729*53ee8cc1Swenshuai.xi E_HVD_INIT_START_CODE_REMOVED = BITS(7:7, 1), ///< start code removed. 730*53ee8cc1Swenshuai.xi E_HVD_INIT_UTOPIA_ENVI = BIT(8), ///< check MIU sel and set it 731*53ee8cc1Swenshuai.xi E_HVD_INIT_DBG_FW = BIT(9), ///< check FW is debug version or not 732*53ee8cc1Swenshuai.xi E_HVD_INIT_DUAL_ES_MASK = BMASK(10:10), ///< Dual ES buffer iput. 733*53ee8cc1Swenshuai.xi E_HVD_INIT_DUAL_ES_DISABLE = BITS(10:10, 0), ///< Disable Dual ES buffer input. 734*53ee8cc1Swenshuai.xi E_HVD_INIT_DUAL_ES_ENABLE = BITS(10:10, 1), ///< Enable Dual ES buffer input. 735*53ee8cc1Swenshuai.xi //E_HVD_INIT_ENABLE_ISR_DISP = BIT( 8) , ///< enable display ISR. ISR occurs at every Vsync. 736*53ee8cc1Swenshuai.xi } HVD_Init_Mode_Flag; 737*53ee8cc1Swenshuai.xi 738*53ee8cc1Swenshuai.xi typedef enum 739*53ee8cc1Swenshuai.xi { 740*53ee8cc1Swenshuai.xi E_HVD_PLAY_NORMAL, 741*53ee8cc1Swenshuai.xi E_HVD_PLAY_PAUSE, 742*53ee8cc1Swenshuai.xi E_HVD_PLAY_STEP_DISPLAY, 743*53ee8cc1Swenshuai.xi } HVD_Play_Type; 744*53ee8cc1Swenshuai.xi 745*53ee8cc1Swenshuai.xi typedef enum 746*53ee8cc1Swenshuai.xi { 747*53ee8cc1Swenshuai.xi E_HVD_ESB_LEVEL_NORMAL = 0, 748*53ee8cc1Swenshuai.xi E_HVD_ESB_LEVEL_UNDER = BIT(0), 749*53ee8cc1Swenshuai.xi E_HVD_ESB_LEVEL_OVER = BIT(1), 750*53ee8cc1Swenshuai.xi } HVD_ESBuf_Level; 751*53ee8cc1Swenshuai.xi 752*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 753*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_FWInputSourceType 754*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: The type of fw binary input source 755*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 756*53ee8cc1Swenshuai.xi typedef enum 757*53ee8cc1Swenshuai.xi { 758*53ee8cc1Swenshuai.xi E_HVD_FW_INPUT_SOURCE_NONE, ///< No input fw. 759*53ee8cc1Swenshuai.xi E_HVD_FW_INPUT_SOURCE_DRAM, ///< input source from DRAM. 760*53ee8cc1Swenshuai.xi E_HVD_FW_INPUT_SOURCE_FLASH, ///< input source from FLASH. 761*53ee8cc1Swenshuai.xi } HVD_FWInputSourceType; 762*53ee8cc1Swenshuai.xi 763*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 764*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_FB_Reduction_Type 765*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description: The type of frame buffer reduction type 766*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 767*53ee8cc1Swenshuai.xi typedef enum 768*53ee8cc1Swenshuai.xi { 769*53ee8cc1Swenshuai.xi E_HVD_FB_REDUCTION_TYPE_NONE = 0, ///< FB reduction disable 770*53ee8cc1Swenshuai.xi E_HVD_FB_REDUCTION_TYPE_1_2 = 1, ///< FB reduction 1/2 771*53ee8cc1Swenshuai.xi E_HVD_FB_REDUCTION_TYPE_1_4 = 2, ///< FB reduction 1/4 772*53ee8cc1Swenshuai.xi } HVD_FBReductionType; 773*53ee8cc1Swenshuai.xi 774*53ee8cc1Swenshuai.xi typedef enum 775*53ee8cc1Swenshuai.xi { 776*53ee8cc1Swenshuai.xi E_VDEC_EX_MAIN_VIEW = 0, ///< MVC main view 777*53ee8cc1Swenshuai.xi E_VDEC_EX_SUB_VIEW, ///< MVC sub view 778*53ee8cc1Swenshuai.xi } VDEC_EX_View; 779*53ee8cc1Swenshuai.xi 780*53ee8cc1Swenshuai.xi typedef enum 781*53ee8cc1Swenshuai.xi { 782*53ee8cc1Swenshuai.xi E_HVD_SECURE_MODE_NONE = 0, /// None secure 783*53ee8cc1Swenshuai.xi E_HVD_SECURE_MODE_TRUSTZONE /// Secure for TrustZone 784*53ee8cc1Swenshuai.xi } HVD_SECURE_MODE; 785*53ee8cc1Swenshuai.xi 786*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 787*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_EX_MemMap 788*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description: Store the HVD driver config 789*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 790*53ee8cc1Swenshuai.xi typedef struct 791*53ee8cc1Swenshuai.xi { 792*53ee8cc1Swenshuai.xi MS_U32 u32MIU1BaseAddr; //!< the physical memory start address of MIU 1 base address. 0: default value. 793*53ee8cc1Swenshuai.xi MS_U32 u32MIU2BaseAddr; //!< the physical memory start address of MIU 2 base address. 0: default value. 794*53ee8cc1Swenshuai.xi MS_U32 u32FWBinaryVAddr; //!< virtual address of input FW binary in DRAM 795*53ee8cc1Swenshuai.xi MS_U32 u32FWBinaryAddr; //!< the physical memory start address in Flash memory of FW code source. 796*53ee8cc1Swenshuai.xi MS_U32 u32FWBinarySize; //!< the FW code size 797*53ee8cc1Swenshuai.xi MS_U32 u32VLCBinaryVAddr; ///< VLC table binary data buffer start address 798*53ee8cc1Swenshuai.xi MS_U32 u32VLCBinaryAddr; ///< VLC table binary data buffer start address 799*53ee8cc1Swenshuai.xi MS_U32 u32VLCBinarySize; ///<VLC table binary data buffer size 800*53ee8cc1Swenshuai.xi MS_U32 u32CodeBufVAddr; //!< the virtual memory start address of code buffer 801*53ee8cc1Swenshuai.xi MS_U32 u32CodeBufAddr; //!< the physical memory start address of code buffer 802*53ee8cc1Swenshuai.xi MS_U32 u32CodeBufSize; //!< the code buffer size 803*53ee8cc1Swenshuai.xi MS_U32 u32FrameBufVAddr; //!< the virtual memory start address of frame buffer 804*53ee8cc1Swenshuai.xi MS_U32 u32FrameBufAddr; //!< the physical memory start address of frame buffer 805*53ee8cc1Swenshuai.xi MS_U32 u32FrameBufSize; //!< the frame buffer size 806*53ee8cc1Swenshuai.xi MS_U32 u32BitstreamBufVAddr; //!< the virtual memory start address of bit stream buffer 807*53ee8cc1Swenshuai.xi MS_U32 u32BitstreamBufAddr; //!< the physical memory start address of bit stream buffer 808*53ee8cc1Swenshuai.xi MS_U32 u32BitstreamBufSize; //!< the bit stream buffer size 809*53ee8cc1Swenshuai.xi MS_U32 u32DrvProcessBufVAddr; //!< the virtual memory start address of driver process buffer 810*53ee8cc1Swenshuai.xi MS_U32 u32DrvProcessBufAddr; //!< the physical memory start address of driver process buffer 811*53ee8cc1Swenshuai.xi MS_U32 u32DrvProcessBufSize; //!< the driver process buffer size 812*53ee8cc1Swenshuai.xi MS_U32 u32DynSacalingBufVAddr; //!< the virtual memory start address of dynamic scaling buffer 813*53ee8cc1Swenshuai.xi MS_U32 u32DynSacalingBufAddr; //!< the physical memory start address of dynamic scaling buffer 814*53ee8cc1Swenshuai.xi MS_U32 u32DynSacalingBufSize; //!< the dynamic scaling buffer size 815*53ee8cc1Swenshuai.xi HVD_FWInputSourceType eFWSourceType; //!< the input FW source type. 816*53ee8cc1Swenshuai.xi } HVD_EX_MemMap; 817*53ee8cc1Swenshuai.xi 818*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 819*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_Nal_Entry 820*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description: Store the information of one nal entry 821*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 822*53ee8cc1Swenshuai.xi typedef struct 823*53ee8cc1Swenshuai.xi { 824*53ee8cc1Swenshuai.xi MS_U32 u32NalID; ///< the ID nunber of this nal 825*53ee8cc1Swenshuai.xi MS_U32 u32NalAddr; ///< the offset of this nal from bit stream buffer start address. unit: byte 826*53ee8cc1Swenshuai.xi MS_U32 u32NalSize; ///< the size of this nal. unit: byte 827*53ee8cc1Swenshuai.xi MS_U32 u32NalPTS; ///< the time stamp of this nal. unit: ms 828*53ee8cc1Swenshuai.xi MS_BOOL bRVBrokenPacket; ///< the RV only 829*53ee8cc1Swenshuai.xi } HVD_Nal_Entry; 830*53ee8cc1Swenshuai.xi 831*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 832*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: RV_FileInfo 833*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description: RV file information 834*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 835*53ee8cc1Swenshuai.xi typedef struct 836*53ee8cc1Swenshuai.xi { 837*53ee8cc1Swenshuai.xi MS_U16 RV_Version; ///< Real Video Bitstream version 838*53ee8cc1Swenshuai.xi MS_U16 ulNumSizes; ///< Real Video Number sizes 839*53ee8cc1Swenshuai.xi MS_U16 ulPicSizes_w[8]; ///< Real Video file width 840*53ee8cc1Swenshuai.xi MS_U16 ulPicSizes_h[8]; ///< Real Video file height 841*53ee8cc1Swenshuai.xi } RV_FileInfo; 842*53ee8cc1Swenshuai.xi 843*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 844*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_FB_Reduction_Mode 845*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description: Set up frame buffer reduction mode 846*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 847*53ee8cc1Swenshuai.xi typedef struct 848*53ee8cc1Swenshuai.xi { 849*53ee8cc1Swenshuai.xi HVD_FBReductionType eLumaFBReductionMode; ///< Luma frame buffer reduction mode. 850*53ee8cc1Swenshuai.xi HVD_FBReductionType eChromaFBReductionMode; ///< Chroma frame buffer reduction mode. 851*53ee8cc1Swenshuai.xi MS_U8 u8EnableAutoMode; /// 0: Disable, 1: Enable 852*53ee8cc1Swenshuai.xi } HVD_FBReductionMode; 853*53ee8cc1Swenshuai.xi 854*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 855*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_Init_Params 856*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description: Store the initialization settings 857*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 858*53ee8cc1Swenshuai.xi typedef struct 859*53ee8cc1Swenshuai.xi { 860*53ee8cc1Swenshuai.xi MS_U32 u32ModeFlag; ///< init mode flag, use HVD_INIT_* to setup HVD. 861*53ee8cc1Swenshuai.xi MS_U32 u32FrameRate; ///< frame rate. 862*53ee8cc1Swenshuai.xi MS_U32 u32FrameRateBase; ///< frame rate base. The value of u32FrameRate /u32FrameRateBase must be frames per sec. 863*53ee8cc1Swenshuai.xi MS_U8 u8MinFrmGap; ///< set the min frame gap. 864*53ee8cc1Swenshuai.xi MS_U8 u8SyncType; ///< HVD_EX_SyncType. sync type of current playback. 865*53ee8cc1Swenshuai.xi MS_U16 u16Pitch; ///< not zero: specify the pitch. 0: use default value. 866*53ee8cc1Swenshuai.xi MS_U32 u32MaxDecTick; ///< not zero: specify the max decode tick. 0: use default value. 867*53ee8cc1Swenshuai.xi MS_BOOL bSyncEachFrm; ///< TRUE: sync STC at each frame. FALSE: not sync each frame. 868*53ee8cc1Swenshuai.xi MS_BOOL bAutoFreeES; ///< TRUE: auto free ES buffer when ES buffer is full. FALSE: not do the auto free. 869*53ee8cc1Swenshuai.xi MS_BOOL bAutoPowerSaving; ///< TRUE: auto power saving. FALSE: not do the auto power saving. 870*53ee8cc1Swenshuai.xi MS_BOOL bDynamicScaling; ///< TRUE: enable Dynamic Scaling. FALSE: disable Dynamic Scaling. 871*53ee8cc1Swenshuai.xi MS_BOOL bFastDisplay; ///< TRUE: enable Fast Display. FALSE: disable Fast Display. 872*53ee8cc1Swenshuai.xi MS_BOOL bUserData; ///< TRUE: enable processing User data. FALSE: disable processing User data. 873*53ee8cc1Swenshuai.xi MS_U8 u8TurboInit; ///< HVD_TurboInitLevel. set the turbo init mode. 874*53ee8cc1Swenshuai.xi MS_U8 u8TimeUnit; ///< HVD_Time_Unit_Type.set the type of input/output time unit. 875*53ee8cc1Swenshuai.xi MS_U16 u16DecoderClock; ///< HVD decoder clock speed. 0: default value. non-zero: any nearist clock. 876*53ee8cc1Swenshuai.xi MS_U16 u16ChipECONum; ///< Chip revision, ECO number. 877*53ee8cc1Swenshuai.xi RV_FileInfo* pRVFileInfo; ///< pointer to RV file info 878*53ee8cc1Swenshuai.xi HVD_FBReductionMode stFBReduction; ///< HVD Frame buffer reduction type 879*53ee8cc1Swenshuai.xi } HVD_Init_Params; 880*53ee8cc1Swenshuai.xi 881*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 882*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_BBU_Info 883*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description: Store the packet information 884*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 885*53ee8cc1Swenshuai.xi typedef struct 886*53ee8cc1Swenshuai.xi { 887*53ee8cc1Swenshuai.xi MS_U32 u32Staddr; ///< Packet offset from bitstream buffer base address. unit: byte. 888*53ee8cc1Swenshuai.xi MS_U32 u32Length; ///< Packet size. unit: byte. 889*53ee8cc1Swenshuai.xi MS_U32 u32Staddr2; ///< Packet offset from bitstream buffer base address. unit: byte. 890*53ee8cc1Swenshuai.xi MS_U32 u32Length2; ///< Packet size. unit: byte. 891*53ee8cc1Swenshuai.xi MS_U32 u32TimeStamp; ///< Packet time stamp. unit: ms. 892*53ee8cc1Swenshuai.xi MS_U32 u32ID_L; ///< Packet ID low part. 893*53ee8cc1Swenshuai.xi MS_U32 u32ID_H; ///< Packet ID high part. 894*53ee8cc1Swenshuai.xi MS_U32 u32AllocLength; ///< Allocated Packet size. unit: byte. 895*53ee8cc1Swenshuai.xi MS_U32 u32OriPktAddr; ///< Original packet offset from bitstream buffer base address. unit: byte. 896*53ee8cc1Swenshuai.xi MS_BOOL bRVBrokenPacket; ///< the RV only 897*53ee8cc1Swenshuai.xi } HVD_BBU_Info; 898*53ee8cc1Swenshuai.xi 899*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 900*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_Alive_Status 901*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description: Store the decoder living information 902*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 903*53ee8cc1Swenshuai.xi typedef struct 904*53ee8cc1Swenshuai.xi { 905*53ee8cc1Swenshuai.xi MS_U32 u32DecCnt; 906*53ee8cc1Swenshuai.xi MS_U32 u32SkipCnt; 907*53ee8cc1Swenshuai.xi MS_U32 u32IdleCnt; 908*53ee8cc1Swenshuai.xi MS_U32 u32MainLoopCnt; 909*53ee8cc1Swenshuai.xi } HVD_Alive_Status; 910*53ee8cc1Swenshuai.xi 911*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 912*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_DISP_INFO_THRESHOLD 913*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description: Store the disp information threshold. 914*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 915*53ee8cc1Swenshuai.xi typedef struct 916*53ee8cc1Swenshuai.xi { 917*53ee8cc1Swenshuai.xi MS_U32 u32FrmrateUpBound; //Framerate filter upper bound 918*53ee8cc1Swenshuai.xi MS_U32 u32FrmrateLowBound; //Framerate filter lower bound 919*53ee8cc1Swenshuai.xi MS_U32 u32MvopUpBound; //mvop filter upper bound 920*53ee8cc1Swenshuai.xi MS_U32 u32MvopLowBound; //mvop filter lower bound 921*53ee8cc1Swenshuai.xi } HVD_Disp_Info_TH; 922*53ee8cc1Swenshuai.xi 923*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 924*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_Settings 925*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description: Store the settings of user requirment 926*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 927*53ee8cc1Swenshuai.xi typedef struct 928*53ee8cc1Swenshuai.xi { 929*53ee8cc1Swenshuai.xi // TODO: currently only DTV settings. Need to add more settings for MM. 930*53ee8cc1Swenshuai.xi // Mode 931*53ee8cc1Swenshuai.xi HVD_Disp_Info_TH DispInfoTH; 932*53ee8cc1Swenshuai.xi MS_U32 u32IsrEvent; 933*53ee8cc1Swenshuai.xi MS_BOOL bEnISR; 934*53ee8cc1Swenshuai.xi 935*53ee8cc1Swenshuai.xi MS_U8 u8SkipMode; // HVD_Skip_Decode_Type 936*53ee8cc1Swenshuai.xi MS_U8 bIsShowErrFrm; 937*53ee8cc1Swenshuai.xi MS_U8 u8FrcMode; //HVD_EX_FrmRateConvMode 938*53ee8cc1Swenshuai.xi 939*53ee8cc1Swenshuai.xi MS_BOOL bIsErrConceal; 940*53ee8cc1Swenshuai.xi MS_BOOL bAutoFreeES; 941*53ee8cc1Swenshuai.xi MS_BOOL bDisDeblocking; 942*53ee8cc1Swenshuai.xi MS_BOOL bDisQuarterPixel; 943*53ee8cc1Swenshuai.xi 944*53ee8cc1Swenshuai.xi MS_U8 bIsSyncOn; 945*53ee8cc1Swenshuai.xi MS_U32 u32SyncTolerance; 946*53ee8cc1Swenshuai.xi MS_U32 u32SyncRepeatTH; 947*53ee8cc1Swenshuai.xi MS_U32 u32SyncVideoDelay; 948*53ee8cc1Swenshuai.xi MS_U32 u32SyncFreeRunTH; 949*53ee8cc1Swenshuai.xi MS_U32 u32MiuBurstLevel; 950*53ee8cc1Swenshuai.xi } HVD_Settings; 951*53ee8cc1Swenshuai.xi 952*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 953*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_CC_Info 954*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description: HVD Close Caption Infomation. 955*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 956*53ee8cc1Swenshuai.xi typedef struct 957*53ee8cc1Swenshuai.xi { 958*53ee8cc1Swenshuai.xi MS_U8 u8UserDataMode; 959*53ee8cc1Swenshuai.xi MS_U8 u8ParsingStatus; 960*53ee8cc1Swenshuai.xi MS_BOOL b708Enable; 961*53ee8cc1Swenshuai.xi MS_BOOL b608InfoEnhance; 962*53ee8cc1Swenshuai.xi //MS_BOOL bBufMiu1[2]; 963*53ee8cc1Swenshuai.xi MS_U8 u8BufMiuSel[2]; 964*53ee8cc1Swenshuai.xi MS_BOOL bOverFlow[2]; 965*53ee8cc1Swenshuai.xi MS_U32 u32RingBufStartPAddr[2];//physical address 966*53ee8cc1Swenshuai.xi MS_U32 u32RingBufLen[2]; 967*53ee8cc1Swenshuai.xi MS_U32 volatile u32RingBufVacancy[2]; 968*53ee8cc1Swenshuai.xi MS_U32 volatile u32RingBufRPAddr[2], u32RingBufWPAddr[2];//physical address 969*53ee8cc1Swenshuai.xi MS_U32 volatile u32FWUsrDataRIdx, u32FWUsrDataWIdx; 970*53ee8cc1Swenshuai.xi MS_U32 u32PktLen708; 971*53ee8cc1Swenshuai.xi MS_U32 u32PktHdrAddr708; 972*53ee8cc1Swenshuai.xi MS_U8 u8CC608buf[512]; 973*53ee8cc1Swenshuai.xi MS_U8 u8CC708buf[512]; 974*53ee8cc1Swenshuai.xi } HVD_CC_Info; 975*53ee8cc1Swenshuai.xi 976*53ee8cc1Swenshuai.xi typedef struct 977*53ee8cc1Swenshuai.xi { 978*53ee8cc1Swenshuai.xi MS_U16 u16TmpRef; 979*53ee8cc1Swenshuai.xi MS_U16 u16PicStruct; 980*53ee8cc1Swenshuai.xi MS_U32 u32Pts; 981*53ee8cc1Swenshuai.xi MS_U8 u8UsrDataCnt; 982*53ee8cc1Swenshuai.xi } HVD_CC_608EnhanceInfo; 983*53ee8cc1Swenshuai.xi 984*53ee8cc1Swenshuai.xi 985*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 986*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_ISR_Ctrl 987*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description: HVD driver ISR control. 988*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 989*53ee8cc1Swenshuai.xi typedef struct 990*53ee8cc1Swenshuai.xi { 991*53ee8cc1Swenshuai.xi MS_BOOL bRegISR; 992*53ee8cc1Swenshuai.xi MS_BOOL bInISR; 993*53ee8cc1Swenshuai.xi MS_U32 u32ISRInfo; 994*53ee8cc1Swenshuai.xi MS_U32 u32IntCount; 995*53ee8cc1Swenshuai.xi HVD_ISRCallBack pfnISRCallBack; 996*53ee8cc1Swenshuai.xi MS_BOOL bDisableISRFlag; 997*53ee8cc1Swenshuai.xi MS_BOOL bIsHvdIsr; 998*53ee8cc1Swenshuai.xi MS_BOOL bIsG2Vp9Isr; 999*53ee8cc1Swenshuai.xi } HVD_ISR_Ctrl; 1000*53ee8cc1Swenshuai.xi 1001*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 1002*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_EX_Drv_Ctrl 1003*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description: HVD driver internal control. 1004*53ee8cc1Swenshuai.xi //----------------------------------------------------------------------------- 1005*53ee8cc1Swenshuai.xi typedef struct 1006*53ee8cc1Swenshuai.xi { 1007*53ee8cc1Swenshuai.xi // init stage 1008*53ee8cc1Swenshuai.xi MS_BOOL bUsed; 1009*53ee8cc1Swenshuai.xi HVD_EX_MemMap MemMap; ///< HVD memory config 1010*53ee8cc1Swenshuai.xi HVD_Init_Params InitParams; ///< HVD init settings 1011*53ee8cc1Swenshuai.xi MS_BOOL bNoDrvProccBuf; 1012*53ee8cc1Swenshuai.xi MS_BOOL bAutoRmLastZeroByte; 1013*53ee8cc1Swenshuai.xi MS_BOOL bCannotAccessMIU256; 1014*53ee8cc1Swenshuai.xi MS_U32 u32CmdTimeout; ///< HVD FW command timeout 1015*53ee8cc1Swenshuai.xi void *pLastFrmInfo; 1016*53ee8cc1Swenshuai.xi 1017*53ee8cc1Swenshuai.xi // reset stage 1018*53ee8cc1Swenshuai.xi MS_U32 u32CtrlMode; ///< HVD run-time control flag 1019*53ee8cc1Swenshuai.xi MS_U32 u32DummyWriteBuf; ///< For dummy write MIU action. 1020*53ee8cc1Swenshuai.xi //MS_U32 u32CPUNonCacheMask; ///< CPU non-cache mask 1021*53ee8cc1Swenshuai.xi MS_U32 u32NULLPacketSize; ///< to store the size of AVI null packet pattern 1022*53ee8cc1Swenshuai.xi MS_U32 u32NULLPacketAddr; ///< to store the start address of AVI null packet pattern from bitstream buffer base. 1023*53ee8cc1Swenshuai.xi MS_U32 u32RV_FlushPacketSize; ///< to store the size of rm flush packet pattern 1024*53ee8cc1Swenshuai.xi MS_U32 u32RV_FlushPacketAddr; ///< to store the start address of rm flush packet pattern from bitstream buffer base. 1025*53ee8cc1Swenshuai.xi MS_U32 u32StepDecodeCnt; 1026*53ee8cc1Swenshuai.xi //MS_U32 u32LastBBUPTS; 1027*53ee8cc1Swenshuai.xi //MS_U32 u32DummyDataSize; ///< buffer size of dummy data. 1028*53ee8cc1Swenshuai.xi //MS_U32 u32RestSizeofPushDummy; 1029*53ee8cc1Swenshuai.xi //MS_U32 u32AddrPushDummy; 1030*53ee8cc1Swenshuai.xi MS_U32 u32LastESRptr; 1031*53ee8cc1Swenshuai.xi MS_U32 u32BBUTblInBitstreamBufAddr; 1032*53ee8cc1Swenshuai.xi MS_U32 u32BBUPacketCnt; 1033*53ee8cc1Swenshuai.xi MS_U32 u32BBUWptr_Fired; 1034*53ee8cc1Swenshuai.xi MS_U32 u32LastErrCode; 1035*53ee8cc1Swenshuai.xi //MS_BOOL bPushingDummy; 1036*53ee8cc1Swenshuai.xi MS_BOOL bIsDispInfoChg; 1037*53ee8cc1Swenshuai.xi MS_BOOL bFrmRateSupported; 1038*53ee8cc1Swenshuai.xi HVD_Nal_Entry LastNal; 1039*53ee8cc1Swenshuai.xi HVD_Alive_Status LivingStatus; 1040*53ee8cc1Swenshuai.xi 1041*53ee8cc1Swenshuai.xi // recovery stage 1042*53ee8cc1Swenshuai.xi MS_BOOL bStepDecoding; 1043*53ee8cc1Swenshuai.xi HVD_Settings Settings; 1044*53ee8cc1Swenshuai.xi 1045*53ee8cc1Swenshuai.xi MS_U8 bTurboFWMode; //TRUE:not reload FW more than once if pre-decoder is the same. 1046*53ee8cc1Swenshuai.xi 1047*53ee8cc1Swenshuai.xi // ISR control 1048*53ee8cc1Swenshuai.xi HVD_ISR_Ctrl HVDISRCtrl; 1049*53ee8cc1Swenshuai.xi MS_U32 u32Sid; // stream ID 1050*53ee8cc1Swenshuai.xi 1051*53ee8cc1Swenshuai.xi // user data 1052*53ee8cc1Swenshuai.xi MS_U32 u32UsrDataRd; 1053*53ee8cc1Swenshuai.xi MS_U32 u32UsrDataWr; 1054*53ee8cc1Swenshuai.xi HVD_CC_Info CloseCaptionInfo; 1055*53ee8cc1Swenshuai.xi 1056*53ee8cc1Swenshuai.xi MS_U32 u32FlushRstPtr; ///< flush rst ptr: 0: init, 1:after flush and before push packet 1057*53ee8cc1Swenshuai.xi 1058*53ee8cc1Swenshuai.xi // Secure Mode 1059*53ee8cc1Swenshuai.xi MS_U8 u8SecureMode; // Enum HVD_SECURE_MODE 1060*53ee8cc1Swenshuai.xi MS_U8 u8SettingMode; // Record Setting mode 1061*53ee8cc1Swenshuai.xi MS_U8 u8Resv[2]; 1062*53ee8cc1Swenshuai.xi MS_U32 u32ExternalDSbuf; // External DS buffer 1063*53ee8cc1Swenshuai.xi MS_U8 u8CodeMiuSel; 1064*53ee8cc1Swenshuai.xi MS_U8 u8ESMiuSel; 1065*53ee8cc1Swenshuai.xi MS_U8 u8FrmMiuSel; 1066*53ee8cc1Swenshuai.xi MS_U8 u8DrvProccMiuSel; 1067*53ee8cc1Swenshuai.xi } HVD_EX_Drv_Ctrl; 1068*53ee8cc1Swenshuai.xi 1069*53ee8cc1Swenshuai.xi typedef void(*P_SC_ISR_Proc)(MS_U8 u8SCID); 1070*53ee8cc1Swenshuai.xi 1071*53ee8cc1Swenshuai.xi 1072*53ee8cc1Swenshuai.xi typedef struct 1073*53ee8cc1Swenshuai.xi { 1074*53ee8cc1Swenshuai.xi MS_BOOL bEnable; 1075*53ee8cc1Swenshuai.xi MS_U32 u32IapGnBufAddr; 1076*53ee8cc1Swenshuai.xi MS_U32 u32IapGnBufSize; 1077*53ee8cc1Swenshuai.xi } HVD_EX_IapGnBufShareBWMode; 1078*53ee8cc1Swenshuai.xi 1079*53ee8cc1Swenshuai.xi 1080*53ee8cc1Swenshuai.xi 1081*53ee8cc1Swenshuai.xi typedef struct 1082*53ee8cc1Swenshuai.xi { 1083*53ee8cc1Swenshuai.xi MS_BOOL bOnePendingBuffer; 1084*53ee8cc1Swenshuai.xi MS_BOOL bFrameRateHandling; 1085*53ee8cc1Swenshuai.xi MS_U32 u32PreSetFrameRate; 1086*53ee8cc1Swenshuai.xi HVD_EX_IapGnBufShareBWMode stIapGnShBWMode; 1087*53ee8cc1Swenshuai.xi MS_BOOL bDisableTspInBbuMode; 1088*53ee8cc1Swenshuai.xi } HVD_Pre_Ctrl; 1089*53ee8cc1Swenshuai.xi 1090*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1091*53ee8cc1Swenshuai.xi // Function and Variable 1092*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 1093*53ee8cc1Swenshuai.xi extern MS_U32 u32UartCtrl; 1094*53ee8cc1Swenshuai.xi //extern MS_U32 u32InitSysTimeBase; 1095*53ee8cc1Swenshuai.xi 1096*53ee8cc1Swenshuai.xi #endif // _DRV_HVD_DEF_H_ 1097*53ee8cc1Swenshuai.xi 1098