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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 #ifndef _HAL_HVD_H_ 96 #define _HAL_HVD_H_ 97 98 //------------------------------------------------------------------------------------------------- 99 // Macro and Define 100 //------------------------------------------------------------------------------------------------- 101 // Feature 102 #define HAL_HVD_ENABLE_MUTEX_PROTECT HVD_ENABLE_MUTEX_PROTECT 103 #define HAL_HVD_ENABLE_MIU_PROTECT HVD_ENABLE_MIU_RST_PROTECT 104 #define HAL_HVD_ENABLE_VPU_CMD 1 105 106 // MBox type of FW cmd 107 #if (HAL_HVD_ENABLE_VPU_CMD) 108 #define HAL_HVD_CMD_MBOX E_HVD_VPU_HI_0 109 #define HAL_HVD_CMD_ARG_MBOX E_HVD_VPU_HI_1 110 #else 111 #define HAL_HVD_CMD_MBOX E_HVD_HI_0 112 #define HAL_HVD_CMD_ARG_MBOX E_HVD_HI_1 113 #endif 114 // MBox other usages 115 #define HAL_HVD_REG_ISR_VPU E_HVD_VPU_RISC_1 116 #define HAL_HVD_REG_FW_STATE E_HVD_RISC_0 117 #define HAL_HVD_REG_ISR_HVD E_HVD_RISC_1 118 #define HAL_HVD_REG_DISP_INFO_COPYED E_HVD_RISC_1 119 #define HAL_HVD_REG_DISP_INFO_CHANGE E_HVD_RISC_1 120 #define HAL_HVD_REG_DISP_CTL E_HVD_HI_0 121 122 #if defined(CHIP_T3) 123 // patch for HW bug 124 #define HVD_MIU1_BASE_ADDRESS 0x08000000UL//0x10000000UL 125 #else // CHIP_U3 126 #define HVD_MIU1_BASE_ADDRESS 0x08000000UL 127 #endif 128 129 #define HVD_RV_BROKENBYUS_BIT 29 130 131 //------------------------------------------------------------------------------------------------- 132 // Type and Structure 133 //------------------------------------------------------------------------------------------------- 134 135 typedef enum 136 { 137 E_HVD_HI_0, 138 E_HVD_HI_1, 139 E_HVD_RISC_0, 140 E_HVD_RISC_1, 141 E_HVD_VPU_HI_0, 142 E_HVD_VPU_HI_1, 143 E_HVD_VPU_RISC_0, 144 E_HVD_VPU_RISC_1, 145 } HVD_MBOX_TYPE; 146 147 typedef struct 148 { 149 MS_U32 u32WritePtr; 150 MS_U32 u32OffsetCnt; 151 } HVD_PTS_Table_Ctrl; 152 153 typedef struct 154 { 155 MS_U32 u32PTS; 156 MS_U32 u32OffsetCnt; 157 MS_U32 u32ID_L; 158 MS_U32 u32ID_H; 159 } HVD_PTS_Table_Entry; 160 161 //------------------------------------------------------------------------------------------------- 162 // Function and Variable 163 //------------------------------------------------------------------------------------------------- 164 void HAL_HVD_FlushMemory(void); 165 void HAL_HVD_ReadMemory(void); 166 void HAL_HVD_CheckMIUSel(MS_BOOL bChange); 167 MS_U32 HAL_HVD_Get_HWVersionID(void); 168 void HAL_HVD_PowerCtrl(MS_BOOL bEnable); 169 void HAL_HVD_InitRegBase(MS_U32 u32RegBase); 170 void HAL_HVD_SetPreCtrlVariables(MS_U32 drvprectrl); 171 HVD_Return HAL_HVD_InitVariables(MS_U32 drvctrl); 172 HVD_Return HAL_HVD_InitShareMem(void); 173 HVD_Return HAL_HVD_InitRegCPU(void); 174 HVD_Return HAL_HVD_SetData(HVD_SetData u32type, MS_U32 u32Data); 175 MS_U32 HAL_HVD_GetData(HVD_GetData eType); 176 177 MS_S64 HAL_HVD_GetData_EX(HVD_GetData eType); 178 HVD_Return HAL_HVD_SetCmd(HVD_User_Cmd eUsrCmd, MS_U32 u32CmdArg); 179 HVD_Return HAL_HVD_DeInit(void); 180 HVD_Return HAL_HVD_PushPacket(HVD_BBU_Info *pInfo); 181 void HAL_HVD_EnableISR(MS_BOOL bEnable); 182 void HAL_HVD_SetForceISR(MS_BOOL bEnable); 183 void HAL_HVD_SetClearISR(void); 184 MS_BOOL HAL_HVD_IsISROccured(void); 185 MS_BOOL HAL_HVD_IsEnableISR(void); 186 MS_BOOL HAL_HVD_IsAlive(void); 187 MS_BOOL HAL_HVD_RstPTSCtrlVariable(void); 188 MS_BOOL HAL_HVD_FlushRstShareMem(void); 189 void HAL_HVD_UartSwitch2FW(MS_BOOL bEnable); 190 MS_U32 HAL_HVD_GetData_Dbg(MS_U32 u32Addr); 191 void HAL_HVD_SetData_Dbg(MS_U32 u32Addr, MS_U32 u32Data); 192 MS_U16 HAL_HVD_GetCorretClock(MS_U16 u16Clock); 193 void HAL_HVD_UpdateESWptr_Fire(void); 194 void HAL_HVD_MVD_PowerCtrl(MS_BOOL bEnable); 195 void HAL_HVD_Dump_FW_Status(void); 196 void HAL_HVD_Dump_HW_Status(MS_U32 numb); 197 void HAL_HVD_SetMiuBurstLevel(HVD_MIU_Burst_Cnt_Ctrl eMiuBurstCntCtrl); 198 MS_BOOL HAL_HVD_GetFrmRateIsSupported(MS_U16 u16HSize, MS_U16 u16VSize, MS_U32 u32FrmRate); 199 200 #endif // _HAL_HVD_H_ 201 202