1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
5 // All software, firmware and related documentation herein ("MStar Software") are
6 // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by
7 // law, including, but not limited to, copyright law and international treaties.
8 // Any use, modification, reproduction, retransmission, or republication of all
9 // or part of MStar Software is expressly prohibited, unless prior written
10 // permission has been granted by MStar.
11 //
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14 // comply with all applicable laws and regulations:
15 //
16 // 1. MStar shall retain any and all right, ownership and interest to MStar
17 // Software and any modification/derivatives thereof.
18 // No right, ownership, or interest to MStar Software and any
19 // modification/derivatives thereof is transferred to you under Terms.
20 //
21 // 2. You understand that MStar Software might include, incorporate or be
22 // supplied together with third party`s software and the use of MStar
23 // Software may require additional licenses from third parties.
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31 // third party.
32 //
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35 // without limitation, any warranties of merchantability, non-infringement of
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43 // You agree that this Section 4 shall still apply without being affected
44 // even if MStar Software has been modified by MStar in accordance with your
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47 //
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55 //
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64 //
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66 // of Taiwan, R.O.C., excluding its conflict of law rules.
67 // Any and all dispute arising out hereof or related hereto shall be finally
68 // settled by arbitration referred to the Chinese Arbitration Association,
69 // Taipei in accordance with the ROC Arbitration Law and the Arbitration
70 // Rules of the Association by three (3) arbitrators appointed in accordance
71 // with the said Rules.
72 // The place of arbitration shall be in Taipei, Taiwan and the language shall
73 // be English.
74 // The arbitration award shall be final and binding to both parties.
75 //
76 //******************************************************************************
77 //<MStar Software>
78 ///////////////////////////////////////////////////////////////////////////////
79 //
80 // File name: drvUsbMain.C
81 // Version: 0.1
82 // Date: 2004/9/20
83 // Company: Faraday Tech. Corp.
84 ///////////////////////////////////////////////////////////////////////////////
85 #if defined(MSOS_TYPE_NOS)
86 #include "MsVersion.h"
87 #include "../USBHostConfig_3.h"
88 #include "../../include/hal_arch.h"
89 #include "../../include/hal_cache.h"
90 //#include <stdlib.h>
91 //#include <stdarg.h>
92 #ifndef ATV_SERISE_USE
93 #include <stdio.h>
94 #endif
95 #include <string.h>
96 //#include "chipset.h"
97 //#include "flib.h"
98 //#include <MsCommon.h>
99 #ifndef ATV_SERISE_USE
100 #include "../../include/datatype.h"
101 #else
102 #include "UsbHostDataDef.h"
103 #endif
104 #include "../drvHostLib_3.h"
105 #include "../drvHost200_3.h"
106 #include "../drvUsbMain_3.h"
107 #ifndef ATV_SERISE_USE
108
109 #endif
110 #include "../../include/_drvUSB.h"
111 #include "../drvscsi_3.h"
112 #ifdef ATV_SERISE_USE
113 #include "common.h"
114 #include "uart.h"
115 #include "command.h"
116 #endif
117 #ifdef CERAMAL_SERISE_USE
118 #include "drvtimer.h"
119 #include "Board.h"
120 #include "drvUTMI.h"
121 #else
122 #endif
123
124 #ifdef OnePort_OTG_EHCI
125 #include "MsCompiler.h"
126 #include "msusb.h"
127 #include "msDRC.h"
128 #include "msconfig.h"
129 #include "mscpu.h"
130 #include "drvisr.h"
131 #endif
132
133 #include "../../include/drvGlobal.h"
134
135 #include "../drvUSBHost_PTP_3.h"
136
137 #include "MsCommon.h"
138 #include "MsIRQ.h"
139 #include "MsOS.h"
140 #include "halUSB.h"
141
142 #ifdef DEVICE_ENUM_SEGMENT
143 U8 MDrv_Usb_Device_Enum_EX_Port3(void);
144 #endif
145 extern void msAPI_Timer_ResetWDT(void);
146
147 #define DRV_USB_DBG(x) //x;
148 #define MINI_DEBUG(x) //x;
149
150 U8 gUsbStatus_Port3=USB_OK;
151 U8 gUsbTimeout_Port3=5;
152 U8 gUsbRetryCount_Port3=3;
153 U16 gUsbChipID_Port3 = 0xFFFF;
154 U8 gUsbChipVersion_Port3 = 0xFF;
155
156 #if 1
157 extern U8 gUsbDeviceState;
158 extern U8 gUsbDeviceState_Port3;
159 #else
160 U8 gUsbDeviceState_Port3=POWER_SAVING;
161 #ifdef USB_POWER_SAVING_MODE
162 extern U8 gUsbDeviceState;
163 #endif
164 #endif
165 U8 NowIsHubPort3;
166
167 extern U8 gSpeed_Port3;
168
169 //static U32 original_xdwin1_Base_Port3=0xFFFFFFFF; //use 0xFFFFFFFF to represent void
170 static U8 xdwin1_lockCount_Port3=0;
171 #if 0
172 U8 code USB_VBuf_Port3[32] = {'M', 'S', 'V', 'C', '0', '0', // 0, 0 fixed
173 'Z', '2', // Library ID
174 #ifdef DTV_STANDARD_LIB
175 'A', '0', '0', '1', '4', '8', // build number
176 #endif
177 #ifdef ATV_SERISE_USE
178 'B', '0', '0', '1', '2', '3', // build number
179 #endif
180 #ifdef CERAMAL_SERISE_USE
181 'C', '0', '0', '1', '2', '3', // build number
182 #endif
183
184 '0', '0', '0', '0', '0', '0', '0', '0', // change list 46058
185 'A', '4', 'A', '0', '0', '0', '0', '0', '0',// A4: Saturn, A:LG
186 'T'};
187 #endif
188
189 #define USB_HOST_P3_DRV_VERSION /* Character String for DRV/API version */ \
190 MSIF_TAG, /* 'MSIF' */ \
191 MSIF_CLASS, /* '00' */ \
192 MSIF_CUS, /* 0x0000 */ \
193 MSIF_MOD, /* 0x0000 */ \
194 MSIF_CHIP, \
195 MSIF_CPU, \
196 {'U','S','B','3'}, /* IP__ */ \
197 {'0','2'}, /* 0.0 ~ Z.Z */ \
198 {'1','3'}, /* 00 ~ 99 */ \
199 {'0','0','2','5','9','5','9','0'}, /* CL# */ \
200 MSIF_OS
201
202 static MSIF_Version _drv_usb_host_p3_version = {
203 .DDI = { USB_HOST_P3_DRV_VERSION },
204 };
205
206 #ifdef OnePort_OTG_EHCI
207 U8 USBMode=0; //set default status=OTG device mode ,{default=0, otg=1, uhci=2}
208 extern U8 volatile usbUSBState;
209 #endif
210
211 extern U8 RecoveryFlag_Port3;
212 //extern BOOLEAN gDeviceFatalError;
213
214 #ifdef OnePort_OTG_EHCI
215 extern void MDrv_OTG_Init(void);
216 extern U8 usbIsUSBConfiged(void);
217 enum
218 {
219 USBHostMode_disconnect = 0,
220 USBHostMode_connect,
221 USBDeivceMode_disconnect,
222 USBDeivceMode_connect
223 };
224 #endif
225
226 struct stDontReEnumList
227 {
228 U16 VID;
229 U16 PID;
230 };
231
232 struct stDontReEnumList gDontReEnumList_Port3[] =
233 {
234 {0x0951, 0x1603},
235 {0x05E3, 0x0718},
236 {0x0BC2, 0xA013},
237
238 {0, 0}
239 };
240
241 extern void drvUSBHost_TurnOffPowerDownMode(void);
242 extern void drvUSBHost_TurnOnPowerDownMode(void);
243 extern BOOLEAN drvUSBHost_isPowerSaveModeEnable(void);
244 extern void drvUSBHost_UTMIInitial(void);
245 extern void UsbTurnOffPowerDownMode(void);
246 extern void UsbTurnOnPowerDownMode(void);
247
248 extern void drvUSBHost_TurnOffPowerDownMode_Port3(void);
249 extern void drvUSBHost_TurnOnPowerDownMode_Port3(void);
250
251 extern U8 drvUSBHost_PTP_Init(U8 u8UsbPort);
252 extern void XBYTE_OR(U32 Addr, U8 offset, U8 val);
253 extern void XBYTE_AND(U32 Addr, U8 offset,U8 val);
254 extern void XBYTE_SET(U32 Addr, U8 offset,U8 val);
255 extern U8 XBYTE_READ(U32 Addr, U8 offset);
256 extern U8 drvUSBHost_HID_Init(U8 u8UsbPort);
257 void MDrv_USBGetVIDPID_Port3(U16 *pVID, U16 *pPID);
258
MDrv_USB_Host_GetLibVer_Port3(const MSIF_Version ** ppVersion)259 U8 MDrv_USB_Host_GetLibVer_Port3(const MSIF_Version **ppVersion)
260 {
261 if(!ppVersion)
262 return 1;
263
264 *ppVersion = &_drv_usb_host_p3_version;
265 return 0;
266 }
267
MDrv_USBGetChipID_Port3(void)268 U16 MDrv_USBGetChipID_Port3(void)
269 {
270 if (gUsbChipID_Port3== 0xFFFF)
271 gUsbChipID_Port3 = HAL_USB_GetChipID();
272
273 return gUsbChipID_Port3;
274 }
275
276 extern MS_U8 MDrv_SYS_GetChipRev(void);
MDrv_USBGetChipVersion_Port3(void)277 U8 MDrv_USBGetChipVersion_Port3(void)
278 {
279 if (gUsbChipVersion_Port3== 0xFF)
280 gUsbChipVersion_Port3 = MDrv_SYS_GetChipRev();
281
282 return gUsbChipVersion_Port3;
283 }
284
UsbGetVerStringPort3(U8 * pVerString)285 void UsbGetVerStringPort3(U8 *pVerString)
286 {
287 #if 0
288 memcpy(pVerString, &USB_VBuf_Port3[0], sizeof(USB_VBuf_Port3));
289 #endif
290 }
291
SetUsbTimeoutPort3(U8 x)292 void SetUsbTimeoutPort3(U8 x)
293 {
294 gUsbTimeout_Port3=x;
295 }
296
UTMI3_ORXBYTE(U8 offset,U8 val)297 void UTMI3_ORXBYTE(U8 offset,U8 val)
298 {
299 XBYTE_OR(gUTMI3_BASE, offset, val);
300 }
301
UTMI3_ANDXBYTE(U8 offset,U8 val)302 void UTMI3_ANDXBYTE(U8 offset,U8 val)
303 {
304 XBYTE_AND(gUTMI3_BASE, offset, val);
305 }
306
UTMI3_SETXBYTE(U8 offset,U8 val)307 void UTMI3_SETXBYTE(U8 offset,U8 val)
308 {
309 XBYTE_SET(gUTMI3_BASE, offset, val);
310 }
311
UTMI3_READXBYTE(U8 offset)312 U8 UTMI3_READXBYTE(U8 offset)
313 {
314 return XBYTE_READ(gUTMI3_BASE, offset);
315 }
316
UHC3_ORXBYTE(U8 offset,U8 val)317 void UHC3_ORXBYTE(U8 offset,U8 val)
318 {
319 XBYTE_OR(gUHC3_BASE, offset, val);
320 }
321
UHC3_ANDXBYTE(U8 offset,U8 val)322 void UHC3_ANDXBYTE(U8 offset,U8 val)
323 {
324 XBYTE_AND(gUHC3_BASE, offset, val);
325 }
326
UHC3_SETXBYTE(U8 offset,U8 val)327 void UHC3_SETXBYTE(U8 offset,U8 val)
328 {
329 XBYTE_SET(gUHC3_BASE, offset, val);
330 }
331
UHC3_READXBYTE(U8 offset)332 U8 UHC3_READXBYTE(U8 offset)
333 {
334 return XBYTE_READ(gUHC3_BASE, offset);
335 }
336
USBC3_ORXBYTE(U8 offset,U8 val)337 void USBC3_ORXBYTE(U8 offset,U8 val)
338 {
339 XBYTE_OR(gUSBC3_BASE, offset, val);
340 }
341
USBC3_ANDXBYTE(U8 offset,U8 val)342 void USBC3_ANDXBYTE(U8 offset,U8 val)
343 {
344 XBYTE_AND(gUSBC3_BASE, offset, val);
345 }
346
USBC3_SETXBYTE(U8 offset,U8 val)347 void USBC3_SETXBYTE(U8 offset,U8 val)
348 {
349 XBYTE_SET(gUSBC3_BASE, offset, val);
350 }
351
USBC3_READXBYTE(U8 offset)352 U8 USBC3_READXBYTE(U8 offset)
353 {
354 return XBYTE_READ(gUSBC3_BASE, offset);
355 }
356
357 #ifdef Enable_Burning_Test
358 U8 buf3[512];
UsbTestPort3(void)359 void UsbTestPort3(void)
360 {
361 U16 i,j;
362 U32 idx=0,xxx;
363 U8 VailLun,LunIndex=0;
364 //U8 *buf3;
365
366 printf("\r\n USB Port3 Burning Test\n");
367 //printf("maxlun :%02bx lunbyte:%02bx\n",maxlun,lunbyte);
368 //MDrv_UsbHost_Init();
369
370 //buf3 = (U8*) msAPI_Memory_Allocate(0x200, BUF_ID_USB_HOST );
371 printf("buf3: %X\n", (UINT)buf3);
372
373 VailLun=MDrv_GET_MASS_VALID_LUN_PORT3();
374 switch (VailLun)
375 {
376 case 0x01:
377 LunIndex=0;
378 break;
379 case 0x02:
380 LunIndex=1;
381 break;
382 case 0x04:
383 LunIndex=2;
384 break;
385 case 0x08:
386 LunIndex=3;
387 break;
388 case 0x10:
389 LunIndex=4;
390 break;
391 case 0x20:
392 LunIndex=5;
393 break;
394 case 0x40:
395 LunIndex=6;
396 break;
397 case 0x80:
398 LunIndex=7;
399 break;
400 }
401
402 //printf("\r\n addr=%x",(VirtoPhyAddr((U32)buf1)>>16));
403 //printf(",%x",(VirtoPhyAddr((U32)buf1)));
404 printf("gSpeed: %d\n", gSpeed_Port3);
405 while (1)
406 {
407 #ifndef CERAMAL_SERISE_USE
408 msAPI_Timer_ResetWDT();
409 #endif
410 for (i=0 ; i < 0x200 ; i++)
411 {
412 buf3[i]= (i & 0xff);
413 }
414
415 idx++;
416 //if ((idx & 0x3f)==0)
417 {
418 printf("\r\n Loop:%x",(U16)(idx>>16));
419 printf(",%x",(U16)(idx));
420 }
421 //MDrv_MIU_Copy
422 xxx=idx % 10000;
423 if (MDrv_UsbBlockWriteFromMIU_Port3(LunIndex,50+xxx,1,(U32)VirtoPhyAddr(buf3))==FALSE)
424 {
425 printf("\r\n write failed\n");
426 break;
427 }
428
429 if (MDrv_UsbBlockReadToMIU_Port3(LunIndex,50+xxx,1,(U32)VirtoPhyAddr(buf3))==FALSE)
430 {
431 printf("\r\n read failed\n");
432 break;
433 }
434 //MsOS_DelayTask(10);
435 for (j=0 ; j < 0x200 ; j++)
436 {
437 if (buf3[j]!= (j&0xff))
438 {
439 printf("\r\n LBA:%d data error\n", (U16)(50+xxx));
440 while(1);
441 }
442 }
443 MsOS_DelayTask(5);
444 }
445
446 //msAPI_Memory_Free((void*)buf3,BUF_ID_USB_HOST);
447 }
448 #endif
449 #if 0
450 U8 MDrv_UsbGetInterfaceClass(U8 i,U8 j)
451 {
452 U8 tmp;
453 #ifdef USE_XDATA_ADDRESS_0XF000
454 MDrv_USB_SetXdataWindow1();
455 #endif
456 tmp=psAttachDevice_Port3->saCD[i].sInterface[j].bInterfaceClass;
457 #ifdef USE_XDATA_ADDRESS_0XF000
458 MDrv_USB_ReleaseXdataWindow1();
459 #endif
460
461 return tmp;
462 }
463 #endif
464
465 //====================================================================
466 // * Function Name: main
467 // * Description:
468 // * Input:
469 // * OutPut:
470 //====================================================================
471 #ifndef DEVICE_ENUM_SEGMENT
MDrv_UsbHost_Init_Port3(void)472 BOOLEAN MDrv_UsbHost_Init_Port3(void)
473 {
474 BOOLEAN result=FALSE;
475
476 DRV_USB_DBG(printf("HOST200_main\n"));
477
478 MINI_DEBUG(printf("uinit\n"));
479 if (gUsbStatus_Port3==USB_EJECT)
480 {
481 //printf("2430:%02bx\n",XBYTE[0x2430]);
482 if (UHC3_READXBYTE(0x30)&2)
483 {
484 gUsbStatus_Port3=USB_OK;
485 }
486 else
487 return FALSE; //eject state
488 }
489
490 UTMI3_ORXBYTE(0x06,0x40); //Force HS TX current enable and CDR stage select
491 UTMI3_ANDXBYTE(0x06,~0x20); //clear bit 5
492 if (MDrv_USBGetChipID_Port3() == CHIPID_EMERALD)
493 UTMI3_ORXBYTE(0x06, 0x04); //Force HS TX current source enable, for MHL noise issue, for Emerald only
494
495 UTMI3_ORXBYTE(0x06,0x03); //reset UTMI
496 MsOS_DelayTask(2);
497 UTMI3_ANDXBYTE(0x06,0xfc);
498
499 if ( (MDrv_USBGetChipID_Port3() == CHIPID_NEPTUNE) ||
500 (MDrv_USBGetChipID_Port3() == CHIPID_ERIS) ||
501 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA) ||
502 (MDrv_USBGetChipID_Port3() == CHIPID_PLUTO) ||
503 (MDrv_USBGetChipID_Port3() == CHIPID_TRITON) ||
504 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA2) )
505 {
506 UTMI3_SETXBYTE(0x29,0x08);
507 }
508 else if (MDrv_USBGetChipID_Port3()==CHIPID_EUCLID) // Euclid
509 {
510 UTMI3_ANDXBYTE(0x29,0xF7); //disable full speed retime
511 }
512
513 #if defined(Enable_Issue_TestPacket) && !defined(ENABLE_HOST_TEST)
514 UTMI3_SETXBYTE(0x03,0); //for device disconnect status bit
515 #else
516 UTMI3_SETXBYTE(0x03,0xa8); //for device disconnect status bit
517 #endif
518
519 //XBYTE[gUTMI3_BASE+0x07]|=0x02; //
520 #ifdef DTV_STANDARD_LIB
521 if (MDrv_USBGetChipID_Port3()==CHIPID_NEPTUNE) //Neptune , after U06
522 {
523 if (MDrv_USBGetChipVersion_Port3()>= 0x06) //U07
524 {
525 UTMI3_ORXBYTE(0x07, 0x02);
526 UTMI3_SETXBYTE(0x2c,0xc1);
527 UTMI3_SETXBYTE(0x2d,0x3b);//enable TX common mode,
528 UTMI3_ORXBYTE(0x2f, 0x0e); //preemsis
529 }
530 }
531 else if ((MDrv_USBGetChipID_Port3()>=CHIPID_ERIS)&&(MDrv_USBGetChipID_Port3()<=CHIPID_TITANIA)) //Eris: 3 ,Titania: 4, Pluto: 5
532 {
533 UTMI3_SETXBYTE(0x2c,0xc5);
534 UTMI3_SETXBYTE(0x2d,0x3b);//enable TX common mode,
535 UTMI3_ORXBYTE(0x2f, 0x0e); //preemsis
536 }
537 else if (MDrv_USBGetChipID_Port3()==CHIPID_PLUTO) // Pluto: 5
538 {
539 UTMI3_ORXBYTE(0x2c, 0xc1);
540 UTMI3_ORXBYTE(0x2d, 0x3);//enable TX common mode,
541 UTMI3_ORXBYTE(0x2f, 0x4a); //preemsis
542 UTMI3_ORXBYTE(0x13, 0x70);
543 XBYTE_AND(gUTMI_BASE,0,0xfe); //clear port 0 IREF
544 }
545 else if (MDrv_USBGetChipID_Port3()==CHIPID_TITANIA2) // Titania 2
546 {
547 UTMI3_ORXBYTE(0x2c, 0xc1);
548 UTMI3_ORXBYTE(0x2d, 0x3);//enable TX common mode,
549 UTMI3_ORXBYTE(0x2f, 0x4a); //preemsis
550 }
551 else if (MDrv_USBGetChipID_Port3()==CHIPID_TRITON) //Triton=6
552 {
553 UTMI3_SETXBYTE(0x2c,0xc1);
554 UTMI3_SETXBYTE(0x2d,0x3b);//enable TX common mode,
555 UTMI3_ORXBYTE(0x2f,0x0e); //preemsis
556 }
557 else if (MDrv_USBGetChipID_Port3()==CHIPID_EUCLID) // Euclid
558 {
559 UTMI3_ORXBYTE(0x2c, 0xc1);
560 UTMI3_ORXBYTE(0x2d, 0x3);//enable TX common mode,
561 UTMI3_ORXBYTE(0x2f, 0x4a); //preemsis
562 }
563 else if ( (MDrv_USBGetChipID_Port3()==CHIPID_TITANIA3) || // Titania 3, Titania 4
564 (MDrv_USBGetChipID_Port3()==CHIPID_TITANIA4) ||
565 (MDrv_USBGetChipID_Port3()==CHIPID_TITANIA7) ||
566 (MDrv_USBGetChipID_Port3()==CHIPID_TITANIA8) ||
567 (MDrv_USBGetChipID_Port3()==CHIPID_TITANIA9) ||
568 (MDrv_USBGetChipID_Port3()==CHIPID_TITANIA12) ||
569 (MDrv_USBGetChipID_Port3() == CHIPID_JANUS) ||
570 (MDrv_USBGetChipID_Port3() == CHIPID_JANUS2) ||
571 (MDrv_USBGetChipID_Port3() == CHIPID_AMBER6) )
572 {
573 UTMI3_ORXBYTE(0x2c, 0x10); //TX-current adjust to 105%
574 UTMI3_ORXBYTE(0x2d, 0x02); //Pre-emphasis enable
575 UTMI3_ORXBYTE(0x2f, 0x81); //HS_TX common mode current enable (100mV);Pre-emphasis enable (10%)
576 UTMI3_ORXBYTE(0x09,0x81); //UTMI RX anti-dead-lock, ISI improvement
577 }
578 else if ( (MDrv_USBGetChipID_Port3()==CHIPID_AMBER1) ||
579 (MDrv_USBGetChipID_Port3()==CHIPID_AMBER5) ||
580 (MDrv_USBGetChipID_Port3()==CHIPID_AMBER7) ||
581 (MDrv_USBGetChipID_Port3()==CHIPID_AMBER3) ||
582 (MDrv_USBGetChipID_Port3()==CHIPID_AMETHYST) ||
583 (MDrv_USBGetChipID_Port3()==CHIPID_EAGLE))
584 {
585 //for Amber1 later 40nm before Agate
586 UTMI3_ORXBYTE(0x2c, 0x98);
587 UTMI3_ORXBYTE(0x2d, 0x02);
588 UTMI3_ORXBYTE(0x2e, 0x10);
589 UTMI3_ORXBYTE(0x2f, 0x01);
590 UTMI3_ORXBYTE(0x09,0x81); //UTMI RX anti-dead-lock, ISI improvement
591 }
592 else if ( (MDrv_USBGetChipID_Port3() == CHIPID_EDISON) ||
593 (MDrv_USBGetChipID_Port3() == CHIPID_EIFFEL) )
594 {
595 //for Agate later 40nm, same as 55nm setting2
596 UTMI3_ORXBYTE(0x2c, 0x90); //TX-current adjust to 105%
597 UTMI3_ORXBYTE(0x2d, 0x02); //Pre-emphasis enable
598 UTMI3_ORXBYTE(0x2f, 0x81); //HS_TX common mode current enable (100mV);Pre-emphasis enable (10%)
599 UTMI3_ORXBYTE(0x09,0x81); //UTMI RX anti-dead-lock, ISI improvement
600 }
601 else //for Agate later 40nm, same as 55nm setting1
602 {
603 UTMI3_ORXBYTE(0x2c, 0x10); //TX-current adjust to 105%
604 UTMI3_ORXBYTE(0x2d, 0x02); //Pre-emphasis enable
605 UTMI3_ORXBYTE(0x2f, 0x81); //HS_TX common mode current enable (100mV);Pre-emphasis enable (10%)
606 UTMI3_ORXBYTE(0x09,0x81); //UTMI RX anti-dead-lock, ISI improvement
607 }
608 #endif
609
610 if ( (MDrv_USBGetChipID_Port3() == CHIPID_EIFFEL) )
611 UTMI3_ANDXBYTE(0x08, ~0x08); //Special setting for Eiffel analog LIB issue
612 else
613 {
614 //for Edison later 240M clock enhance, early chip will ignore this 2 bits
615 UTMI3_ORXBYTE(0x08,0x08); //bit<3> for 240's phase as 120's clock set 1, bit<4> for 240Mhz in mac 0 for faraday 1 for etron
616 }
617
618 /* Enable Cross Point ECO 2012/03/20 */
619 if ((MDrv_USBGetChipID_Port3() == CHIPID_ELK) ||
620 (MDrv_USBGetChipID_Port3() == CHIPID_AMBER5) ||
621 (MDrv_USBGetChipID_Port3() == CHIPID_EAGLE) ||
622 (MDrv_USBGetChipID_Port3() == CHIPID_EMERALD) ||
623 (MDrv_USBGetChipID_Port3() == CHIPID_EDISON) ||
624 (MDrv_USBGetChipID_Port3() == CHIPID_AGATE))
625 {
626 UTMI3_ORXBYTE(0x04,0x40); //deglitch SE0 (low-speed cross point)
627 }
628 else if((MDrv_USBGetChipID_Port3() == CHIPID_JANUS2))
629 {
630 UTMI3_ORXBYTE(0x0a,0x80); //deglitch SE0 (low-speed cross point)
631 }
632
633 /* Enable Power Noice ECO 2012/03/20 */
634 if ((MDrv_USBGetChipID_Port3() == CHIPID_JANUS2) ||
635 (MDrv_USBGetChipID_Port3() == CHIPID_ELK) ||
636 (MDrv_USBGetChipID_Port3() == CHIPID_AMBER5) ||
637 (MDrv_USBGetChipID_Port3() == CHIPID_EAGLE) ||
638 (MDrv_USBGetChipID_Port3() == CHIPID_EMERALD) ||
639 (MDrv_USBGetChipID_Port3() == CHIPID_EDISON) ||
640 (MDrv_USBGetChipID_Port3() == CHIPID_AGATE))
641 {
642 USBC3_ORXBYTE(0x02,0x40); //use eof2 to reset state machine (power noise)
643 }
644
645 /* Enable Tx/Rx Reset Clock Gatting ECO 2012/03/27 */
646 if((MDrv_USBGetChipID_Port3() == CHIPID_ELK) ||
647 (MDrv_USBGetChipID_Port3() == CHIPID_AMBER5) ||
648 (MDrv_USBGetChipID_Port3() == CHIPID_EAGLE) ||
649 (MDrv_USBGetChipID_Port3() == CHIPID_EMERALD) ||
650 (MDrv_USBGetChipID_Port3() == CHIPID_EDISON) ||
651 (MDrv_USBGetChipID_Port3() == CHIPID_AGATE))
652 {
653 UTMI3_ORXBYTE(0x04,0x20); //hw auto deassert sw reset (tx/rx reset)
654 }
655
656 /* enable patch for the assertion of interrupt(Lose short packet interrupt) 2012/03/28 */
657 if((MDrv_USBGetChipID_Port3() == CHIPID_AMBER5) ||
658 (MDrv_USBGetChipID_Port3() == CHIPID_AGATE))
659 {
660 USBC3_ORXBYTE(0x04,0x80); //patch for the assertion of interrupt
661 }
662
663 /* enable add patch to Period_EOF1(babble problem) 2012/03/28 */
664 if((MDrv_USBGetChipID_Port3() == CHIPID_AMBER5) ||
665 (MDrv_USBGetChipID_Port3() == CHIPID_AGATE))
666 {
667 USBC3_ORXBYTE(0x04,0x40); //add patch to Period_EOF1
668 }
669
670 /* enable eco for short packet MDATA 2012/07/05 */
671 if( (MDrv_USBGetChipID_Port3() == CHIPID_EDISON) )
672 {
673 USBC3_ORXBYTE(0x00,0x10); //short packet MDATA in Split transaction clears ACT bit (LS dev under a HS hub)
674 }
675
676 /* enable eco for pv2mi bridge mis-behavior 2012/12/05 */
677 if((MDrv_USBGetChipID_Port3() == CHIPID_EINSTEIN) ||
678 (MDrv_USBGetChipID_Port3() == CHIPID_NAPOLI) ||
679 (MDrv_USBGetChipID_Port3() == CHIPID_MIAMI))
680 {
681 USBC3_ORXBYTE(0x0A,0x40); //fix pv2mi bridge mis-behavior
682 }
683
684 if (MDrv_USBGetChipID_Port3()==CHIPID_PLUTO) // If is Pluto
685 UTMI3_ORXBYTE(0x09,0x01); //ISI improvement
686 else
687 UTMI3_ORXBYTE(0x13,0x02); //ISI improvement
688
689 if ( (MDrv_USBGetChipID_Port3() == CHIPID_NEPTUNE) ||
690 (MDrv_USBGetChipID_Port3() == CHIPID_ERIS) ||
691 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA) ||
692 (MDrv_USBGetChipID_Port3() == CHIPID_PLUTO) ||
693 (MDrv_USBGetChipID_Port3() == CHIPID_TRITON) ||
694 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA2) )
695 {
696 }
697 else
698 {
699 UTMI3_ORXBYTE(0x0b, 0x80); //TX timing select latch path
700 }
701
702 if (MDrv_USBGetChipID_Port3()==CHIPID_EUCLID) // Euclid
703 {
704 UTMI3_SETXBYTE(0x09,0x81);//0x20; //patch low tempture,FL meta issue and enable new FL RX engin
705 }
706 else
707 {
708 UTMI3_ORXBYTE(0x09,0x60);//0x20; //patch low tempture,FL meta issue and enable new FL RX engin
709 }
710
711 #if 1
712 DRV_USB_DBG(printf("Host: %X\n", mwOTG20_Control_HOST_SPD_TYP_Rd()));
713 if (mwOTG20_Control_HOST_SPD_TYP_Rd()==1) //low speed,for HID
714 UTMI3_ANDXBYTE(0x09,~0x40); //old setting
715 #endif
716
717 if ( (MDrv_USBGetChipID_Port3() == CHIPID_NEPTUNE) ||
718 (MDrv_USBGetChipID_Port3() == CHIPID_ERIS) ||
719 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA) ||
720 (MDrv_USBGetChipID_Port3() == CHIPID_PLUTO) ||
721 (MDrv_USBGetChipID_Port3() == CHIPID_TRITON) ||
722 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA2) )
723 {
724 UTMI3_ANDXBYTE(0x27,0xf3);
725 UTMI3_ORXBYTE(0x27,0x08); //(1) Offset 27 (��h3AA7) bit <3:2> set 2��b10 // RX bias current => 60uA (default 40uA)
726
727 //(2) Offset 2A (��h3AAA) bit <3:2> set 2��b11 // Squelch voltage => 100mV (default 150mV)
728 #ifdef DTV_STANDARD_LIB
729 UTMI3_SETXBYTE(0x2a,0x07);
730 #endif
731 }
732
733 if ( (MDrv_USBGetChipID_Port3() == CHIPID_NEPTUNE) ||
734 (MDrv_USBGetChipID_Port3() == CHIPID_ERIS) ||
735 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA) ||
736 (MDrv_USBGetChipID_Port3() == CHIPID_PLUTO) ||
737 (MDrv_USBGetChipID_Port3() == CHIPID_TRITON) ||
738 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA2) ||
739 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA3) ||
740 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA4) ||
741 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA7) ||
742 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA8) ||
743 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA9) ||
744 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA12) ||
745 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA13) ||
746 (MDrv_USBGetChipID_Port3() == CHIPID_JANUS) ||
747 (MDrv_USBGetChipID_Port3() == CHIPID_MARIA10) ||
748 (MDrv_USBGetChipID_Port3() == CHIPID_MACAW12) ||
749 (MDrv_USBGetChipID_Port3() == CHIPID_JANUS2) ||
750 (MDrv_USBGetChipID_Port3() == CHIPID_AMBER1) ||
751 (MDrv_USBGetChipID_Port3() == CHIPID_AMBER3) ||
752 (MDrv_USBGetChipID_Port3() == CHIPID_AMBER5) ||
753 (MDrv_USBGetChipID_Port3() == CHIPID_AMBER6) ||
754 (MDrv_USBGetChipID_Port3() == CHIPID_AMBER7) ||
755 (MDrv_USBGetChipID_Port3() == CHIPID_AMETHYST) )
756 {
757 UTMI3_ORXBYTE(0x15,0x20); //HOST CHIRP Detect
758 }
759 else
760 {
761 UTMI3_ORXBYTE(0x15,0x60); // change to 55 interface (bit6)
762 }
763
764 //(3) Offset 2D (��h3AAD) bit <5:3> set 3��b111 // HS_RTERM bias current 5/6
765 //XBYTE[0x128a]=0x87; //change UHC priority
766 //XBYTE[0x128d]&=0x0f; //clear bit 12~15
767 //XBYTE[0x128e]|=0xf; //upgrade UHC priority, set bit 0~3
768 MsOS_DelayTask(USB_HOST_INIT_DELAY);
769
770
771 //MDrv_Sys_SetXdataWindow1Base(USB_BUFFER_START_ADR_4K_ALIGN>>12); //switch window 1
772 gUsbStatus_Port3=USB_OK;
773 // gUsbTimeout=3; //set at flib_Host20_Enumerate_Port3()
774 RecoveryFlag_Port3=0; //initialize recovery flag
775 gUsbDeviceState_Port3=USB11_DEVICE; //1.1 at first
776
777 //gDeviceFatalError=FALSE;
778 if(flib_OTGH_Init_Port3(0))
779 result =TRUE;
780
781 return result;
782
783 }
784 #else // support device enumeration dividable
_MDrv_UsbHost_Init0_Port3(void)785 BOOLEAN _MDrv_UsbHost_Init0_Port3(void)
786 {
787 //BOOLEAN result=FALSE;
788
789 DRV_USB_DBG(printf("HOST200_main\n"));
790
791 MINI_DEBUG(printf("uinit\n"));
792 if (gUsbStatus_Port3==USB_EJECT)
793 {
794 //printf("2430:%02bx\n",XBYTE[0x2430]);
795 if (UHC3_READXBYTE(0x30)&2)
796 {
797 gUsbStatus_Port3=USB_OK;
798 }
799 else
800 return FALSE; //eject state
801 }
802
803 UTMI3_ORXBYTE(0x06,0x40); //Force HS TX current enable and CDR stage select
804 UTMI3_ANDXBYTE(0x06,~0x20); //clear bit 5
805 if (MDrv_USBGetChipID_Port3() == CHIPID_EMERALD)
806 UTMI3_ORXBYTE(0x06, 0x04); //Force HS TX current source enable, for MHL noise issue, for Emerald only
807
808 UTMI3_ORXBYTE(0x06,0x03); //reset UTMI
809 MsOS_DelayTask(2);
810 UTMI3_ANDXBYTE(0x06,0xfc);
811
812 if ( (MDrv_USBGetChipID_Port3() == CHIPID_NEPTUNE) ||
813 (MDrv_USBGetChipID_Port3() == CHIPID_ERIS) ||
814 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA) ||
815 (MDrv_USBGetChipID_Port3() == CHIPID_PLUTO) ||
816 (MDrv_USBGetChipID_Port3() == CHIPID_TRITON) ||
817 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA2) )
818 {
819 UTMI3_SETXBYTE(0x29,0x08);
820 }
821 else if (MDrv_USBGetChipID_Port3()==CHIPID_EUCLID) // Euclid
822 {
823 UTMI3_ANDXBYTE(0x29,0xF7); //disable full speed retime
824 }
825
826 #if defined(Enable_Issue_TestPacket) && !defined(ENABLE_HOST_TEST)
827 UTMI3_SETXBYTE(0x03,0); //for device disconnect status bit
828 #else
829 UTMI3_SETXBYTE(0x03,0xa8); //for device disconnect status bit
830 #endif
831
832 //XBYTE[gUTMI3_BASE+0x07]|=0x02; //
833 #ifdef DTV_STANDARD_LIB
834 if (MDrv_USBGetChipID_Port3()==CHIPID_NEPTUNE) //Neptune , after U06
835 {
836 if (MDrv_USBGetChipVersion_Port3()>= 0x06) //U07
837 {
838 UTMI3_ORXBYTE(0x07, 0x02);
839 UTMI3_SETXBYTE(0x2c,0xc1);
840 UTMI3_SETXBYTE(0x2d,0x3b);//enable TX common mode,
841 UTMI3_ORXBYTE(0x2f, 0x0e); //preemsis
842 }
843 }
844 else if ((MDrv_USBGetChipID_Port3()>=CHIPID_ERIS)&&(MDrv_USBGetChipID_Port3()<=CHIPID_TITANIA)) //Eris: 3 ,Titania: 4, Pluto: 5
845 {
846 UTMI3_SETXBYTE(0x2c,0xc5);
847 UTMI3_SETXBYTE(0x2d,0x3b);//enable TX common mode,
848 UTMI3_ORXBYTE(0x2f, 0x0e); //preemsis
849 }
850 else if (MDrv_USBGetChipID_Port3()==CHIPID_PLUTO) // Pluto: 5
851 {
852 UTMI3_ORXBYTE(0x2c, 0xc1);
853 UTMI3_ORXBYTE(0x2d, 0x3);//enable TX common mode,
854 UTMI3_ORXBYTE(0x2f, 0x4a); //preemsis
855 UTMI3_ORXBYTE(0x13, 0x70);
856 XBYTE_AND(gUTMI_BASE,0,0xfe); //clear port 0 IREF
857 }
858 else if (MDrv_USBGetChipID_Port3()==CHIPID_TITANIA2) // Titania 2
859 {
860 UTMI3_ORXBYTE(0x2c, 0xc1);
861 UTMI3_ORXBYTE(0x2d, 0x3);//enable TX common mode,
862 UTMI3_ORXBYTE(0x2f, 0x4a); //preemsis
863 }
864 else if (MDrv_USBGetChipID_Port3()==CHIPID_TRITON) //Triton=6
865 {
866 UTMI3_SETXBYTE(0x2c,0xc1);
867 UTMI3_SETXBYTE(0x2d,0x3b);//enable TX common mode,
868 UTMI3_ORXBYTE(0x2f,0x0e); //preemsis
869 }
870 else if (MDrv_USBGetChipID_Port3()==CHIPID_EUCLID) // Euclid
871 {
872 UTMI3_ORXBYTE(0x2c, 0xc1);
873 UTMI3_ORXBYTE(0x2d, 0x3);//enable TX common mode,
874 UTMI3_ORXBYTE(0x2f, 0x4a); //preemsis
875 }
876 else if ( (MDrv_USBGetChipID_Port3()==CHIPID_TITANIA3) || // Titania 3, Titania 4
877 (MDrv_USBGetChipID_Port3()==CHIPID_TITANIA4) ||
878 (MDrv_USBGetChipID_Port3()==CHIPID_TITANIA7) ||
879 (MDrv_USBGetChipID_Port3()==CHIPID_TITANIA8) ||
880 (MDrv_USBGetChipID_Port3()==CHIPID_TITANIA9) ||
881 (MDrv_USBGetChipID_Port3()==CHIPID_TITANIA12) ||
882 (MDrv_USBGetChipID_Port3() == CHIPID_JANUS) ||
883 (MDrv_USBGetChipID_Port3() == CHIPID_JANUS2) ||
884 (MDrv_USBGetChipID_Port3() == CHIPID_AMBER6) )
885 {
886 UTMI3_ORXBYTE(0x2c, 0x10); //TX-current adjust to 105%
887 UTMI3_ORXBYTE(0x2d, 0x02); //Pre-emphasis enable
888 UTMI3_ORXBYTE(0x2f, 0x81); //HS_TX common mode current enable (100mV);Pre-emphasis enable (10%)
889 UTMI3_ORXBYTE(0x09,0x81); //UTMI RX anti-dead-lock, ISI improvement
890 }
891 else if ( (MDrv_USBGetChipID_Port3()==CHIPID_AMBER1) ||
892 (MDrv_USBGetChipID_Port3()==CHIPID_AMBER5) ||
893 (MDrv_USBGetChipID_Port3()==CHIPID_AMBER7) ||
894 (MDrv_USBGetChipID_Port3()==CHIPID_AMBER3) ||
895 (MDrv_USBGetChipID_Port3()==CHIPID_AMETHYST) ||
896 (MDrv_USBGetChipID_Port3()==CHIPID_EAGLE))
897 {
898 //for Amber1 later 40nm before Agate
899 UTMI3_ORXBYTE(0x2c, 0x98);
900 UTMI3_ORXBYTE(0x2d, 0x02);
901 UTMI3_ORXBYTE(0x2e, 0x10);
902 UTMI3_ORXBYTE(0x2f, 0x01);
903 UTMI3_ORXBYTE(0x09,0x81); //UTMI RX anti-dead-lock, ISI improvement
904 }
905 else if ( (MDrv_USBGetChipID_Port3() == CHIPID_EDISON) ||
906 (MDrv_USBGetChipID_Port3() == CHIPID_EIFFEL) )
907 {
908 //for Agate later 40nm, same as 55nm setting2
909 UTMI3_ORXBYTE(0x2c, 0x90); //TX-current adjust to 105%
910 UTMI3_ORXBYTE(0x2d, 0x02); //Pre-emphasis enable
911 UTMI3_ORXBYTE(0x2f, 0x81); //HS_TX common mode current enable (100mV);Pre-emphasis enable (10%)
912 UTMI3_ORXBYTE(0x09,0x81); //UTMI RX anti-dead-lock, ISI improvement
913 }
914 else //for Agate later 40nm, same as 55nm setting1
915 {
916 UTMI3_ORXBYTE(0x2c, 0x10); //TX-current adjust to 105%
917 UTMI3_ORXBYTE(0x2d, 0x02); //Pre-emphasis enable
918 UTMI3_ORXBYTE(0x2f, 0x81); //HS_TX common mode current enable (100mV);Pre-emphasis enable (10%)
919 UTMI3_ORXBYTE(0x09,0x81); //UTMI RX anti-dead-lock, ISI improvement
920 }
921 #endif
922
923 if ( (MDrv_USBGetChipID_Port3() == CHIPID_EIFFEL) )
924 UTMI3_ANDXBYTE(0x08, ~0x08); //Special setting for Eiffel analog LIB issue
925 else
926 {
927 //for Edison later 240M clock enhance, early chip will ignore this 2 bits
928 UTMI3_ORXBYTE(0x08,0x08); //bit<3> for 240's phase as 120's clock set 1, bit<4> for 240Mhz in mac 0 for faraday 1 for etron
929 }
930
931 /* Enable Cross Point ECO 2012/03/20 */
932 if ((MDrv_USBGetChipID_Port3() == CHIPID_ELK) ||
933 (MDrv_USBGetChipID_Port3() == CHIPID_AMBER5) ||
934 (MDrv_USBGetChipID_Port3() == CHIPID_EAGLE) ||
935 (MDrv_USBGetChipID_Port3() == CHIPID_EMERALD) ||
936 (MDrv_USBGetChipID_Port3() == CHIPID_EDISON) ||
937 (MDrv_USBGetChipID_Port3() == CHIPID_AGATE))
938 {
939 UTMI3_ORXBYTE(0x04,0x40); //deglitch SE0 (low-speed cross point)
940 }
941 else if((MDrv_USBGetChipID_Port3() == CHIPID_JANUS2))
942 {
943 UTMI3_ORXBYTE(0x0a,0x80); //deglitch SE0 (low-speed cross point)
944 }
945
946 /* Enable Power Noice ECO 2012/03/20 */
947 if ((MDrv_USBGetChipID_Port3() == CHIPID_JANUS2) ||
948 (MDrv_USBGetChipID_Port3() == CHIPID_ELK) ||
949 (MDrv_USBGetChipID_Port3() == CHIPID_AMBER5) ||
950 (MDrv_USBGetChipID_Port3() == CHIPID_EAGLE) ||
951 (MDrv_USBGetChipID_Port3() == CHIPID_EMERALD) ||
952 (MDrv_USBGetChipID_Port3() == CHIPID_EDISON) ||
953 (MDrv_USBGetChipID_Port3() == CHIPID_AGATE))
954 {
955 USBC3_ORXBYTE(0x02,0x40); //use eof2 to reset state machine (power noise)
956 }
957
958 /* Enable Tx/Rx Reset Clock Gatting ECO 2012/03/27 */
959 if((MDrv_USBGetChipID_Port3() == CHIPID_ELK) ||
960 (MDrv_USBGetChipID_Port3() == CHIPID_AMBER5) ||
961 (MDrv_USBGetChipID_Port3() == CHIPID_EAGLE) ||
962 (MDrv_USBGetChipID_Port3() == CHIPID_EMERALD) ||
963 (MDrv_USBGetChipID_Port3() == CHIPID_EDISON) ||
964 (MDrv_USBGetChipID_Port3() == CHIPID_AGATE))
965 {
966 UTMI3_ORXBYTE(0x04,0x20); //hw auto deassert sw reset (tx/rx reset)
967 }
968
969 /* enable patch for the assertion of interrupt(Lose short packet interrupt) 2012/03/28 */
970 if((MDrv_USBGetChipID_Port3() == CHIPID_AMBER5) ||
971 (MDrv_USBGetChipID_Port3() == CHIPID_AGATE))
972 {
973 USBC3_ORXBYTE(0x04,0x80); //patch for the assertion of interrupt
974 }
975
976 /* enable add patch to Period_EOF1(babble problem) 2012/03/28 */
977 if((MDrv_USBGetChipID_Port3() == CHIPID_AMBER5) ||
978 (MDrv_USBGetChipID_Port3() == CHIPID_AGATE))
979 {
980 USBC3_ORXBYTE(0x04,0x40); //add patch to Period_EOF1
981 }
982
983 /* enable eco for short packet MDATA 2012/07/05 */
984 if( (MDrv_USBGetChipID_Port3() == CHIPID_EDISON) )
985 {
986 USBC3_ORXBYTE(0x00,0x10); //short packet MDATA in Split transaction clears ACT bit (LS dev under a HS hub)
987 }
988
989 /* enable eco for pv2mi bridge mis-behavior 2012/12/05 */
990 if((MDrv_USBGetChipID_Port3() == CHIPID_EINSTEIN) ||
991 (MDrv_USBGetChipID_Port3() == CHIPID_NAPOLI) ||
992 (MDrv_USBGetChipID_Port3() == CHIPID_MIAMI))
993 {
994 USBC3_ORXBYTE(0x0A,0x40); //fix pv2mi bridge mis-behavior
995 }
996
997 if (MDrv_USBGetChipID_Port3()==CHIPID_PLUTO) // If is Pluto
998 UTMI3_ORXBYTE(0x09,0x01); //ISI improvement
999 else
1000 UTMI3_ORXBYTE(0x13,0x02); //ISI improvement
1001
1002 if ( (MDrv_USBGetChipID_Port3() == CHIPID_NEPTUNE) ||
1003 (MDrv_USBGetChipID_Port3() == CHIPID_ERIS) ||
1004 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA) ||
1005 (MDrv_USBGetChipID_Port3() == CHIPID_PLUTO) ||
1006 (MDrv_USBGetChipID_Port3() == CHIPID_TRITON) ||
1007 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA2) )
1008 {
1009 }
1010 else
1011 {
1012 UTMI3_ORXBYTE(0x0b, 0x80); //TX timing select latch path
1013 }
1014
1015 if (MDrv_USBGetChipID_Port3()==CHIPID_EUCLID) // Euclid
1016 {
1017 UTMI3_SETXBYTE(0x09,0x81);//0x20; //patch low tempture,FL meta issue and enable new FL RX engin
1018 }
1019 else
1020 {
1021 UTMI3_ORXBYTE(0x09,0x60);//0x20; //patch low tempture,FL meta issue and enable new FL RX engin
1022 }
1023
1024 #if 1
1025 DRV_USB_DBG(printf("Host: %X\n", mwOTG20_Control_HOST_SPD_TYP_Rd()));
1026 if (mwOTG20_Control_HOST_SPD_TYP_Rd()==1) //low speed,for HID
1027 UTMI3_ANDXBYTE(0x09,~0x40); //old setting
1028 #endif
1029
1030 if ( (MDrv_USBGetChipID_Port3() == CHIPID_NEPTUNE) ||
1031 (MDrv_USBGetChipID_Port3() == CHIPID_ERIS) ||
1032 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA) ||
1033 (MDrv_USBGetChipID_Port3() == CHIPID_PLUTO) ||
1034 (MDrv_USBGetChipID_Port3() == CHIPID_TRITON) ||
1035 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA2) )
1036 {
1037 UTMI3_ANDXBYTE(0x27,0xf3);
1038 UTMI3_ORXBYTE(0x27,0x08); //(1) Offset 27 (��h3AA7) bit <3:2> set 2��b10 // RX bias current => 60uA (default 40uA)
1039
1040 //(2) Offset 2A (��h3AAA) bit <3:2> set 2��b11 // Squelch voltage => 100mV (default 150mV)
1041 #ifdef DTV_STANDARD_LIB
1042 UTMI3_SETXBYTE(0x2a,0x07);
1043 #endif
1044 }
1045
1046 if ( (MDrv_USBGetChipID_Port3() == CHIPID_NEPTUNE) ||
1047 (MDrv_USBGetChipID_Port3() == CHIPID_ERIS) ||
1048 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA) ||
1049 (MDrv_USBGetChipID_Port3() == CHIPID_PLUTO) ||
1050 (MDrv_USBGetChipID_Port3() == CHIPID_TRITON) ||
1051 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA2) ||
1052 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA3) ||
1053 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA4) ||
1054 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA7) ||
1055 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA8) ||
1056 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA9) ||
1057 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA12) ||
1058 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA13) ||
1059 (MDrv_USBGetChipID_Port3() == CHIPID_JANUS) ||
1060 (MDrv_USBGetChipID_Port3() == CHIPID_MARIA10) ||
1061 (MDrv_USBGetChipID_Port3() == CHIPID_MACAW12) ||
1062 (MDrv_USBGetChipID_Port3() == CHIPID_JANUS2) ||
1063 (MDrv_USBGetChipID_Port3() == CHIPID_AMBER1) ||
1064 (MDrv_USBGetChipID_Port3() == CHIPID_AMBER3) ||
1065 (MDrv_USBGetChipID_Port3() == CHIPID_AMBER5) ||
1066 (MDrv_USBGetChipID_Port3() == CHIPID_AMBER6) ||
1067 (MDrv_USBGetChipID_Port3() == CHIPID_AMBER7) ||
1068 (MDrv_USBGetChipID_Port3() == CHIPID_AMETHYST) )
1069 {
1070 UTMI3_ORXBYTE(0x15,0x20); //HOST CHIRP Detect
1071 }
1072 else
1073 {
1074 UTMI3_ORXBYTE(0x15,0x60); // change to 55 interface (bit6)
1075 }
1076
1077 //(3) Offset 2D (��h3AAD) bit <5:3> set 3��b111 // HS_RTERM bias current 5/6
1078 //XBYTE[0x128a]=0x87; //change UHC priority
1079 //XBYTE[0x128d]&=0x0f; //clear bit 12~15
1080 //XBYTE[0x128e]|=0xf; //upgrade UHC priority, set bit 0~3
1081 //MDrv_Sys_SetXdataWindow1Base(USB_BUFFER_START_ADR_4K_ALIGN>>12); //switch window 1
1082 gUsbStatus_Port3=USB_OK;
1083 // gUsbTimeout=3; //set at flib_Host20_Enumerate_Port3()
1084 RecoveryFlag_Port3=0; //initialize recovery flag
1085 gUsbDeviceState_Port3=USB11_DEVICE; //1.1 at first
1086
1087 //gDeviceFatalError=FALSE;
1088
1089 return TRUE;
1090 }
1091 //MsOS_DelayTask(500);
1092
_MDrv_UsbHost_Init1_Port3(void)1093 BOOLEAN _MDrv_UsbHost_Init1_Port3(void)
1094 {
1095 BOOLEAN result=FALSE;
1096
1097 if(flib_OTGH_Init_Port3(0))
1098 result =TRUE;
1099
1100 return result;
1101
1102 }
MDrv_UsbHost_Init_Port3(void)1103 BOOLEAN MDrv_UsbHost_Init_Port3(void)
1104 {
1105 BOOLEAN result;
1106
1107 result = _MDrv_UsbHost_Init0_Port3();
1108 if (result == FALSE)
1109 return FALSE;
1110
1111 MsOS_DelayTask(USB_HOST_INIT_DELAY);
1112 return(_MDrv_UsbHost_Init1_Port3());
1113 }
1114
1115 #endif
MDrv_UsbHost_Init_Enum_Port3(void)1116 BOOLEAN MDrv_UsbHost_Init_Enum_Port3(void)
1117 {
1118 BOOLEAN result;
1119 result=MDrv_Usb_Device_Enum_Port3();
1120 return result;
1121 }
MDrv_UsbGetMaxLUNCount_Port3()1122 U8 MDrv_UsbGetMaxLUNCount_Port3()
1123 {
1124 if (gUsbDeviceState_Port3==BAD_DEVICE)
1125 return 0;
1126
1127 if (mwHost20_PORTSC_ConnectStatus_Rd()==0)
1128 return 0;
1129 else return (Mass_stor_us1_port3.max_lun+1);
1130 }
MDrv_GET_MASS_MAX_LUN_PORT3()1131 U8 MDrv_GET_MASS_MAX_LUN_PORT3()
1132 {
1133 //printf("Get max lun func:%02bx\n",Mass_stor_us1.max_lun);
1134 if (mwHost20_PORTSC_ConnectStatus_Rd()==0)
1135 return 0;
1136 else return Mass_stor_us1_port3.max_lun;
1137 }
1138
1139 extern void GetValidLun_Port3(void);
1140
1141 #ifdef ATV_SERISE_USE
DisableINT(void)1142 void DisableINT(void)
1143 {
1144 XBYTE[0x2B03]|=0x20;
1145 XBYTE[0x2B18]|=0x80;
1146 XBYTE[0x2B19]|=0x04;
1147 XBYTE[0x2B1A]|=0x80;
1148 }
EnableINT(void)1149 void EnableINT(void)
1150 {
1151 XBYTE[0x2B03]&=0xDF;
1152 XBYTE[0x2B18]&=0x7F;
1153 XBYTE[0x2B19]&=0xFB;
1154 XBYTE[0x2B1A]&=0x7F;
1155 }
1156 #endif
1157 extern U8 ValidLunNum_Port3;
MDrv_GET_VALID_LUN_NUM_PORT3(void)1158 U8 MDrv_GET_VALID_LUN_NUM_PORT3(void)
1159 {
1160 return ValidLunNum_Port3;
1161 }
MDrv_GET_MASS_VALID_LUN_PORT3()1162 U8 MDrv_GET_MASS_VALID_LUN_PORT3()
1163 {
1164 U8 LunMatrix=0,i;
1165 struct LUN_Device* LunDevice;
1166 //printf("Get valid lun func\n");
1167 if (mwHost20_PORTSC_ConnectStatus_Rd()==0)
1168 return USB_NOT_RESPONSE; //device is not connected
1169
1170 if (gUsbDeviceState_Port3==BAD_DEVICE) return 0;
1171
1172 if (gSpeed_Port3==1) return 0; //low speed device
1173
1174 //if (gDeviceFatalError) return USB_NOT_RESPONSE;
1175 if (gUsbStatus_Port3==USB_EJECT) return USB_NOT_RESPONSE;
1176
1177 LunDevice = Mass_stor_us1_port3.Mass_stor_device;
1178 if (psAttachDevice_Port3->saCD[0].sInterface[0].bInterfaceClass != USB_INTERFACE_CLASS_MSD)
1179 {
1180 DRV_USB_DBG(printf(" LUN structure not initialized!!\n"));
1181 return USB_NOT_RESPONSE;
1182 }
1183
1184 #ifdef ATV_SERISE_USE
1185 #ifdef Enable_Close_INT
1186 //XBYTE[0x2B00]|=0x02;
1187 DisableINT();
1188 #endif
1189 #endif
1190 GetValidLun_Port3();
1191 #ifdef ATV_SERISE_USE
1192 #ifdef Enable_Close_INT
1193 //XBYTE[0x2B00]&=0xFD;
1194 EnableINT();
1195 #endif
1196 #endif
1197
1198 if (gUsbStatus_Port3==USB_TIMEOUT)
1199 {
1200 #ifdef USE_XDATA_ADDRESS_0XF000
1201 MDrv_USB_ReleaseXdataWindow1_Port3();
1202 #endif
1203 return USB_NOT_RESPONSE; //USB DEVICE not responding
1204 }
1205
1206 for (i=0; i <= Mass_stor_us1_port3.max_lun ; i++)
1207 {
1208 LunMatrix=LunMatrix<<1 ;
1209 //printf("bDeviceReady:%02bx\n",LunDevice[Mass_stor_us1.max_lun-i].bDeviceReady);
1210 if (LunDevice[Mass_stor_us1_port3.max_lun-i].bDeviceReady == TRUE)
1211 {
1212 LunMatrix|=1;
1213 }
1214 }
1215
1216 return LunMatrix;
1217 }
1218 U32 USB_BUFFER_START_ADR_4K_ALIGN_Var_Port3;
MDrv_USB_Init_Port3(U32 USBAdr)1219 void MDrv_USB_Init_Port3(U32 USBAdr)
1220 {
1221 //gProjectCode=ProjectCode;
1222 //gDeviceFatalError=FALSE;
1223
1224 USB_BUFFER_START_ADR_4K_ALIGN_Var_Port3=USBAdr;
1225
1226 gUsbRetryCount_Port3=3;
1227
1228 if (USB_BUFFER_START_ADR_4K_ALIGN_Var_Port3 % 4096 != 0)
1229 {
1230 DRV_USB_DBG( printf("Error USB Port3 Starting address is not 4K alignmented\n"));
1231 }
1232
1233 //#ifndef USB_POWER_SAVING_MODE
1234 if (!drvUSBHost_isPowerSaveModeEnable())
1235 {
1236 mbFUSBH200_VBUS_ON_Set();
1237 if ( (MDrv_USBGetChipID_Port3()==CHIPID_NEPTUNE) || //Neptune
1238 (MDrv_USBGetChipID_Port3()==CHIPID_ERIS) || //Eris
1239 (MDrv_USBGetChipID_Port3()==CHIPID_TITANIA) || //Titania
1240 (MDrv_USBGetChipID_Port3()==CHIPID_PLUTO) || //Pluto
1241 (MDrv_USBGetChipID_Port3()==CHIPID_TRITON) || //Triton
1242 (MDrv_USBGetChipID_Port3()==CHIPID_TITANIA2) ) // Titania 2
1243 {
1244 UHC3_ANDXBYTE(0x34,0xBF); //set suspend
1245 UHC3_ORXBYTE(0x34,0x40); //clr suspend
1246 MsOS_DelayTask(2);
1247 UTMI3_ORXBYTE(0x00,0x01); // override mode enable for power down control
1248 UTMI3_ORXBYTE(0x01,0x40); // enable IREF power down
1249 UTMI3_ORXBYTE(0x01,0x02); // enable PLL power down
1250 UTMI3_ANDXBYTE(0x01,0xFD); // disable PLL power down
1251 }
1252 mbHost20_USBCMD_HCReset_Set();
1253 }
1254 //#endif
1255 }
1256
MDrv_GetUsbDeviceStatusPort3()1257 U8 MDrv_GetUsbDeviceStatusPort3()
1258 {
1259 return gUsbDeviceState_Port3;
1260 }
1261
MDrv_SetUsbDeviceStatus_Port3(U8 status)1262 void MDrv_SetUsbDeviceStatus_Port3(U8 status)
1263 {
1264 gUsbDeviceState_Port3 = status;
1265 }
1266
MDrv_ClearUsbDeviceStatusPort3(void)1267 void MDrv_ClearUsbDeviceStatusPort3(void)
1268 {
1269 //if (gUsbDeviceState_Port3==BAD_DEVICE)
1270 //{
1271 // printf("Clear bad device\n");
1272 // gUsbDeviceState_Port3=USB11_DEVICE;
1273 //}
1274 }
ResetUsbHardwarePort3(void)1275 void ResetUsbHardwarePort3(void)
1276 {
1277 UTMI3_ORXBYTE(0x06,0x03); //reset UTMI
1278 UTMI3_ANDXBYTE(0x06,0xfc);
1279 mbHost20_USBCMD_HCReset_Set();
1280 //MsOS_DelayTask(200);
1281 }
1282 UINT32 UsbStartTimePort3=0;
1283 UINT32 UsbPowerSavingTimerPort3=0;
1284
1285 //#ifdef USB_POWER_SAVING_MODE
1286 extern void UsbTurnOffPowerDownMode(void);
1287 extern void UsbTurnOnPowerDownMode(void);
UsbPort3UTMIInitial(void)1288 void UsbPort3UTMIInitial(void)
1289 {
1290 mbFUSBH200_VBUS_ON_Set();
1291 UHC3_ANDXBYTE(0x34,0xBF); //set suspend
1292 UHC3_ORXBYTE(0x34,0x40); //clr suspend
1293 MsOS_DelayTask(2);
1294 UTMI3_ORXBYTE(0x00,0x01); // override mode enable for power down control
1295 UTMI3_ORXBYTE(0x01,0x40); // enable IREF power down
1296 UTMI3_ORXBYTE(0x01,0x02); // enable PLL power down
1297 UTMI3_ANDXBYTE(0x01,0xFD); // disable PLL power down
1298 UTMI3_ANDXBYTE(0x00,~0x01); // override mode enable for power down control
1299
1300 mbHost20_USBCMD_HCReset_Set();
1301 }
1302 //#endif
1303
1304 #ifdef Enable_Issue_TestPacketByHW
1305 BOOLEAN isInitForTestPkt_Port3 = TRUE;
1306 void MDrv_UsbSendTestPacket_Port3(void);
1307 #endif
1308
MDrv_UsbDeviceConnect_Port3(void)1309 BOOLEAN MDrv_UsbDeviceConnect_Port3(void)
1310 {
1311 /*
1312 if (gDeviceFatalError)
1313 {
1314 gDeviceFatalError=FALSE;
1315 ResetUsbHardware();
1316 return FALSE;
1317 }*/
1318 /*
1319 if (XBYTE[0x0B04]&0x40)
1320 {
1321 XBYTE[0x3AC0] &= 0xFE;
1322 }
1323 */
1324 #ifdef Enable_Issue_TestPacketByHW
1325 if (isInitForTestPkt_Port3)
1326 {
1327 isInitForTestPkt_Port3= FALSE;
1328 MDrv_UsbSendTestPacket_Port3();
1329 }
1330 return FALSE;
1331 #endif
1332
1333 #if 1
1334 if (drvUSBHost_isPowerSaveModeEnable())
1335 {
1336 if (gUsbDeviceState_Port3==WAIT_INIT)
1337 {
1338 if (MsOS_Timer_DiffTimeFromNow(UsbPowerSavingTimerPort3) < 300 )
1339 return FALSE;
1340 }
1341 if (gUsbDeviceState_Port3==POWER_SAVING)
1342 {
1343 #ifdef ENABLE_HOST_TEST
1344 if (USBC3_READXBYTE(8)&0xC0)
1345 #else
1346 if (USBC3_READXBYTE(8)&0x40)
1347 #endif
1348 {
1349 drvUSBHost_TurnOffPowerDownMode_Port3();
1350
1351 UsbPowerSavingTimerPort3 = MsOS_GetSystemTime();
1352 gUsbDeviceState_Port3=WAIT_INIT;
1353 return FALSE;
1354 }
1355 else
1356 {
1357 return FALSE;
1358 }
1359 }
1360 }
1361 #else
1362 #ifdef USB_POWER_SAVING_MODE
1363 //#ifdef USBHOST2PORT
1364 if (gUsbDeviceState==WAIT_INIT)
1365 return FALSE;
1366 //#endif
1367 if (gUsbDeviceState_Port3==WAIT_INIT)
1368 {
1369 if (MsOS_Timer_DiffTimeFromNow(UsbPowerSavingTimerPort3) < 300 )
1370 return FALSE;
1371 }
1372 if (gUsbDeviceState_Port3==POWER_SAVING)
1373 {
1374 if (XBYTE[gUSBC3_BASE+8]&0x40)
1375 {
1376 UsbTurnOffPowerDownMode();
1377 //UsbPort0UTMIInitial();
1378 drvUSBHost_UTMIInitial();
1379 //#ifdef USBHOST2PORT
1380 UsbPort1UTMIInitial();
1381 if (gUsbDeviceState==POWER_SAVING)
1382 gUsbDeviceState=NO_DEVICE;
1383 //#endif
1384 UsbPowerSavingTimerPort3 = MsOS_GetSystemTime();
1385 gUsbDeviceState_Port3=WAIT_INIT;
1386 return FALSE;
1387 //MsOS_DelayTask(300);
1388 }
1389 else
1390 {
1391 return FALSE;
1392 }
1393 }
1394 #endif
1395 #endif
1396 if (gUsbStatus_Port3==USB_EJECT)
1397 {
1398 if (UHC3_READXBYTE(0x30)&2)
1399 {
1400 gUsbStatus_Port3=USB_OK;
1401 }
1402 else
1403 return FALSE; //eject state
1404 }
1405 //FUSBH200_Driver_VBUS(); //make sure device is connected , then turn on VBUS
1406
1407 if (mwHost20_PORTSC_ConnectStatus_Rd())
1408 {
1409 if ( (gUsbDeviceState_Port3==USB11_DEVICE) ||(gUsbDeviceState_Port3==USB20_DEVICE) )
1410 {
1411 // If the device is connected and we get a connection change.
1412 // It means that the user change the device and we just missed.
1413 if (mwHost20_PORTSC_ConnectChange_Rd())
1414 {
1415 printf("dev changed, we missed\n");
1416 gSpeed_Port3=0xff; //reset this value
1417 UHC3_ANDXBYTE(0x40, (U8)~0x80);//clear force enter FSmode
1418 gUsbDeviceState_Port3= NO_DEVICE;
1419 return FALSE;
1420 }
1421 }
1422
1423 if (gUsbDeviceState_Port3==BAD_DEVICE) return FALSE; //not repeating doing emunerate
1424
1425 #if 0
1426 if (gSpeed_Port3==0x01)
1427 {
1428 MINI_DEBUG(printf("ls-exit\n"));
1429 return FALSE;
1430 }
1431 #endif
1432
1433 if (gUsbDeviceState_Port3==NO_DEVICE)
1434 gUsbDeviceState_Port3=CONNECT_DEVICE;
1435
1436 return TRUE;
1437 }
1438 else
1439 {
1440 gSpeed_Port3 = 0xFF;
1441 UHC3_ANDXBYTE(0x40,(U8)~0x80);//clear force enter FSmode
1442 #if 1
1443 if (drvUSBHost_isPowerSaveModeEnable())
1444 {
1445 if (gUsbDeviceState_Port3!=POWER_SAVING)
1446 drvUSBHost_TurnOnPowerDownMode_Port3();
1447
1448 gUsbDeviceState_Port3=POWER_SAVING;
1449 }
1450 else
1451 gUsbDeviceState_Port3=NO_DEVICE;
1452 #else
1453 #ifdef USB_POWER_SAVING_MODE
1454 if ((gUsbDeviceState==NO_DEVICE)||(gUsbDeviceState==POWER_SAVING))
1455 {
1456 if (gUsbDeviceState_Port3!=POWER_SAVING)
1457 UsbTurnOnPowerDownMode();
1458 gUsbDeviceState=POWER_SAVING;
1459 gUsbDeviceState_Port3=POWER_SAVING;
1460 }
1461 else
1462 gUsbDeviceState_Port3=NO_DEVICE;
1463 #else
1464 gUsbDeviceState_Port3=NO_DEVICE;
1465 #endif
1466 #endif
1467
1468
1469 #ifndef ATV_SERISE_USE
1470 if (MsOS_Timer_DiffTimeFromNow(UsbStartTimePort3) > 1000 )
1471 {
1472
1473 UsbStartTimePort3=MsOS_GetSystemTime();
1474 ResetUsbHardwarePort3();
1475
1476 }
1477 #else
1478 UsbStartTimePort3++;
1479 if(UsbStartTimePort3>0x600)
1480 {
1481 UsbStartTimePort3=0;
1482 ResetUsbHardwarePort3();
1483 }
1484 #endif
1485 //MINI_DEBUG( printf("no_con \n"));
1486 return FALSE;
1487 }
1488 }
1489
MDrv_EjectUsbDevice_Port3(void)1490 void MDrv_EjectUsbDevice_Port3(void)
1491 {
1492 struct LUN_Device* LunDevice;
1493 U8 i;
1494
1495 //printf("eject\n");
1496 LunDevice = Mass_stor_us1_port3.Mass_stor_device;
1497 for (i=0; i <= Mass_stor_us1_port3.max_lun ; i++)
1498 {
1499
1500 if (LunDevice[i].bDeviceReady == TRUE)
1501 {
1502 vSCSI_EJECT_DEVICE_Port3(i);
1503 gUsbStatus_Port3=USB_EJECT;
1504 mwHost20_PORTSC_ConnectChange_Set(); //clear port connect change bit
1505 //printf("ej_ok\n");
1506 }
1507 }
1508 flib_Host20_Close_Port3();
1509
1510 }
MDrv_UsbClose_Port3(void)1511 void MDrv_UsbClose_Port3(void)
1512 {
1513 flib_Host20_Close_Port3();
1514 }
1515
MDrv_UsbBlockReadToMIU_Port3(U8 lun,U32 u32BlockAddr,U32 u32BlockNum,U32 u32MIUAddr)1516 BOOLEAN MDrv_UsbBlockReadToMIU_Port3(U8 lun,U32 u32BlockAddr, U32 u32BlockNum,U32 u32MIUAddr)
1517 {
1518 BOOLEAN result;
1519 U8 retrycnt=0;
1520 struct LUN_Device* LunDevice = Mass_stor_us1_port3.Mass_stor_device;
1521
1522 if (mwHost20_PORTSC_ConnectStatus_Rd()==0)
1523 return FALSE; //device is not connected
1524
1525 if (gUsbDeviceState_Port3==BAD_DEVICE) return FALSE;
1526
1527
1528 if (u32BlockAddr > Mass_stor_us1_port3.Mass_stor_device[lun].u32BlockTotalNum)
1529 {
1530 MINI_DEBUG(printf("USBRead address is over the range:%lx\n",u32BlockAddr));
1531 return FALSE;
1532 }
1533 //printf("usb read sector:%lx\n",u32BlockNum);
1534
1535 #ifdef ATV_SERISE_USE
1536 #ifdef Enable_Close_INT
1537 XBYTE[0x2B00]|=0x02;
1538 DisableINT();
1539 #endif
1540 #endif
1541 //result= bSCSI_Read_Write10_Port3(FALSE,lun, u32BlockAddr, u32BlockNum, u32MIUAddr);
1542 while (1)
1543 {
1544 retrycnt++;
1545 result= bSCSI_Read_Write10_Port3(FALSE,lun, u32BlockAddr, u32BlockNum, PhytoCacheAddr(u32MIUAddr));
1546 if (result==TRUE) break;
1547 if (result==FALSE)
1548 {
1549 if (retrycnt > gUsbRetryCount_Port3)
1550 {
1551 if (gUsbStatus_Port3==USB_TIMEOUT)
1552 gUsbDeviceState_Port3=BAD_DEVICE; //mark as bad device
1553 else if(gUsbStatus_Port3 == USB_OK)
1554 {//give another chance : to restart the host & device(for example : read failed with device STALL)
1555 if(retrycnt > gUsbRetryCount_Port3+1)
1556 break;
1557 if (MDrv_Usb_Device_Enum_Port3()==FALSE)
1558 {
1559 result=FALSE;
1560 break;
1561 }
1562 continue;
1563 }
1564 else
1565 LunDevice[lun].bDeviceValid=FALSE; //mark as bad lun
1566
1567 break; //return FALSE
1568 }
1569 MINI_DEBUG( printf("USBDisk Read failed\n"));
1570 if (gUsbStatus_Port3==USB_TIMEOUT)
1571 {
1572 if ((retrycnt==2)&&(mwOTG20_Control_HOST_SPD_TYP_Rd()==2) ) //make sure it is hi speed
1573 {
1574 MINI_DEBUG(printf("Force FS\n"));
1575 UHC3_ORXBYTE(0x40,0x80);//force enter FSmode
1576 }
1577 #ifndef ATV_SERISE_USE
1578 msAPI_Timer_ResetWDT();
1579 #else
1580 #ifdef Enable_Close_INT
1581 XBYTE[0x2B00]&=0xFD;
1582 EnableINT();
1583 #endif
1584 #endif
1585
1586 #ifdef Enable_Low_Temperature_Patch
1587 if(gSpeed_Port3==0)
1588 {
1589 //printf("\r\n CDR toggle!!",0);
1590 UTMI3_SETXBYTE(0x0a, UTMI3_READXBYTE(0x0a)^0x10); //invert CDR_CLOCK
1591 UTMI3_ORXBYTE(0x06,0x03); //reset UTMI
1592 UTMI3_ANDXBYTE(0x06,0xfc);
1593 }
1594 #endif
1595
1596 // MDrv_Usb_Device_Enum(); //reinit usb device
1597 if (MDrv_Usb_Device_Enum_Port3()==FALSE)
1598 {
1599 result=FALSE;
1600 break;
1601 }
1602 }
1603 }
1604
1605 }
1606
1607 #ifdef ATV_SERISE_USE
1608 #ifdef Enable_Close_INT
1609 XBYTE[0x2B00]&=0xFD;
1610 EnableINT();
1611 #endif
1612 #endif
1613 //MDrv_Sys_ReleaseXdataWindow1();
1614 if (result==FALSE)
1615 {
1616 DRV_USB_DBG(printf("USBDisk Read failed\n"));
1617 //printf("read failed\n");
1618 }
1619
1620 return result;
1621
1622 }
1623
MDrv_UsbBlockWriteFromMIU_Port3(U8 lun,U32 u32BlockAddr,U32 u32BlockNum,U32 u32MIUAddr)1624 BOOLEAN MDrv_UsbBlockWriteFromMIU_Port3(U8 lun, U32 u32BlockAddr, U32 u32BlockNum,U32 u32MIUAddr)
1625 {
1626 BOOLEAN result;
1627 if (mwHost20_PORTSC_ConnectStatus_Rd()==0)
1628 return FALSE; //device is not connected
1629
1630 if (gUsbDeviceState_Port3==BAD_DEVICE) return FALSE;
1631
1632 if (u32BlockAddr > Mass_stor_us1_port3.Mass_stor_device[lun].u32BlockTotalNum)
1633 {
1634 MINI_DEBUG(printf("USBWrite address is over the range:%lx\n",u32BlockAddr));
1635 return FALSE;
1636 }
1637
1638 result= bSCSI_Read_Write10_Port3(TRUE,lun, u32BlockAddr, u32BlockNum, PhytoCacheAddr(u32MIUAddr));
1639
1640 return result;
1641
1642 }
MDrv_GetUsbBlockSize_Port3(U8 lun)1643 U32 MDrv_GetUsbBlockSize_Port3(U8 lun)
1644 {
1645 return Mass_stor_us1_port3.Mass_stor_device[lun].u32BlockSize;
1646 }
1647
MDrv_GetUsbBlockNum_Port3(U8 lun)1648 U32 MDrv_GetUsbBlockNum_Port3(U8 lun)
1649 {
1650 return Mass_stor_us1_port3.Mass_stor_device[lun].u32BlockTotalNum;
1651 }
1652
1653
MDrv_USB_GetXDataExtStackCountPort3(void)1654 U8 MDrv_USB_GetXDataExtStackCountPort3(void)
1655 {
1656 return xdwin1_lockCount_Port3;
1657 }
1658 //---if you don't know how to use it, don't use it
1659 #if 0
1660 void EnterUXBModePort3()
1661 {
1662 MINI_DEBUG( printf("Enter UXB mode\n"));
1663 UHC_XBYTE(0x40)|=0x80;//force enter FSmode
1664 MDrv_Usb_Device_Enum_Port3();
1665 }
1666 void LeaveUXBModePort3()
1667 {
1668 MINI_DEBUG(printf("leave UXB mode \n"));
1669 UHC_XBYTE(0x40)&=~0x80;//leave FSmode
1670 MDrv_Usb_Device_Enum_Port3();
1671
1672 }
1673 #endif
1674 #ifndef DEVICE_ENUM_SEGMENT
MDrv_Usb_Device_Enum_Port3(void)1675 BOOLEAN MDrv_Usb_Device_Enum_Port3(void)
1676 {
1677 BOOLEAN result=FALSE;
1678 U8 RetryCount=0;
1679
1680 U8 rootUSBDeviceInterfaceClass = USB_INTERFACE_CLASS_NONE;
1681
1682 if (gUsbDeviceState_Port3==BAD_DEVICE) return FALSE; //bad device , no more enumerate
1683
1684 //20120820, Patch for devices, can't repeat to re-enumerate.
1685 if ( (gUsbDeviceState_Port3==USB11_DEVICE) ||(gUsbDeviceState_Port3==USB20_DEVICE) )
1686 {
1687 U16 uVID, uPID;
1688 U8 ii;
1689
1690 MDrv_USBGetVIDPID_Port3(&uVID, &uPID);
1691 ii = 0;
1692 while ( (gDontReEnumList_Port3[ii].VID != 0) && (gDontReEnumList_Port3[ii].PID != 0) )
1693 {
1694 if ( (uVID == gDontReEnumList_Port3[ii].VID) && (uPID == gDontReEnumList_Port3[ii].PID) )
1695 {
1696 printf("Don't re-enumerate for special device.");
1697 return TRUE;
1698 }
1699
1700 ii++;
1701 if (ii >= (sizeof(gDontReEnumList_Port3) / sizeof(struct stDontReEnumList)))
1702 break;
1703 }
1704 }
1705
1706 NowIsHubPort3=0;
1707
1708 #ifdef Enable_SOF_Only
1709 UHC3_ORXBYTE(0x40,0x80);//force enter FSmode
1710 #endif
1711 port3_redo_init:
1712 //USB ROOT
1713 RetryCount++;
1714 if (MDrv_UsbHost_Init_Port3()==FALSE) goto port3_fail_exit;
1715 if (flib_Host20_Enumerate_Port3(1,3)==0)
1716 {
1717 if ((gUsbStatus_Port3==USB_TIMEOUT)||(gUsbStatus_Port3==USB_INIT_FAIL))
1718 {
1719 if ((RetryCount==2)&&(mwOTG20_Control_HOST_SPD_TYP_Rd()==2))
1720 { //make sure it is hi speed
1721 MINI_DEBUG(printf("Force FS\n"));
1722 UHC3_ORXBYTE(0x40,0x80);//force enter FSmode
1723 }
1724 if (RetryCount >= 3)
1725 {
1726 MINI_DEBUG(printf("bad device\n"));
1727 gUsbDeviceState_Port3=BAD_DEVICE;
1728 goto port3_fail_exit;
1729 }
1730 #ifndef ATV_SERISE_USE
1731 msAPI_Timer_ResetWDT();
1732 #endif
1733 goto port3_redo_init;
1734 }
1735 gUsbDeviceState_Port3=BAD_DEVICE;
1736 goto port3_fail_exit;
1737 }
1738 else
1739 {
1740 UTMI3_SETXBYTE(0x2a,0);
1741
1742 rootUSBDeviceInterfaceClass= psAttachDevice_Port3->saCD[0].sInterface[0].bInterfaceClass;
1743 //MDrv_UsbGetInterfaceClass(0, 0);
1744 DRV_USB_DBG(printf("Check USD Device 4\n"););
1745 #if 0 //We don't need to check here
1746 if(rootUSBDeviceInterfaceClass != 0x08 && rootUSBDeviceInterfaceClass != 0x09)
1747 {
1748 //printf("unsupport class\n",0);
1749 DRV_USB_DBG(printf("unsupport USB root class=%02bx\n", rootUSBDeviceInterfaceClass););
1750 result= FALSE;
1751 goto port3_fail_exit;
1752 }
1753 #endif
1754
1755 DRV_USB_DBG(printf("USB root class=%02bx\n",rootUSBDeviceInterfaceClass););
1756 if (rootUSBDeviceInterfaceClass==USB_INTERFACE_CLASS_HUB)//HUB
1757 {
1758 U8 PortNum,i,devaddr,stor_devs;
1759
1760 #ifdef ENABLE_HOST_TEST
1761 printf("Unsupport USB hub\n");
1762 gUsbDeviceState_Port3=BAD_DEVICE;
1763 goto port3_fail_exit;
1764 #endif
1765
1766 devaddr=6;
1767 stor_devs = 0;
1768 DRV_USB_DBG(printf("Hub class!\n"));
1769
1770 PortNum=Usb_Hub_Port_Num_Port3();
1771 for (i=1; i <= PortNum ; i++)
1772 {
1773 psAttachDevice_Port3->bAdd=3;
1774 pHost20_qHD_List_Control1_Port3->bDeviceAddress=psAttachDevice_Port3->bAdd;
1775 if (USB_Hub_Handle_Port3(i)==FALSE)
1776 {
1777 result=FALSE;
1778 continue;
1779 }
1780 devaddr++;
1781 NowIsHubPort3=1;
1782 if (flib_Host20_Enumerate_Port3(1,devaddr)==0)
1783 {
1784 result=FALSE;
1785 continue;
1786 }
1787
1788 //MStar, 20111110, For card reader with internal hub
1789 if (psAttachDevice_Port3->saCD[0].sInterface[0].bInterfaceClass == 0x08)
1790 stor_devs++;
1791
1792 psAttachDevice_Port3->bAdd=devaddr;
1793 result=MassStorage_Init_Port3(); //do mass storage class init
1794 if (result==TRUE) break;
1795 }
1796 if ( (result==FALSE) && (stor_devs == 0) )
1797 {
1798 MINI_DEBUG(printf("unsupport hub class device,->bad device\n"));
1799 gUsbDeviceState_Port3=BAD_DEVICE;
1800 }
1801 }
1802 //else if(rootUSBDeviceInterfaceClass==USB_INTERFACE_CLASS_MSD)//Mass storage class
1803 else if ( (rootUSBDeviceInterfaceClass == USB_INTERFACE_CLASS_MSD) &&
1804 (psAttachDevice_Port3->saCD[0].sInterface[0].bInterfaceProtocol == 0x50) )
1805 {
1806 result=MassStorage_Init_Port3();
1807 #ifdef Enable_Burning_Test
1808 UsbTestPort3();
1809 #endif
1810
1811 #ifdef Enable_Low_Temperature_Patch
1812 if((gSpeed_Port3==0)&&(gUsbStatus_Port3==USB_TIMEOUT))
1813 {
1814 //printf("\r\n CDR toggle!!",0);
1815 UTMI3_SETXBYTE(0x0a, UTMI3_READXBYTE(0x0a)^0x10); //invert CDR_CLOCK
1816 UTMI3_ORXBYTE(0x06,0x03); //reset UTMI
1817 UTMI3_ANDXBYTE(0x06,0xfc);
1818 }
1819 #endif
1820
1821 }
1822 #ifdef ENABLE_CBI_HOST
1823 else if ( (rootUSBDeviceInterfaceClass == USB_INTERFACE_CLASS_MSD) &&
1824 ((psAttachDevice_Port3->saCD[0].sInterface[0].bInterfaceProtocol == 0x00)||
1825 (psAttachDevice_Port3->saCD[0].sInterface[0].bInterfaceProtocol == 0x01)) )
1826 {
1827 DRV_USB_DBG(printf("My CBI MassStorage Device!!!\n"));
1828
1829 result=MassStorage_Init_Port3(); //do mass storage class init
1830 return result;
1831 }
1832 #endif
1833 #ifndef ENABLE_HOST_TEST
1834 else if (rootUSBDeviceInterfaceClass == USB_INTERFACE_CLASS_IMAGE)
1835 {
1836 if (drvUSBHost_PTP_Init(USB_PORT_3) == PTP_OK)
1837 {
1838 result = TRUE;
1839 DRV_USB_DBG(printf("PTP initial ok\r\n"));
1840 }
1841 }
1842 else if (rootUSBDeviceInterfaceClass==USB_INTERFACE_CLASS_HID)//HID
1843 {
1844 if (drvUSBHost_HID_Init(USB_PORT_3) == 0)
1845 {
1846 result = TRUE;
1847 DRV_USB_DBG(printf("HID initial ok\r\n"));
1848 }
1849 }
1850 #endif
1851 else
1852 {
1853 MINI_DEBUG(printf("unsupport %02bx class device->bad device\n",rootUSBDeviceInterfaceClass));
1854 gUsbDeviceState_Port3=BAD_DEVICE; //not belong to any above
1855 }
1856
1857 DRV_USB_DBG(printf("USB_CON\n"););
1858 //return result;
1859 }
1860
1861 port3_fail_exit:
1862
1863 if (mwHost20_PORTSC_ConnectChange_Rd())
1864 mwHost20_PORTSC_ConnectChange_Set();
1865
1866 return result;
1867 }
1868 #else // support device enumeration dividable
_MDrv_Usb_Device_Enum0_Port3(void)1869 U8 _MDrv_Usb_Device_Enum0_Port3(void)
1870 {
1871 if (gUsbDeviceState_Port3==BAD_DEVICE)
1872 return 0; //bad device , no more enumerate
1873
1874 //20120820, Patch for devices, can't repeat to re-enumerate.
1875 if ( (gUsbDeviceState_Port3==USB11_DEVICE) ||(gUsbDeviceState_Port3==USB20_DEVICE) )
1876 {
1877 U16 uVID, uPID;
1878 U8 ii;
1879
1880 MDrv_USBGetVIDPID_Port3(&uVID, &uPID);
1881 ii = 0;
1882 while ( (gDontReEnumList_Port3[ii].VID != 0) && (gDontReEnumList_Port3[ii].PID != 0) )
1883 {
1884 if ( (uVID == gDontReEnumList_Port3[ii].VID) && (uPID == gDontReEnumList_Port3[ii].PID) )
1885 {
1886 printf("Don't re-enumerate for special device.");
1887 return 1;
1888 }
1889
1890 ii++;
1891 if (ii >= (sizeof(gDontReEnumList_Port3) / sizeof(struct stDontReEnumList)))
1892 break;
1893 }
1894 }
1895
1896 NowIsHubPort3=0;
1897
1898 #ifdef Enable_SOF_Only
1899 UHC3_ORXBYTE(0x40,0x80);//force enter FSmode
1900 #endif
1901
1902 return 2;
1903 }
1904
_MDrv_Usb_Device_Enum_OK_Port3(void)1905 BOOLEAN _MDrv_Usb_Device_Enum_OK_Port3(void)
1906 {
1907 BOOLEAN result=FALSE;
1908 U8 rootUSBDeviceInterfaceClass = USB_INTERFACE_CLASS_NONE;
1909
1910 UTMI3_SETXBYTE(0x2a,0);
1911
1912 rootUSBDeviceInterfaceClass= psAttachDevice_Port3->saCD[0].sInterface[0].bInterfaceClass;
1913 //MDrv_UsbGetInterfaceClass(0, 0);
1914 DRV_USB_DBG(printf("Check USD Device 4\n"););
1915 #if 0 //We don't need to check here
1916 if(rootUSBDeviceInterfaceClass != 0x08 && rootUSBDeviceInterfaceClass != 0x09)
1917 {
1918 //printf("unsupport class\n",0);
1919 DRV_USB_DBG(printf("unsupport USB root class=%02bx\n", rootUSBDeviceInterfaceClass););
1920 result= FALSE;
1921 goto port3_fail_exit;
1922 }
1923 #endif
1924
1925 DRV_USB_DBG(printf("USB root class=%02bx\n",rootUSBDeviceInterfaceClass););
1926 if (rootUSBDeviceInterfaceClass==USB_INTERFACE_CLASS_HUB)//HUB
1927 {
1928 U8 PortNum,i,devaddr,stor_devs;
1929
1930 #ifdef ENABLE_HOST_TEST
1931 printf("Unsupport USB hub\n");
1932 gUsbDeviceState_Port3=BAD_DEVICE;
1933 return FALSE;
1934 #endif
1935
1936 devaddr=6;
1937 stor_devs = 0;
1938 DRV_USB_DBG(printf("Hub class!\n"));
1939
1940 PortNum=Usb_Hub_Port_Num_Port3();
1941 for (i=1; i <= PortNum ; i++)
1942 {
1943 psAttachDevice_Port3->bAdd=3;
1944 pHost20_qHD_List_Control1_Port3->bDeviceAddress=psAttachDevice_Port3->bAdd;
1945 if (USB_Hub_Handle_Port3(i)==FALSE)
1946 {
1947 result=FALSE;
1948 continue;
1949 }
1950 devaddr++;
1951 NowIsHubPort3=1;
1952 if (flib_Host20_Enumerate_Port3(1,devaddr)==0)
1953 {
1954 result=FALSE;
1955 continue;
1956 }
1957
1958 //MStar, 20111110, For card reader with internal hub
1959 if (psAttachDevice_Port3->saCD[0].sInterface[0].bInterfaceClass == 0x08)
1960 stor_devs++;
1961
1962 psAttachDevice_Port3->bAdd=devaddr;
1963 result=MassStorage_Init_Port3(); //do mass storage class init
1964 if (result==TRUE) break;
1965 }
1966 if ( (result==FALSE) && (stor_devs == 0) )
1967 {
1968 MINI_DEBUG(printf("unsupport hub class device,->bad device\n"));
1969 gUsbDeviceState_Port3=BAD_DEVICE;
1970 }
1971 }
1972 //else if(rootUSBDeviceInterfaceClass==USB_INTERFACE_CLASS_MSD)//Mass storage class
1973 else if ( (rootUSBDeviceInterfaceClass == USB_INTERFACE_CLASS_MSD) &&
1974 (psAttachDevice_Port3->saCD[0].sInterface[0].bInterfaceProtocol == 0x50) )
1975 {
1976 result=MassStorage_Init_Port3();
1977 #ifdef Enable_Burning_Test
1978 UsbTestPort3();
1979 #endif
1980
1981 #ifdef Enable_Low_Temperature_Patch
1982 if((gSpeed_Port3==0)&&(gUsbStatus_Port3==USB_TIMEOUT))
1983 {
1984 //printf("\r\n CDR toggle!!",0);
1985 UTMI3_SETXBYTE(0x0a, UTMI3_READXBYTE(0x0a)^0x10); //invert CDR_CLOCK
1986 UTMI3_ORXBYTE(0x06,0x03); //reset UTMI
1987 UTMI3_ANDXBYTE(0x06,0xfc);
1988 }
1989 #endif
1990
1991 }
1992 #ifdef ENABLE_CBI_HOST
1993 else if ( (rootUSBDeviceInterfaceClass == USB_INTERFACE_CLASS_MSD) &&
1994 ((psAttachDevice_Port3->saCD[0].sInterface[0].bInterfaceProtocol == 0x00)||
1995 (psAttachDevice_Port3->saCD[0].sInterface[0].bInterfaceProtocol == 0x01)) )
1996 {
1997 DRV_USB_DBG(printf("My CBI MassStorage Device!!!\n"));
1998
1999 result=MassStorage_Init_Port3(); //do mass storage class init
2000 //return result;
2001 }
2002 #endif
2003 else if (rootUSBDeviceInterfaceClass == USB_INTERFACE_CLASS_IMAGE)
2004 {
2005 if (drvUSBHost_PTP_Init(USB_PORT_3) == PTP_OK)
2006 {
2007 result = TRUE;
2008 DRV_USB_DBG(printf("PTP initial ok\r\n"));
2009 }
2010 }
2011 else if (rootUSBDeviceInterfaceClass==USB_INTERFACE_CLASS_HID)//HID
2012 {
2013 if (drvUSBHost_HID_Init(USB_PORT_3) == 0)
2014 {
2015 result = TRUE;
2016 DRV_USB_DBG(printf("HID initial ok\r\n"));
2017 }
2018 }
2019 else
2020 {
2021 MINI_DEBUG(printf("unsupport %02bx class device->bad device\n",rootUSBDeviceInterfaceClass));
2022 gUsbDeviceState_Port3=BAD_DEVICE; //not belong to any above
2023 }
2024
2025 DRV_USB_DBG(printf("USB_CON\n"););
2026 //return result;
2027
2028 return result;
2029 }
MDrv_Usb_Device_Enum_Port3(void)2030 BOOLEAN MDrv_Usb_Device_Enum_Port3(void)
2031 {
2032 BOOLEAN result=FALSE;
2033 U8 RetryCount=0, retval;
2034
2035 retval = _MDrv_Usb_Device_Enum0_Port3();
2036 if (retval != 2)
2037 return (retval == 0 ? FALSE: TRUE);
2038
2039 port3_redo_init:
2040 //USB ROOT
2041 RetryCount++;
2042 if (MDrv_UsbHost_Init_Port3()==FALSE) goto port3_fail_exit;
2043 if (flib_Host20_Enumerate_Port3(1,3)==0)
2044 {
2045 if ((gUsbStatus_Port3==USB_TIMEOUT)||(gUsbStatus_Port3==USB_INIT_FAIL))
2046 {
2047 if ((RetryCount==2)&&(mwOTG20_Control_HOST_SPD_TYP_Rd()==2))
2048 { //make sure it is hi speed
2049 MINI_DEBUG(printf("Force FS\n"));
2050 UHC3_ORXBYTE(0x40,0x80);//force enter FSmode
2051 }
2052 if (RetryCount >= 3)
2053 {
2054 MINI_DEBUG(printf("bad device\n"));
2055 gUsbDeviceState_Port3=BAD_DEVICE;
2056 goto port3_fail_exit;
2057 }
2058 #ifndef ATV_SERISE_USE
2059 msAPI_Timer_ResetWDT();
2060 #endif
2061 goto port3_redo_init;
2062 }
2063 gUsbDeviceState_Port3=BAD_DEVICE;
2064 goto port3_fail_exit;
2065 }
2066 else
2067 {
2068 result = _MDrv_Usb_Device_Enum_OK_Port3();
2069 }
2070
2071 port3_fail_exit:
2072
2073 if (mwHost20_PORTSC_ConnectChange_Rd())
2074 mwHost20_PORTSC_ConnectChange_Set();
2075 return result;
2076 }
2077
2078 /*
2079 Device Enumerate State:
2080 0: global variable initial
2081 1: ready to start new enumerating process
2082 2: in-progress, stage 1
2083 3: in-progress, stage 2
2084 return value:
2085 0: success
2086 1: in-progress
2087 2: fail
2088 */
2089 U8 enum_state_port3 = 0;
2090 U32 usbDevEnumTimer_port3;
MDrv_Usb_Device_Enum_EX_Port3(void)2091 U8 MDrv_Usb_Device_Enum_EX_Port3(void)
2092 {
2093 BOOLEAN result=FALSE;
2094 U8 retval;
2095 static U8 RetryCount;
2096 static U8 fr;
2097
2098 port3_redo_init_ex:
2099 //USB ROOT
2100
2101 switch (enum_state_port3)
2102 {
2103 case 0: // initial global variables
2104 RetryCount = 0;
2105 retval = _MDrv_Usb_Device_Enum0_Port3();
2106 if (retval != 2)
2107 return (retval == 0 ? DEVENUM_FAIL: DEVENUM_OK);
2108
2109 case 1: // first entry
2110 RetryCount++;
2111 if (_MDrv_UsbHost_Init0_Port3()==FALSE)
2112 goto port3_fail_exit_ex; // MDrv_UsbHost_Init() part 1
2113 enum_state_port3 = 2;
2114 usbDevEnumTimer_port3 = MsOS_GetSystemTime();
2115 return DEVENUM_INPROGRESS;
2116
2117 case 2: // in-progress stage 1
2118 if (MsOS_Timer_DiffTimeFromNow(usbDevEnumTimer_port3) < USB_HOST_INIT_DELAY)
2119 return DEVENUM_INPROGRESS;
2120
2121 if (_MDrv_UsbHost_Init1_Port3()==FALSE) // MDrv_UsbHost_Init() part 2
2122 goto port3_fail_exit_ex;
2123
2124 fr = _flib_Host20_Enumerate_Port3(1, 3); // flib_Host20_Enumerate() part 1
2125 if (fr ==0)
2126 break;
2127
2128 enum_state_port3 = 3;
2129 usbDevEnumTimer_port3 = MsOS_GetSystemTime();
2130 return DEVENUM_INPROGRESS;
2131
2132 case 3: // in-progress stage 2
2133 if (MsOS_Timer_DiffTimeFromNow(usbDevEnumTimer_port3) < USB_ENUM_DELAY)
2134 return DEVENUM_INPROGRESS;
2135 }
2136
2137 if (fr==0)
2138 {
2139 if ((gUsbStatus_Port3==USB_TIMEOUT)||(gUsbStatus_Port3==USB_INIT_FAIL))
2140 {
2141 #ifdef DTV_STANDARD_LIB
2142 if ((RetryCount==2)&&(mwOTG20_Control_HOST_SPD_TYP_Rd()==2))
2143 { //make sure it is hi speed
2144 MINI_DEBUG(printf("Force FS\n"));
2145 UHC3_ORXBYTE(0x40,0x80);//force enter FSmode
2146 }
2147 #endif
2148 if (RetryCount >= 3)
2149 {
2150 MINI_DEBUG(printf("bad device\n"));
2151 gUsbDeviceState_Port3=BAD_DEVICE;
2152 goto port3_fail_exit_ex;
2153 }
2154 #ifndef ATV_SERISE_USE
2155 msAPI_Timer_ResetWDT();
2156 #endif
2157 enum_state_port3 = 1; // retry use
2158 goto port3_redo_init_ex;
2159 }
2160 gUsbDeviceState_Port3=BAD_DEVICE;
2161 goto port3_fail_exit_ex;
2162 }
2163 else
2164 {
2165 result = _MDrv_Usb_Device_Enum_OK_Port3();
2166 }
2167
2168 port3_fail_exit_ex:
2169
2170 if (mwHost20_PORTSC_ConnectChange_Rd())
2171 mwHost20_PORTSC_ConnectChange_Set();
2172 enum_state_port3 = 0; // reset to initial
2173
2174 //return result;
2175 return ( result ? DEVENUM_OK : DEVENUM_FAIL);
2176 }
2177 #endif
2178 //////////////////////////////////////////////////////////////////////////////////////////
2179 //
2180 // USB Issue Test packet function !!
2181 //
2182 /////////////////////////////////////////////////////////////////////////////////////////
2183 U8 UTMI_Reg_14_Port3 = 0xff, UTMI_Reg_15_Port3 = 0xff;
Port2_IssueTestPacket_Initial(void)2184 void Port2_IssueTestPacket_Initial(void)
2185 {
2186 UTMI3_SETXBYTE(0x02, 0x84);
2187 UTMI3_SETXBYTE(0x03, 0x20);
2188
2189 USBC3_SETXBYTE(0x00, 0x0A);
2190 USBC3_SETXBYTE(0x00, 0x28);
2191
2192 UTMI3_SETXBYTE(0x06, 0x00);
2193 UTMI3_SETXBYTE(0x07, 0x00);
2194 UTMI3_SETXBYTE(0x10, 0x00);
2195 UTMI3_SETXBYTE(0x11, 0x00);
2196 UTMI3_SETXBYTE(0x2c, 0x00);
2197 UTMI3_SETXBYTE(0x2d, 0x00);
2198 UTMI3_SETXBYTE(0x2e, 0x00);
2199 UTMI3_SETXBYTE(0x2f, 0x00);
2200 if (UTMI_Reg_14_Port3== 0xff)
2201 UTMI_Reg_14_Port3= UTMI3_READXBYTE(0x14);
2202 else
2203 UTMI3_SETXBYTE(0x14, UTMI_Reg_14_Port3);
2204
2205 if (UTMI_Reg_15_Port3== 0xff)
2206 UTMI_Reg_15_Port3= UTMI3_READXBYTE(0x15);
2207 else
2208 UTMI3_SETXBYTE(0x15, UTMI_Reg_15_Port3);
2209
2210 UTMI3_ORXBYTE(0x06,0x40); //Force HS TX current enable and CDR stage select
2211 UTMI3_ANDXBYTE(0x06,~0x20); //clear bit 5
2212
2213 UTMI3_ORXBYTE(0x06,0x03); //reset UTMI
2214 MsOS_DelayTask(2);
2215 UTMI3_ANDXBYTE(0x06,0xfc);
2216
2217 UTMI3_SETXBYTE(0x03, 0xa8); //for device disconnect status bit
2218 //XBYTE[UTMIBaseAddr+0x07]|=0x02; //
2219
2220 if (MDrv_USBGetChipID_Port3()==CHIPID_NEPTUNE) //Neptune , after U06
2221 {
2222 if (MDrv_USBGetChipVersion_Port3()>= 0x6) //U07
2223 {
2224 UTMI3_ORXBYTE(0x07, 0x02);
2225 UTMI3_SETXBYTE(0x2c,0xc1);
2226 UTMI3_SETXBYTE(0x2d,0x3b);//enable TX common mode,
2227 UTMI3_ORXBYTE(0x2f, 0x0e); //preemsis
2228 }
2229 }
2230 else if ((MDrv_USBGetChipID_Port3()>=CHIPID_ERIS)&&(MDrv_USBGetChipID_Port3()<=CHIPID_TITANIA)) //Eris: 3 ,Titania: 4,
2231 {
2232 UTMI3_SETXBYTE(0x2c,0xc5);
2233 UTMI3_SETXBYTE(0x2d,0x3b);//enable TX common mode,
2234 UTMI3_ORXBYTE(0x2f, 0x0e); //preemsis
2235 }
2236 else if (MDrv_USBGetChipID_Port3()==CHIPID_PLUTO) // Pluto: 5
2237 {
2238 UTMI3_ORXBYTE(0x2c, 0xc5);
2239 UTMI3_ORXBYTE(0x2d, 0x3);//enable TX common mode,
2240 UTMI3_ORXBYTE(0x2f, 0x4a); //preemsis
2241 UTMI3_ORXBYTE(0x13, 0x70);
2242 }
2243 else if (MDrv_USBGetChipID_Port3()==CHIPID_TITANIA2) // Titania 2
2244 {
2245 UTMI3_ORXBYTE(0x2c, 0xc1);
2246 UTMI3_ORXBYTE(0x2d, 0x3);//enable TX common mode,
2247 UTMI3_ORXBYTE(0x2f, 0x4a); //preemsis
2248 }
2249 else if (MDrv_USBGetChipID_Port3()==CHIPID_TRITON) //Triton=6
2250 {
2251 UTMI3_SETXBYTE(0x2c,0xc1);
2252 UTMI3_SETXBYTE(0x2d,0x3b);//enable TX common mode,
2253 UTMI3_ORXBYTE(0x2f,0x0e); //preemsis
2254 }
2255 else if (MDrv_USBGetChipID_Port3()==CHIPID_EUCLID) // Euclid
2256 {
2257 UTMI3_ORXBYTE(0x2c, 0xc1);
2258 UTMI3_ORXBYTE(0x2d, 0x3);//enable TX common mode,
2259 UTMI3_ORXBYTE(0x2f, 0x4a); //preemsis
2260 }
2261 else if ( (MDrv_USBGetChipID_Port3()==CHIPID_TITANIA3) || // Titania 3, Titania 4
2262 (MDrv_USBGetChipID_Port3()==CHIPID_TITANIA4) ||
2263 (MDrv_USBGetChipID_Port3()==CHIPID_TITANIA7) ||
2264 (MDrv_USBGetChipID_Port3()==CHIPID_TITANIA8) ||
2265 (MDrv_USBGetChipID_Port3()==CHIPID_TITANIA9) ||
2266 (MDrv_USBGetChipID_Port3()==CHIPID_TITANIA12) ||
2267 (MDrv_USBGetChipID_Port3()==CHIPID_TITANIA13) ||
2268 (MDrv_USBGetChipID_Port3()==CHIPID_JANUS) ||
2269 (MDrv_USBGetChipID_Port3() == CHIPID_MARIA10) ||
2270 (MDrv_USBGetChipID_Port3() == CHIPID_MACAW12) ||
2271 (MDrv_USBGetChipID_Port3() == CHIPID_JANUS2) ||
2272 (MDrv_USBGetChipID_Port3() == CHIPID_AMBER6) )
2273 {
2274 UTMI3_ORXBYTE(0x2c, 0x10); //TX-current adjust to 105%
2275 UTMI3_ORXBYTE(0x2d, 0x02); //Pre-emphasis enable
2276 UTMI3_ORXBYTE(0x2f, 0x81); //HS_TX common mode current enable (100mV);Pre-emphasis enable (10%)
2277 UTMI3_ORXBYTE(0x09,0x81); //UTMI RX anti-dead-lock, ISI improvement
2278 }
2279 else //for Amber1 later 40nm
2280 {
2281 UTMI3_ORXBYTE(0x2c, 0x50);
2282 UTMI3_ORXBYTE(0x2d, 0x02);
2283 UTMI3_ORXBYTE(0x2f, 0x01);
2284 UTMI3_ORXBYTE(0x09,0x81); //UTMI RX anti-dead-lock, ISI improvement
2285 }
2286
2287 if (MDrv_USBGetChipID_Port3()==CHIPID_PLUTO) // If is Pluto
2288 UTMI3_ORXBYTE(0x09,0x01); //ISI improvement
2289 else
2290 UTMI3_ORXBYTE(0x13,0x02); //ISI improvement
2291
2292 if ( (MDrv_USBGetChipID_Port3() == CHIPID_NEPTUNE) ||
2293 (MDrv_USBGetChipID_Port3() == CHIPID_ERIS) ||
2294 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA) ||
2295 (MDrv_USBGetChipID_Port3() == CHIPID_PLUTO) ||
2296 (MDrv_USBGetChipID_Port3() == CHIPID_TRITON) ||
2297 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA2) )
2298 {
2299 }
2300 else
2301 {
2302 UTMI3_ORXBYTE(0x0b, 0x80); //TX timing select latch path
2303 }
2304
2305 UTMI3_ORXBYTE(0x09,0x60);//0x20; //patch low tempture,FL meta issue and enable new FL RX engin
2306
2307 if ( (MDrv_USBGetChipID_Port3() == CHIPID_NEPTUNE) ||
2308 (MDrv_USBGetChipID_Port3() == CHIPID_ERIS) ||
2309 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA) ||
2310 (MDrv_USBGetChipID_Port3() == CHIPID_PLUTO) ||
2311 (MDrv_USBGetChipID_Port3() == CHIPID_TRITON) ||
2312 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA2) ||
2313 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA3) ||
2314 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA4) ||
2315 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA7) ||
2316 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA8) ||
2317 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA9) ||
2318 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA12) ||
2319 (MDrv_USBGetChipID_Port3() == CHIPID_TITANIA13) ||
2320 (MDrv_USBGetChipID_Port3() == CHIPID_JANUS) ||
2321 (MDrv_USBGetChipID_Port3() == CHIPID_MARIA10) ||
2322 (MDrv_USBGetChipID_Port3() == CHIPID_MACAW12) ||
2323 (MDrv_USBGetChipID_Port3() == CHIPID_JANUS2) ||
2324 (MDrv_USBGetChipID_Port3() == CHIPID_AMBER1) ||
2325 (MDrv_USBGetChipID_Port3() == CHIPID_AMBER3) ||
2326 (MDrv_USBGetChipID_Port3() == CHIPID_AMBER5) ||
2327 (MDrv_USBGetChipID_Port3() == CHIPID_AMBER6) ||
2328 (MDrv_USBGetChipID_Port3() == CHIPID_AMBER7) ||
2329 (MDrv_USBGetChipID_Port3() == CHIPID_AMETHYST) )
2330 {
2331 UTMI3_ORXBYTE(0x15,0x20); //HOST CHIRP Detect
2332 }
2333 else
2334 {
2335 UTMI3_ORXBYTE(0x15,0x60); // change to 55 interface (bit6)
2336 }
2337 MsOS_DelayTask(10);
2338 }
2339
2340 #ifdef Enable_Issue_TestPacket
2341
2342 extern void USB_DACHE_FLUSH_Port3(U32 addr, U32 length);
2343
IssueTestPacket_Port3(U8 * TestDataAddr)2344 void IssueTestPacket_Port3(U8 *TestDataAddr)
2345 {
2346 U32 DMAAddress,datreg32;
2347 U8 *TestData;
2348 #ifdef Issue_TestPacket
2349 U16 i;
2350 #endif
2351
2352 printf("Start Test Packet on Port2\n");
2353 TestData=(U8*) KSEG02KSEG1(TestDataAddr);
2354
2355 #ifdef Issue_OUTTestPacket
2356 TestData[0]=0x55;
2357 TestData[1]=0x53;
2358 TestData[2]=0x42;
2359 TestData[3]=0x43;
2360 TestData[4]=0x88;
2361 TestData[5]=0x88;
2362 TestData[6]=0x89;
2363 TestData[7]=0xa0;
2364 TestData[8]=0x00;
2365 TestData[9]=0x02;
2366 TestData[10]=0x00;
2367 TestData[11]=0x00;
2368 TestData[12]=0x80;
2369 TestData[13]=0x00;
2370 TestData[14]=0x0a;
2371 TestData[15]=0x28;
2372 TestData[16]=0x00;
2373 TestData[17]=0x00;
2374 TestData[18]=0x00;
2375 TestData[19]=0x00;
2376 TestData[20]=0x84;
2377 TestData[21]=0x00;
2378 TestData[22]=0x00;
2379 TestData[23]=0x01;
2380 TestData[24]=0x00;
2381 TestData[25]=0x00;
2382 TestData[26]=0x00;
2383 TestData[27]=0x00;
2384 TestData[28]=0x00;
2385 TestData[29]=0x00;
2386 TestData[30]=0x00;
2387 #endif
2388
2389 //printf("3AAC:%x\n",XBYTE[0x3AAC]);
2390 //printf("UTMI(0x2c):%x\n",XBYTE[gUTMI3_BASE+0x2C]);
2391 #ifdef Issue_TestPacket
2392 TestData[0]=0x0;
2393 TestData[1]=0x0;
2394 TestData[2]=0x0;
2395 TestData[3]=0x0;
2396 TestData[4]=0x0;
2397 TestData[5]=0x0;
2398 TestData[6]=0x0;
2399 TestData[7]=0x0;
2400 TestData[8]=0x0;
2401 TestData[9]=0xaa;
2402 TestData[10]=0xaa;
2403 TestData[11]=0xaa;
2404 TestData[12]=0xaa;
2405 TestData[13]=0xaa;
2406 TestData[14]=0xaa;
2407 TestData[15]=0xaa;
2408 TestData[16]=0xaa;
2409 TestData[17]=0xee;
2410 TestData[18]=0xee;
2411 TestData[19]=0xee;
2412 TestData[20]=0xee;
2413 TestData[21]=0xee;
2414 TestData[22]=0xee;
2415 TestData[23]=0xee;
2416 TestData[24]=0xee;
2417 TestData[25]=0xfe;
2418 TestData[26]=0xff;
2419 TestData[27]=0xff;
2420 TestData[28]=0xff;
2421 TestData[29]=0xff;
2422 TestData[30]=0xff;
2423 TestData[31]=0xff;
2424 TestData[32]=0xff;
2425 TestData[33]=0xff;
2426 TestData[34]=0xff;
2427 TestData[35]=0xff;
2428 TestData[36]=0xff;
2429 TestData[37]=0x7f;
2430 TestData[38]=0xbf;
2431 TestData[39]=0xdf;
2432 TestData[40]=0xef;
2433 TestData[41]=0xf7;
2434 TestData[42]=0xfb;
2435 TestData[43]=0xfd;
2436 TestData[44]=0xfc;
2437 TestData[45]=0x7e;
2438 TestData[46]=0xbf;
2439 TestData[47]=0xdf;
2440 TestData[48]=0xfb;
2441 TestData[49]=0xfd;
2442 TestData[50]=0xfb;
2443 TestData[51]=0xfd;
2444 TestData[52]=0x7e;
2445
2446 for (i=53; i<128; i++)
2447 TestData[i]= 0;
2448
2449 #endif
2450
2451 USB_DACHE_FLUSH_Port3((U32)TestDataAddr, 128);
2452 //printf("[9]=0x%bx\n", TestData[9]);
2453
2454 //DbgPortEanble();
2455
2456 UHC3_ORXBYTE(0x50,0x14); //enable test packet and lookback
2457
2458 UTMI3_ORXBYTE(0x06,0x03); //TR/RX reset
2459 UTMI3_ANDXBYTE(0x06,0xFC);
2460
2461 while(1)
2462 {
2463 DMAAddress=(U32)VA2PA(TestData);
2464
2465 //set DMA memory base address
2466 UHC3_SETXBYTE(0x74,(U8)DMAAddress);
2467 UHC3_SETXBYTE(0x75,(U8)(DMAAddress>>8));
2468 UHC3_SETXBYTE(0x76,(U8)(DMAAddress>>16));
2469 UHC3_SETXBYTE(0x77,(U8)(DMAAddress>>24));
2470
2471 //printf("start check 2474=%2bx\n",XBYTE[0x2474]);
2472 //printf("start check 2475=%2bx\n",XBYTE[0x2475]);
2473 //printf("start check 2476=%2bx\n",XBYTE[0x2476]);
2474 //printf("start check 2477=%2bx\n",XBYTE[0x2477]);
2475
2476
2477 //set DMA data Length and type(memory to FIFO)
2478 #ifdef Issue_TestPacket
2479 datreg32 = 53;
2480 #else
2481 datreg32 = 31;
2482 #endif
2483
2484 datreg32 = datreg32 << 8;
2485 datreg32 = datreg32 | 0x02;
2486
2487 UHC3_SETXBYTE(0x70,(U8)datreg32);
2488 UHC3_SETXBYTE(0x71,(U8)(datreg32>>8));
2489 UHC3_SETXBYTE(0x72,(U8)(datreg32>>16));
2490 UHC3_SETXBYTE(0x73,(U8)(datreg32>>24));
2491
2492 UHC3_ORXBYTE(0x70,0x01);//DMA start
2493
2494
2495 //printf("start check 2470=%2bx\n",XBYTE[0x2470]);
2496 //printf("start check 2471=%2bx\n",XBYTE[0x2471]);
2497 //printf("start check 2472=%2bx\n",XBYTE[0x2472]);
2498 //printf("start check 2473=%2bx\n",XBYTE[0x2473]);
2499
2500 //MsOS_DelayTask(1000);
2501
2502 //printf("start check 2444=%2bx\n",XBYTE[0x2444]);
2503
2504 while(!(UHC3_READXBYTE(0x44) &0x08))
2505 {
2506 //printf("XBYTE[0x2444]=%2bx\n",XBYTE[0x2444]);
2507 //MsOS_DelayTask(10);//delay
2508 }
2509
2510 //printf("Dma success\n",0);
2511
2512 MsOS_DelayTask(10);
2513 }
2514
2515 }
2516 #endif
2517
2518 //#ifdef Enable_Issue_TestPacketByHW
2519 #if 1
MDrv_SendTestPacketByHW_Port3(void)2520 void MDrv_SendTestPacketByHW_Port3(void)
2521 {
2522 printf("Start test packet on port 2\n");
2523 UTMI3_SETXBYTE(0x14, 0x00);
2524 UTMI3_SETXBYTE(0x15, 0x06);
2525
2526 UTMI3_SETXBYTE(0x10, 0x38);
2527 UTMI3_SETXBYTE(0x11, 0x00);
2528
2529 UTMI3_SETXBYTE(0x32, 0xFE);
2530 UTMI3_SETXBYTE(0x33, 0x0B);
2531 }
2532 #endif
2533
IssueTestJ_Port3(void)2534 void IssueTestJ_Port3(void)
2535 {
2536 printf("TEST_J on Port2\n");
2537
2538 UTMI3_SETXBYTE(0x2c, 0x04);
2539 UTMI3_SETXBYTE(0x2d, 0x20);
2540 UTMI3_SETXBYTE(0x2e, 0x00);
2541 UTMI3_SETXBYTE(0x2f, 0x00);
2542
2543 USBC3_ORXBYTE(0, 0x02); //Enable UHC_RST
2544 MsOS_DelayTask(10);
2545 USBC3_ANDXBYTE(0, 0xFD);
2546
2547 //UHCREG(0x32)|=0x01;
2548 UHC3_ORXBYTE(0x32,0x01);
2549 MsOS_DelayTask(10);
2550 //UHCREG(0x32)&=0xfe;
2551 UHC3_ANDXBYTE(0x32,0xfe);
2552
2553 MsOS_DelayTask(10);
2554 UHC3_ORXBYTE(0x50,0x01); //enable test J
2555 }
2556
IssueTestK_Port3(void)2557 void IssueTestK_Port3(void)
2558 {
2559 printf("TEST_K on port2\n");
2560
2561 UTMI3_SETXBYTE(0x2c, 0x04);
2562 UTMI3_SETXBYTE(0x2d, 0x20);
2563 UTMI3_SETXBYTE(0x2e, 0x00);
2564 UTMI3_SETXBYTE(0x2f, 0x00);
2565
2566 USBC3_ORXBYTE(0, 0x02); //Enable UHC_RST
2567 MsOS_DelayTask(10);
2568 USBC3_ANDXBYTE(0, 0xFD);
2569
2570 //UHCREG(0x32)|=0x01;
2571 UHC3_ORXBYTE(0x32,0x01);
2572 MsOS_DelayTask(10);
2573 //UHCREG(0x32)&=0xfe;
2574 UHC3_ANDXBYTE(0x32,0xfe);
2575
2576 MsOS_DelayTask(10);
2577 UHC3_ORXBYTE(0x50,0x02); //enable test K
2578 }
2579
IssueSE0_Port3(void)2580 void IssueSE0_Port3(void)
2581 {
2582 printf("SE0 on port2\n");
2583
2584 UTMI3_SETXBYTE(0x06, 0xA0);
2585 UTMI3_SETXBYTE(0x07, 0x04);
2586
2587 MsOS_DelayTask(10);
2588 USBC3_ORXBYTE(0, 0x02); //Enable UHC_RST
2589 MsOS_DelayTask(10);
2590 USBC3_ANDXBYTE(0, 0xFD);
2591
2592 UHC3_ORXBYTE(0x32,0x01);
2593 MsOS_DelayTask(10);
2594 //UHCREG(0x32)&=0xfe;
2595 UHC3_ANDXBYTE(0x32,0xfe);
2596 }
2597
MDrv_UsbSendTestPacket_Port3(void)2598 void MDrv_UsbSendTestPacket_Port3(void)
2599 {
2600 drvUSBHost_TurnOffPowerDownMode_Port3();
2601 MsOS_DelayTask(500);
2602 Port2_IssueTestPacket_Initial();
2603 MDrv_SendTestPacketByHW_Port3();
2604 }
2605
MDrv_UsbSendSE0_Port3(void)2606 void MDrv_UsbSendSE0_Port3(void)
2607 {
2608 drvUSBHost_TurnOffPowerDownMode_Port3();
2609 MsOS_DelayTask(500);
2610 Port2_IssueTestPacket_Initial();
2611 IssueSE0_Port3();
2612 }
2613
MDrv_UsbSendTestJ_Port3(void)2614 void MDrv_UsbSendTestJ_Port3(void)
2615 {
2616 drvUSBHost_TurnOffPowerDownMode_Port3();
2617 MsOS_DelayTask(500);
2618 Port2_IssueTestPacket_Initial();
2619 IssueTestJ_Port3();
2620 }
2621
MDrv_UsbSendTestK_Port3(void)2622 void MDrv_UsbSendTestK_Port3(void)
2623 {
2624 drvUSBHost_TurnOffPowerDownMode_Port3();
2625 MsOS_DelayTask(500);
2626 Port2_IssueTestPacket_Initial();
2627 IssueTestK_Port3();
2628 }
2629
2630
MDrv_GetUsbDeviceType_Port3()2631 U8 MDrv_GetUsbDeviceType_Port3()
2632 {
2633 U8 u8DevType;
2634
2635 if ( (gUsbDeviceState_Port3==BAD_DEVICE) ||
2636 (gUsbDeviceState_Port3==NO_DEVICE) ||
2637 (gUsbDeviceState_Port3==POWER_SAVING) )
2638 return USB_INTERFACE_CLASS_NONE;
2639
2640 u8DevType = psAttachDevice_Port3->saCD[0].sInterface[0].bInterfaceClass;
2641
2642 return (u8DevType);
2643 }
2644
MDrv_GetUsbString_Port3(U8 u8StrID,S8 * pStrBuf,U8 u8BufLen)2645 void MDrv_GetUsbString_Port3(U8 u8StrID, S8 *pStrBuf, U8 u8BufLen)
2646 {
2647 U8 ii;
2648
2649 pStrBuf[0] = 0;
2650
2651 if (u8StrID == USB_STR_VENDOR)
2652 {
2653 for (ii=0; ii<u8BufLen; ii++)
2654 {
2655 pStrBuf[ii] = psAttachDevice_Port3->bStringManufacture[ii];
2656 if (pStrBuf[ii] == 0)
2657 break;
2658 }
2659 }
2660 else if (u8StrID == USB_STR_PRODUCT)
2661 {
2662 for (ii=0; ii<u8BufLen; ii++)
2663 {
2664 pStrBuf[ii] = psAttachDevice_Port3->bStringProduct[ii];
2665 if (pStrBuf[ii] == 0)
2666 break;
2667 }
2668 }
2669
2670 }
2671
MDrv_USBGetqTDTimeoutValue_Port3(void)2672 U8 MDrv_USBGetqTDTimeoutValue_Port3(void)
2673 {
2674 return gUsbTimeout_Port3;
2675 }
2676
MDrv_USBSetqTDTimeoutValue_Port3(U8 u8Value)2677 void MDrv_USBSetqTDTimeoutValue_Port3(U8 u8Value)
2678 {
2679 gUsbTimeout_Port3= u8Value;
2680 }
2681
MDrv_USBGetIORetryCount_Port3(void)2682 U8 MDrv_USBGetIORetryCount_Port3(void)
2683 {
2684 return gUsbRetryCount_Port3;
2685 }
2686
MDrv_USBSetIORetryCount_Port3(U8 u8Value)2687 void MDrv_USBSetIORetryCount_Port3(U8 u8Value)
2688 {
2689 gUsbRetryCount_Port3= u8Value;
2690 }
2691
MDrv_USBGetVIDPID_Port3(U16 * pVID,U16 * pPID)2692 void MDrv_USBGetVIDPID_Port3(U16 *pVID, U16 *pPID)
2693 {
2694 *pVID = ((U16) psAttachDevice_Port3->sDD.bVIDHighByte << 8 ) |
2695 (U16) psAttachDevice_Port3->sDD.bVIDLowByte;
2696
2697 *pPID = ((U16) psAttachDevice_Port3->sDD.bPIDHighByte<< 8 ) |
2698 (U16) psAttachDevice_Port3->sDD.bPIDLowByte;
2699 }
2700
MDrv_GetUsbStorString_Port3(U8 uLun,U8 u8StrID,S8 * pStrBuf,U8 u8BufLen)2701 void MDrv_GetUsbStorString_Port3(U8 uLun, U8 u8StrID, S8 *pStrBuf, U8 u8BufLen)
2702 {
2703 U8 ii;
2704
2705 pStrBuf[0] = 0;
2706
2707 if (u8StrID == USB_STR_VENDOR)
2708 {
2709 for (ii=0; ii<u8BufLen; ii++)
2710 {
2711 if (ii >= 8)
2712 break;
2713
2714 pStrBuf[ii] = Mass_stor_us1_port3.Mass_stor_device[uLun].u8VendorID[ii];
2715 }
2716 pStrBuf[ii] = 0; //Null terminal
2717 }
2718 else if (u8StrID == USB_STR_PRODUCT)
2719 {
2720 for (ii=0; ii<u8BufLen; ii++)
2721 {
2722 if (ii >= 16)
2723 break;
2724
2725 pStrBuf[ii] = Mass_stor_us1_port3.Mass_stor_device[uLun].u8ProductID[ii];
2726 }
2727 pStrBuf[ii] = 0; //Null terminal
2728 }
2729
2730 }
2731
MDrv_GetUsbDevInterfaceClass_Port3(void)2732 U8 MDrv_GetUsbDevInterfaceClass_Port3(void)
2733 {
2734 U8 u8DevType;
2735
2736 u8DevType = psAttachDevice_Port3->saCD[0].sInterface[0].bInterfaceClass;
2737
2738 return (u8DevType);
2739 }
2740 #endif //#if defined(MSOS_TYPE_NOS)
2741
2742