1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
5 // All software, firmware and related documentation herein ("MStar Software") are
6 // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by
7 // law, including, but not limited to, copyright law and international treaties.
8 // Any use, modification, reproduction, retransmission, or republication of all
9 // or part of MStar Software is expressly prohibited, unless prior written
10 // permission has been granted by MStar.
11 //
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14 // comply with all applicable laws and regulations:
15 //
16 // 1. MStar shall retain any and all right, ownership and interest to MStar
17 // Software and any modification/derivatives thereof.
18 // No right, ownership, or interest to MStar Software and any
19 // modification/derivatives thereof is transferred to you under Terms.
20 //
21 // 2. You understand that MStar Software might include, incorporate or be
22 // supplied together with third party`s software and the use of MStar
23 // Software may require additional licenses from third parties.
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32 //
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47 //
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55 //
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64 //
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66 // of Taiwan, R.O.C., excluding its conflict of law rules.
67 // Any and all dispute arising out hereof or related hereto shall be finally
68 // settled by arbitration referred to the Chinese Arbitration Association,
69 // Taipei in accordance with the ROC Arbitration Law and the Arbitration
70 // Rules of the Association by three (3) arbitrators appointed in accordance
71 // with the said Rules.
72 // The place of arbitration shall be in Taipei, Taiwan and the language shall
73 // be English.
74 // The arbitration award shall be final and binding to both parties.
75 //
76 //******************************************************************************
77 //<MStar Software>
78 ///////////////////////////////////////////////////////////////////////////////
79 //
80 // File name: drvUsbMain.C
81 // Version: 0.1
82 // Date: 2004/9/20
83 // Company: Faraday Tech. Corp.
84 ///////////////////////////////////////////////////////////////////////////////
85 #if defined(MSOS_TYPE_NOS)
86 #include "MsVersion.h"
87 #include "../USBHostConfig_2.h"
88 #include "../../include/hal_arch.h"
89 #include "../../include/hal_cache.h"
90 //#include <stdlib.h>
91 //#include <stdarg.h>
92 #ifndef ATV_SERISE_USE
93 #include <stdio.h>
94 #endif
95 #include <string.h>
96 //#include "chipset.h"
97 //#include "flib.h"
98 //#include <MsCommon.h>
99 #ifndef ATV_SERISE_USE
100 #include "../../include/datatype.h"
101 #else
102 #include "UsbHostDataDef.h"
103 #endif
104 #include "../drvHostLib_2.h"
105 #include "../drvHost200_2.h"
106 #include "../drvUsbMain_2.h"
107 #ifndef ATV_SERISE_USE
108
109 #endif
110 #include "../../include/_drvUSB.h"
111 #include "../drvscsi_2.h"
112 #ifdef ATV_SERISE_USE
113 #include "common.h"
114 #include "uart.h"
115 #include "command.h"
116 #endif
117 #ifdef CERAMAL_SERISE_USE
118 #include "drvtimer.h"
119 #include "Board.h"
120 #include "drvUTMI.h"
121 #else
122 #endif
123
124 #ifdef OnePort_OTG_EHCI
125 #include "MsCompiler.h"
126 #include "msusb.h"
127 #include "msDRC.h"
128 #include "msconfig.h"
129 #include "mscpu.h"
130 #include "drvisr.h"
131 #endif
132
133 #include "../../include/drvGlobal.h"
134
135 #include "../drvUSBHost_PTP_2.h"
136
137 #include "MsCommon.h"
138 #include "MsIRQ.h"
139 #include "MsOS.h"
140 #include "halUSB.h"
141
142 #ifdef DEVICE_ENUM_SEGMENT
143 U8 MDrv_Usb_Device_Enum_EX_Port2(void);
144 #endif
145 extern void msAPI_Timer_ResetWDT(void);
146
147 #define DRV_USB_DBG(x) //x;
148 #define MINI_DEBUG(x) //x;
149
150 U8 gUsbStatus_Port2=USB_OK;
151 U8 gUsbTimeout_Port2=5;
152 U8 gUsbRetryCount_Port2=3;
153 U16 gUsbChipID_Port2 = 0xFFFF;
154 U8 gUsbChipVersion_Port2 = 0xFF;
155
156 #if 1
157 extern U8 gUsbDeviceState;
158 extern U8 gUsbDeviceState_Port2;
159 #else
160 U8 gUsbDeviceState_Port2=POWER_SAVING;
161 #ifdef USB_POWER_SAVING_MODE
162 extern U8 gUsbDeviceState;
163 #endif
164 #endif
165 U8 NowIsHubPort2;
166
167 extern U8 gSpeed_Port2;
168
169 //static U32 original_xdwin1_Base_Port2=0xFFFFFFFF; //use 0xFFFFFFFF to represent void
170 static U8 xdwin1_lockCount_Port2=0;
171 #if 0
172 U8 code USB_VBuf_Port2[32] = {'M', 'S', 'V', 'C', '0', '0', // 0, 0 fixed
173 'Z', '2', // Library ID
174 #ifdef DTV_STANDARD_LIB
175 'A', '0', '0', '1', '4', '8', // build number
176 #endif
177 #ifdef ATV_SERISE_USE
178 'B', '0', '0', '1', '2', '3', // build number
179 #endif
180 #ifdef CERAMAL_SERISE_USE
181 'C', '0', '0', '1', '2', '3', // build number
182 #endif
183
184 '0', '0', '0', '0', '0', '0', '0', '0', // change list 46058
185 'A', '4', 'A', '0', '0', '0', '0', '0', '0',// A4: Saturn, A:LG
186 'T'};
187 #endif
188
189 #define USB_HOST_P2_DRV_VERSION /* Character String for DRV/API version */ \
190 MSIF_TAG, /* 'MSIF' */ \
191 MSIF_CLASS, /* '00' */ \
192 MSIF_CUS, /* 0x0000 */ \
193 MSIF_MOD, /* 0x0000 */ \
194 MSIF_CHIP, \
195 MSIF_CPU, \
196 {'U','S','B','2'}, /* IP__ */ \
197 {'0','2'}, /* 0.0 ~ Z.Z */ \
198 {'1','3'}, /* 00 ~ 99 */ \
199 {'0','0','2','5','9','5','9','0'}, /* CL# */ \
200 MSIF_OS
201
202 static MSIF_Version _drv_usb_host_p2_version = {
203 .DDI = { USB_HOST_P2_DRV_VERSION },
204 };
205
206 #ifdef OnePort_OTG_EHCI
207 U8 USBMode=0; //set default status=OTG device mode ,{default=0, otg=1, uhci=2}
208 extern U8 volatile usbUSBState;
209 #endif
210
211 extern U8 RecoveryFlag_Port2;
212 //extern BOOLEAN gDeviceFatalError;
213
214 #ifdef OnePort_OTG_EHCI
215 extern void MDrv_OTG_Init(void);
216 extern U8 usbIsUSBConfiged(void);
217 enum
218 {
219 USBHostMode_disconnect = 0,
220 USBHostMode_connect,
221 USBDeivceMode_disconnect,
222 USBDeivceMode_connect
223 };
224 #endif
225
226 struct stDontReEnumList
227 {
228 U16 VID;
229 U16 PID;
230 };
231
232 struct stDontReEnumList gDontReEnumList_Port2[] =
233 {
234 {0x0951, 0x1603},
235 {0x05E3, 0x0718},
236 {0x0BC2, 0xA013},
237
238 {0, 0}
239 };
240
241 extern void drvUSBHost_TurnOffPowerDownMode(void);
242 extern void drvUSBHost_TurnOnPowerDownMode(void);
243 extern BOOLEAN drvUSBHost_isPowerSaveModeEnable(void);
244 extern void drvUSBHost_UTMIInitial(void);
245 extern void UsbTurnOffPowerDownMode(void);
246 extern void UsbTurnOnPowerDownMode(void);
247
248 extern void drvUSBHost_TurnOffPowerDownMode_Port2(void);
249 extern void drvUSBHost_TurnOnPowerDownMode_Port2(void);
250
251 extern U8 drvUSBHost_PTP_Init(U8 u8UsbPort);
252 extern void XBYTE_OR(U32 Addr, U8 offset, U8 val);
253 extern void XBYTE_AND(U32 Addr, U8 offset,U8 val);
254 extern void XBYTE_SET(U32 Addr, U8 offset,U8 val);
255 extern U8 XBYTE_READ(U32 Addr, U8 offset);
256 extern U8 drvUSBHost_HID_Init(U8 u8UsbPort);
257 void MDrv_USBGetVIDPID_Port2(U16 *pVID, U16 *pPID);
258
MDrv_USB_Host_GetLibVer_Port2(const MSIF_Version ** ppVersion)259 U8 MDrv_USB_Host_GetLibVer_Port2(const MSIF_Version **ppVersion)
260 {
261 if(!ppVersion)
262 return 1;
263
264 *ppVersion = &_drv_usb_host_p2_version;
265 return 0;
266 }
267
MDrv_USBGetChipID_Port2(void)268 U16 MDrv_USBGetChipID_Port2(void)
269 {
270 if (gUsbChipID_Port2== 0xFFFF)
271 gUsbChipID_Port2 = HAL_USB_GetChipID();
272
273 return gUsbChipID_Port2;
274 }
275
276 extern MS_U8 MDrv_SYS_GetChipRev(void);
MDrv_USBGetChipVersion_Port2(void)277 U8 MDrv_USBGetChipVersion_Port2(void)
278 {
279 if (gUsbChipVersion_Port2== 0xFF)
280 gUsbChipVersion_Port2 = MDrv_SYS_GetChipRev();
281
282 return gUsbChipVersion_Port2;
283 }
284
UsbGetVerStringPort2(U8 * pVerString)285 void UsbGetVerStringPort2(U8 *pVerString)
286 {
287 #if 0
288 memcpy(pVerString, &USB_VBuf_Port2[0], sizeof(USB_VBuf_Port2));
289 #endif
290 }
291
SetUsbTimeoutPort2(U8 x)292 void SetUsbTimeoutPort2(U8 x)
293 {
294 gUsbTimeout_Port2=x;
295 }
296
UTMI2_ORXBYTE(U8 offset,U8 val)297 void UTMI2_ORXBYTE(U8 offset,U8 val)
298 {
299 XBYTE_OR(gUTMI2_BASE, offset, val);
300 }
301
UTMI2_ANDXBYTE(U8 offset,U8 val)302 void UTMI2_ANDXBYTE(U8 offset,U8 val)
303 {
304 XBYTE_AND(gUTMI2_BASE, offset, val);
305 }
306
UTMI2_SETXBYTE(U8 offset,U8 val)307 void UTMI2_SETXBYTE(U8 offset,U8 val)
308 {
309 XBYTE_SET(gUTMI2_BASE, offset, val);
310 }
311
UTMI2_READXBYTE(U8 offset)312 U8 UTMI2_READXBYTE(U8 offset)
313 {
314 return XBYTE_READ(gUTMI2_BASE, offset);
315 }
316
UHC2_ORXBYTE(U8 offset,U8 val)317 void UHC2_ORXBYTE(U8 offset,U8 val)
318 {
319 XBYTE_OR(gUHC2_BASE, offset, val);
320 }
321
UHC2_ANDXBYTE(U8 offset,U8 val)322 void UHC2_ANDXBYTE(U8 offset,U8 val)
323 {
324 XBYTE_AND(gUHC2_BASE, offset, val);
325 }
326
UHC2_SETXBYTE(U8 offset,U8 val)327 void UHC2_SETXBYTE(U8 offset,U8 val)
328 {
329 XBYTE_SET(gUHC2_BASE, offset, val);
330 }
331
UHC2_READXBYTE(U8 offset)332 U8 UHC2_READXBYTE(U8 offset)
333 {
334 return XBYTE_READ(gUHC2_BASE, offset);
335 }
336
USBC2_ORXBYTE(U8 offset,U8 val)337 void USBC2_ORXBYTE(U8 offset,U8 val)
338 {
339 XBYTE_OR(gUSBC2_BASE, offset, val);
340 }
341
USBC2_ANDXBYTE(U8 offset,U8 val)342 void USBC2_ANDXBYTE(U8 offset,U8 val)
343 {
344 XBYTE_AND(gUSBC2_BASE, offset, val);
345 }
346
USBC2_SETXBYTE(U8 offset,U8 val)347 void USBC2_SETXBYTE(U8 offset,U8 val)
348 {
349 XBYTE_SET(gUSBC2_BASE, offset, val);
350 }
351
USBC2_READXBYTE(U8 offset)352 U8 USBC2_READXBYTE(U8 offset)
353 {
354 return XBYTE_READ(gUSBC2_BASE, offset);
355 }
356
357 #ifdef Enable_Burning_Test
358 U8 buf2[512];
UsbTestPort2(void)359 void UsbTestPort2(void)
360 {
361 U16 i,j;
362 U32 idx=0,xxx;
363 U8 VailLun,LunIndex=0;
364 //U8 *buf2;
365
366 printf("\r\n USB Port2 Burning Test\n");
367 //printf("maxlun :%02bx lunbyte:%02bx\n",maxlun,lunbyte);
368 //MDrv_UsbHost_Init();
369
370 //buf2 = (U8*) msAPI_Memory_Allocate(0x200, BUF_ID_USB_HOST );
371 printf("buf2: %X\n", (UINT)buf2);
372
373 VailLun=MDrv_GET_MASS_VALID_LUN_PORT2();
374 switch (VailLun)
375 {
376 case 0x01:
377 LunIndex=0;
378 break;
379 case 0x02:
380 LunIndex=1;
381 break;
382 case 0x04:
383 LunIndex=2;
384 break;
385 case 0x08:
386 LunIndex=3;
387 break;
388 case 0x10:
389 LunIndex=4;
390 break;
391 case 0x20:
392 LunIndex=5;
393 break;
394 case 0x40:
395 LunIndex=6;
396 break;
397 case 0x80:
398 LunIndex=7;
399 break;
400 }
401
402 //printf("\r\n addr=%x",(VirtoPhyAddr((U32)buf1)>>16));
403 //printf(",%x",(VirtoPhyAddr((U32)buf1)));
404 printf("gSpeed: %d\n", gSpeed_Port2);
405 while (1)
406 {
407 #ifndef CERAMAL_SERISE_USE
408 msAPI_Timer_ResetWDT();
409 #endif
410 for (i=0 ; i < 0x200 ; i++)
411 {
412 buf2[i]= (i & 0xff);
413 }
414
415 idx++;
416 //if ((idx & 0x3f)==0)
417 {
418 printf("\r\n Loop:%x",(U16)(idx>>16));
419 printf(",%x",(U16)(idx));
420 }
421 //MDrv_MIU_Copy
422 xxx=idx % 10000;
423 if (MDrv_UsbBlockWriteFromMIU_Port2(LunIndex,50+xxx,1,(U32)VirtoPhyAddr(buf2))==FALSE)
424 {
425 printf("\r\n write failed\n");
426 break;
427 }
428
429 if (MDrv_UsbBlockReadToMIU_Port2(LunIndex,50+xxx,1,(U32)VirtoPhyAddr(buf2))==FALSE)
430 {
431 printf("\r\n read failed\n");
432 break;
433 }
434 //MsOS_DelayTask(10);
435 for (j=0 ; j < 0x200 ; j++)
436 {
437 if (buf2[j]!= (j&0xff))
438 {
439 printf("\r\n LBA:%d data error\n", (U16)(50+xxx));
440 while(1);
441 }
442 }
443 MsOS_DelayTask(5);
444 }
445
446 //msAPI_Memory_Free((void*)buf2,BUF_ID_USB_HOST);
447 }
448 #endif
449 #if 0
450 U8 MDrv_UsbGetInterfaceClass(U8 i,U8 j)
451 {
452 U8 tmp;
453 #ifdef USE_XDATA_ADDRESS_0XF000
454 MDrv_USB_SetXdataWindow1();
455 #endif
456 tmp=psAttachDevice_Port2->saCD[i].sInterface[j].bInterfaceClass;
457 #ifdef USE_XDATA_ADDRESS_0XF000
458 MDrv_USB_ReleaseXdataWindow1();
459 #endif
460
461 return tmp;
462 }
463 #endif
464
465 //====================================================================
466 // * Function Name: main
467 // * Description:
468 // * Input:
469 // * OutPut:
470 //====================================================================
471 #ifndef DEVICE_ENUM_SEGMENT
MDrv_UsbHost_Init_Port2(void)472 BOOLEAN MDrv_UsbHost_Init_Port2(void)
473 {
474 BOOLEAN result=FALSE;
475
476 DRV_USB_DBG(printf("HOST200_main\n"));
477
478 MINI_DEBUG(printf("uinit\n"));
479 if (gUsbStatus_Port2==USB_EJECT)
480 {
481 //printf("2430:%02bx\n",XBYTE[0x2430]);
482 if (UHC2_READXBYTE(0x30)&2)
483 {
484 gUsbStatus_Port2=USB_OK;
485 }
486 else
487 return FALSE; //eject state
488 }
489
490 UTMI2_ORXBYTE(0x06,0x40); //Force HS TX current enable and CDR stage select
491 UTMI2_ANDXBYTE(0x06,~0x20); //clear bit 5
492 if (MDrv_USBGetChipID_Port2() == CHIPID_EMERALD)
493 UTMI2_ORXBYTE(0x06, 0x04); //Force HS TX current source enable, for MHL noise issue, for Emerald only
494
495 UTMI2_ORXBYTE(0x06,0x03); //reset UTMI
496 MsOS_DelayTask(2);
497 UTMI2_ANDXBYTE(0x06,0xfc);
498
499 if ( (MDrv_USBGetChipID_Port2() == CHIPID_NEPTUNE) ||
500 (MDrv_USBGetChipID_Port2() == CHIPID_ERIS) ||
501 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA) ||
502 (MDrv_USBGetChipID_Port2() == CHIPID_PLUTO) ||
503 (MDrv_USBGetChipID_Port2() == CHIPID_TRITON) ||
504 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA2) )
505 {
506 UTMI2_SETXBYTE(0x29,0x08);
507 }
508 else if (MDrv_USBGetChipID_Port2()==CHIPID_EUCLID) // Euclid
509 {
510 UTMI2_ANDXBYTE(0x29,0xF7); //disable full speed retime
511 }
512
513 #if defined(Enable_Issue_TestPacket) && !defined(ENABLE_HOST_TEST)
514 UTMI2_SETXBYTE(0x03,0); //for device disconnect status bit
515 #else
516 UTMI2_SETXBYTE(0x03,0xa8); //for device disconnect status bit
517 #endif
518
519 //XBYTE[gUTMI2_BASE+0x07]|=0x02; //
520 #ifdef DTV_STANDARD_LIB
521 if (MDrv_USBGetChipID_Port2()==CHIPID_NEPTUNE) //Neptune , after U06
522 {
523 if (MDrv_USBGetChipVersion_Port2()>= 0x06) //U07
524 {
525 UTMI2_ORXBYTE(0x07, 0x02);
526 UTMI2_SETXBYTE(0x2c,0xc1);
527 UTMI2_SETXBYTE(0x2d,0x3b);//enable TX common mode,
528 UTMI2_ORXBYTE(0x2f, 0x0e); //preemsis
529 }
530 }
531 else if ((MDrv_USBGetChipID_Port2()>=CHIPID_ERIS)&&(MDrv_USBGetChipID_Port2()<=CHIPID_TITANIA)) //Eris: 3 ,Titania: 4, Pluto: 5
532 {
533 UTMI2_SETXBYTE(0x2c,0xc5);
534 UTMI2_SETXBYTE(0x2d,0x3b);//enable TX common mode,
535 UTMI2_ORXBYTE(0x2f, 0x0e); //preemsis
536 }
537 else if (MDrv_USBGetChipID_Port2()==CHIPID_PLUTO) // Pluto: 5
538 {
539 UTMI2_ORXBYTE(0x2c, 0xc1);
540 UTMI2_ORXBYTE(0x2d, 0x3);//enable TX common mode,
541 UTMI2_ORXBYTE(0x2f, 0x4a); //preemsis
542 UTMI2_ORXBYTE(0x13, 0x70);
543 XBYTE_AND(gUTMI_BASE,0,0xfe); //clear port 0 IREF
544 }
545 else if (MDrv_USBGetChipID_Port2()==CHIPID_TITANIA2) // Titania 2
546 {
547 UTMI2_ORXBYTE(0x2c, 0xc1);
548 UTMI2_ORXBYTE(0x2d, 0x3);//enable TX common mode,
549 UTMI2_ORXBYTE(0x2f, 0x4a); //preemsis
550 }
551 else if (MDrv_USBGetChipID_Port2()==CHIPID_TRITON) //Triton=6
552 {
553 UTMI2_SETXBYTE(0x2c,0xc1);
554 UTMI2_SETXBYTE(0x2d,0x3b);//enable TX common mode,
555 UTMI2_ORXBYTE(0x2f,0x0e); //preemsis
556 }
557 else if (MDrv_USBGetChipID_Port2()==CHIPID_EUCLID) // Euclid
558 {
559 UTMI2_ORXBYTE(0x2c, 0xc1);
560 UTMI2_ORXBYTE(0x2d, 0x3);//enable TX common mode,
561 UTMI2_ORXBYTE(0x2f, 0x4a); //preemsis
562 }
563 else if ( (MDrv_USBGetChipID_Port2()==CHIPID_TITANIA3) || // Titania 3, Titania 4
564 (MDrv_USBGetChipID_Port2()==CHIPID_TITANIA4) ||
565 (MDrv_USBGetChipID_Port2()==CHIPID_TITANIA7) ||
566 (MDrv_USBGetChipID_Port2()==CHIPID_TITANIA8) ||
567 (MDrv_USBGetChipID_Port2()==CHIPID_TITANIA9) ||
568 (MDrv_USBGetChipID_Port2()==CHIPID_TITANIA12) ||
569 (MDrv_USBGetChipID_Port2()==CHIPID_TITANIA13) ||
570 (MDrv_USBGetChipID_Port2() == CHIPID_JANUS) ||
571 (MDrv_USBGetChipID_Port2() == CHIPID_JANUS2) ||
572 (MDrv_USBGetChipID_Port2() == CHIPID_AMBER6) )
573 {
574 UTMI2_ORXBYTE(0x2c, 0x10); //TX-current adjust to 105%
575 UTMI2_ORXBYTE(0x2d, 0x02); //Pre-emphasis enable
576 UTMI2_ORXBYTE(0x2f, 0x81); //HS_TX common mode current enable (100mV);Pre-emphasis enable (10%)
577 UTMI2_ORXBYTE(0x09,0x81); //UTMI RX anti-dead-lock, ISI improvement
578 }
579 else if ( (MDrv_USBGetChipID_Port2()==CHIPID_AMBER1) ||
580 (MDrv_USBGetChipID_Port2()==CHIPID_AMBER5) ||
581 (MDrv_USBGetChipID_Port2()==CHIPID_AMBER7) ||
582 (MDrv_USBGetChipID_Port2()==CHIPID_AMBER3) ||
583 (MDrv_USBGetChipID_Port2()==CHIPID_AMETHYST) ||
584 (MDrv_USBGetChipID_Port2()==CHIPID_EAGLE))
585 {
586 //for Amber1 later 40nm before Agate
587 UTMI2_ORXBYTE(0x2c, 0x98);
588 UTMI2_ORXBYTE(0x2d, 0x02);
589 UTMI2_ORXBYTE(0x2e, 0x10);
590 UTMI2_ORXBYTE(0x2f, 0x01);
591 UTMI2_ORXBYTE(0x09,0x81); //UTMI RX anti-dead-lock, ISI improvement
592 }
593 else if ( (MDrv_USBGetChipID_Port2() == CHIPID_EDISON) ||
594 (MDrv_USBGetChipID_Port2() == CHIPID_EIFFEL) )
595 {
596 //for Agate later 40nm, same as 55nm setting2
597 UTMI2_ORXBYTE(0x2c, 0x90); //TX-current adjust to 105%
598 UTMI2_ORXBYTE(0x2d, 0x02); //Pre-emphasis enable
599 UTMI2_ORXBYTE(0x2f, 0x81); //HS_TX common mode current enable (100mV);Pre-emphasis enable (10%)
600 UTMI2_ORXBYTE(0x09,0x81); //UTMI RX anti-dead-lock, ISI improvement
601 }
602 else //for Agate later 40nm, same as 55nm setting1
603 {
604 UTMI2_ORXBYTE(0x2c, 0x10); //TX-current adjust to 105%
605 UTMI2_ORXBYTE(0x2d, 0x02); //Pre-emphasis enable
606 UTMI2_ORXBYTE(0x2f, 0x81); //HS_TX common mode current enable (100mV);Pre-emphasis enable (10%)
607 UTMI2_ORXBYTE(0x09,0x81); //UTMI RX anti-dead-lock, ISI improvement
608 }
609 #endif
610
611 if ( (MDrv_USBGetChipID_Port2() == CHIPID_EIFFEL) )
612 UTMI2_ANDXBYTE(0x08, ~0x08); //Special setting for Eiffel analog LIB issue
613 else
614 {
615 //for Edison later 240M clock enhance, early chip will ignore this 2 bits
616 UTMI2_ORXBYTE(0x08,0x08); //bit<3> for 240's phase as 120's clock set 1, bit<4> for 240Mhz in mac 0 for faraday 1 for etron
617 }
618
619 /* Enable Cross Point ECO 2012/03/20 */
620 if ((MDrv_USBGetChipID_Port2() == CHIPID_ELK) ||
621 (MDrv_USBGetChipID_Port2() == CHIPID_AMBER5) ||
622 (MDrv_USBGetChipID_Port2() == CHIPID_EAGLE) ||
623 (MDrv_USBGetChipID_Port2() == CHIPID_EMERALD) ||
624 (MDrv_USBGetChipID_Port2() == CHIPID_EDISON) ||
625 (MDrv_USBGetChipID_Port2() == CHIPID_AGATE))
626 {
627 UTMI2_ORXBYTE(0x04,0x40); //deglitch SE0 (low-speed cross point)
628 }
629 else if((MDrv_USBGetChipID_Port2() == CHIPID_JANUS2))
630 {
631 UTMI2_ORXBYTE(0x0a,0x80); //deglitch SE0 (low-speed cross point)
632 }
633
634 /* Enable Power Noice ECO 2012/03/20 */
635 if ((MDrv_USBGetChipID_Port2() == CHIPID_JANUS2) ||
636 (MDrv_USBGetChipID_Port2() == CHIPID_ELK) ||
637 (MDrv_USBGetChipID_Port2() == CHIPID_AMBER5) ||
638 (MDrv_USBGetChipID_Port2() == CHIPID_EAGLE) ||
639 (MDrv_USBGetChipID_Port2() == CHIPID_EMERALD) ||
640 (MDrv_USBGetChipID_Port2() == CHIPID_EDISON) ||
641 (MDrv_USBGetChipID_Port2() == CHIPID_AGATE))
642 {
643 USBC2_ORXBYTE(0x02,0x40); //use eof2 to reset state machine (power noise)
644 }
645
646 /* Enable Tx/Rx Reset Clock Gatting ECO 2012/03/27 */
647 if((MDrv_USBGetChipID_Port2() == CHIPID_ELK) ||
648 (MDrv_USBGetChipID_Port2() == CHIPID_AMBER5) ||
649 (MDrv_USBGetChipID_Port2() == CHIPID_EAGLE) ||
650 (MDrv_USBGetChipID_Port2() == CHIPID_EMERALD) ||
651 (MDrv_USBGetChipID_Port2() == CHIPID_EDISON) ||
652 (MDrv_USBGetChipID_Port2() == CHIPID_AGATE))
653 {
654 UTMI2_ORXBYTE(0x04,0x20); //hw auto deassert sw reset (tx/rx reset)
655 }
656
657 /* enable patch for the assertion of interrupt(Lose short packet interrupt) 2012/03/28 */
658 if((MDrv_USBGetChipID_Port2() == CHIPID_AMBER5) ||
659 (MDrv_USBGetChipID_Port2() == CHIPID_AGATE))
660 {
661 USBC2_ORXBYTE(0x04,0x80); //patch for the assertion of interrupt
662 }
663
664 /* enable add patch to Period_EOF1(babble problem) 2012/03/28 */
665 if((MDrv_USBGetChipID_Port2() == CHIPID_AMBER5) ||
666 (MDrv_USBGetChipID_Port2() == CHIPID_AGATE))
667 {
668 USBC2_ORXBYTE(0x04,0x40); //add patch to Period_EOF1
669 }
670
671 /* enable eco for short packet MDATA 2012/07/05 */
672 if((MDrv_USBGetChipID_Port2() == CHIPID_EDISON) ||
673 (MDrv_USBGetChipID_Port2() == CHIPID_EMERALD))
674 {
675 USBC2_ORXBYTE(0x00,0x10); //short packet MDATA in Split transaction clears ACT bit (LS dev under a HS hub)
676 }
677
678 /* enable eco for pv2mi bridge mis-behavior 2012/12/05 */
679 if((MDrv_USBGetChipID_Port2() == CHIPID_EINSTEIN) ||
680 (MDrv_USBGetChipID_Port2() == CHIPID_NAPOLI) ||
681 (MDrv_USBGetChipID_Port2() == CHIPID_MIAMI))
682 {
683 USBC2_ORXBYTE(0x0A,0x40); //fix pv2mi bridge mis-behavior
684 }
685
686 if (MDrv_USBGetChipID_Port2()==CHIPID_PLUTO) // If is Pluto
687 UTMI2_ORXBYTE(0x09,0x01); //ISI improvement
688 else
689 UTMI2_ORXBYTE(0x13,0x02); //ISI improvement
690
691 if ( (MDrv_USBGetChipID_Port2() == CHIPID_NEPTUNE) ||
692 (MDrv_USBGetChipID_Port2() == CHIPID_ERIS) ||
693 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA) ||
694 (MDrv_USBGetChipID_Port2() == CHIPID_PLUTO) ||
695 (MDrv_USBGetChipID_Port2() == CHIPID_TRITON) ||
696 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA2) )
697 {
698 }
699 else
700 {
701 UTMI2_ORXBYTE(0x0b, 0x80); //TX timing select latch path
702 }
703
704 if (MDrv_USBGetChipID_Port2()==CHIPID_EUCLID) // Euclid
705 {
706 UTMI2_SETXBYTE(0x09,0x81);//0x20; //patch low tempture,FL meta issue and enable new FL RX engin
707 }
708 else
709 {
710 UTMI2_ORXBYTE(0x09,0x60);//0x20; //patch low tempture,FL meta issue and enable new FL RX engin
711 }
712
713 #if 1
714 DRV_USB_DBG(printf("Host: %X\n", mwOTG20_Control_HOST_SPD_TYP_Rd()));
715 if (mwOTG20_Control_HOST_SPD_TYP_Rd()==1) //low speed,for HID
716 UTMI2_ANDXBYTE(0x09,~0x40); //old setting
717 #endif
718
719 if ( (MDrv_USBGetChipID_Port2() == CHIPID_NEPTUNE) ||
720 (MDrv_USBGetChipID_Port2() == CHIPID_ERIS) ||
721 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA) ||
722 (MDrv_USBGetChipID_Port2() == CHIPID_PLUTO) ||
723 (MDrv_USBGetChipID_Port2() == CHIPID_TRITON) ||
724 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA2) )
725 {
726 UTMI2_ANDXBYTE(0x27,0xf3);
727 UTMI2_ORXBYTE(0x27,0x08); //(1) Offset 27 (��h3AA7) bit <3:2> set 2��b10 // RX bias current => 60uA (default 40uA)
728
729 //(2) Offset 2A (��h3AAA) bit <3:2> set 2��b11 // Squelch voltage => 100mV (default 150mV)
730 #ifdef DTV_STANDARD_LIB
731 UTMI2_SETXBYTE(0x2a,0x07);
732 #endif
733 }
734
735 if ( (MDrv_USBGetChipID_Port2() == CHIPID_NEPTUNE) ||
736 (MDrv_USBGetChipID_Port2() == CHIPID_ERIS) ||
737 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA) ||
738 (MDrv_USBGetChipID_Port2() == CHIPID_PLUTO) ||
739 (MDrv_USBGetChipID_Port2() == CHIPID_TRITON) ||
740 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA2) ||
741 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA3) ||
742 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA4) ||
743 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA7) ||
744 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA8) ||
745 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA9) ||
746 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA12) ||
747 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA13) ||
748 (MDrv_USBGetChipID_Port2() == CHIPID_JANUS) ||
749 (MDrv_USBGetChipID_Port2() == CHIPID_MARIA10) ||
750 (MDrv_USBGetChipID_Port2() == CHIPID_MACAW12) ||
751 (MDrv_USBGetChipID_Port2() == CHIPID_JANUS2) ||
752 (MDrv_USBGetChipID_Port2() == CHIPID_AMBER1) ||
753 (MDrv_USBGetChipID_Port2() == CHIPID_AMBER3) ||
754 (MDrv_USBGetChipID_Port2() == CHIPID_AMBER5) ||
755 (MDrv_USBGetChipID_Port2() == CHIPID_AMBER6) ||
756 (MDrv_USBGetChipID_Port2() == CHIPID_AMBER7) ||
757 (MDrv_USBGetChipID_Port2() == CHIPID_AMETHYST) )
758 {
759 UTMI2_ORXBYTE(0x15,0x20); //HOST CHIRP Detect
760 }
761 else
762 {
763 UTMI2_ORXBYTE(0x15,0x60); // change to 55 interface (bit6)
764 }
765
766 //(3) Offset 2D (��h3AAD) bit <5:3> set 3��b111 // HS_RTERM bias current 5/6
767 //XBYTE[0x128a]=0x87; //change UHC priority
768 //XBYTE[0x128d]&=0x0f; //clear bit 12~15
769 //XBYTE[0x128e]|=0xf; //upgrade UHC priority, set bit 0~3
770 MsOS_DelayTask(USB_HOST_INIT_DELAY);
771
772
773 //MDrv_Sys_SetXdataWindow1Base(USB_BUFFER_START_ADR_4K_ALIGN>>12); //switch window 1
774 gUsbStatus_Port2=USB_OK;
775 // gUsbTimeout=3; //set at flib_Host20_Enumerate_Port2()
776 RecoveryFlag_Port2=0; //initialize recovery flag
777 gUsbDeviceState_Port2=USB11_DEVICE; //1.1 at first
778
779 //gDeviceFatalError=FALSE;
780 if(flib_OTGH_Init_Port2(0))
781 result =TRUE;
782
783 return result;
784
785 }
786 #else // support device enumeration dividable
_MDrv_UsbHost_Init0_Port2(void)787 BOOLEAN _MDrv_UsbHost_Init0_Port2(void)
788 {
789 //BOOLEAN result=FALSE;
790
791 DRV_USB_DBG(printf("HOST200_main\n"));
792
793 MINI_DEBUG(printf("uinit\n"));
794 if (gUsbStatus_Port2==USB_EJECT)
795 {
796 //printf("2430:%02bx\n",XBYTE[0x2430]);
797 if (UHC2_READXBYTE(0x30)&2)
798 {
799 gUsbStatus_Port2=USB_OK;
800 }
801 else
802 return FALSE; //eject state
803 }
804
805 UTMI2_ORXBYTE(0x06,0x40); //Force HS TX current enable and CDR stage select
806 UTMI2_ANDXBYTE(0x06,~0x20); //clear bit 5
807 if (MDrv_USBGetChipID_Port2() == CHIPID_EMERALD)
808 UTMI2_ORXBYTE(0x06, 0x04); //Force HS TX current source enable, for MHL noise issue, for Emerald only
809
810 UTMI2_ORXBYTE(0x06,0x03); //reset UTMI
811 MsOS_DelayTask(2);
812 UTMI2_ANDXBYTE(0x06,0xfc);
813
814 if ( (MDrv_USBGetChipID_Port2() == CHIPID_NEPTUNE) ||
815 (MDrv_USBGetChipID_Port2() == CHIPID_ERIS) ||
816 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA) ||
817 (MDrv_USBGetChipID_Port2() == CHIPID_PLUTO) ||
818 (MDrv_USBGetChipID_Port2() == CHIPID_TRITON) ||
819 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA2) )
820 {
821 UTMI2_SETXBYTE(0x29,0x08);
822 }
823 else if (MDrv_USBGetChipID_Port2()==CHIPID_EUCLID) // Euclid
824 {
825 UTMI2_ANDXBYTE(0x29,0xF7); //disable full speed retime
826 }
827
828 #if defined(Enable_Issue_TestPacket) && !defined(ENABLE_HOST_TEST)
829 UTMI2_SETXBYTE(0x03,0); //for device disconnect status bit
830 #else
831 UTMI2_SETXBYTE(0x03,0xa8); //for device disconnect status bit
832 #endif
833
834 //XBYTE[gUTMI2_BASE+0x07]|=0x02; //
835 #ifdef DTV_STANDARD_LIB
836 if (MDrv_USBGetChipID_Port2()==CHIPID_NEPTUNE) //Neptune , after U06
837 {
838 if (MDrv_USBGetChipVersion_Port2()>= 0x06) //U07
839 {
840 UTMI2_ORXBYTE(0x07, 0x02);
841 UTMI2_SETXBYTE(0x2c,0xc1);
842 UTMI2_SETXBYTE(0x2d,0x3b);//enable TX common mode,
843 UTMI2_ORXBYTE(0x2f, 0x0e); //preemsis
844 }
845 }
846 else if ((MDrv_USBGetChipID_Port2()>=CHIPID_ERIS)&&(MDrv_USBGetChipID_Port2()<=CHIPID_TITANIA)) //Eris: 3 ,Titania: 4, Pluto: 5
847 {
848 UTMI2_SETXBYTE(0x2c,0xc5);
849 UTMI2_SETXBYTE(0x2d,0x3b);//enable TX common mode,
850 UTMI2_ORXBYTE(0x2f, 0x0e); //preemsis
851 }
852 else if (MDrv_USBGetChipID_Port2()==CHIPID_PLUTO) // Pluto: 5
853 {
854 UTMI2_ORXBYTE(0x2c, 0xc1);
855 UTMI2_ORXBYTE(0x2d, 0x3);//enable TX common mode,
856 UTMI2_ORXBYTE(0x2f, 0x4a); //preemsis
857 UTMI2_ORXBYTE(0x13, 0x70);
858 XBYTE_AND(gUTMI_BASE,0,0xfe); //clear port 0 IREF
859 }
860 else if (MDrv_USBGetChipID_Port2()==CHIPID_TITANIA2) // Titania 2
861 {
862 UTMI2_ORXBYTE(0x2c, 0xc1);
863 UTMI2_ORXBYTE(0x2d, 0x3);//enable TX common mode,
864 UTMI2_ORXBYTE(0x2f, 0x4a); //preemsis
865 }
866 else if (MDrv_USBGetChipID_Port2()==CHIPID_TRITON) //Triton=6
867 {
868 UTMI2_SETXBYTE(0x2c,0xc1);
869 UTMI2_SETXBYTE(0x2d,0x3b);//enable TX common mode,
870 UTMI2_ORXBYTE(0x2f,0x0e); //preemsis
871 }
872 else if (MDrv_USBGetChipID_Port2()==CHIPID_EUCLID) // Euclid
873 {
874 UTMI2_ORXBYTE(0x2c, 0xc1);
875 UTMI2_ORXBYTE(0x2d, 0x3);//enable TX common mode,
876 UTMI2_ORXBYTE(0x2f, 0x4a); //preemsis
877 }
878 else if ( (MDrv_USBGetChipID_Port2()==CHIPID_TITANIA3) || // Titania 3, Titania 4
879 (MDrv_USBGetChipID_Port2()==CHIPID_TITANIA4) ||
880 (MDrv_USBGetChipID_Port2()==CHIPID_TITANIA7) ||
881 (MDrv_USBGetChipID_Port2()==CHIPID_TITANIA8) ||
882 (MDrv_USBGetChipID_Port2()==CHIPID_TITANIA9) ||
883 (MDrv_USBGetChipID_Port2()==CHIPID_TITANIA12) ||
884 (MDrv_USBGetChipID_Port2()==CHIPID_TITANIA13) ||
885 (MDrv_USBGetChipID_Port2() == CHIPID_JANUS) ||
886 (MDrv_USBGetChipID_Port2() == CHIPID_JANUS2) ||
887 (MDrv_USBGetChipID_Port2() == CHIPID_AMBER6) )
888 {
889 UTMI2_ORXBYTE(0x2c, 0x10); //TX-current adjust to 105%
890 UTMI2_ORXBYTE(0x2d, 0x02); //Pre-emphasis enable
891 UTMI2_ORXBYTE(0x2f, 0x81); //HS_TX common mode current enable (100mV);Pre-emphasis enable (10%)
892 UTMI2_ORXBYTE(0x09,0x81); //UTMI RX anti-dead-lock, ISI improvement
893 }
894 else if ( (MDrv_USBGetChipID_Port2()==CHIPID_AMBER1) ||
895 (MDrv_USBGetChipID_Port2()==CHIPID_AMBER5) ||
896 (MDrv_USBGetChipID_Port2()==CHIPID_AMBER7) ||
897 (MDrv_USBGetChipID_Port2()==CHIPID_AMBER3) ||
898 (MDrv_USBGetChipID_Port2()==CHIPID_AMETHYST) ||
899 (MDrv_USBGetChipID_Port2()==CHIPID_EAGLE))
900 {
901 //for Amber1 later 40nm before Agate
902 UTMI2_ORXBYTE(0x2c, 0x98);
903 UTMI2_ORXBYTE(0x2d, 0x02);
904 UTMI2_ORXBYTE(0x2e, 0x10);
905 UTMI2_ORXBYTE(0x2f, 0x01);
906 UTMI2_ORXBYTE(0x09,0x81); //UTMI RX anti-dead-lock, ISI improvement
907 }
908 else if ( (MDrv_USBGetChipID_Port2() == CHIPID_EDISON) ||
909 (MDrv_USBGetChipID_Port2() == CHIPID_EIFFEL) )
910 {
911 //for Agate later 40nm, same as 55nm setting2
912 UTMI2_ORXBYTE(0x2c, 0x90); //TX-current adjust to 105%
913 UTMI2_ORXBYTE(0x2d, 0x02); //Pre-emphasis enable
914 UTMI2_ORXBYTE(0x2f, 0x81); //HS_TX common mode current enable (100mV);Pre-emphasis enable (10%)
915 UTMI2_ORXBYTE(0x09,0x81); //UTMI RX anti-dead-lock, ISI improvement
916 }
917 else //for Agate later 40nm, same as 55nm setting1
918 {
919 UTMI2_ORXBYTE(0x2c, 0x10); //TX-current adjust to 105%
920 UTMI2_ORXBYTE(0x2d, 0x02); //Pre-emphasis enable
921 UTMI2_ORXBYTE(0x2f, 0x81); //HS_TX common mode current enable (100mV);Pre-emphasis enable (10%)
922 UTMI2_ORXBYTE(0x09,0x81); //UTMI RX anti-dead-lock, ISI improvement
923 }
924 #endif
925
926 if ( (MDrv_USBGetChipID_Port2() == CHIPID_EIFFEL) )
927 UTMI2_ANDXBYTE(0x08, ~0x08); //Special setting for Eiffel analog LIB issue
928 else
929 {
930 //for Edison later 240M clock enhance, early chip will ignore this 2 bits
931 UTMI2_ORXBYTE(0x08,0x08); //bit<3> for 240's phase as 120's clock set 1, bit<4> for 240Mhz in mac 0 for faraday 1 for etron
932 }
933
934 /* Enable Cross Point ECO 2012/03/20 */
935 if ((MDrv_USBGetChipID_Port2() == CHIPID_ELK) ||
936 (MDrv_USBGetChipID_Port2() == CHIPID_AMBER5) ||
937 (MDrv_USBGetChipID_Port2() == CHIPID_EAGLE) ||
938 (MDrv_USBGetChipID_Port2() == CHIPID_EMERALD) ||
939 (MDrv_USBGetChipID_Port2() == CHIPID_EDISON) ||
940 (MDrv_USBGetChipID_Port2() == CHIPID_AGATE))
941 {
942 UTMI2_ORXBYTE(0x04,0x40); //deglitch SE0 (low-speed cross point)
943 }
944 else if((MDrv_USBGetChipID_Port2() == CHIPID_JANUS2))
945 {
946 UTMI2_ORXBYTE(0x0a,0x80); //deglitch SE0 (low-speed cross point)
947 }
948
949 /* Enable Power Noice ECO 2012/03/20 */
950 if ((MDrv_USBGetChipID_Port2() == CHIPID_JANUS2) ||
951 (MDrv_USBGetChipID_Port2() == CHIPID_ELK) ||
952 (MDrv_USBGetChipID_Port2() == CHIPID_AMBER5) ||
953 (MDrv_USBGetChipID_Port2() == CHIPID_EAGLE) ||
954 (MDrv_USBGetChipID_Port2() == CHIPID_EMERALD) ||
955 (MDrv_USBGetChipID_Port2() == CHIPID_EDISON) ||
956 (MDrv_USBGetChipID_Port2() == CHIPID_AGATE))
957 {
958 USBC2_ORXBYTE(0x02,0x40); //use eof2 to reset state machine (power noise)
959 }
960
961 /* Enable Tx/Rx Reset Clock Gatting ECO 2012/03/27 */
962 if((MDrv_USBGetChipID_Port2() == CHIPID_ELK) ||
963 (MDrv_USBGetChipID_Port2() == CHIPID_AMBER5) ||
964 (MDrv_USBGetChipID_Port2() == CHIPID_EAGLE) ||
965 (MDrv_USBGetChipID_Port2() == CHIPID_EMERALD) ||
966 (MDrv_USBGetChipID_Port2() == CHIPID_EDISON) ||
967 (MDrv_USBGetChipID_Port2() == CHIPID_AGATE))
968 {
969 UTMI2_ORXBYTE(0x04,0x20); //hw auto deassert sw reset (tx/rx reset)
970 }
971
972 /* enable patch for the assertion of interrupt(Lose short packet interrupt) 2012/03/28 */
973 if((MDrv_USBGetChipID_Port2() == CHIPID_AMBER5) ||
974 (MDrv_USBGetChipID_Port2() == CHIPID_AGATE))
975 {
976 USBC2_ORXBYTE(0x04,0x80); //patch for the assertion of interrupt
977 }
978
979 /* enable add patch to Period_EOF1(babble problem) 2012/03/28 */
980 if((MDrv_USBGetChipID_Port2() == CHIPID_AMBER5) ||
981 (MDrv_USBGetChipID_Port2() == CHIPID_AGATE))
982 {
983 USBC2_ORXBYTE(0x04,0x40); //add patch to Period_EOF1
984 }
985
986 /* enable eco for short packet MDATA 2012/07/05 */
987 if((MDrv_USBGetChipID_Port2() == CHIPID_EDISON) ||
988 (MDrv_USBGetChipID_Port2() == CHIPID_EMERALD))
989 {
990 USBC2_ORXBYTE(0x00,0x10); //short packet MDATA in Split transaction clears ACT bit (LS dev under a HS hub)
991 }
992
993 /* enable eco for pv2mi bridge mis-behavior 2012/12/05 */
994 if((MDrv_USBGetChipID_Port2() == CHIPID_EINSTEIN) ||
995 (MDrv_USBGetChipID_Port2() == CHIPID_NAPOLI) ||
996 (MDrv_USBGetChipID_Port2() == CHIPID_MIAMI))
997 {
998 USBC2_ORXBYTE(0x0A,0x40); //fix pv2mi bridge mis-behavior
999 }
1000
1001 if (MDrv_USBGetChipID_Port2()==CHIPID_PLUTO) // If is Pluto
1002 UTMI2_ORXBYTE(0x09,0x01); //ISI improvement
1003 else
1004 UTMI2_ORXBYTE(0x13,0x02); //ISI improvement
1005
1006 if ( (MDrv_USBGetChipID_Port2() == CHIPID_NEPTUNE) ||
1007 (MDrv_USBGetChipID_Port2() == CHIPID_ERIS) ||
1008 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA) ||
1009 (MDrv_USBGetChipID_Port2() == CHIPID_PLUTO) ||
1010 (MDrv_USBGetChipID_Port2() == CHIPID_TRITON) ||
1011 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA2) )
1012 {
1013 }
1014 else
1015 {
1016 UTMI2_ORXBYTE(0x0b, 0x80); //TX timing select latch path
1017 }
1018
1019 if (MDrv_USBGetChipID_Port2()==CHIPID_EUCLID) // Euclid
1020 {
1021 UTMI2_SETXBYTE(0x09,0x81);//0x20; //patch low tempture,FL meta issue and enable new FL RX engin
1022 }
1023 else
1024 {
1025 UTMI2_ORXBYTE(0x09,0x60);//0x20; //patch low tempture,FL meta issue and enable new FL RX engin
1026 }
1027
1028 #if 1
1029 DRV_USB_DBG(printf("Host: %X\n", mwOTG20_Control_HOST_SPD_TYP_Rd()));
1030 if (mwOTG20_Control_HOST_SPD_TYP_Rd()==1) //low speed,for HID
1031 UTMI2_ANDXBYTE(0x09,~0x40); //old setting
1032 #endif
1033
1034 if ( (MDrv_USBGetChipID_Port2() == CHIPID_NEPTUNE) ||
1035 (MDrv_USBGetChipID_Port2() == CHIPID_ERIS) ||
1036 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA) ||
1037 (MDrv_USBGetChipID_Port2() == CHIPID_PLUTO) ||
1038 (MDrv_USBGetChipID_Port2() == CHIPID_TRITON) ||
1039 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA2) )
1040 {
1041 UTMI2_ANDXBYTE(0x27,0xf3);
1042 UTMI2_ORXBYTE(0x27,0x08); //(1) Offset 27 (��h3AA7) bit <3:2> set 2��b10 // RX bias current => 60uA (default 40uA)
1043
1044 //(2) Offset 2A (��h3AAA) bit <3:2> set 2��b11 // Squelch voltage => 100mV (default 150mV)
1045 #ifdef DTV_STANDARD_LIB
1046 UTMI2_SETXBYTE(0x2a,0x07);
1047 #endif
1048 }
1049
1050 if ( (MDrv_USBGetChipID_Port2() == CHIPID_NEPTUNE) ||
1051 (MDrv_USBGetChipID_Port2() == CHIPID_ERIS) ||
1052 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA) ||
1053 (MDrv_USBGetChipID_Port2() == CHIPID_PLUTO) ||
1054 (MDrv_USBGetChipID_Port2() == CHIPID_TRITON) ||
1055 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA2) ||
1056 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA3) ||
1057 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA4) ||
1058 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA7) ||
1059 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA8) ||
1060 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA9) ||
1061 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA12) ||
1062 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA13) ||
1063 (MDrv_USBGetChipID_Port2() == CHIPID_JANUS) ||
1064 (MDrv_USBGetChipID_Port2() == CHIPID_MARIA10) ||
1065 (MDrv_USBGetChipID_Port2() == CHIPID_MACAW12) ||
1066 (MDrv_USBGetChipID_Port2() == CHIPID_JANUS2) ||
1067 (MDrv_USBGetChipID_Port2() == CHIPID_AMBER1) ||
1068 (MDrv_USBGetChipID_Port2() == CHIPID_AMBER3) ||
1069 (MDrv_USBGetChipID_Port2() == CHIPID_AMBER5) ||
1070 (MDrv_USBGetChipID_Port2() == CHIPID_AMBER6) ||
1071 (MDrv_USBGetChipID_Port2() == CHIPID_AMBER7) ||
1072 (MDrv_USBGetChipID_Port2() == CHIPID_AMETHYST) )
1073 {
1074 UTMI2_ORXBYTE(0x15,0x20); //HOST CHIRP Detect
1075 }
1076 else
1077 {
1078 UTMI2_ORXBYTE(0x15,0x60); // change to 55 interface (bit6)
1079 }
1080
1081 //(3) Offset 2D (��h3AAD) bit <5:3> set 3��b111 // HS_RTERM bias current 5/6
1082 //XBYTE[0x128a]=0x87; //change UHC priority
1083 //XBYTE[0x128d]&=0x0f; //clear bit 12~15
1084 //XBYTE[0x128e]|=0xf; //upgrade UHC priority, set bit 0~3
1085 //MDrv_Sys_SetXdataWindow1Base(USB_BUFFER_START_ADR_4K_ALIGN>>12); //switch window 1
1086 gUsbStatus_Port2=USB_OK;
1087 // gUsbTimeout=3; //set at flib_Host20_Enumerate_Port2()
1088 RecoveryFlag_Port2=0; //initialize recovery flag
1089 gUsbDeviceState_Port2=USB11_DEVICE; //1.1 at first
1090
1091 //gDeviceFatalError=FALSE;
1092
1093 return TRUE;
1094 }
1095 //MsOS_DelayTask(500);
1096
_MDrv_UsbHost_Init1_Port2(void)1097 BOOLEAN _MDrv_UsbHost_Init1_Port2(void)
1098 {
1099 BOOLEAN result=FALSE;
1100
1101 if(flib_OTGH_Init_Port2(0))
1102 result =TRUE;
1103
1104 return result;
1105
1106 }
MDrv_UsbHost_Init_Port2(void)1107 BOOLEAN MDrv_UsbHost_Init_Port2(void)
1108 {
1109 BOOLEAN result;
1110
1111 result = _MDrv_UsbHost_Init0_Port2();
1112 if (result == FALSE)
1113 return FALSE;
1114
1115 MsOS_DelayTask(USB_HOST_INIT_DELAY);
1116 return(_MDrv_UsbHost_Init1_Port2());
1117 }
1118 #endif
MDrv_UsbHost_Init_Enum_Port2(void)1119 BOOLEAN MDrv_UsbHost_Init_Enum_Port2(void)
1120 {
1121 BOOLEAN result;
1122 result=MDrv_Usb_Device_Enum_Port2();
1123 return result;
1124 }
MDrv_UsbGetMaxLUNCount_Port2()1125 U8 MDrv_UsbGetMaxLUNCount_Port2()
1126 {
1127 if (gUsbDeviceState_Port2==BAD_DEVICE)
1128 return 0;
1129
1130 if (mwHost20_PORTSC_ConnectStatus_Rd()==0)
1131 return 0;
1132 else return (Mass_stor_us1_port2.max_lun+1);
1133 }
MDrv_GET_MASS_MAX_LUN_PORT2()1134 U8 MDrv_GET_MASS_MAX_LUN_PORT2()
1135 {
1136 //printf("Get max lun func:%02bx\n",Mass_stor_us1.max_lun);
1137 if (mwHost20_PORTSC_ConnectStatus_Rd()==0)
1138 return 0;
1139 else return Mass_stor_us1_port2.max_lun;
1140 }
1141
1142 extern void GetValidLun_Port2(void);
1143
1144 #ifdef ATV_SERISE_USE
DisableINT(void)1145 void DisableINT(void)
1146 {
1147 XBYTE[0x2B03]|=0x20;
1148 XBYTE[0x2B18]|=0x80;
1149 XBYTE[0x2B19]|=0x04;
1150 XBYTE[0x2B1A]|=0x80;
1151 }
EnableINT(void)1152 void EnableINT(void)
1153 {
1154 XBYTE[0x2B03]&=0xDF;
1155 XBYTE[0x2B18]&=0x7F;
1156 XBYTE[0x2B19]&=0xFB;
1157 XBYTE[0x2B1A]&=0x7F;
1158 }
1159 #endif
1160 extern U8 ValidLunNum_Port2;
MDrv_GET_VALID_LUN_NUM_PORT2(void)1161 U8 MDrv_GET_VALID_LUN_NUM_PORT2(void)
1162 {
1163 return ValidLunNum_Port2;
1164 }
MDrv_GET_MASS_VALID_LUN_PORT2()1165 U8 MDrv_GET_MASS_VALID_LUN_PORT2()
1166 {
1167 U8 LunMatrix=0,i;
1168 struct LUN_Device* LunDevice;
1169 //printf("Get valid lun func\n");
1170 if (mwHost20_PORTSC_ConnectStatus_Rd()==0)
1171 return USB_NOT_RESPONSE; //device is not connected
1172
1173 if (gUsbDeviceState_Port2==BAD_DEVICE) return 0;
1174
1175 if (gSpeed_Port2==1) return 0; //low speed device
1176
1177 //if (gDeviceFatalError) return USB_NOT_RESPONSE;
1178 if (gUsbStatus_Port2==USB_EJECT) return USB_NOT_RESPONSE;
1179
1180 LunDevice = Mass_stor_us1_port2.Mass_stor_device;
1181 if (psAttachDevice_Port2->saCD[0].sInterface[0].bInterfaceClass != USB_INTERFACE_CLASS_MSD)
1182 {
1183 DRV_USB_DBG(printf(" LUN structure not initialized!!\n"));
1184 return USB_NOT_RESPONSE;
1185 }
1186
1187 #ifdef ATV_SERISE_USE
1188 #ifdef Enable_Close_INT
1189 //XBYTE[0x2B00]|=0x02;
1190 DisableINT();
1191 #endif
1192 #endif
1193 GetValidLun_Port2();
1194 #ifdef ATV_SERISE_USE
1195 #ifdef Enable_Close_INT
1196 //XBYTE[0x2B00]&=0xFD;
1197 EnableINT();
1198 #endif
1199 #endif
1200
1201 if (gUsbStatus_Port2==USB_TIMEOUT)
1202 {
1203 #ifdef USE_XDATA_ADDRESS_0XF000
1204 MDrv_USB_ReleaseXdataWindow1_Port2();
1205 #endif
1206 return USB_NOT_RESPONSE; //USB DEVICE not responding
1207 }
1208
1209 for (i=0; i <= Mass_stor_us1_port2.max_lun ; i++)
1210 {
1211 LunMatrix=LunMatrix<<1 ;
1212 //printf("bDeviceReady:%02bx\n",LunDevice[Mass_stor_us1.max_lun-i].bDeviceReady);
1213 if (LunDevice[Mass_stor_us1_port2.max_lun-i].bDeviceReady == TRUE)
1214 {
1215 LunMatrix|=1;
1216 }
1217 }
1218
1219 return LunMatrix;
1220 }
1221 U32 USB_BUFFER_START_ADR_4K_ALIGN_Var_Port2;
MDrv_USB_Init_Port2(U32 USBAdr)1222 void MDrv_USB_Init_Port2(U32 USBAdr)
1223 {
1224 //gProjectCode=ProjectCode;
1225 //gDeviceFatalError=FALSE;
1226
1227 USB_BUFFER_START_ADR_4K_ALIGN_Var_Port2=USBAdr;
1228
1229 gUsbRetryCount_Port2=3;
1230
1231 if (USB_BUFFER_START_ADR_4K_ALIGN_Var_Port2 % 4096 != 0)
1232 {
1233 DRV_USB_DBG( printf("Error USB Port2 Starting address is not 4K alignmented\n"));
1234 }
1235
1236 //#ifndef USB_POWER_SAVING_MODE
1237 if (!drvUSBHost_isPowerSaveModeEnable())
1238 {
1239 mbFUSBH200_VBUS_ON_Set();
1240 if ( (MDrv_USBGetChipID_Port2()==CHIPID_NEPTUNE) || //Neptune
1241 (MDrv_USBGetChipID_Port2()==CHIPID_ERIS) || //Eris
1242 (MDrv_USBGetChipID_Port2()==CHIPID_TITANIA) || //Titania
1243 (MDrv_USBGetChipID_Port2()==CHIPID_PLUTO) || //Pluto
1244 (MDrv_USBGetChipID_Port2()==CHIPID_TRITON) || //Triton
1245 (MDrv_USBGetChipID_Port2()==CHIPID_TITANIA2) ) // Titania 2
1246 {
1247 UHC2_ANDXBYTE(0x34,0xBF); //set suspend
1248 UHC2_ORXBYTE(0x34,0x40); //clr suspend
1249 MsOS_DelayTask(2);
1250 UTMI2_ORXBYTE(0x00,0x01); // override mode enable for power down control
1251 UTMI2_ORXBYTE(0x01,0x40); // enable IREF power down
1252 UTMI2_ORXBYTE(0x01,0x02); // enable PLL power down
1253 UTMI2_ANDXBYTE(0x01,0xFD); // disable PLL power down
1254 }
1255 mbHost20_USBCMD_HCReset_Set();
1256 }
1257 //#endif
1258 }
1259
MDrv_GetUsbDeviceStatusPort2()1260 U8 MDrv_GetUsbDeviceStatusPort2()
1261 {
1262 return gUsbDeviceState_Port2;
1263 }
1264
MDrv_SetUsbDeviceStatus_Port2(U8 status)1265 void MDrv_SetUsbDeviceStatus_Port2(U8 status)
1266 {
1267 gUsbDeviceState_Port2 = status;
1268 }
1269
MDrv_ClearUsbDeviceStatusPort2(void)1270 void MDrv_ClearUsbDeviceStatusPort2(void)
1271 {
1272 //if (gUsbDeviceState_Port2==BAD_DEVICE)
1273 //{
1274 // printf("Clear bad device\n");
1275 // gUsbDeviceState_Port2=USB11_DEVICE;
1276 //}
1277 }
ResetUsbHardwarePort2(void)1278 void ResetUsbHardwarePort2(void)
1279 {
1280 UTMI2_ORXBYTE(0x06,0x03); //reset UTMI
1281 UTMI2_ANDXBYTE(0x06,0xfc);
1282 mbHost20_USBCMD_HCReset_Set();
1283 //MsOS_DelayTask(200);
1284 }
1285 UINT32 UsbStartTimePort2=0;
1286 UINT32 UsbPowerSavingTimerPort2=0;
1287
1288 //#ifdef USB_POWER_SAVING_MODE
1289 extern void UsbTurnOffPowerDownMode(void);
1290 extern void UsbTurnOnPowerDownMode(void);
UsbPort2UTMIInitial(void)1291 void UsbPort2UTMIInitial(void)
1292 {
1293 mbFUSBH200_VBUS_ON_Set();
1294 UHC2_ANDXBYTE(0x34,0xBF); //set suspend
1295 UHC2_ORXBYTE(0x34,0x40); //clr suspend
1296 MsOS_DelayTask(2);
1297 UTMI2_ORXBYTE(0x00,0x01); // override mode enable for power down control
1298 UTMI2_ORXBYTE(0x01,0x40); // enable IREF power down
1299 UTMI2_ORXBYTE(0x01,0x02); // enable PLL power down
1300 UTMI2_ANDXBYTE(0x01,0xFD); // disable PLL power down
1301 UTMI2_ANDXBYTE(0x00,~0x01); // override mode enable for power down control
1302
1303 mbHost20_USBCMD_HCReset_Set();
1304 }
1305 //#endif
1306
1307 #ifdef Enable_Issue_TestPacketByHW
1308 BOOLEAN isInitForTestPkt_Port2 = TRUE;
1309 void MDrv_UsbSendTestPacket_Port2(void);
1310 #endif
1311
MDrv_UsbDeviceConnect_Port2(void)1312 BOOLEAN MDrv_UsbDeviceConnect_Port2(void)
1313 {
1314 /*
1315 if (gDeviceFatalError)
1316 {
1317 gDeviceFatalError=FALSE;
1318 ResetUsbHardware();
1319 return FALSE;
1320 }*/
1321 /*
1322 if (XBYTE[0x0B04]&0x40)
1323 {
1324 XBYTE[0x3AC0] &= 0xFE;
1325 }
1326 */
1327 #ifdef Enable_Issue_TestPacketByHW
1328 if (isInitForTestPkt_Port2)
1329 {
1330 isInitForTestPkt_Port2= FALSE;
1331 MDrv_UsbSendTestPacket_Port2();
1332 }
1333 return FALSE;
1334 #endif
1335
1336 #if 1
1337 if (drvUSBHost_isPowerSaveModeEnable())
1338 {
1339 if (gUsbDeviceState_Port2==WAIT_INIT)
1340 {
1341 if (MsOS_Timer_DiffTimeFromNow(UsbPowerSavingTimerPort2) < 300 )
1342 return FALSE;
1343 }
1344 if (gUsbDeviceState_Port2==POWER_SAVING)
1345 {
1346 #ifdef ENABLE_HOST_TEST
1347 if (USBC2_READXBYTE(8)&0xC0)
1348 #else
1349 if (USBC2_READXBYTE(8)&0x40)
1350 #endif
1351 {
1352 drvUSBHost_TurnOffPowerDownMode_Port2();
1353
1354 UsbPowerSavingTimerPort2 = MsOS_GetSystemTime();
1355 gUsbDeviceState_Port2=WAIT_INIT;
1356 return FALSE;
1357 }
1358 else
1359 {
1360 return FALSE;
1361 }
1362 }
1363 }
1364 #else
1365 #ifdef USB_POWER_SAVING_MODE
1366 //#ifdef USBHOST2PORT
1367 if (gUsbDeviceState==WAIT_INIT)
1368 return FALSE;
1369 //#endif
1370 if (gUsbDeviceState_Port2==WAIT_INIT)
1371 {
1372 if (MsOS_Timer_DiffTimeFromNow(UsbPowerSavingTimerPort2) < 300 )
1373 return FALSE;
1374 }
1375 if (gUsbDeviceState_Port2==POWER_SAVING)
1376 {
1377 if (XBYTE[gUSBC2_BASE+8]&0x40)
1378 {
1379 UsbTurnOffPowerDownMode();
1380 //UsbPort0UTMIInitial();
1381 drvUSBHost_UTMIInitial();
1382 //#ifdef USBHOST2PORT
1383 UsbPort1UTMIInitial();
1384 if (gUsbDeviceState==POWER_SAVING)
1385 gUsbDeviceState=NO_DEVICE;
1386 //#endif
1387 UsbPowerSavingTimerPort2 = MsOS_GetSystemTime();
1388 gUsbDeviceState_Port2=WAIT_INIT;
1389 return FALSE;
1390 //MsOS_DelayTask(300);
1391 }
1392 else
1393 {
1394 return FALSE;
1395 }
1396 }
1397 #endif
1398 #endif
1399 if (gUsbStatus_Port2==USB_EJECT)
1400 {
1401 if (UHC2_READXBYTE(0x30)&2)
1402 {
1403 gUsbStatus_Port2=USB_OK;
1404 }
1405 else
1406 return FALSE; //eject state
1407 }
1408 //FUSBH200_Driver_VBUS(); //make sure device is connected , then turn on VBUS
1409
1410 if (mwHost20_PORTSC_ConnectStatus_Rd())
1411 {
1412 if ( (gUsbDeviceState_Port2==USB11_DEVICE) ||(gUsbDeviceState_Port2==USB20_DEVICE) )
1413 {
1414 // If the device is connected and we get a connection change.
1415 // It means that the user change the device and we just missed.
1416 if (mwHost20_PORTSC_ConnectChange_Rd())
1417 {
1418 printf("dev changed, we missed\n");
1419 gSpeed_Port2=0xff; //reset this value
1420 UHC2_ANDXBYTE(0x40, (U8)~0x80);//clear force enter FSmode
1421 gUsbDeviceState_Port2= NO_DEVICE;
1422 return FALSE;
1423 }
1424 }
1425
1426 if (gUsbDeviceState_Port2==BAD_DEVICE) return FALSE; //not repeating doing emunerate
1427
1428 #if 0
1429 if (gSpeed_Port2==0x01)
1430 {
1431 MINI_DEBUG(printf("ls-exit\n"));
1432 return FALSE;
1433 }
1434 #endif
1435
1436 if (gUsbDeviceState_Port2==NO_DEVICE)
1437 gUsbDeviceState_Port2=CONNECT_DEVICE;
1438
1439 return TRUE;
1440 }
1441 else
1442 {
1443 gSpeed_Port2 = 0xFF;
1444 UHC2_ANDXBYTE(0x40,(U8)~0x80);//clear force enter FSmode
1445 #if 1
1446 if (drvUSBHost_isPowerSaveModeEnable())
1447 {
1448 if (gUsbDeviceState_Port2!=POWER_SAVING)
1449 drvUSBHost_TurnOnPowerDownMode_Port2();
1450
1451 gUsbDeviceState_Port2=POWER_SAVING;
1452 }
1453 else
1454 gUsbDeviceState_Port2=NO_DEVICE;
1455 #else
1456 #ifdef USB_POWER_SAVING_MODE
1457 if ((gUsbDeviceState==NO_DEVICE)||(gUsbDeviceState==POWER_SAVING))
1458 {
1459 if (gUsbDeviceState_Port2!=POWER_SAVING)
1460 UsbTurnOnPowerDownMode();
1461 gUsbDeviceState=POWER_SAVING;
1462 gUsbDeviceState_Port2=POWER_SAVING;
1463 }
1464 else
1465 gUsbDeviceState_Port2=NO_DEVICE;
1466 #else
1467 gUsbDeviceState_Port2=NO_DEVICE;
1468 #endif
1469 #endif
1470
1471
1472 #ifndef ATV_SERISE_USE
1473 if (MsOS_Timer_DiffTimeFromNow(UsbStartTimePort2) > 1000 )
1474 {
1475
1476 UsbStartTimePort2=MsOS_GetSystemTime();
1477 ResetUsbHardwarePort2();
1478
1479 }
1480 #else
1481 UsbStartTimePort2++;
1482 if(UsbStartTimePort2>0x600)
1483 {
1484 UsbStartTimePort2=0;
1485 ResetUsbHardwarePort2();
1486 }
1487 #endif
1488 //MINI_DEBUG( printf("no_con \n"));
1489 return FALSE;
1490 }
1491 }
1492
MDrv_EjectUsbDevice_Port2(void)1493 void MDrv_EjectUsbDevice_Port2(void)
1494 {
1495 struct LUN_Device* LunDevice;
1496 U8 i;
1497
1498 //printf("eject\n");
1499 LunDevice = Mass_stor_us1_port2.Mass_stor_device;
1500 for (i=0; i <= Mass_stor_us1_port2.max_lun ; i++)
1501 {
1502
1503 if (LunDevice[i].bDeviceReady == TRUE)
1504 {
1505 vSCSI_EJECT_DEVICE_Port2(i);
1506 gUsbStatus_Port2=USB_EJECT;
1507 mwHost20_PORTSC_ConnectChange_Set(); //clear port connect change bit
1508 //printf("ej_ok\n");
1509 }
1510 }
1511 flib_Host20_Close_Port2();
1512
1513 }
MDrv_UsbClose_Port2(void)1514 void MDrv_UsbClose_Port2(void)
1515 {
1516 flib_Host20_Close_Port2();
1517 }
1518
MDrv_UsbBlockReadToMIU_Port2(U8 lun,U32 u32BlockAddr,U32 u32BlockNum,U32 u32MIUAddr)1519 BOOLEAN MDrv_UsbBlockReadToMIU_Port2(U8 lun,U32 u32BlockAddr, U32 u32BlockNum,U32 u32MIUAddr)
1520 {
1521 BOOLEAN result;
1522 U8 retrycnt=0;
1523 struct LUN_Device* LunDevice = Mass_stor_us1_port2.Mass_stor_device;
1524
1525 if (mwHost20_PORTSC_ConnectStatus_Rd()==0)
1526 return FALSE; //device is not connected
1527
1528 if (gUsbDeviceState_Port2==BAD_DEVICE) return FALSE;
1529
1530
1531 if (u32BlockAddr > Mass_stor_us1_port2.Mass_stor_device[lun].u32BlockTotalNum)
1532 {
1533 MINI_DEBUG(printf("USBRead address is over the range:%lx\n",u32BlockAddr));
1534 return FALSE;
1535 }
1536 //printf("usb read sector:%lx\n",u32BlockNum);
1537
1538 #ifdef ATV_SERISE_USE
1539 #ifdef Enable_Close_INT
1540 XBYTE[0x2B00]|=0x02;
1541 DisableINT();
1542 #endif
1543 #endif
1544 //result= bSCSI_Read_Write10_Port2(FALSE,lun, u32BlockAddr, u32BlockNum, u32MIUAddr);
1545 while (1)
1546 {
1547 retrycnt++;
1548 result= bSCSI_Read_Write10_Port2(FALSE,lun, u32BlockAddr, u32BlockNum, PhytoCacheAddr(u32MIUAddr));
1549 if (result==TRUE) break;
1550 if (result==FALSE)
1551 {
1552 if (retrycnt > gUsbRetryCount_Port2)
1553 {
1554 if (gUsbStatus_Port2==USB_TIMEOUT)
1555 gUsbDeviceState_Port2=BAD_DEVICE; //mark as bad device
1556 else if(gUsbStatus_Port2 == USB_OK)
1557 {//give another chance : to restart the host & device(for example : read failed with device STALL)
1558 if(retrycnt > gUsbRetryCount_Port2+1)
1559 break;
1560 if (MDrv_Usb_Device_Enum_Port2()==FALSE)
1561 {
1562 result=FALSE;
1563 break;
1564 }
1565 continue;
1566 }
1567 else
1568 LunDevice[lun].bDeviceValid=FALSE; //mark as bad lun
1569
1570 break; //return FALSE
1571 }
1572 MINI_DEBUG( printf("USBDisk Read failed\n"));
1573 if (gUsbStatus_Port2==USB_TIMEOUT)
1574 {
1575 if ((retrycnt==2)&&(mwOTG20_Control_HOST_SPD_TYP_Rd()==2) ) //make sure it is hi speed
1576 {
1577 MINI_DEBUG(printf("Force FS\n"));
1578 UHC2_ORXBYTE(0x40,0x80);//force enter FSmode
1579 }
1580 #ifndef ATV_SERISE_USE
1581 msAPI_Timer_ResetWDT();
1582 #else
1583 #ifdef Enable_Close_INT
1584 XBYTE[0x2B00]&=0xFD;
1585 EnableINT();
1586 #endif
1587 #endif
1588
1589 #ifdef Enable_Low_Temperature_Patch
1590 if(gSpeed_Port2==0)
1591 {
1592 //printf("\r\n CDR toggle!!",0);
1593 UTMI2_SETXBYTE(0x0a, UTMI2_READXBYTE(0x0a)^0x10); //invert CDR_CLOCK
1594 UTMI2_ORXBYTE(0x06,0x03); //reset UTMI
1595 UTMI2_ANDXBYTE(0x06,0xfc);
1596 }
1597 #endif
1598
1599 // MDrv_Usb_Device_Enum(); //reinit usb device
1600 if (MDrv_Usb_Device_Enum_Port2()==FALSE)
1601 {
1602 result=FALSE;
1603 break;
1604 }
1605 }
1606 }
1607
1608 }
1609
1610 #ifdef ATV_SERISE_USE
1611 #ifdef Enable_Close_INT
1612 XBYTE[0x2B00]&=0xFD;
1613 EnableINT();
1614 #endif
1615 #endif
1616 //MDrv_Sys_ReleaseXdataWindow1();
1617 if (result==FALSE)
1618 {
1619 DRV_USB_DBG(printf("USBDisk Read failed\n"));
1620 //printf("read failed\n");
1621 }
1622
1623 return result;
1624
1625 }
1626
MDrv_UsbBlockWriteFromMIU_Port2(U8 lun,U32 u32BlockAddr,U32 u32BlockNum,U32 u32MIUAddr)1627 BOOLEAN MDrv_UsbBlockWriteFromMIU_Port2(U8 lun, U32 u32BlockAddr, U32 u32BlockNum,U32 u32MIUAddr)
1628 {
1629 BOOLEAN result;
1630 if (mwHost20_PORTSC_ConnectStatus_Rd()==0)
1631 return FALSE; //device is not connected
1632
1633 if (gUsbDeviceState_Port2==BAD_DEVICE) return FALSE;
1634
1635 if (u32BlockAddr > Mass_stor_us1_port2.Mass_stor_device[lun].u32BlockTotalNum)
1636 {
1637 MINI_DEBUG(printf("USBWrite address is over the range:%lx\n",u32BlockAddr));
1638 return FALSE;
1639 }
1640
1641 result= bSCSI_Read_Write10_Port2(TRUE,lun, u32BlockAddr, u32BlockNum, PhytoCacheAddr(u32MIUAddr));
1642
1643 return result;
1644
1645 }
MDrv_GetUsbBlockSize_Port2(U8 lun)1646 U32 MDrv_GetUsbBlockSize_Port2(U8 lun)
1647 {
1648 return Mass_stor_us1_port2.Mass_stor_device[lun].u32BlockSize;
1649 }
1650
MDrv_GetUsbBlockNum_Port2(U8 lun)1651 U32 MDrv_GetUsbBlockNum_Port2(U8 lun)
1652 {
1653 return Mass_stor_us1_port2.Mass_stor_device[lun].u32BlockTotalNum;
1654 }
1655
1656
MDrv_USB_GetXDataExtStackCountPort2(void)1657 U8 MDrv_USB_GetXDataExtStackCountPort2(void)
1658 {
1659 return xdwin1_lockCount_Port2;
1660 }
1661 //---if you don't know how to use it, don't use it
1662 #if 0
1663 void EnterUXBModePort2()
1664 {
1665 MINI_DEBUG( printf("Enter UXB mode\n"));
1666 UHC_XBYTE(0x40)|=0x80;//force enter FSmode
1667 MDrv_Usb_Device_Enum_Port2();
1668 }
1669 void LeaveUXBModePort2()
1670 {
1671 MINI_DEBUG(printf("leave UXB mode \n"));
1672 UHC_XBYTE(0x40)&=~0x80;//leave FSmode
1673 MDrv_Usb_Device_Enum_Port2();
1674
1675 }
1676 #endif
1677 #ifndef DEVICE_ENUM_SEGMENT
MDrv_Usb_Device_Enum_Port2(void)1678 BOOLEAN MDrv_Usb_Device_Enum_Port2(void)
1679 {
1680 BOOLEAN result=FALSE;
1681 U8 RetryCount=0;
1682
1683 U8 rootUSBDeviceInterfaceClass = USB_INTERFACE_CLASS_NONE;
1684
1685 if (gUsbDeviceState_Port2==BAD_DEVICE) return FALSE; //bad device , no more enumerate
1686
1687 //20120820, Patch for devices, can't repeat to re-enumerate.
1688 if ( (gUsbDeviceState_Port2==USB11_DEVICE) ||(gUsbDeviceState_Port2==USB20_DEVICE) )
1689 {
1690 U16 uVID, uPID;
1691 U8 ii;
1692
1693 MDrv_USBGetVIDPID_Port2(&uVID, &uPID);
1694 ii = 0;
1695 while ( (gDontReEnumList_Port2[ii].VID != 0) && (gDontReEnumList_Port2[ii].PID != 0) )
1696 {
1697 if ( (uVID == gDontReEnumList_Port2[ii].VID) && (uPID == gDontReEnumList_Port2[ii].PID) )
1698 {
1699 printf("Don't re-enumerate for special device.");
1700 return TRUE;
1701 }
1702
1703 ii++;
1704 if (ii >= (sizeof(gDontReEnumList_Port2) / sizeof(struct stDontReEnumList)))
1705 break;
1706 }
1707 }
1708
1709 NowIsHubPort2=0;
1710
1711 #ifdef Enable_SOF_Only
1712 UHC2_ORXBYTE(0x40,0x80);//force enter FSmode
1713 #endif
1714 port2_redo_init:
1715 //USB ROOT
1716 RetryCount++;
1717 if (MDrv_UsbHost_Init_Port2()==FALSE) goto port2_fail_exit;
1718 if (flib_Host20_Enumerate_Port2(1,3)==0)
1719 {
1720 if ((gUsbStatus_Port2==USB_TIMEOUT)||(gUsbStatus_Port2==USB_INIT_FAIL))
1721 {
1722 if ((RetryCount==2)&&(mwOTG20_Control_HOST_SPD_TYP_Rd()==2))
1723 { //make sure it is hi speed
1724 MINI_DEBUG(printf("Force FS\n"));
1725 UHC2_ORXBYTE(0x40,0x80);//force enter FSmode
1726 }
1727 if (RetryCount >= 3)
1728 {
1729 MINI_DEBUG(printf("bad device\n"));
1730 gUsbDeviceState_Port2=BAD_DEVICE;
1731 goto port2_fail_exit;
1732 }
1733 #ifndef ATV_SERISE_USE
1734 msAPI_Timer_ResetWDT();
1735 #endif
1736 goto port2_redo_init;
1737 }
1738 gUsbDeviceState_Port2=BAD_DEVICE;
1739 goto port2_fail_exit;
1740 }
1741 else
1742 {
1743 UTMI2_SETXBYTE(0x2a,0);
1744
1745 rootUSBDeviceInterfaceClass= psAttachDevice_Port2->saCD[0].sInterface[0].bInterfaceClass;
1746 //MDrv_UsbGetInterfaceClass(0, 0);
1747 DRV_USB_DBG(printf("Check USD Device 4\n"););
1748 #if 0 //We don't need to check here
1749 if(rootUSBDeviceInterfaceClass != 0x08 && rootUSBDeviceInterfaceClass != 0x09)
1750 {
1751 //printf("unsupport class\n",0);
1752 DRV_USB_DBG(printf("unsupport USB root class=%02bx\n", rootUSBDeviceInterfaceClass););
1753 result= FALSE;
1754 goto port2_fail_exit;
1755 }
1756 #endif
1757
1758 DRV_USB_DBG(printf("USB root class=%02bx\n",rootUSBDeviceInterfaceClass););
1759 if (rootUSBDeviceInterfaceClass==USB_INTERFACE_CLASS_HUB)//HUB
1760 {
1761 U8 PortNum,i,devaddr,stor_devs;
1762
1763 #ifdef ENABLE_HOST_TEST
1764 printf("Unsupport USB hub\n");
1765 gUsbDeviceState_Port2=BAD_DEVICE;
1766 goto port2_fail_exit;
1767 #endif
1768
1769 devaddr=6;
1770 stor_devs = 0;
1771 DRV_USB_DBG(printf("Hub class!\n"));
1772
1773 PortNum=Usb_Hub_Port_Num_Port2();
1774 for (i=1; i <= PortNum ; i++)
1775 {
1776 psAttachDevice_Port2->bAdd=3;
1777 pHost20_qHD_List_Control1_Port2->bDeviceAddress=psAttachDevice_Port2->bAdd;
1778 if (USB_Hub_Handle_Port2(i)==FALSE)
1779 {
1780 result=FALSE;
1781 continue;
1782 }
1783 devaddr++;
1784 NowIsHubPort2=1;
1785 if (flib_Host20_Enumerate_Port2(1,devaddr)==0)
1786 {
1787 result=FALSE;
1788 continue;
1789 }
1790
1791 //MStar, 20111110, For card reader with internal hub
1792 if (psAttachDevice_Port2->saCD[0].sInterface[0].bInterfaceClass == 0x08)
1793 stor_devs++;
1794
1795 psAttachDevice_Port2->bAdd=devaddr;
1796 result=MassStorage_Init_Port2(); //do mass storage class init
1797 if (result==TRUE) break;
1798 }
1799 if ( (result==FALSE) && (stor_devs == 0) )
1800 {
1801 MINI_DEBUG(printf("unsupport hub class device,->bad device\n"));
1802 gUsbDeviceState_Port2=BAD_DEVICE;
1803 }
1804 }
1805 //else if(rootUSBDeviceInterfaceClass==USB_INTERFACE_CLASS_MSD)//Mass storage class
1806 else if ( (rootUSBDeviceInterfaceClass == USB_INTERFACE_CLASS_MSD) &&
1807 (psAttachDevice_Port2->saCD[0].sInterface[0].bInterfaceProtocol == 0x50) )
1808 {
1809 result=MassStorage_Init_Port2();
1810 #ifdef Enable_Burning_Test
1811 UsbTestPort2();
1812 #endif
1813
1814 #ifdef Enable_Low_Temperature_Patch
1815 if((gSpeed_Port2==0)&&(gUsbStatus_Port2==USB_TIMEOUT))
1816 {
1817 //printf("\r\n CDR toggle!!",0);
1818 UTMI2_SETXBYTE(0x0a, UTMI2_READXBYTE(0x0a)^0x10); //invert CDR_CLOCK
1819 UTMI2_ORXBYTE(0x06,0x03); //reset UTMI
1820 UTMI2_ANDXBYTE(0x06,0xfc);
1821 }
1822 #endif
1823
1824 }
1825 #ifdef ENABLE_CBI_HOST
1826 else if ( (rootUSBDeviceInterfaceClass == USB_INTERFACE_CLASS_MSD) &&
1827 ((psAttachDevice_Port2->saCD[0].sInterface[0].bInterfaceProtocol == 0x00)||
1828 (psAttachDevice_Port2->saCD[0].sInterface[0].bInterfaceProtocol == 0x01)) )
1829 {
1830 DRV_USB_DBG(printf("My CBI MassStorage Device!!!\n"));
1831
1832 result=MassStorage_Init_Port2(); //do mass storage class init
1833 return result;
1834 }
1835 #endif
1836 else if (rootUSBDeviceInterfaceClass == USB_INTERFACE_CLASS_IMAGE)
1837 {
1838 if (drvUSBHost_PTP_Init(USB_PORT_2) == PTP_OK)
1839 {
1840 result = TRUE;
1841 DRV_USB_DBG(printf("PTP initial ok\r\n"));
1842 }
1843 }
1844 else if (rootUSBDeviceInterfaceClass==USB_INTERFACE_CLASS_HID)//HID
1845 {
1846 if (drvUSBHost_HID_Init(USB_PORT_2) == 0)
1847 {
1848 result = TRUE;
1849 DRV_USB_DBG(printf("HID initial ok\r\n"));
1850 }
1851 }
1852 else
1853 {
1854 MINI_DEBUG(printf("unsupport %02bx class device->bad device\n",rootUSBDeviceInterfaceClass));
1855 gUsbDeviceState_Port2=BAD_DEVICE; //not belong to any above
1856 }
1857
1858 DRV_USB_DBG(printf("USB_CON\n"););
1859 //return result;
1860 }
1861
1862 port2_fail_exit:
1863
1864 if (mwHost20_PORTSC_ConnectChange_Rd())
1865 mwHost20_PORTSC_ConnectChange_Set();
1866
1867 return result;
1868 }
1869 #else // support device enumeration dividable
_MDrv_Usb_Device_Enum0_Port2(void)1870 U8 _MDrv_Usb_Device_Enum0_Port2(void)
1871 {
1872 if (gUsbDeviceState_Port2==BAD_DEVICE)
1873 return 0; //bad device , no more enumerate
1874
1875 //20120820, Patch for devices, can't repeat to re-enumerate.
1876 if ( (gUsbDeviceState_Port2==USB11_DEVICE) ||(gUsbDeviceState_Port2==USB20_DEVICE) )
1877 {
1878 U16 uVID, uPID;
1879 U8 ii;
1880
1881 MDrv_USBGetVIDPID_Port2(&uVID, &uPID);
1882 ii = 0;
1883 while ( (gDontReEnumList_Port2[ii].VID != 0) && (gDontReEnumList_Port2[ii].PID != 0) )
1884 {
1885 if ( (uVID == gDontReEnumList_Port2[ii].VID) && (uPID == gDontReEnumList_Port2[ii].PID) )
1886 {
1887 printf("Don't re-enumerate for special device.");
1888 return 1;
1889 }
1890
1891 ii++;
1892 if (ii >= (sizeof(gDontReEnumList_Port2) / sizeof(struct stDontReEnumList)))
1893 break;
1894 }
1895 }
1896
1897 NowIsHubPort2=0;
1898
1899 #ifdef Enable_SOF_Only
1900 UHC2_ORXBYTE(0x40,0x80);//force enter FSmode
1901 #endif
1902
1903 return 2;
1904 }
1905
_MDrv_Usb_Device_Enum_OK_Port2(void)1906 BOOLEAN _MDrv_Usb_Device_Enum_OK_Port2(void)
1907 {
1908 BOOLEAN result=FALSE;
1909 U8 rootUSBDeviceInterfaceClass = USB_INTERFACE_CLASS_NONE;
1910
1911 UTMI2_SETXBYTE(0x2a,0);
1912
1913 rootUSBDeviceInterfaceClass= psAttachDevice_Port2->saCD[0].sInterface[0].bInterfaceClass;
1914 //MDrv_UsbGetInterfaceClass(0, 0);
1915 DRV_USB_DBG(printf("Check USD Device 4\n"););
1916 #if 0 //We don't need to check here
1917 if(rootUSBDeviceInterfaceClass != 0x08 && rootUSBDeviceInterfaceClass != 0x09)
1918 {
1919 //printf("unsupport class\n",0);
1920 DRV_USB_DBG(printf("unsupport USB root class=%02bx\n", rootUSBDeviceInterfaceClass););
1921 result= FALSE;
1922 goto port2_fail_exit;
1923 }
1924 #endif
1925
1926 DRV_USB_DBG(printf("USB root class=%02bx\n",rootUSBDeviceInterfaceClass););
1927 if (rootUSBDeviceInterfaceClass==USB_INTERFACE_CLASS_HUB)//HUB
1928 {
1929 U8 PortNum,i,devaddr,stor_devs;
1930
1931 #ifdef ENABLE_HOST_TEST
1932 printf("Unsupport USB hub\n");
1933 gUsbDeviceState_Port2=BAD_DEVICE;
1934 return FALSE;
1935 #endif
1936
1937 devaddr=6;
1938 stor_devs = 0;
1939 DRV_USB_DBG(printf("Hub class!\n"));
1940
1941 PortNum=Usb_Hub_Port_Num_Port2();
1942 for (i=1; i <= PortNum ; i++)
1943 {
1944 psAttachDevice_Port2->bAdd=3;
1945 pHost20_qHD_List_Control1_Port2->bDeviceAddress=psAttachDevice_Port2->bAdd;
1946 if (USB_Hub_Handle_Port2(i)==FALSE)
1947 {
1948 result=FALSE;
1949 continue;
1950 }
1951 devaddr++;
1952 NowIsHubPort2=1;
1953 if (flib_Host20_Enumerate_Port2(1,devaddr)==0)
1954 {
1955 result=FALSE;
1956 continue;
1957 }
1958
1959 //MStar, 20111110, For card reader with internal hub
1960 if (psAttachDevice_Port2->saCD[0].sInterface[0].bInterfaceClass == 0x08)
1961 stor_devs++;
1962
1963 psAttachDevice_Port2->bAdd=devaddr;
1964 result=MassStorage_Init_Port2(); //do mass storage class init
1965 if (result==TRUE) break;
1966 }
1967 if ( (result==FALSE) && (stor_devs == 0) )
1968 {
1969 MINI_DEBUG(printf("unsupport hub class device,->bad device\n"));
1970 gUsbDeviceState_Port2=BAD_DEVICE;
1971 }
1972 }
1973 //else if(rootUSBDeviceInterfaceClass==USB_INTERFACE_CLASS_MSD)//Mass storage class
1974 else if ( (rootUSBDeviceInterfaceClass == USB_INTERFACE_CLASS_MSD) &&
1975 (psAttachDevice_Port2->saCD[0].sInterface[0].bInterfaceProtocol == 0x50) )
1976 {
1977 result=MassStorage_Init_Port2();
1978 #ifdef Enable_Burning_Test
1979 UsbTestPort2();
1980 #endif
1981
1982 #ifdef Enable_Low_Temperature_Patch
1983 if((gSpeed_Port2==0)&&(gUsbStatus_Port2==USB_TIMEOUT))
1984 {
1985 //printf("\r\n CDR toggle!!",0);
1986 UTMI2_SETXBYTE(0x0a, UTMI2_READXBYTE(0x0a)^0x10); //invert CDR_CLOCK
1987 UTMI2_ORXBYTE(0x06,0x03); //reset UTMI
1988 UTMI2_ANDXBYTE(0x06,0xfc);
1989 }
1990 #endif
1991
1992 }
1993 #ifdef ENABLE_CBI_HOST
1994 else if ( (rootUSBDeviceInterfaceClass == USB_INTERFACE_CLASS_MSD) &&
1995 ((psAttachDevice_Port2->saCD[0].sInterface[0].bInterfaceProtocol == 0x00)||
1996 (psAttachDevice_Port2->saCD[0].sInterface[0].bInterfaceProtocol == 0x01)) )
1997 {
1998 DRV_USB_DBG(printf("My CBI MassStorage Device!!!\n"));
1999
2000 result=MassStorage_Init_Port2(); //do mass storage class init
2001 //return result;
2002 }
2003 #endif
2004 else if (rootUSBDeviceInterfaceClass == USB_INTERFACE_CLASS_IMAGE)
2005 {
2006 if (drvUSBHost_PTP_Init(USB_PORT_2) == PTP_OK)
2007 {
2008 result = TRUE;
2009 DRV_USB_DBG(printf("PTP initial ok\r\n"));
2010 }
2011 }
2012 else if (rootUSBDeviceInterfaceClass==USB_INTERFACE_CLASS_HID)//HID
2013 {
2014 if (drvUSBHost_HID_Init(USB_PORT_2) == 0)
2015 {
2016 result = TRUE;
2017 DRV_USB_DBG(printf("HID initial ok\r\n"));
2018 }
2019 }
2020 else
2021 {
2022 MINI_DEBUG(printf("unsupport %02bx class device->bad device\n",rootUSBDeviceInterfaceClass));
2023 gUsbDeviceState_Port2=BAD_DEVICE; //not belong to any above
2024 }
2025
2026 DRV_USB_DBG(printf("USB_CON\n"););
2027 return result;
2028 }
MDrv_Usb_Device_Enum_Port2(void)2029 BOOLEAN MDrv_Usb_Device_Enum_Port2(void)
2030 {
2031 BOOLEAN result=FALSE;
2032 U8 RetryCount=0, retval;
2033
2034 retval = _MDrv_Usb_Device_Enum0_Port2();
2035 if (retval != 2)
2036 return (retval == 0 ? FALSE: TRUE);
2037
2038 port2_redo_init:
2039 //USB ROOT
2040 RetryCount++;
2041 if (MDrv_UsbHost_Init_Port2()==FALSE) goto port2_fail_exit;
2042 if (flib_Host20_Enumerate_Port2(1,3)==0)
2043 {
2044 if ((gUsbStatus_Port2==USB_TIMEOUT)||(gUsbStatus_Port2==USB_INIT_FAIL))
2045 {
2046 if ((RetryCount==2)&&(mwOTG20_Control_HOST_SPD_TYP_Rd()==2))
2047 { //make sure it is hi speed
2048 MINI_DEBUG(printf("Force FS\n"));
2049 UHC2_ORXBYTE(0x40,0x80);//force enter FSmode
2050 }
2051 if (RetryCount >= 3)
2052 {
2053 MINI_DEBUG(printf("bad device\n"));
2054 gUsbDeviceState_Port2=BAD_DEVICE;
2055 goto port2_fail_exit;
2056 }
2057 #ifndef ATV_SERISE_USE
2058 msAPI_Timer_ResetWDT();
2059 #endif
2060 goto port2_redo_init;
2061 }
2062 gUsbDeviceState_Port2=BAD_DEVICE;
2063 goto port2_fail_exit;
2064 }
2065 else
2066 {
2067 result = _MDrv_Usb_Device_Enum_OK_Port2();
2068 }
2069
2070 port2_fail_exit:
2071
2072 if (mwHost20_PORTSC_ConnectChange_Rd())
2073 mwHost20_PORTSC_ConnectChange_Set();
2074
2075 return result;
2076 }
2077 /*
2078 Device Enumerate State:
2079 0: global variable initial
2080 1: ready to start new enumerating process
2081 2: in-progress, stage 1
2082 3: in-progress, stage 2
2083 return value:
2084 0: success
2085 1: in-progress
2086 2: fail
2087 */
2088 U8 enum_state_port2 = 0;
2089 U32 usbDevEnumTimer_port2;
MDrv_Usb_Device_Enum_EX_Port2(void)2090 U8 MDrv_Usb_Device_Enum_EX_Port2(void)
2091 {
2092 BOOLEAN result=FALSE;
2093 U8 retval;
2094 static U8 RetryCount;
2095 static U8 fr;
2096
2097 port2_redo_init_ex:
2098 //USB ROOT
2099
2100 switch (enum_state_port2)
2101 {
2102 case 0: // initial global variables
2103 RetryCount = 0;
2104 retval = _MDrv_Usb_Device_Enum0_Port2();
2105 if (retval != 2)
2106 return (retval == 0 ? DEVENUM_FAIL: DEVENUM_OK);
2107
2108 case 1: // first entry
2109 RetryCount++;
2110 if (_MDrv_UsbHost_Init0_Port2()==FALSE)
2111 goto port2_fail_exit_ex; // MDrv_UsbHost_Init() part 1
2112 enum_state_port2 = 2;
2113 usbDevEnumTimer_port2 = MsOS_GetSystemTime();
2114 return DEVENUM_INPROGRESS;
2115
2116 case 2: // in-progress stage 1
2117 if (MsOS_Timer_DiffTimeFromNow(usbDevEnumTimer_port2) < USB_HOST_INIT_DELAY)
2118 return DEVENUM_INPROGRESS;
2119
2120 if (_MDrv_UsbHost_Init1_Port2()==FALSE) // MDrv_UsbHost_Init() part 2
2121 goto port2_fail_exit_ex;
2122
2123 fr = _flib_Host20_Enumerate_Port2(1, 3); // flib_Host20_Enumerate() part 1
2124 if (fr ==0)
2125 break;
2126
2127 enum_state_port2 = 3;
2128 usbDevEnumTimer_port2 = MsOS_GetSystemTime();
2129 return DEVENUM_INPROGRESS;
2130 case 3: // in-progress stage 2
2131 if (MsOS_Timer_DiffTimeFromNow(usbDevEnumTimer_port2) < USB_ENUM_DELAY)
2132 return DEVENUM_INPROGRESS;
2133 }
2134
2135 if (fr==0)
2136 {
2137 if ((gUsbStatus_Port2==USB_TIMEOUT)||(gUsbStatus_Port2==USB_INIT_FAIL))
2138 {
2139 #ifdef DTV_STANDARD_LIB
2140 if ((RetryCount==2)&&(mwOTG20_Control_HOST_SPD_TYP_Rd()==2))
2141 { //make sure it is hi speed
2142 MINI_DEBUG(printf("Force FS\n"));
2143 UHC2_ORXBYTE(0x40,0x80);//force enter FSmode
2144 }
2145 #endif
2146 if (RetryCount >= 3)
2147 {
2148 MINI_DEBUG(printf("bad device\n"));
2149 gUsbDeviceState_Port2=BAD_DEVICE;
2150 goto port2_fail_exit_ex;
2151 }
2152 #ifndef ATV_SERISE_USE
2153 msAPI_Timer_ResetWDT();
2154 #endif
2155 enum_state_port2 = 1; // retry use
2156 goto port2_redo_init_ex;
2157 }
2158 gUsbDeviceState_Port2=BAD_DEVICE;
2159 goto port2_fail_exit_ex;
2160 }
2161 else
2162 {
2163 result = _MDrv_Usb_Device_Enum_OK_Port2();
2164 }
2165
2166 port2_fail_exit_ex:
2167
2168 if (mwHost20_PORTSC_ConnectChange_Rd())
2169 mwHost20_PORTSC_ConnectChange_Set();
2170 enum_state_port2 = 0; // reset to initial
2171
2172 //return result;
2173 return ( result ? DEVENUM_OK : DEVENUM_FAIL);
2174 }
2175 #endif
2176 //////////////////////////////////////////////////////////////////////////////////////////
2177 //
2178 // USB Issue Test packet function !!
2179 //
2180 /////////////////////////////////////////////////////////////////////////////////////////
2181 U8 UTMI_Reg_14_Port2 = 0xff, UTMI_Reg_15_Port2 = 0xff;
Port1_IssueTestPacket_Initial(void)2182 void Port1_IssueTestPacket_Initial(void)
2183 {
2184 UTMI2_SETXBYTE(0x02, 0x84);
2185 UTMI2_SETXBYTE(0x03, 0x20);
2186
2187 USBC2_SETXBYTE(0x00, 0x0A);
2188 USBC2_SETXBYTE(0x00, 0x28);
2189
2190 UTMI2_SETXBYTE(0x06, 0x00);
2191 UTMI2_SETXBYTE(0x07, 0x00);
2192 UTMI2_SETXBYTE(0x10, 0x00);
2193 UTMI2_SETXBYTE(0x11, 0x00);
2194 UTMI2_SETXBYTE(0x2c, 0x00);
2195 UTMI2_SETXBYTE(0x2d, 0x00);
2196 UTMI2_SETXBYTE(0x2e, 0x00);
2197 UTMI2_SETXBYTE(0x2f, 0x00);
2198 if (UTMI_Reg_14_Port2== 0xff)
2199 UTMI_Reg_14_Port2= UTMI2_READXBYTE(0x14);
2200 else
2201 UTMI2_SETXBYTE(0x14, UTMI_Reg_14_Port2);
2202
2203 if (UTMI_Reg_15_Port2== 0xff)
2204 UTMI_Reg_15_Port2= UTMI2_READXBYTE(0x15);
2205 else
2206 UTMI2_SETXBYTE(0x15, UTMI_Reg_15_Port2);
2207
2208 UTMI2_ORXBYTE(0x06,0x40); //Force HS TX current enable and CDR stage select
2209 UTMI2_ANDXBYTE(0x06,~0x20); //clear bit 5
2210
2211 UTMI2_ORXBYTE(0x06,0x03); //reset UTMI
2212 MsOS_DelayTask(2);
2213 UTMI2_ANDXBYTE(0x06,0xfc);
2214
2215 UTMI2_SETXBYTE(0x03, 0xa8); //for device disconnect status bit
2216 //XBYTE[UTMIBaseAddr+0x07]|=0x02; //
2217
2218 if (MDrv_USBGetChipID_Port2()==CHIPID_NEPTUNE) //Neptune , after U06
2219 {
2220 if (MDrv_USBGetChipVersion_Port2()>= 0x6) //U07
2221 {
2222 UTMI2_ORXBYTE(0x07, 0x02);
2223 UTMI2_SETXBYTE(0x2c,0xc1);
2224 UTMI2_SETXBYTE(0x2d,0x3b);//enable TX common mode,
2225 UTMI2_ORXBYTE(0x2f, 0x0e); //preemsis
2226 }
2227 }
2228 else if ((MDrv_USBGetChipID_Port2()>=CHIPID_ERIS)&&(MDrv_USBGetChipID_Port2()<=CHIPID_TITANIA)) //Eris: 3 ,Titania: 4,
2229 {
2230 UTMI2_SETXBYTE(0x2c,0xc5);
2231 UTMI2_SETXBYTE(0x2d,0x3b);//enable TX common mode,
2232 UTMI2_ORXBYTE(0x2f, 0x0e); //preemsis
2233 }
2234 else if (MDrv_USBGetChipID_Port2()==CHIPID_PLUTO) // Pluto: 5
2235 {
2236 UTMI2_ORXBYTE(0x2c, 0xc5);
2237 UTMI2_ORXBYTE(0x2d, 0x3);//enable TX common mode,
2238 UTMI2_ORXBYTE(0x2f, 0x4a); //preemsis
2239 UTMI2_ORXBYTE(0x13, 0x70);
2240 }
2241 else if (MDrv_USBGetChipID_Port2()==CHIPID_TITANIA2) // Titania 2
2242 {
2243 UTMI2_ORXBYTE(0x2c, 0xc1);
2244 UTMI2_ORXBYTE(0x2d, 0x3);//enable TX common mode,
2245 UTMI2_ORXBYTE(0x2f, 0x4a); //preemsis
2246 }
2247 else if (MDrv_USBGetChipID_Port2()==CHIPID_TRITON) //Triton=6
2248 {
2249 UTMI2_SETXBYTE(0x2c,0xc1);
2250 UTMI2_SETXBYTE(0x2d,0x3b);//enable TX common mode,
2251 UTMI2_ORXBYTE(0x2f,0x0e); //preemsis
2252 }
2253 else if (MDrv_USBGetChipID_Port2()==CHIPID_EUCLID) // Euclid
2254 {
2255 UTMI2_ORXBYTE(0x2c, 0xc1);
2256 UTMI2_ORXBYTE(0x2d, 0x3);//enable TX common mode,
2257 UTMI2_ORXBYTE(0x2f, 0x4a); //preemsis
2258 }
2259 else if ( (MDrv_USBGetChipID_Port2()==CHIPID_TITANIA3) || // Titania 3, Titania 4
2260 (MDrv_USBGetChipID_Port2()==CHIPID_TITANIA4) ||
2261 (MDrv_USBGetChipID_Port2()==CHIPID_TITANIA7) ||
2262 (MDrv_USBGetChipID_Port2()==CHIPID_TITANIA8) ||
2263 (MDrv_USBGetChipID_Port2()==CHIPID_TITANIA9) ||
2264 (MDrv_USBGetChipID_Port2()==CHIPID_TITANIA12) ||
2265 (MDrv_USBGetChipID_Port2()==CHIPID_TITANIA13) ||
2266 (MDrv_USBGetChipID_Port2()==CHIPID_JANUS) ||
2267 (MDrv_USBGetChipID_Port2() == CHIPID_MARIA10) ||
2268 (MDrv_USBGetChipID_Port2() == CHIPID_MACAW12) ||
2269 (MDrv_USBGetChipID_Port2() == CHIPID_JANUS2) ||
2270 (MDrv_USBGetChipID_Port2() == CHIPID_AMBER6) )
2271 {
2272 UTMI2_ORXBYTE(0x2c, 0x10); //TX-current adjust to 105%
2273 UTMI2_ORXBYTE(0x2d, 0x02); //Pre-emphasis enable
2274 UTMI2_ORXBYTE(0x2f, 0x81); //HS_TX common mode current enable (100mV);Pre-emphasis enable (10%)
2275 UTMI2_ORXBYTE(0x09,0x81); //UTMI RX anti-dead-lock, ISI improvement
2276 }
2277 else //for Amber1 later 40nm
2278 {
2279 UTMI2_ORXBYTE(0x2c, 0x50);
2280 UTMI2_ORXBYTE(0x2d, 0x02);
2281 UTMI2_ORXBYTE(0x2f, 0x01);
2282 UTMI2_ORXBYTE(0x09,0x81); //UTMI RX anti-dead-lock, ISI improvement
2283 }
2284
2285 if (MDrv_USBGetChipID_Port2()==CHIPID_PLUTO) // If is Pluto
2286 UTMI2_ORXBYTE(0x09,0x01); //ISI improvement
2287 else
2288 UTMI2_ORXBYTE(0x13,0x02); //ISI improvement
2289
2290 if ( (MDrv_USBGetChipID_Port2() == CHIPID_NEPTUNE) ||
2291 (MDrv_USBGetChipID_Port2() == CHIPID_ERIS) ||
2292 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA) ||
2293 (MDrv_USBGetChipID_Port2() == CHIPID_PLUTO) ||
2294 (MDrv_USBGetChipID_Port2() == CHIPID_TRITON) ||
2295 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA2) )
2296 {
2297 }
2298 else
2299 {
2300 UTMI2_ORXBYTE(0x0b, 0x80); //TX timing select latch path
2301 }
2302
2303 UTMI2_ORXBYTE(0x09,0x60);//0x20; //patch low tempture,FL meta issue and enable new FL RX engin
2304
2305 if ( (MDrv_USBGetChipID_Port2() == CHIPID_NEPTUNE) ||
2306 (MDrv_USBGetChipID_Port2() == CHIPID_ERIS) ||
2307 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA) ||
2308 (MDrv_USBGetChipID_Port2() == CHIPID_PLUTO) ||
2309 (MDrv_USBGetChipID_Port2() == CHIPID_TRITON) ||
2310 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA2) ||
2311 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA3) ||
2312 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA4) ||
2313 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA7) ||
2314 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA8) ||
2315 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA9) ||
2316 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA12) ||
2317 (MDrv_USBGetChipID_Port2() == CHIPID_TITANIA13) ||
2318 (MDrv_USBGetChipID_Port2() == CHIPID_JANUS) ||
2319 (MDrv_USBGetChipID_Port2() == CHIPID_MARIA10) ||
2320 (MDrv_USBGetChipID_Port2() == CHIPID_MACAW12) ||
2321 (MDrv_USBGetChipID_Port2() == CHIPID_JANUS2) ||
2322 (MDrv_USBGetChipID_Port2() == CHIPID_AMBER1) ||
2323 (MDrv_USBGetChipID_Port2() == CHIPID_AMBER3) ||
2324 (MDrv_USBGetChipID_Port2() == CHIPID_AMBER5) ||
2325 (MDrv_USBGetChipID_Port2() == CHIPID_AMBER6) ||
2326 (MDrv_USBGetChipID_Port2() == CHIPID_AMBER7) ||
2327 (MDrv_USBGetChipID_Port2() == CHIPID_AMETHYST) )
2328 {
2329 UTMI2_ORXBYTE(0x15,0x20); //HOST CHIRP Detect
2330 }
2331 else
2332 {
2333 UTMI2_ORXBYTE(0x15,0x60); // change to 55 interface (bit6)
2334 }
2335
2336 MsOS_DelayTask(10);
2337 }
2338
2339 #ifdef Enable_Issue_TestPacket
2340
2341 extern void USB_DACHE_FLUSH_Port2(U32 addr, U32 length);
2342
IssueTestPacket_Port2(U8 * TestDataAddr)2343 void IssueTestPacket_Port2(U8 *TestDataAddr)
2344 {
2345 U32 DMAAddress,datreg32;
2346 U8 *TestData;
2347 #ifdef Issue_TestPacket
2348 U16 i;
2349 #endif
2350
2351 printf("Start Test Packet on Port1\n");
2352 TestData=(U8*) KSEG02KSEG1(TestDataAddr);
2353
2354 #ifdef Issue_OUTTestPacket
2355 TestData[0]=0x55;
2356 TestData[1]=0x53;
2357 TestData[2]=0x42;
2358 TestData[3]=0x43;
2359 TestData[4]=0x88;
2360 TestData[5]=0x88;
2361 TestData[6]=0x89;
2362 TestData[7]=0xa0;
2363 TestData[8]=0x00;
2364 TestData[9]=0x02;
2365 TestData[10]=0x00;
2366 TestData[11]=0x00;
2367 TestData[12]=0x80;
2368 TestData[13]=0x00;
2369 TestData[14]=0x0a;
2370 TestData[15]=0x28;
2371 TestData[16]=0x00;
2372 TestData[17]=0x00;
2373 TestData[18]=0x00;
2374 TestData[19]=0x00;
2375 TestData[20]=0x84;
2376 TestData[21]=0x00;
2377 TestData[22]=0x00;
2378 TestData[23]=0x01;
2379 TestData[24]=0x00;
2380 TestData[25]=0x00;
2381 TestData[26]=0x00;
2382 TestData[27]=0x00;
2383 TestData[28]=0x00;
2384 TestData[29]=0x00;
2385 TestData[30]=0x00;
2386 #endif
2387
2388 //printf("3AAC:%x\n",XBYTE[0x3AAC]);
2389 //printf("UTMI(0x2c):%x\n",XBYTE[gUTMI2_BASE+0x2C]);
2390 #ifdef Issue_TestPacket
2391 TestData[0]=0x0;
2392 TestData[1]=0x0;
2393 TestData[2]=0x0;
2394 TestData[3]=0x0;
2395 TestData[4]=0x0;
2396 TestData[5]=0x0;
2397 TestData[6]=0x0;
2398 TestData[7]=0x0;
2399 TestData[8]=0x0;
2400 TestData[9]=0xaa;
2401 TestData[10]=0xaa;
2402 TestData[11]=0xaa;
2403 TestData[12]=0xaa;
2404 TestData[13]=0xaa;
2405 TestData[14]=0xaa;
2406 TestData[15]=0xaa;
2407 TestData[16]=0xaa;
2408 TestData[17]=0xee;
2409 TestData[18]=0xee;
2410 TestData[19]=0xee;
2411 TestData[20]=0xee;
2412 TestData[21]=0xee;
2413 TestData[22]=0xee;
2414 TestData[23]=0xee;
2415 TestData[24]=0xee;
2416 TestData[25]=0xfe;
2417 TestData[26]=0xff;
2418 TestData[27]=0xff;
2419 TestData[28]=0xff;
2420 TestData[29]=0xff;
2421 TestData[30]=0xff;
2422 TestData[31]=0xff;
2423 TestData[32]=0xff;
2424 TestData[33]=0xff;
2425 TestData[34]=0xff;
2426 TestData[35]=0xff;
2427 TestData[36]=0xff;
2428 TestData[37]=0x7f;
2429 TestData[38]=0xbf;
2430 TestData[39]=0xdf;
2431 TestData[40]=0xef;
2432 TestData[41]=0xf7;
2433 TestData[42]=0xfb;
2434 TestData[43]=0xfd;
2435 TestData[44]=0xfc;
2436 TestData[45]=0x7e;
2437 TestData[46]=0xbf;
2438 TestData[47]=0xdf;
2439 TestData[48]=0xfb;
2440 TestData[49]=0xfd;
2441 TestData[50]=0xfb;
2442 TestData[51]=0xfd;
2443 TestData[52]=0x7e;
2444
2445 for (i=53; i<128; i++)
2446 TestData[i]= 0;
2447
2448 #endif
2449
2450 USB_DACHE_FLUSH_Port2((U32)TestDataAddr, 128);
2451 //printf("[9]=0x%bx\n", TestData[9]);
2452
2453 //DbgPortEanble();
2454
2455 UHC2_ORXBYTE(0x50,0x14); //enable test packet and lookback
2456
2457 UTMI2_ORXBYTE(0x06,0x03); //TR/RX reset
2458 UTMI2_ANDXBYTE(0x06,0xFC);
2459
2460 while(1)
2461 {
2462 DMAAddress=(U32)VA2PA(TestData);
2463
2464 //set DMA memory base address
2465 UHC2_SETXBYTE(0x74,(U8)DMAAddress);
2466 UHC2_SETXBYTE(0x75,(U8)(DMAAddress>>8));
2467 UHC2_SETXBYTE(0x76,(U8)(DMAAddress>>16));
2468 UHC2_SETXBYTE(0x77,(U8)(DMAAddress>>24));
2469
2470 //printf("start check 2474=%2bx\n",XBYTE[0x2474]);
2471 //printf("start check 2475=%2bx\n",XBYTE[0x2475]);
2472 //printf("start check 2476=%2bx\n",XBYTE[0x2476]);
2473 //printf("start check 2477=%2bx\n",XBYTE[0x2477]);
2474
2475
2476 //set DMA data Length and type(memory to FIFO)
2477 #ifdef Issue_TestPacket
2478 datreg32 = 53;
2479 #else
2480 datreg32 = 31;
2481 #endif
2482
2483 datreg32 = datreg32 << 8;
2484 datreg32 = datreg32 | 0x02;
2485
2486 UHC2_SETXBYTE(0x70,(U8)datreg32);
2487 UHC2_SETXBYTE(0x71,(U8)(datreg32>>8));
2488 UHC2_SETXBYTE(0x72,(U8)(datreg32>>16));
2489 UHC2_SETXBYTE(0x73,(U8)(datreg32>>24));
2490
2491 UHC2_ORXBYTE(0x70,0x01);//DMA start
2492
2493
2494 //printf("start check 2470=%2bx\n",XBYTE[0x2470]);
2495 //printf("start check 2471=%2bx\n",XBYTE[0x2471]);
2496 //printf("start check 2472=%2bx\n",XBYTE[0x2472]);
2497 //printf("start check 2473=%2bx\n",XBYTE[0x2473]);
2498
2499 //MsOS_DelayTask(1000);
2500
2501 //printf("start check 2444=%2bx\n",XBYTE[0x2444]);
2502
2503 while(!(UHC2_READXBYTE(0x44) &0x08))
2504 {
2505 //printf("XBYTE[0x2444]=%2bx\n",XBYTE[0x2444]);
2506 //MsOS_DelayTask(10);//delay
2507 }
2508
2509 //printf("Dma success\n",0);
2510
2511 MsOS_DelayTask(10);
2512 }
2513
2514 }
2515 #endif
2516
2517 //#ifdef Enable_Issue_TestPacketByHW
2518 #if 1
MDrv_SendTestPacketByHW_Port2(void)2519 void MDrv_SendTestPacketByHW_Port2(void)
2520 {
2521 printf("Start test packet on port 1\n");
2522 UTMI2_SETXBYTE(0x14, 0x00);
2523 UTMI2_SETXBYTE(0x15, 0x06);
2524
2525 UTMI2_SETXBYTE(0x10, 0x38);
2526 UTMI2_SETXBYTE(0x11, 0x00);
2527
2528 UTMI2_SETXBYTE(0x32, 0xFE);
2529 UTMI2_SETXBYTE(0x33, 0x0B);
2530 }
2531 #endif
2532
IssueTestJ_Port2(void)2533 void IssueTestJ_Port2(void)
2534 {
2535 printf("TEST_J on Port1\n");
2536
2537 UTMI2_SETXBYTE(0x2c, 0x04);
2538 UTMI2_SETXBYTE(0x2d, 0x20);
2539 UTMI2_SETXBYTE(0x2e, 0x00);
2540 UTMI2_SETXBYTE(0x2f, 0x00);
2541
2542 USBC2_ORXBYTE(0, 0x02); //Enable UHC_RST
2543 MsOS_DelayTask(10);
2544 USBC2_ANDXBYTE(0, 0xFD);
2545
2546 //UHCREG(0x32)|=0x01;
2547 UHC2_ORXBYTE(0x32,0x01);
2548 MsOS_DelayTask(10);
2549 //UHCREG(0x32)&=0xfe;
2550 UHC2_ANDXBYTE(0x32,0xfe);
2551
2552 MsOS_DelayTask(10);
2553 UHC2_ORXBYTE(0x50,0x01); //enable test J
2554 }
2555
IssueTestK_Port2(void)2556 void IssueTestK_Port2(void)
2557 {
2558 printf("TEST_K on port1\n");
2559
2560 UTMI2_SETXBYTE(0x2c, 0x04);
2561 UTMI2_SETXBYTE(0x2d, 0x20);
2562 UTMI2_SETXBYTE(0x2e, 0x00);
2563 UTMI2_SETXBYTE(0x2f, 0x00);
2564
2565 USBC2_ORXBYTE(0, 0x02); //Enable UHC_RST
2566 MsOS_DelayTask(10);
2567 USBC2_ANDXBYTE(0, 0xFD);
2568
2569 //UHCREG(0x32)|=0x01;
2570 UHC2_ORXBYTE(0x32,0x01);
2571 MsOS_DelayTask(10);
2572 //UHCREG(0x32)&=0xfe;
2573 UHC2_ANDXBYTE(0x32,0xfe);
2574
2575 MsOS_DelayTask(10);
2576 UHC2_ORXBYTE(0x50,0x02); //enable test K
2577 }
2578
IssueSE0_Port2(void)2579 void IssueSE0_Port2(void)
2580 {
2581 printf("SE0 on port1\n");
2582
2583 UTMI2_SETXBYTE(0x06, 0xA0);
2584 UTMI2_SETXBYTE(0x07, 0x04);
2585
2586 MsOS_DelayTask(10);
2587 USBC2_ORXBYTE(0, 0x02); //Enable UHC_RST
2588 MsOS_DelayTask(10);
2589 USBC2_ANDXBYTE(0, 0xFD);
2590
2591 UHC2_ORXBYTE(0x32,0x01);
2592 MsOS_DelayTask(10);
2593 //UHCREG(0x32)&=0xfe;
2594 UHC2_ANDXBYTE(0x32,0xfe);
2595 }
2596
MDrv_UsbSendTestPacket_Port2(void)2597 void MDrv_UsbSendTestPacket_Port2(void)
2598 {
2599 drvUSBHost_TurnOffPowerDownMode_Port2();
2600 MsOS_DelayTask(500);
2601 Port1_IssueTestPacket_Initial();
2602 MDrv_SendTestPacketByHW_Port2();
2603 }
2604
MDrv_UsbSendSE0_Port2(void)2605 void MDrv_UsbSendSE0_Port2(void)
2606 {
2607 drvUSBHost_TurnOffPowerDownMode_Port2();
2608 MsOS_DelayTask(500);
2609 Port1_IssueTestPacket_Initial();
2610 IssueSE0_Port2();
2611 }
2612
MDrv_UsbSendTestJ_Port2(void)2613 void MDrv_UsbSendTestJ_Port2(void)
2614 {
2615 drvUSBHost_TurnOffPowerDownMode_Port2();
2616 MsOS_DelayTask(500);
2617 Port1_IssueTestPacket_Initial();
2618 IssueTestJ_Port2();
2619 }
2620
MDrv_UsbSendTestK_Port2(void)2621 void MDrv_UsbSendTestK_Port2(void)
2622 {
2623 drvUSBHost_TurnOffPowerDownMode_Port2();
2624 MsOS_DelayTask(500);
2625 Port1_IssueTestPacket_Initial();
2626 IssueTestK_Port2();
2627 }
2628
MDrv_GetUsbDeviceType_Port2()2629 U8 MDrv_GetUsbDeviceType_Port2()
2630 {
2631 U8 u8DevType;
2632
2633 if ( (gUsbDeviceState_Port2==BAD_DEVICE) ||
2634 (gUsbDeviceState_Port2==NO_DEVICE) ||
2635 (gUsbDeviceState_Port2==POWER_SAVING) )
2636 return USB_INTERFACE_CLASS_NONE;
2637
2638 u8DevType = psAttachDevice_Port2->saCD[0].sInterface[0].bInterfaceClass;
2639
2640 return (u8DevType);
2641 }
2642
MDrv_GetUsbString_Port2(U8 u8StrID,S8 * pStrBuf,U8 u8BufLen)2643 void MDrv_GetUsbString_Port2(U8 u8StrID, S8 *pStrBuf, U8 u8BufLen)
2644 {
2645 U8 ii;
2646
2647 pStrBuf[0] = 0;
2648
2649 if (u8StrID == USB_STR_VENDOR)
2650 {
2651 for (ii=0; ii<u8BufLen; ii++)
2652 {
2653 pStrBuf[ii] = psAttachDevice_Port2->bStringManufacture[ii];
2654 if (pStrBuf[ii] == 0)
2655 break;
2656 }
2657 }
2658 else if (u8StrID == USB_STR_PRODUCT)
2659 {
2660 for (ii=0; ii<u8BufLen; ii++)
2661 {
2662 pStrBuf[ii] = psAttachDevice_Port2->bStringProduct[ii];
2663 if (pStrBuf[ii] == 0)
2664 break;
2665 }
2666 }
2667
2668 }
2669
MDrv_USBGetqTDTimeoutValue_Port2(void)2670 U8 MDrv_USBGetqTDTimeoutValue_Port2(void)
2671 {
2672 return gUsbTimeout_Port2;
2673 }
2674
MDrv_USBSetqTDTimeoutValue_Port2(U8 u8Value)2675 void MDrv_USBSetqTDTimeoutValue_Port2(U8 u8Value)
2676 {
2677 gUsbTimeout_Port2= u8Value;
2678 }
2679
MDrv_USBGetIORetryCount_Port2(void)2680 U8 MDrv_USBGetIORetryCount_Port2(void)
2681 {
2682 return gUsbRetryCount_Port2;
2683 }
2684
MDrv_USBSetIORetryCount_Port2(U8 u8Value)2685 void MDrv_USBSetIORetryCount_Port2(U8 u8Value)
2686 {
2687 gUsbRetryCount_Port2= u8Value;
2688 }
2689
MDrv_USBGetVIDPID_Port2(U16 * pVID,U16 * pPID)2690 void MDrv_USBGetVIDPID_Port2(U16 *pVID, U16 *pPID)
2691 {
2692 *pVID = ((U16) psAttachDevice_Port2->sDD.bVIDHighByte << 8 ) |
2693 (U16) psAttachDevice_Port2->sDD.bVIDLowByte;
2694
2695 *pPID = ((U16) psAttachDevice_Port2->sDD.bPIDHighByte<< 8 ) |
2696 (U16) psAttachDevice_Port2->sDD.bPIDLowByte;
2697 }
2698
MDrv_GetUsbStorString_Port2(U8 uLun,U8 u8StrID,S8 * pStrBuf,U8 u8BufLen)2699 void MDrv_GetUsbStorString_Port2(U8 uLun, U8 u8StrID, S8 *pStrBuf, U8 u8BufLen)
2700 {
2701 U8 ii;
2702
2703 pStrBuf[0] = 0;
2704
2705 if (u8StrID == USB_STR_VENDOR)
2706 {
2707 for (ii=0; ii<u8BufLen; ii++)
2708 {
2709 if (ii >= 8)
2710 break;
2711
2712 pStrBuf[ii] = Mass_stor_us1_port2.Mass_stor_device[uLun].u8VendorID[ii];
2713 }
2714 pStrBuf[ii] = 0; //Null terminal
2715 }
2716 else if (u8StrID == USB_STR_PRODUCT)
2717 {
2718 for (ii=0; ii<u8BufLen; ii++)
2719 {
2720 if (ii >= 16)
2721 break;
2722
2723 pStrBuf[ii] = Mass_stor_us1_port2.Mass_stor_device[uLun].u8ProductID[ii];
2724 }
2725 pStrBuf[ii] = 0; //Null terminal
2726 }
2727
2728 }
2729
MDrv_GetUsbDevInterfaceClass_Port2(void)2730 U8 MDrv_GetUsbDevInterfaceClass_Port2(void)
2731 {
2732 U8 u8DevType;
2733
2734 u8DevType = psAttachDevice_Port2->saCD[0].sInterface[0].bInterfaceClass;
2735
2736 return (u8DevType);
2737 }
2738
2739 #endif //#if defined(MSOS_TYPE_NOS)
2740
2741