1 //<MStar Software> 2 //****************************************************************************** 3 // MStar Software 4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved. 5 // All software, firmware and related documentation herein ("MStar Software") are 6 // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by 7 // law, including, but not limited to, copyright law and international treaties. 8 // Any use, modification, reproduction, retransmission, or republication of all 9 // or part of MStar Software is expressly prohibited, unless prior written 10 // permission has been granted by MStar. 11 // 12 // By accessing, browsing and/or using MStar Software, you acknowledge that you 13 // have read, understood, and agree, to be bound by below terms ("Terms") and to 14 // comply with all applicable laws and regulations: 15 // 16 // 1. MStar shall retain any and all right, ownership and interest to MStar 17 // Software and any modification/derivatives thereof. 18 // No right, ownership, or interest to MStar Software and any 19 // modification/derivatives thereof is transferred to you under Terms. 20 // 21 // 2. You understand that MStar Software might include, incorporate or be 22 // supplied together with third party`s software and the use of MStar 23 // Software may require additional licenses from third parties. 24 // Therefore, you hereby agree it is your sole responsibility to separately 25 // obtain any and all third party right and license necessary for your use of 26 // such third party`s software. 27 // 28 // 3. MStar Software and any modification/derivatives thereof shall be deemed as 29 // MStar`s confidential information and you agree to keep MStar`s 30 // confidential information in strictest confidence and not disclose to any 31 // third party. 32 // 33 // 4. MStar Software is provided on an "AS IS" basis without warranties of any 34 // kind. Any warranties are hereby expressly disclaimed by MStar, including 35 // without limitation, any warranties of merchantability, non-infringement of 36 // intellectual property rights, fitness for a particular purpose, error free 37 // and in conformity with any international standard. You agree to waive any 38 // claim against MStar for any loss, damage, cost or expense that you may 39 // incur related to your use of MStar Software. 40 // In no event shall MStar be liable for any direct, indirect, incidental or 41 // consequential damages, including without limitation, lost of profit or 42 // revenues, lost or damage of data, and unauthorized system use. 43 // You agree that this Section 4 shall still apply without being affected 44 // even if MStar Software has been modified by MStar in accordance with your 45 // request or instruction for your use, except otherwise agreed by both 46 // parties in writing. 47 // 48 // 5. If requested, MStar may from time to time provide technical supports or 49 // services in relation with MStar Software to you for your use of 50 // MStar Software in conjunction with your or your customer`s product 51 // ("Services"). 52 // You understand and agree that, except otherwise agreed by both parties in 53 // writing, Services are provided on an "AS IS" basis and the warranty 54 // disclaimer set forth in Section 4 above shall apply. 55 // 56 // 6. Nothing contained herein shall be construed as by implication, estoppels 57 // or otherwise: 58 // (a) conferring any license or right to use MStar name, trademark, service 59 // mark, symbol or any other identification; 60 // (b) obligating MStar or any of its affiliates to furnish any person, 61 // including without limitation, you and your customers, any assistance 62 // of any kind whatsoever, or any information; or 63 // (c) conferring any license or right under any intellectual property right. 64 // 65 // 7. These terms shall be governed by and construed in accordance with the laws 66 // of Taiwan, R.O.C., excluding its conflict of law rules. 67 // Any and all dispute arising out hereof or related hereto shall be finally 68 // settled by arbitration referred to the Chinese Arbitration Association, 69 // Taipei in accordance with the ROC Arbitration Law and the Arbitration 70 // Rules of the Association by three (3) arbitrators appointed in accordance 71 // with the said Rules. 72 // The place of arbitration shall be in Taipei, Taiwan and the language shall 73 // be English. 74 // The arbitration award shall be final and binding to both parties. 75 // 76 //****************************************************************************** 77 //<MStar Software> 78 #ifndef DRV_USBHOST_CONFIG_H 79 #define DRV_USBHOST_CONFIG_H 80 81 #include <MsIRQ.h> 82 83 //#define URB_TIMEOUT_BY_WAIT_EVENT 84 //#define TIMER_NO_ALL_INT_DISABLE 85 86 #define ROOTHUB_INTERRUPT_MODE 87 #define ROOTHUB_TIMER_INTERVAL 500 88 89 #define NUM_OF_ROOT_HUB 4 90 91 #define URANUS4_SERIAL_USE //U4, K1 92 ////#define USE_PORT2_AS_PORT1 //U4, K1 93 //#define ENABLE_PORT1_DPDM_SWAP //U4 only 94 //#define ENABLE_PIPE_FLUSH 95 #define ENABLE_LEGACY_CACHE_SETTING 96 97 //#define CPU_TYPE_AEON 98 #define CPU_TYPE_MIPS 99 100 #if defined(CPU_TYPE_AEON) 101 #define OS_BASE_ADDR 0xa0000000 102 #elif defined(CPU_TYPE_MIPS) // U4, K1, K2 103 #if defined(TITANIA2_SERIAL_USE) 104 #define OS_BASE_ADDR 0xbf800000 105 #else 106 #define OS_BASE_ADDR 0xbf200000 107 #endif 108 #define MIPS_L1_CACHE_SIZE 32 109 #else 110 #No CPU type for USB 111 #endif 112 113 #ifdef ENABLE_LEGACY_CACHE_SETTING 114 #define CPU_L1_CACHE_BOUND (15) 115 #else 116 #define CPU_L1_CACHE_BOUND (MIPS_L1_CACHE_SIZE-1) 117 #endif 118 119 #define KAISERIN_CHIP_TOP_BASE (OS_BASE_ADDR+(0x1E00*2)) 120 121 #ifdef URANUS4_SERIAL_USE 122 #define BASE_UTMI0 (OS_BASE_ADDR+(0x3A80*2)) 123 #define BASE_UHC0 (OS_BASE_ADDR+(0x2400*2)) 124 #define BASE_USBC0 (OS_BASE_ADDR+(0x0700*2)) 125 #define E_IRQ_UHC (E_INT_IRQ_UHC) 126 #define E_IRQ_USBC (E_INT_IRQ_USB) 127 128 #define BASE_UTMI1 (OS_BASE_ADDR+(0x3A00*2)) 129 #define BASE_UHC1 (OS_BASE_ADDR+(0x0D00*2)) 130 #define BASE_USBC1 (OS_BASE_ADDR+(0x0780*2)) 131 #define E_IRQ_UHC1 (E_INT_IRQ_UHC1) 132 #define E_IRQ_USBC1 (E_INT_IRQ_USB1) 133 134 #define BASE_UTMI2 (OS_BASE_ADDR+(0x2A00*2)) 135 #define BASE_UHC2 (OS_BASE_ADDR+(0x10300*2)) 136 #define BASE_USBC2 (OS_BASE_ADDR+(0x10200*2)) 137 #define E_IRQ_UHC2 (E_INT_IRQ_UHC2) 138 #define E_IRQ_USBC2 (E_INT_IRQ_USB2) 139 #endif 140 141 #define BASE_UTMI3 (OS_BASE_ADDR+(0x20A00*2)) 142 #define BASE_UHC3 (OS_BASE_ADDR+(0x20900*2)) 143 #define BASE_USBC3 (OS_BASE_ADDR+(0x20800*2)) 144 #define E_IRQ_UHC3 (E_INT_IRQ_UHC3) 145 #define E_IRQ_USBC3 (E_INT_IRQ_USB3) 146 147 148 //#define USB_PTP_ENABLE 149 //#define USB2_PTP_ENABLE 150 151 //#define USB_HID_ENABLE 152 153 extern MS_U32 gBaseUTMI, gBaseUSBC, gBaseUHC; 154 extern MS_U32 gBaseUTMI2, gBaseUSBC2, gBaseUHC2; 155 extern MS_U32 gIrqUHC, gIrqUHC2; 156 157 #endif 158 159