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77 //<MStar Software>
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93 ////////////////////////////////////////////////////////////////////////////////
94
95 ///////////////////////////////////////////////////////////////////////////////////////////////////
96 ///
97 /// file drvSC.c
98 /// @brief SmartCard Driver Interface
99 /// @author MStar Semiconductor Inc.
100 ///////////////////////////////////////////////////////////////////////////////////////////////////
101
102 //-------------------------------------------------------------------------------------------------
103 // Include Files
104 //-------------------------------------------------------------------------------------------------
105
106 //-------------------------------------------------------------------------------------------------
107 // Include Files
108 //-------------------------------------------------------------------------------------------------
109 // Common Definition
110 #include "MsCommon.h"
111 #include "drvSC.h"
112
113 // Internal Definition
114 #include "regSC.h"
115 #include "halSC.h"
116
117 //-------------------------------------------------------------------------------------------------
118 // Driver Compiler Options
119 //-------------------------------------------------------------------------------------------------
120 #define SC_DBG_ENABLE 2UL
121 #define SC_DEV_NUM_MAX 2UL
122 //-------------------------------------------------------------------------------------------------
123 // Local Defines
124 //-------------------------------------------------------------------------------------------------
125 #if SC_DBG_ENABLE
126 #define SC_DBG(fmt, args...) printf("[DEV][SMART][%06d] " fmt, __LINE__, ##args)
127 #define SC_ERR(fmt, args...) printf("[DEV][SMART][%06d] " fmt, __LINE__, ##args)
128 #else
129 #define SC_DBG(fmt, args...) {}
130 #define SC_ERR(fmt, args...) printf("[DEV][SMART][%06d] " fmt, __LINE__, ##args)
131 #endif
132
133 // Setting
134 //#define SC_EVENT() MsOS_SetEvent(s32CardEventId, SC_EVENT_CARD)
135 //-------------------------------------------------------------------------------------------------
136 // Local Structures
137 //-------------------------------------------------------------------------------------------------
138
139 //-------------------------------------------------------------------------------------------------
140 // Global Variables
141 //-------------------------------------------------------------------------------------------------
142
143 //-------------------------------------------------------------------------------------------------
144 // Local Variables
145 //-------------------------------------------------------------------------------------------------
146
147 MS_VIRT _regSCBase[SC_DEV_NUM_MAX];
148 MS_VIRT _regSCHWBase = 0;
149
150 //-------------------------------------------------------------------------------------------------
151 // Debug Functions
152 //-------------------------------------------------------------------------------------------------
153
154 //-------------------------------------------------------------------------------------------------
155 // Local Functions
156 //-------------------------------------------------------------------------------------------------
157
158 //-------------------------------------------------------------------------------------------------
159 // Global Functions
160 //-------------------------------------------------------------------------------------------------
161
HAL_SC_RegMap(MS_VIRT u32RegBase)162 void HAL_SC_RegMap(MS_VIRT u32RegBase)
163 {
164 _regSCBase[0] = u32RegBase;
165 }
166
HAL_SC_HW_RegMap(MS_VIRT u32RegBase)167 void HAL_SC_HW_RegMap(MS_VIRT u32RegBase)
168 {
169 _regSCHWBase = u32RegBase;
170 }
171
HAL_SC_SetClk(MS_U8 u8SCID,MS_U16 u16clk)172 void HAL_SC_SetClk(MS_U8 u8SCID,MS_U16 u16clk)
173 {
174 MS_U16 reg;
175
176 reg = HW_READ(REG_TOP_CKG_SM_CA);
177 if (u8SCID == 0)
178 {
179 reg &= (~TOP_CKG_SM_CA0_CLK_MASK);
180 switch (u16clk)
181 {
182 case E_SC_CLK_3M :
183 reg |= TOP_CKG_SM_CA0_CLK_27M_D8;
184 break;
185 case E_SC_CLK_4P5M :
186 reg |= TOP_CKG_SM_CA0_CLK_27M_D6;
187 break;
188 case E_SC_CLK_6M :
189 reg |= TOP_CKG_SM_CA0_CLK_27M_D4;
190 break;
191 case E_SC_CLK_13M :
192 reg |= TOP_CKG_SM_CA0_CLK_27M_D2;
193 break;
194 default:
195 SC_ERR("unknown SC_Set_Clk\n");
196 break;
197 }
198 }
199 else if (u8SCID == 1)
200 {
201 SC_ERR("[SC] not support SM1\n");
202 }
203 HW_WRITE(REG_TOP_CKG_SM_CA, reg);
204 }
205
HAL_SC_Init(MS_U8 u8SCID)206 void HAL_SC_Init(MS_U8 u8SCID)
207 {
208 //reg_allpad_in
209 printf("HAL_SC_Init In\n");
210 HW_WRITE(REG_TOP_ALLPAD_IN, HW_READ(REG_TOP_ALLPAD_IN) & ~TOP_ALLPAD_IN_EN);
211
212 HAL_SC_PowerCtrl(u8SCID, TRUE);
213
214 // Let the related I/O Low
215 SC_WRITE(u8SCID,UART_LCR, UART_LCR_SBC); //I/O
216 // mask tx level int and set tx level to 31->32 trigger int mode.
217 // mask BGWT and CGWT at initialization
218 SC_WRITE(u8SCID, UART_CTRL2, SC_READ(u8SCID, UART_CTRL2)|0x3E);
219 // BGT default value will be 0x16, reset to 0 here to disable the BGT int
220 SC_WRITE(u8SCID, UART_SCBGT, 0x00)
221 if (u8SCID == 0)
222 {
223 printf("Do reg_sm0_open\n");
224 //reg_sm0_open
225 //HW_WRITE(REG_TOP_TS1_PE, HW_READ(REG_TOP_TS1_PE)|BIT(3)|BIT(6)); //for Edison new pad
226 //HW_WRITE(REG_TOP_SM0,HW_READ(REG_TOP_SM0)|0x20);
227 //HW_WRITE(REG_TOP_TEST_MODE,HW_READ(REG_TOP_TEST_MODE)&(~(BIT(2)|BIT(1)|BIT(0))));
228 //HW_WRITE(REG_TOP_CONFIG,HW_READ(REG_TOP_CONFIG)&(~(BIT(13)|BIT(12)|BIT(11))));
229
230 }
231 if (u8SCID ==1)
232 {
233 SC_ERR("[SC] not support SM1\n");
234 }
235 }
236
HAL_SC_Exit(MS_U8 u8SCID)237 void HAL_SC_Exit(MS_U8 u8SCID)
238 {
239 HAL_SC_PowerCtrl(u8SCID, FALSE);
240 }
241
HAL_SC_PowerCtrl(MS_U8 u8SCID,MS_BOOL bEnable)242 void HAL_SC_PowerCtrl(MS_U8 u8SCID, MS_BOOL bEnable)
243 {
244 if (u8SCID == 0)
245 {
246 if (bEnable)
247 {
248 // SM0: enable switch to specified clk
249 HW_WRITE(REG_TOP_CKG_UART_CLK, (HW_READ(REG_TOP_CKG_UART_CLK) & ~(TOP_CKG_UART1_CLK_DIS | TOP_CKG_UART1_CLK_MASK)) | TOP_CKG_UART1_CLK_144M);
250 HW_WRITE(REG_TOP_CKG_SM_CA, HW_READ(REG_TOP_CKG_SM_CA) & ~TOP_CKG_SM_CA0_DIS); //how
251 }
252 else
253 {
254 // SM0: disable clk
255 HW_WRITE(REG_TOP_CKG_UART_CLK, (HW_READ(REG_TOP_CKG_UART_CLK) | TOP_CKG_UART1_CLK_DIS));//how
256 HW_WRITE(REG_TOP_CKG_SM_CA, (HW_READ(REG_TOP_CKG_SM_CA) | TOP_CKG_SM_CA0_DIS)); //how
257 }
258 }
259 if (u8SCID ==1)
260 {
261 SC_ERR("[SC] not support SM1\n");
262 }
263 }
264
HAL_SC_CardInvert(MS_U8 u8SCID,SC_CardDetType eTpye)265 void HAL_SC_CardInvert(MS_U8 u8SCID, SC_CardDetType eTpye)
266 {
267 if (eTpye == E_SC_LOW_ACTIVE)
268 {
269 SC_OR(u8SCID,UART_CTRL3, UART_INVERT_CD);
270 }
271 else
272 {
273 SC_AND(u8SCID,UART_CTRL3, ~UART_INVERT_CD);
274 }
275 }
276
HAL_SC_CardVoltage_Config(MS_U8 u8SCID,SC_VoltageCtrl eVoltage)277 MS_BOOL HAL_SC_CardVoltage_Config(MS_U8 u8SCID, SC_VoltageCtrl eVoltage)
278 {
279 if (E_SC_VOLTAGE_MAX <= eVoltage)
280 return FALSE;
281 if (E_SC_VOLTAGE_3_POINT_3V == eVoltage)
282 {
283 HW_WRITE(REG_TOP_3V_5V_SELECT, (HW_READ(REG_TOP_3V_5V_SELECT) & ~(0x1)));
284 }
285 else if (E_SC_VOLTAGE_5V == eVoltage)
286 {
287 HW_WRITE(REG_TOP_3V_5V_SELECT, (HW_READ(REG_TOP_3V_5V_SELECT) | (0x1)));
288 }
289 else
290 return FALSE;
291 return TRUE;
292 }
293
294